Optical semiconductor device, optical receiver, and optical transceiver

Abstract

The invention relates to an optical semiconductor device, an optical receiver, and an optical transceiver. There is provided an optical semiconductor device including: a first semiconductor layer having a first band gap; and a second semiconductor layer having a second band gap smaller than the first band gap and formed on the first semiconductor layer. The first semiconductor layer includes a first conductive region having a first polarity, a second conductive region having a second polarity, and a first non-conductive region disposed between the first conductive region and the second conductive region. The second semiconductor layer includes a third conductive region having the first polarity, and a second non-conductive region. The third conductive region is in contact with the first conductive region and the first non-conductive region. The second non-conductive region is in contact with at least one of the second conductive region and the first non-conductive region and is not in contact with the first conductive region.

Description

Technical Field

[0001] The embodiments discussed herein relate to an optical semiconductor device that converts an optical signal into an electrical signal, an optical receiver including the optical semiconductor device, and an optical transceiver including the optical semiconductor device. Background Art

[0002] An optical receiver (alternatively, an optical transceiver including an optical receiver) is one of the key devices for realizing high-speed optical communication. An optical receiver includes a photodetector that converts a received optical signal into an electrical signal. Therefore, in order to realize high-speed optical communication, a photodetector capable of high-speed operation is required.

[0003] The photodetector is realized by, for example, an optical semiconductor device such as a photodiode. In recent years, optical semiconductor devices manufactured by silicon photonics have attracted attention.

[0004] The photodiode includes an absorption layer that absorbs light to generate electron and hole pairs. The electrons and / or holes generated in the absorption layer are output via electrodes. As a result, an electrical signal representing the intensity of the input light is obtained. That is, the received light signal is converted into an electrical signal.

[0005] A photodiode including a germanium layer as an absorption layer has been proposed. For example, a photodetector described in Japanese Patent Application Laid-Open No. 2016-111363 includes an N-type silicon layer, a germanium layer, and a P-type silicon layer, and a light signal is absorbed in the germanium layer. An electrical signal is generated from the absorbed light signal. Then, the electrical signal is output to the outside of the photodetector via the N-type silicon layer and the P-type silicon layer.

[0006] In a photodiode including a germanium layer as an absorption layer, electrons and holes generated in the germanium layer flow into the N-type silicon layer and the P-type silicon layer, respectively. At this time, hole accumulation occurs at the heterogeneous interface between the germanium layer and the P-type silicon layer. Therefore, due to the spatial electric field effect, the movement speed of the holes is reduced, and the response speed to the intensity change of the input light is limited.

[0007] An object of one aspect of the present invention is to improve the response speed of an optical semiconductor device. Summary of the invention

[0008] According to aspects of the embodiments, an optical semiconductor device includes: a first semiconductor layer having a first band gap; and a second semiconductor layer having a second band gap smaller than the first band gap and formed on the first semiconductor layer. The first semiconductor layer includes: a first conductive region having a first polarity, a second conductive region having a second polarity, and a first non-conductive region disposed between the first conductive region and the second conductive region. The second semiconductor layer includes: a third conductive region having a first polarity, and a second non-conductive region. The third conductive region contacts the first conductive region and the first non-conductive region. The second non-conductive region contacts at least one of the second conductive region and the first non-conductive region without contacting the first conductive region. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 An example of the structure of a photodiode is illustrated;

[0010] Figure 2 Another example of the structure of a photodiode is illustrated;

[0011] Figure 3A and Figure 3B An example of an optical semiconductor device according to an embodiment of the present disclosure is illustrated;

[0012] Figure 4A and Figure 4B Illustrated Figure 2 the operation of the illustrated optical semiconductor device;

[0013] FIG. 5A to FIG. 5C Illustrated based on Figure 3A and Figure 3B Operation of the optical semiconductor device of the illustrated embodiment;

[0014] Figure 6 An example of simulation results of OE response versus frequency is illustrated;

[0015] Fig. 7A and Figure 7B An example of measurement results of OE response with respect to frequency is illustrated;

[0016] Figure 8 An example of an optical semiconductor device according to a first modification is illustrated;

[0017] Fig. 9 An example of an optical semiconductor device according to a second modification is illustrated;

[0018] Fig.10 An example of an optical semiconductor device according to a third modification is illustrated;

[0019] Fig.11 An example of an optical semiconductor device according to a fourth modification is illustrated;

[0020] Fig.12 An example of an optical semiconductor device according to a fifth modification is illustrated;

[0021] Fig.13 An example of an optical semiconductor device according to a sixth modification is illustrated; and

[0022] Fig.14 An example of an optical transceiver on which the optical semiconductor device according to the embodiment is mounted is illustrated. DETAILED DESCRIPTION

[0023] Figure 1 An example of the structure of a photodiode is illustrated. The photodiode includes a p-type light absorbing layer 101 , an n-type electrode layer 102 , a carrier travelling layer 103 , a p-type carrier blocking layer 104 , an anode electrode 105 , a cathode electrode 106 , and a semi-insulating substrate 107 .

[0024] Here, generally speaking, in semiconductor materials, the drift velocity of holes is lower than the drift velocity of electrons. Therefore, the travel time of carriers is limited by the drift velocity of holes. Therefore, Figure 1 The illustrated photodiode adopts a uni-traveling carrier photodiode (UTC-PD) structure in order to shorten the carrier travel time.

[0025] Light input from the semi-insulating substrate 107 side passes through the n-type electrode layer 102 and the carrier traveling layer 103, and is absorbed in the p-type light absorbing layer 101. Then, electron and hole pairs are generated in the p-type light absorbing layer 101. Among the electron and hole pairs generated in the p-type light absorbing layer 101, the electron diffuses to the carrier traveling layer 103 and reaches the cathode electrode 106 via the n-type electrode layer 102. As a result, an induced current is generated in the external circuit. Since the holes flow into the anode electrode 105, they hardly contribute to the induced current. As described above, Figure 1 The illustrated photodiode uses only electrons as carriers, thereby increasing the response speed.

[0026] However, in Figure 1 In the illustrated structure, a metal material (i.e., an anode electrode 105) is provided near the p-type light absorbing layer 101. Therefore, a portion of the input light is absorbed by the anode electrode 105. Here, when the input light is absorbed by the metal material, electrons and holes are not generated. That is, ineffective absorption occurs. Therefore, the conversion efficiency from the input light to the carrier is poor, and the light receiving sensitivity is low. In addition, the number of layers (n-type electrode layer 102, carrier traveling layer 103, p-type light absorbing layer 101, and p-type carrier blocking layer 104) formed on the substrate is large and the manufacturing process is complicated.

[0027] Figure 2 Another example of the structure of a photodiode is illustrated. The photodiode includes a SiO2 layer 111, a p-type silicon layer 112, an intrinsic silicon layer 113, an n-type silicon layer 114, a germanium layer 115, a waveguide layer 117, a passivation layer 118, and metal contact electrodes 119 and 120.

[0028] The germanium layer 115 is an intrinsic germanium region and is used as a light absorbing layer. In addition, the germanium layer 115 is in contact with the p-type silicon layer 112, the intrinsic silicon layer 113, and the n-type silicon layer 114. The germanium layer 115 may include a p-type germanium layer 116. In this case, the p-type germanium layer 116 is in contact with the p-type silicon layer 112. The metal contact electrode 119 is used as an anode electrode and is in contact with the p-type silicon layer 112. The metal contact electrode 120 is used as a cathode electrode and is in contact with the n-type silicon layer 114.

[0029] The input light is guided to the germanium layer 115 via the waveguide layer 117. In the germanium layer 115, electron-hole pairs are generated. Among the electron-hole pairs generated in the germanium layer 115, the electrons reach the metal contact electrode 120 via the n-type silicon layer 114. As a result, an induced current is generated in the external circuit. When the germanium layer 115 includes the p-type germanium layer 116, the electric field strength in the germanium layer 115 increases so that the drift velocity of the electrons increases. The holes flow into the p-type silicon layer 112.

[0030] However, in Figure 2 In the illustrated structure, holes generated in the germanium layer 115 pass through the heterogeneous interface between the germanium layer 115 and the p-type silicon layer 112. At this time, hole accumulation occurs at the interface, and the response speed decreases due to the spatial electric field effect. The term "intrinsic" means that the impurity concentration is low enough and the semiconductor can be considered as an intrinsic semiconductor.

[0031] Implementation

[0032] Figure 3A and Figure 3B An example of an optical semiconductor device according to an embodiment of the present disclosure is illustrated. The optical semiconductor device 10 according to the embodiment is a photodetector (alternatively, a photodiode) that converts input light into an electric signal.

[0033] Figure 3A is a cross-sectional view of the optical semiconductor device 10 . Figure 3B is a top view of the optical semiconductor device 10. Here, Figure 3A Illustrated Figure 3B AA cross section shown. Note that Figure 3B illustrates the arrangement of waveguides, and Figure 3A and Figure 3B are not completely equivalent. For example, in Figure 3B In, omitted Figure 3A The SiO2 layer 17 is illustrated.

[0034] The optical semiconductor device 10 is formed on the surface of the silicon substrate 11. That is, the optical semiconductor device 10 is manufactured by silicon photonics.

[0035] A buried oxide (BOX) layer 12 is formed on the upper surface of the silicon substrate 11. The BOX layer 12 is an insulating film and is implemented by, for example, SiO2.

[0036] A silicon (Si) layer 13 is formed on the upper surface of the BOX layer 12. The thickness of the silicon layer 13 is not particularly limited, but is, for example, about 0.2 μm. In addition, the silicon layer 13 includes: Figure 3A The p-type silicon region (p_Si) 13p, the n-type silicon region (n_Si) 13n, the intrinsic silicon region (i_Si) 13i, and the Figure 3B The optical waveguide 13w is shown as an example. That is, the p-type silicon region 13p, the n-type silicon region 13n, the intrinsic silicon region 13i, and the optical waveguide 13w belong to the same semiconductor layer (ie, the silicon layer 13).

[0037] The p-type silicon region 13p is formed by selectively adding p-type impurities to the silicon layer 13. As the p-type impurities, for example, boron, aluminum, gallium, indium, etc. can be added. The n-type silicon region 13n is formed by selectively adding n-type impurities to the silicon layer 13. As the n-type impurities, for example, phosphorus, arsenic, antimony, etc. can be added.

[0038] Each of the p-type silicon region 13p and the n-type silicon region 13n contains impurities to a certain extent to function as a conductive region. Although not particularly limited, the impurity concentration of the p-type silicon region 13p and the n-type silicon region 13n is 1×10 17 / cm 3 or larger.

[0039] like Figure 3A As shown in the example, the intrinsic silicon region 13i is formed between the p-type silicon region 13p and the n-type silicon region 13n. The intrinsic silicon region 13i is a silicon region having a sufficiently low impurity concentration. Here, "intrinsic" refers to a pure state without impurities. However, in this specification, a semiconductor having an impurity concentration low enough to be considered as a non-conductive region may be referred to as an intrinsic semiconductor. In this example, the impurity concentration of the intrinsic silicon region 13i is 1×10 16 / cm 3 The intrinsic silicon region 13i is an example of a non-conductive region.

[0040] A germanium (Ge) layer 14 is formed on the upper surface of the silicon layer 13. Here, the band gap of germanium is smaller than the band gap of silicon. That is, a second semiconductor layer (here, germanium layer 14) having a second band gap smaller than the first band gap is formed on the upper surface of the first semiconductor layer (here, silicon layer 13) having a first band gap. The band gap of silicon is 1.11 eV, and the band gap of germanium is 0.67 eV. The band gap represents the energy difference between the top of the valence band and the bottom of the conduction band.

[0041] The germanium layer 14 includes a p-type germanium region (p_Ge) 14p. In this example, the germanium layer 14 includes the p-type germanium region 14p and the intrinsic germanium region (i_Ge) 14i. However, the germanium layer 14 may not include the intrinsic germanium region 14i. That is, the germanium layer 14 may include only the p-type germanium region 14p. The germanium layer 14 is used as a light absorbing layer of a photodiode.

[0042] The p-type germanium region 14p is formed by adding p-type impurities to the germanium layer 14. As the p-type impurities, for example, boron, aluminum, gallium, indium, etc. can be added. The p-type germanium region 14p contains impurities to a certain extent to function as a conductive region. Although not particularly limited, the impurity concentration of the p-type germanium region 14p is 1×10 17 / cm 3 or greater. The intrinsic germanium region 14i is a germanium region having a sufficiently low impurity concentration. In this example, the intrinsic germanium region 14i has a 1×10 16 / cm 3 The intrinsic germanium region 14i is an example of a non-conductive region.

[0043] The p-type germanium region 14p is formed to be in contact with the p-type silicon region 13p and the intrinsic silicon region 13i. Figure 3A In the illustrated embodiment, the p-type germanium region 14 p is not in contact with the n-type silicon region 13 n , but the p-type germanium region 14 p may be in contact with the n-type silicon region 13 n .

[0044] In this example, the intrinsic germanium region 14i is formed to be in contact with the intrinsic silicon region 13i and the n-type silicon region 13n. Figure 3A However, the intrinsic germanium region 14i may be formed to be in contact with the n-type silicon region 13n without being in contact with the intrinsic silicon region 13i. In any case, the intrinsic germanium region 14i is formed on the upper surface of the silicon layer 13 in a manner not to be in contact with the p-type silicon region 13p. That is, the germanium layer 14 is formed in a manner that the p-type silicon region 13p and the intrinsic germanium region 14i are not in contact with each other.

[0045] The electrode 15 is an anode electrode of the photodiode and is in contact with the p-type silicon region 13p of the silicon layer 13. The electrode 16 is a cathode electrode of the photodiode and is in contact with the n-type silicon region 13n of the silicon layer 13. Note that the SiO2 layer 17 is formed between the electrode 15 and the germanium layer 14. Moreover, the SiO2 layer 17 is also formed between the electrode 16 and the germanium layer 14.

[0046] When the optical semiconductor device 10 having the above structure is used as a photodetector, a specified reverse bias voltage is applied. As an example, the electrode 15 used as an anode electrode is grounded to the ground potential, and a specified positive voltage (for example, 3 volts) is applied to the electrode 16 used as a cathode electrode. In this case, a line of electric force is generated from the electrode 16 to the electrode 15 by the reverse bias voltage. A part of the electric force line passes through the germanium layer 14.

[0047] Input light via Figure 3B The optical waveguide 13w shown in the example is guided to the optical semiconductor device 10. Here, the optical waveguide 13w is Figure 3A A portion of the silicon layer 13 is shown. Therefore, the input light is guided to the intrinsic silicon region 13i, the p-type silicon region 13p, and the n-type silicon region 13n. Furthermore, the input light propagates from the silicon layer 13 to the germanium layer 14.

[0048] The input light is absorbed in the germanium layer 14. That is, the germanium layer 14 serves as a light absorption layer of the photodiode. In the germanium layer 14, electron-hole pairs are generated in an amount corresponding to the intensity of the input light.

[0049] Here, when the optical semiconductor device 10 is used as a photodetector, a specified reverse bias voltage is applied. Therefore, the electrons and holes generated in the germanium layer 14 move in the semiconductor region due to the electric field generated by the reverse bias voltage. Specifically, the electrons move from the germanium layer 14 to the electrode 16 through the intrinsic silicon region 13i and the n-type silicon region 13n. The holes diffuse from the germanium layer 14 into the p-type silicon region 13p. At this time, some holes may diffuse from the germanium layer 14 into the p-type silicon region 13p through the intrinsic silicon region 13i.

[0050] When the silicon layer 13 does not include the intrinsic silicon region 13i, the p-type silicon region 13p and the n-type silicon region 13n are in contact with each other. In this case, a depletion layer is generated at the interface of the pn junction. The depletion layer acts as a capacitor and weakens the electric field due to the reverse bias voltage. That is, when the depletion layer is formed, the movement speed of carriers (electrons and / or holes) decreases. Therefore, the optical semiconductor device 10 includes an intrinsic silicon region 13i between the p-type silicon region 13p and the n-type silicon region 13n. As a result, the influence of the depletion layer is alleviated. The intrinsic silicon region 13i acts as a carrier travel layer.

[0051] Therefore, when light enters the optical semiconductor device 10, electron-hole pairs are generated in the germanium layer 14. The generated electrons and holes move toward the electrode 16 and the electrode 15, respectively. Therefore, an induced current is generated in an external circuit connected to the electrodes 15 and 16. That is, a current or a voltage can be detected according to the intensity of the input light.

[0052] Effect

[0053] Next, the effects of the structure according to the embodiment of the present disclosure will be described. Figure 2 The structure and basis of the example Figure 3A and Figure 3B The structures of the illustrated embodiments are compared.

[0054] Figure 4A and Figure 4B Is used to describe Figure 2 A diagram illustrating the operation of an optical semiconductor device. Figure 4A Paths through which carriers (electrons and holes) generated due to input light move are illustrated. Figure 4B Illustrated Figure 2 An example of an energy band of the illustrated optical semiconductor device. Assume that a specified reverse bias voltage is applied to electrodes 119 and 120. Figure 4B In the figure, black circles and white circles represent electrons and holes, respectively.

[0055] When the light enters Figure 2 In the illustrated optical semiconductor device, electron-hole pairs are generated in the germanium layer 115. Among the electron-hole pairs generated in the germanium layer 115, electrons reach the metal contact electrode 120 via the n-type silicon layer 114. As a result, an induced current is generated in an external circuit connected to the electrodes 119 and 120.

[0056] Holes diffuse from the germanium layer 115 to the p-type silicon layer 112. At this time, the holes generated in the germanium layer 115 pass through the heterogeneous interface between the germanium layer 115 and the p-type silicon layer 112. However, there is a potential barrier at the interface to prevent the holes from diffusing. Therefore, hole accumulation occurs near the interface, and the response speed decreases due to the spatial electric field effect.

[0057] FIG. 5A to FIG. 5C Is used to describe Figure 3A and Figure 3B A view showing the operation of the optical semiconductor device 10 of the illustrated embodiment. Figure 5A Paths through which carriers (electrons and holes) generated due to input light move are illustrated. Figure 5B and Figure 5C Illustrated Figure 3A and Figure 3B An example of energy bands of the illustrated optical semiconductor device. Assume that a specified reverse bias voltage is applied to electrodes 15 and 16. Figure 5B and Figure 5C In the figure, black circles and white circles represent electrons and holes, respectively.

[0058] When the light enters Figure 3A and Figure 3BIn the optical semiconductor device shown in the example, electron-hole pairs are generated in the germanium layer 14. Here, the electrons generated in the germanium layer 14 can be Figure 5A The illustrated two paths move toward the electrode 16. Specifically, electrons can move through a path R1 from the germanium layer 14 to the n-type silicon region 13n without passing through the intrinsic silicon region 13i, and a path R2 from the germanium layer 14 to the n-type silicon region 13n via the intrinsic silicon region 13i.

[0059] The holes generated in the germanium layer 14 diffuse into the p-type silicon region 13p. At this time, the holes generated in the germanium layer 14 pass through the heterogeneous interface between the germanium layer 14 and the p-type silicon region 13p. There is a potential barrier at the interface to prevent the holes from diffusing. However, Figure 3A and Figure 3B or FIG. 5A to FIG. 5C In the illustrated optical semiconductor device 10, the germanium layer 14 in contact with the heterogeneous interface is a p-type germanium region 14p. A large number of holes exist in the p-type germanium region 14p. Therefore, the holes generated in the germanium layer 14 easily cross the potential barrier during the diffusion process from the germanium layer 14 to the p-type silicon region 13p. That is, almost no hole accumulation occurs at the heterogeneous interface between the germanium layer 14 and the p-type silicon region 13p. As a result, Figure 2 Compared with the structure shown in the example, Figure 3A and Figure 3B In the optical semiconductor device 10 of the illustrated embodiment, the diffusion speed of holes (or alternatively, the movement speed of holes) is improved, and a high-speed response of the photodiode is achieved. In particular, since hole accumulation at the heterogeneous interface between the germanium layer 14 and the p-type silicon region 13p becomes significant when high-power light is input, Figure 2 Compared to the illustrated structure, it is expected that Figure 3A and Figure 3B The speed of the optical semiconductor device 10 of the illustrated embodiment becomes significantly higher.

[0060] In addition, the carriers moving in the carrier traveling layer (ie, the intrinsic silicon region 13i) in the path R2 are electrons. Figure 5C As illustrated by the energy band in , the structure of the optical semiconductor device 10 according to the embodiment can be considered to be equivalent to the structure of a single traveling carrier photodiode (UTC-PD). Here, since the traveling speed of electrons is faster than that of holes, Figure 3A and Figure 3B Higher speeds are contemplated for the illustrated structure.

[0061] Note that the germanium layer 14 may not necessarily include the intrinsic germanium region 14i. That is, the germanium layer 14 may include only the p-type germanium region 14p. However, the structure in which the germanium layer 14 includes the intrinsic germanium region 14i has the following advantages.

[0062] (1) By appropriately designing the widths (or ratios) of the p-type germanium region 14p and the intrinsic germanium region 14i, the response speed determined by the sum of the drift process and the diffusion process can be maximized.

[0063] (2) For example, the p-type germanium region 14p is formed by adding a p-type impurity to the germanium layer 14. At this time, when the shape or position of the mask used for adding the p-type impurity has an error, the p-type impurity may be added to the n-type silicon region 13n. In this case, the characteristics of the n-type silicon region 13n may be deteriorated. Therefore, by providing the intrinsic germanium region 14i, it is possible to prevent the p-type impurity from being added to the n-type silicon region 13n.

[0064] Figure 6 An example of simulation results of OE (Opto-Electro-Electro) response with respect to frequency is illustrated. The simulation conditions are as follows.

[0065] Input light wavelength: 1.55 μm

[0066] Bias voltage: -3 volts

[0067] Width of germanium layer (14): 2 μm

[0068] Thickness of the germanium layer (14): 0.3 μm

[0069] Width of p-type germanium region (14p): 1μm

[0070] Width of silicon layer (13): 21 μm

[0071] Thickness of silicon layer (13): 0.22 μm

[0072] Gap between p-type silicon region (13p) and n-type silicon region (13n): 0.4 μm

[0073] Simulation conditions for Figure 2 The structure and basis of the example Figure 3A and Figure 3B The structures of the illustrated embodiments are common. However, in the embodiment, the p-type germanium region 14p is in contact with the p-type silicon region 13p and the intrinsic silicon region 13i, while the intrinsic germanium region 14i is not in contact with the p-type silicon region 13p. Figure 2 In the illustrated structure, the width of the p-type germanium region (116) is 0.2 μm, and the germanium layer 115 as an intrinsic germanium region is in contact with the p-type silicon region (112).

[0074] According to the above simulation, in any structure, the OE response characteristics deteriorate as the frequency increases. Figure 2 Compared with the illustrated structure, according to Figure 3A and Figure 3BThe OE response characteristics of the structure of the illustrated embodiment are improved. In the simulation, the -3dB frequency of the OE response is improved by about 10GHz. Note that the "-3dB frequency" indicates the frequency at which the OE response drops by 3dB relative to the maximum OE response.

[0075] Fig. 7A and Figure 7B An example of measurement results of OE response with respect to frequency is illustrated. Fig. 7A The OE response characteristics with respect to input light in which the output current of the photodiode is 0.1 mA are illustrated. Figure 7B The OE response characteristics with respect to input light in which the output current of the photodiode is 3 mA are illustrated. The measurement conditions are as follows.

[0076] Temperature: 25℃

[0077] Input light wavelength: 1.55 μm

[0078] Bias voltage: -3 volts

[0079] Width of germanium layer (14): 0.8 μm

[0080] Thickness of the germanium layer (14): 0.15 μm

[0081] Width of silicon layer (13): 21 μm

[0082] Thickness of silicon layer (13): 0.22 μm

[0083] Gap between p-type silicon region (13p) and n-type silicon region (13n): 0.4 μm

[0084] The above measurement conditions are Figure 2 The structure and basis of the example Figure 3A and Figure 3B However, in the embodiment, the p-type germanium region 14p is in contact with the p-type silicon region 13p and the intrinsic silicon region 13i, while the intrinsic germanium region 14i is not in contact with the p-type silicon region 13p. Figure 2 In the illustrated structure, the germanium layer 115 as an intrinsic germanium region is in contact with the p-type silicon region (112).

[0085] According to the above measurement results, by using Figure 3A and Figure 3B The structure of the illustrated embodiment is Figure 2 Compared with the structure shown in the example, the frequency band is improved. Fig. 7A As shown in the example, when the input light power is low, the -3dB frequency increases by about 8.2 GHz. Figure 7BAs illustrated, when the power of the input light is high, the -3dB frequency increases by about 10.3 GHz. Note that according to the structure of the embodiment, even if the output current of the photodiode is large (i.e., when the power of the input light is high), since the -3dB frequency exceeds 70 GHz, the optical semiconductor device can be used to receive a 130 Gbaud optical signal.

[0086] As described above, according to the structure of the embodiment, it is possible to achieve Figure 2 The illustrated structure has a higher response speed. In addition, in the structure according to the embodiment, as Figure 3A and Figure 3B As shown, no metal electrodes (i.e., electrodes 15 and 16) are provided near the region (i.e., germanium layer 14) that absorbs input light. Figure 1 The illustrated structure is different, reducing the ineffective absorption of the metal electrode to achieve high conversion efficiency from optical signals to electrical signals.

[0087] Furthermore, in the structure according to the embodiment, the optical waveguide (in Figure 3B In the embodiment, the optical waveguide 13w) is formed in the same process as the silicon layer 13. On the other hand, in Figure 2 In the illustrated structure, the waveguide layer 117 is formed in a process different from that of the silicon layers (112 to 114). Therefore, the manufacturing process of the optical semiconductor device 10 according to the embodiment is simpler than that of the silicon layer (112 to 114). Figure 2 The manufacturing process of the illustrated structure is simple.

[0088] Variations

[0089] Figure 8 An example of an optical semiconductor device according to a first modification is illustrated. In an optical semiconductor device 10B according to the first modification, a p-type germanium region 14p is in contact with a p-type silicon region 13p and an intrinsic silicon region 13i. The intrinsic germanium region 14i is in contact with the intrinsic silicon region 13i. That is, Figure 3A Unlike the illustrated structure, the intrinsic germanium region 14i is not in contact with the n-type silicon region 13n. In this case, the electrons generated in the germanium layer 14 are transmitted via Figure 5A or Figure 5C The illustrated path R2 moves toward the electrode 16. That is, the electrons generated in the germanium layer 14 pass through the carrier traveling layer (intrinsic silicon region 13i) and the n-type silicon region 13n to reach the electrode 16.

[0090] Fig. 9 An example of an optical semiconductor device according to a second modification is illustrated. In an optical semiconductor device 10C according to the second modification, a p-type germanium region 14p is in contact with a p-type silicon region 13p, an intrinsic silicon region 13i, and an n-type silicon region 13n. In addition, an intrinsic germanium region 14i is in contact with an n-type silicon region 13n, but not in contact with the p-type silicon region 13p and the intrinsic silicon region 13i.

[0091] Fig.10 An example of an optical semiconductor device according to a third modification is illustrated. In an optical semiconductor device 10D according to the third modification, the silicon layer 13 includes: p + type silicon region 13px, p-type silicon region 13p, intrinsic silicon region 13i, n-type silicon region 13n and n + The intrinsic silicon region 13i is provided between the p-type silicon region 13p and the n-type silicon region 13n. In addition, a p-type silicon region 13p having an impurity concentration higher than that of the p-type silicon region 13p is provided in the p-type silicon region 13p or at the end of the p-type silicon region 13p. + The n-type silicon region 13px and the n-type silicon region 13n having an impurity concentration higher than that of the n-type silicon region 13n are provided in the n-type silicon region 13n or at the end of the n-type silicon region 13n. + Note that, for example, a p-type silicon region 13nx is formed by further adding a p-type impurity to the p-type silicon region 13p. + For example, n-type impurities are further added to the n-type silicon region 13n to form an n-type silicon region 13px. + Type silicon region 13nx.

[0092] Electrode 15 and p + The electrode 16 contacts the n-type silicon region 13px. + As described above, since the impurity concentration of the semiconductor region in contact with the electrodes 15 and 16 is high, the contact resistance is small, and high-speed operation of the photodiode is achieved.

[0093] Fig.11 An example of an optical semiconductor device according to a fourth variation is illustrated. In the optical semiconductor device 10E according to the fourth variation, a p-type silicon region 13p and an n-type silicon region 13n are selectively formed in a region near the upper surface of the silicon layer 13. That is, the region near the bottom surface of the silicon layer 13 is formed of the same non-conductive material as the intrinsic silicon region 13i. In other words, the intrinsic silicon region 13i is formed between the p-type silicon region 13p and the n-type silicon region 13n in the region near the upper surface of the silicon layer 13, and is formed over the entire region near the bottom surface of the silicon layer 13. Here, the upper surface of the silicon layer 13 is a surface of the surface of the silicon layer 13 including a region in contact with the germanium layer 14, and the bottom surface of the silicon layer 13 is a surface of the surface of the silicon layer 13 that faces the upper surface of the silicon layer 13.

[0094] The p-type silicon region 13p and the n-type silicon region 13n are each formed by adding and diffusing impurities so that the impurities do not reach the bottom surface of the silicon layer 13. According to this structure, ineffective absorption due to the addition of impurities is suppressed. As a result, the conversion efficiency from the input optical signal to the electrical signal is improved.

[0095] Fig.12An example of an optical semiconductor device according to a fifth variation is illustrated. In an optical semiconductor device 10F according to the fifth variation, the silicon layer 13 includes a recess. That is, a "dent" is formed on the upper surface portion of the silicon layer 13. For example, the recess is formed by selectively removing the upper surface portion of the silicon layer 13. At this time, the upper surface portion of the intrinsic silicon region 13i is removed. In addition, the upper surface portions of the p-type silicon region 13p and the n-type silicon region 13n are respectively removed near the intrinsic silicon region 13i. A germanium layer 14 is formed on the recess. The p-type germanium region 14p is in contact with the p-type silicon region 13p and the intrinsic silicon region 13i, and the intrinsic germanium region 14i is in contact with the n-type silicon region 13n and the intrinsic silicon region 13i.

[0096] According to this structure, input light is strongly confined in the waveguide, and electron-hole pairs are efficiently generated. Therefore, the operation speed of the photodiode is improved.

[0097] Fig.13 An example of an optical semiconductor device according to a sixth variation is illustrated. In an optical semiconductor device 10G according to the sixth variation, the silicon layer 13 includes a groove. The groove is formed in each of the p-type silicon region 13p and the n-type silicon region 13n on the upper surface of the silicon layer 13. In addition, the groove is formed at a position that does not contact the germanium layer 14. In this embodiment, the region where the groove is formed is filled with SiO2.

[0098] According to this structure, input light is strongly confined in the waveguide, and electron-hole pairs are efficiently generated. Therefore, the operation speed of the photodiode is improved.

[0099] Optical transceiver

[0100] Fig.14 An example of an optical transceiver on which an optical semiconductor device according to an embodiment is implemented is illustrated. The optical transceiver 50 according to an embodiment includes an optical transmitter 60 and an optical receiver 70. Local light generated by a light source (not illustrated) is provided to the optical transceiver 50. The local light is continuous wave light having a specified wavelength.

[0101] The optical transmitter 60 includes a group of IQ modulators 61. The IQ modulator 61 includes a group of Mach-Zehnder interferometers. A drive signal is applied to the IQ modulator 61 from a drive circuit (not illustrated). The drive signal represents transmission data. The IQ modulator 61 modulates local light using the drive signal to generate a modulated optical signal. The modulated optical signals generated by the group of IQ modulators 61 are combined by a polarization combiner. As a result, a polarization multiplexed optical signal is generated.

[0102] The optical receiver 70 includes a 90-degree optical hybrid circuit 71 and a plurality of photodetectors 72. Here, it is assumed that the optical transceiver 50 receives a polarization multiplexed optical signal sent from another node. The polarization multiplexed optical signal is separated into an X polarization component and a Y polarization component whose polarizations are orthogonal to each other by a polarization beam splitter. The 90-degree optical hybrid circuit 71 uses local light to extract an in-phase (I) component signal and an orthogonal (Q) component signal for each polarization component. As a result, four optical components (XI, XQ, YI, and YQ) are extracted from the received optical signal. Each optical component (XI, XQ, YI, and YQ) is converted into an electrical signal by a photodetector 72. That is, an electric field information signal representing the electric field of the received optical signal is generated.

[0103] The electric field information signal is directed to a data recovery circuit (not shown). The data recovery circuit recovers data by detecting the phase and amplitude of the optical signal based on the electric field information signal. The data recovery circuit may include a phase estimator, a decision circuit, an error corrector, and the like.

[0104] In the optical receiver 70 having the above structure, each photodetector 72 is implemented by the optical semiconductor device 10 (or 10B to 10G) according to the embodiment. Here, the response speed of the optical semiconductor device 10 is improved. Therefore, the optical transceiver 50 or the optical receiver 70 can receive a broadband optical signal.

Claims

1. An optical semiconductor device, comprising: a first semiconductor layer, the first semiconductor layer having a first band gap; as well as a second semiconductor layer having a second band gap smaller than the first band gap and formed on the first semiconductor layer, Wherein, the first semiconductor layer comprises: a first conductive region having a first polarity; a second conductive region having a second polarity; and a first non-conductive region, the first non-conductive region being disposed between the first conductive region and the second conductive region, The second semiconductor layer comprises: a third conductive region having the first polarity; and The second non-conductive region, The third conductive region contacts the first conductive region and the first non-conductive region, and The second non-conductive region contacts at least one of the second conductive region and the first non-conductive region, but does not contact the first conductive region.

2. The optical semiconductor device according to claim 1, wherein The first semiconductor layer includes a waveguide that propagates input light to the optical semiconductor device.

3. The optical semiconductor device according to claim 1, further comprising: a first electrode, the first electrode being in contact with the first conductive region; as well as A second electrode is in contact with the second conductive region.

4. The optical semiconductor device according to claim 1, wherein The third conductive region contacts the first conductive region, the first non-conductive region and the second conductive region, and The second non-conductive region contacts the second conductive region but does not contact the first conductive region and the first non-conductive region.

5. The optical semiconductor device according to claim 1, wherein a first high concentration region is formed in the first conductive region without contacting the first non-conductive region, the first high concentration region having the first polarity and having an impurity concentration higher than that of the first conductive region, A second high concentration region is formed in the second conductive region without contacting the first non-conductive region, the second high concentration region having the second polarity and having an impurity concentration higher than that of the second conductive region, and The electrodes are in contact with the first high concentration region and the second high concentration region, respectively.

6. The optical semiconductor device according to claim 1, wherein The first conductive region and the second conductive region are formed on an upper surface portion of the first semiconductor layer, and The bottom surface of the first semiconductor layer is formed of a non-conductive material.

7. The optical semiconductor device according to claim 1, wherein A recess is provided on the upper surface of the first semiconductor layer, and The second semiconductor layer is formed in the recess.

8. The optical semiconductor device according to claim 1, wherein A groove is provided on the upper surface of the first semiconductor layer at a position not contacting the second semiconductor layer.

9. The optical semiconductor device according to claim 1, wherein The impurity concentrations of the first conductive region, the second conductive region, and the third conductive region are each 1×10 17 / cm 3 or greater, and The impurity concentrations of the first non-conductive region and the second non-conductive region are each 1×10 16 / cm 3 or smaller.

10. The optical semiconductor device according to claim 1, wherein The first semiconductor layer is formed of silicon, The second semiconductor layer is formed of germanium, The first polarity is p-type, and The second polarity is n-type.

11. An optical receiver, comprising: An optical circuit that extracts an in-phase I component signal and an orthogonal Q component signal from a received optical signal; as well as a plurality of optical semiconductor devices, each of which converts the I component signal and the Q component signal into an electrical signal, Wherein, each of the optical semiconductor devices comprises: a first semiconductor layer having a first band gap; and a second semiconductor layer having a second band gap smaller than the first band gap and formed on the first semiconductor layer, The first semiconductor layer comprises: a first conductive region having a first polarity; a second conductive region having a second polarity; and a first non-conductive region, the first non-conductive region being disposed between the first conductive region and the second conductive region, The second semiconductor layer comprises: a third conductive region having the first polarity; and The second non-conductive region, The third conductive region contacts the first conductive region and the first non-conductive region, The second non-conductive region contacts at least one of the second conductive region and the first non-conductive region but does not contact the first conductive region. The I component signal is input to the second semiconductor layer of a first optical semiconductor device among the plurality of optical semiconductor devices, and The Q component signal is input to the second semiconductor layer of a second optical semiconductor device among the plurality of optical semiconductor devices.

12. An optical transceiver, comprising an optical transmitter and an optical receiver, in, The optical receiver comprises: an optical circuit that extracts an in-phase I component signal and an orthogonal Q component signal from a received optical signal; and a plurality of optical semiconductor devices, each of which converts the I component signal and the Q component signal into an electrical signal, Each of the optical semiconductor devices comprises: a first semiconductor layer having a first band gap; and a second semiconductor layer having a second band gap smaller than the first band gap and formed on the first semiconductor layer, The first semiconductor layer comprises: a first conductive region having a first polarity; a second conductive region having a second polarity; and a first non-conductive region, the first non-conductive region being disposed between the first conductive region and the second conductive region, The second semiconductor layer comprises: a third conductive region having the first polarity; and The second non-conductive region, The third conductive region contacts the first conductive region and the first non-conductive region, The second non-conductive region contacts at least one of the second conductive region and the first non-conductive region but does not contact the first conductive region. The I component signal is input to the second semiconductor layer of a first optical semiconductor device among the plurality of optical semiconductor devices, and The Q component signal is input to the second semiconductor layer of a second optical semiconductor device among the plurality of optical semiconductor devices.

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