Display device and method of manufacturing same

Abstract

The invention relates to a display device and a method of manufacturing the same. The display device has a flat portion and a bent portion provided on at least one side of the flat portion, and includes: a substrate; a light emitting element layer disposed on the substrate and including a plurality of light emitting elements disposed in the flat portion and the bent portion; and an encapsulation layer disposed across the flat portion and the bent portion, and including a first inorganic encapsulation layer disposed on the light emitting element layer, an organic encapsulation layer disposed on the first inorganic encapsulation layer, and a second inorganic encapsulation layer disposed on the organic encapsulation layer. At least a portion of the organic encapsulation layer disposed in the bent portion includes a portion protruding in a direction upward from the substrate, and a maximum height of the portion of the organic encapsulation layer disposed in the bent portion is greater than a maximum height of a portion of the organic encapsulation layer disposed in the flat portion.

Description

[0001] This application claims priority to and all benefits derived from Korean Patent Application No. 10-2023-0121088, filed on September 12, 2023, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0002] The present disclosure relates to a display device and a method of manufacturing the display device. Background Art

[0003] As the information society develops, the demand for display devices for displaying images is increasing in various forms. For example, display devices are applied to various electronic devices such as smart phones, digital cameras, notebook computers, navigation devices, and smart TVs. The display device may be a flat panel display device such as a liquid crystal display device, a field emission display device, and an organic light emitting display device. Among these flat panel display devices, the light emitting display device includes a light emitting element that enables each pixel of the display panel to emit light itself. Therefore, the light emitting display device can display an image without a backlight unit that provides light to the display panel.

[0004] The display device may further include pixels emitting predetermined light, scan lines, data lines, and power lines for driving the pixels, a scan driver outputting scan signals to the scan lines, and a display driver outputting data voltages to the data lines. Summary of the invention

[0005] Aspects of the present disclosure provide a display device capable of alleviating stress applied when being bent or folded.

[0006] However, the various aspects of the present disclosure are not limited to the aspects set forth herein. The above and other aspects of the present disclosure will become more apparent to those skilled in the art to which the present disclosure pertains by referring to the detailed description of the present disclosure given below.

[0007] According to an embodiment of the present disclosure, a display device has a flat portion and a bent portion arranged on at least one side of the flat portion, and includes: a substrate; a light-emitting element layer, which is arranged on the substrate and includes a plurality of light-emitting elements arranged in the flat portion and the bent portion; and an encapsulation layer, which is arranged throughout the flat portion and the bent portion and includes a first inorganic encapsulation layer arranged on the light-emitting element layer, an organic encapsulation layer arranged on the first inorganic encapsulation layer, and a second inorganic encapsulation layer arranged on the organic encapsulation layer, wherein at least a portion of the organic encapsulation layer arranged in the bent portion includes a portion protruding in an upward direction from the substrate, and a maximum height of a portion of the organic encapsulation layer arranged in the bent portion is greater than a maximum height of a portion of the organic encapsulation layer arranged in the flat portion.

[0008] An average height of the portion of the organic encapsulation layer disposed in the bent portion may be greater than an average height of the portion of the organic encapsulation layer disposed in the flat portion.

[0009] The organic encapsulation layer may include an organic insulating material, and a volume of the organic insulating material per unit area of ​​the convex portion in the bent portion may be greater than a volume of the organic insulating material per unit area of ​​the flat portion.

[0010] A surface length of the second inorganic encapsulating layer measured in a unit area of ​​the bent portion may be greater than a surface length of the second inorganic encapsulating layer measured in a unit area of ​​the flat portion.

[0011] The first inorganic encapsulation layer may include a first region and a second region other than the first region in the bending portion, the first region may have a surface energy lower than a surface energy of the second region, and a height of a portion of the organic encapsulation layer disposed on the first region may be greater than a height of a portion of the organic encapsulation layer disposed on the second region.

[0012] The display device may further include a pattern portion, which is arranged on the first inorganic encapsulation layer in the bending portion and includes a material having a surface energy higher than the surface energy of a material surrounding the pattern portion, wherein the organic encapsulation layer may have a height in a portion of the bending portion overlapping with the pattern portion that is higher than a height in other portions of the bending portion.

[0013] The protruding portion may be provided in plural in the portion of the organic encapsulation layer disposed in the bent portion.

[0014] The bent portion may be bent toward a rear surface of the substrate, the rear surface of the substrate being opposite to a surface of the substrate on which the light emitting element layer is disposed.

[0015] The bent portion may include a first bent portion arranged on one side of the flat portion in a first direction and a second bent portion arranged on the other side of the flat portion in a direction opposite to the first direction, and the first bent portion, the second bent portion and the flat portion have the same length measured in a second direction intersecting the first direction.

[0016] The protruding portion of the organic encapsulation layer may be disposed to correspond to a bent region of the bent portion.

[0017] According to an embodiment of the present disclosure, a display device has a folding area that can be folded along a folding line extending in a first direction and a non-folding area arranged around the folding area, and includes: a substrate; a light-emitting element layer, which is arranged on the substrate and includes a plurality of light-emitting elements arranged in the folding area and the non-folding area; and an encapsulation layer, which is arranged throughout the folding area and the non-folding area and includes a first inorganic encapsulation layer arranged on the light-emitting element layer, an organic encapsulation layer arranged on the first inorganic encapsulation layer and including an organic insulating material, and a second inorganic encapsulation layer arranged on the organic encapsulation layer, wherein at least a portion of the organic encapsulation layer arranged in the folding area includes a portion protruding in an upward direction from the substrate, and the volume of the organic insulating material of the organic encapsulation layer per unit area of ​​the folding area is greater than the volume of the organic insulating material per unit area of ​​the non-folding area.

[0018] A surface length of the second inorganic encapsulating layer measured in a unit area of ​​the folding region may be greater than a surface length of the second inorganic encapsulating layer measured in a unit area of ​​the non-folding region.

[0019] A maximum height of a portion of the organic encapsulation layer disposed in the folding region may be greater than a maximum height of a portion of the organic encapsulation layer disposed in the non-folding region.

[0020] According to an embodiment of the present disclosure, a method for manufacturing a display device, the display device having a flat portion and a bent portion arranged on at least one side of the flat portion, the method comprising: forming a light-emitting element layer including a plurality of light-emitting elements on a substrate; forming a first inorganic encapsulation layer on the light-emitting element layer and forming an organic encapsulation layer by applying an organic insulating material on the first inorganic encapsulation layer; and forming a second inorganic encapsulation layer on the organic encapsulation layer, wherein in the forming of the organic encapsulation layer, the amount of the organic insulating material applied per unit area of ​​the bent portion is greater than the amount of the organic insulating material applied per unit area of ​​the flat portion.

[0021] The method may further include: before the forming of the organic encapsulation layer, forming a first region having a surface energy lower than that of an adjacent region by surface-treating a portion of the first inorganic encapsulation layer disposed in the bent portion.

[0022] The method may further include, after the forming of the first inorganic encapsulating layer, forming a pattern portion disposed on the first inorganic encapsulating layer in the bent portion and including a material having a surface energy higher than that of the organic insulating material surrounding the pattern portion.

[0023] In the applying of the organic insulating material, the organic insulating material gathers around the pattern portion, and a portion of the organic encapsulation layer overlapping the pattern portion has a height higher than that of other portions.

[0024] A volume of the organic insulating material per unit area of ​​the bent portion may be greater than a volume of the organic insulating material per unit area of ​​the flat portion.

[0025] A maximum height of a portion of the organic encapsulation layer disposed in the bent portion may be greater than a maximum height of a portion of the organic encapsulation layer disposed in the flat portion.

[0026] A surface length of the second inorganic encapsulating layer measured in a unit area of ​​the bent portion may be greater than a surface length of the second inorganic encapsulating layer measured in a unit area of ​​the flat portion. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] These and / or other aspects will become apparent and more readily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0028] Figure 1 is a perspective view of a display device according to an embodiment;

[0029] Figure 2 yes Figure 1 A plan view of a display device;

[0030] Figure 3 It is along Figure 2 A cross-sectional view taken along line AA';

[0031] Figure 4 It is taken along the second direction Figure 2 A cross-sectional view of a display device;

[0032] Figure 5 is a plan view of a display panel according to an embodiment;

[0033] Figure 6 is a pixel circuit diagram of a sub-pixel according to an embodiment;

[0034] Figure 7 is a pixel circuit diagram of a sub-pixel according to an embodiment;

[0035] Figure 8 is a cross-sectional view of a sub-pixel of a display device according to an embodiment;

[0036] Fig. 9 is a cross-sectional view of an external portion of a display device according to an embodiment;

[0037] Fig.10is a schematic cross-sectional view of an encapsulation layer in a flat portion and a bent portion of a display device in a flat state according to an embodiment;

[0038] Fig.11 It is a detailed diagram Fig.10 A cross-sectional view of the structure of an organic encapsulation layer in a bent portion of the encapsulation layer;

[0039] Fig.12 The picture is in a bent state Fig.10 A bent portion of a display device;

[0040] Fig.13 is a schematic cross-sectional view of an encapsulation layer in a flat portion and a bent portion of a display device in a flat state according to an embodiment;

[0041] Fig.14 The picture is in a bent state Fig.13 A bent portion of a display device;

[0042] Fig.15 is a flowchart illustrating a method of manufacturing a display device according to an embodiment;

[0043] Figures 16 to 19 are views sequentially illustrating a process of manufacturing a display device according to an embodiment;

[0044] Fig. 20 is a perspective view of a foldable display device according to an embodiment;

[0045] Fig.21 It is in folded state Fig. 20 A perspective view of a foldable display device;

[0046] Fig. 22 is based on Fig. 20 A schematic cross-sectional view of a foldable display device of an embodiment;

[0047] Fig.23 It is in folded state Fig. 22 A cross-sectional view of a foldable display device;

[0048] Fig.24 It is in a flat state Fig. 22 A cross-sectional view of an encapsulation layer of a foldable display device; and

[0049] Fig.25 It is in folded state Fig.24 A cross-sectional view of an encapsulation layer of a foldable display device. DETAILED DESCRIPTION

[0050] The present invention will now be described more fully hereinafter with reference to the accompanying drawings in which preferred embodiments of the present invention are shown. However, the present invention may be implemented in different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present invention to those skilled in the art.

[0051] It will also be understood that when a layer is referred to as being “on” another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present. Like reference numerals refer to like components throughout the specification.

[0052] It will be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the teachings of the present invention, the first element discussed below may be referred to as the second element. Similarly, the second element may also be referred to as the first element.

[0053] The terms used in this article are only used for the purpose of describing specific embodiments and are not intended to be limiting. As used in this article, "one", "said" and "at least one" do not represent a limitation on quantity, and unless the context clearly indicates otherwise, it is intended to include both the singular and the plural. For example, unless the context clearly indicates otherwise, "element" has the same meaning as "at least one element". "At least one" should not be interpreted as limiting "one". "Or" refers to "and / or". As used in this article, the term "and / or" includes any and all combinations of one or more related listed items. It will be further understood that the terms "include" and / or "comprising" specify the existence of stated features, regions, integers, steps, operations, elements and / or parts when used in this specification, but do not exclude the existence or addition of one or more other features, regions, integers, steps, operations, elements, parts and / or their combinations. Hereinafter, embodiments will be described with reference to the accompanying drawings.

[0054] Figure 1 is a perspective view of a display device 10 according to the embodiment.

[0055] refer to Figure 1 The display device 10 is a device for displaying moving images or still images. The display device 10 can be used as a display screen in portable electronic devices such as mobile phones, smart phones, tablet personal computers (PCs), smart watches, watch phones, mobile communication terminals, electronic notebooks, electronic books, portable multimedia players (PMPs), navigation devices, and ultra mobile PCs (UMPCs), and various products such as televisions, notebook computers, monitors, billboards, and Internet of Things (IoT) devices.

[0056] The display device 10 may be a light-emitting display device such as an organic light-emitting display device including an organic light-emitting diode, a quantum dot light-emitting display device including a quantum dot light-emitting layer, an inorganic light-emitting display device including an inorganic semiconductor, or a micro light-emitting display device using a micro light-emitting diode or a nano light-emitting display device using a nano light-emitting diode. An embodiment in which the display device 10 is an organic light-emitting display device will be described below, but the type of the display device is not limited thereto.

[0057] In an embodiment, the display device 10 may be formed to be flat in the central region. For example, the display device 10 may be formed to be substantially flat on a plane defined by the first direction DR1 and the second direction DR2, and may have a predetermined thickness in the third direction DR3.

[0058] In one embodiment, the first direction DR1 may be a length direction, a column direction, or a vertical direction of the image display surface of the display device 10, and the second direction DR2 may be a direction intersecting with the first direction DR1, for example, a width direction, a row direction, or a horizontal direction. The third direction DR3 may be a thickness direction of the display device 10.

[0059] In one embodiment, the display device 10 may include a flat portion FA of an image display surface and bent portions EBA1 and EBA2 as edge regions bent with a predetermined curvature. The flat portion FA may be disposed substantially at the center of the display device 10, and the bent portions EBA1 and EBA2 may be disposed on opposite sides of the flat portion FA in the second direction DR2. The flat portion FA may be located between a first bending line BL1 and a second bending line BL2, the first bending portion EBA1 may be located on the left side of the flat portion FA, and the second bending portion EBA2 may be located on the right side of the flat portion FA. The flat portion FA, the first bending portion EBA1, and the second bending portion EBA2 may have the same length in the first direction DR1, and the width of the flat portion FA in the second direction DR2 may be the largest. The display device 10 may have a shape in which opposite edges in the second direction DR2 are bent downward (i.e., toward one side in the third direction DR3). The display device 10 may be disposed toward the substrate 110 (see Figure 3 ) instead of being bent toward the upper surface of the substrate 110. In another embodiment, the display device 10 may include a bent portion disposed on at least one side of the flat portion FA.

[0060] In one embodiment, the bent portions EBA1 and EBA2, which are edge regions of the display device 10, may be flat without being bent. Alternatively, the display device 10 may be formed to be flexible so that regions other than the edge regions can be bent, curved, folded, or rolled.

[0061] The display device 10 may include a display panel 100 , a driver 200 , and a circuit board 300 .

[0062] The display panel 100 may include a main area MA including a display area DA displaying an image and a sub-area SBA located at one side of the main area MA.

[0063] The main area MA may include a display area DA and a non-display area NA around the display area DA. The display area DA may be located at the center of the main area MA and may occupy most of the main area MA. The non-display area NA may be located at an edge of the main area MA and may contact the sub-area SBA. The main area MA may include a flat portion FA and bent portions EBA1 and EBA2 of the display device 10.

[0064] The display area DA may be where pixels (eg, Figure 5 In one embodiment, a sensing pattern (e.g., a touch electrode) for detecting a touch input or the like may be further provided in the display area DA, and the display area DA may include a sensing area where the touch input is detected by the sensing pattern.

[0065] In one embodiment, the display area DA may be shaped like a substantially rectangular plane having long sides in the first direction DR1 and short sides in the second direction DR2. Each corner where the long sides and short sides of the display area DA intersect may be arc-shaped or right-angled. The shape of the display area DA may vary according to the embodiment. For example, the display area DA may also have a polygonal shape other than a quadrilateral shape, a circular shape, or an elliptical shape.

[0066] The display area DA may include some areas of the flat portion FA and the bent portions EBA1 and EBA2 of the display device 10. The display device 10 may display an image in some areas of the flat portion FA and the bent portions EBA1 and EBA2.

[0067] The non-display area NA may be directly located around the display area DA. The non-display area NA may surround the display area DA. An embedded circuit may be disposed in the non-display area NA. In one embodiment, for example, an embedded circuit such as a scan driving circuit may be disposed in the non-display area NA on one side (e.g., the left side or the right side) of the display area DA or on opposite sides.

[0068] The sub-area SBA may be located at one side of the main area MA. In one embodiment, for example, the sub-area SBA may be a region protruding from one side of the main area MA in the first direction DR1. In one embodiment, for example, the sub-area SBA may protrude from the lower end of the main area MA in the first direction DR1. In one embodiment, the sub-area SBA may be narrower than the main area MA. In one embodiment, for example, the sub-area SBA may be narrower than the main area MA in the second direction DR2.

[0069] Lines and pads may be provided in the sub-area SBA. For example, lines and pads connected to pixels and / or embedded circuits located in the main area MA and to the driver 200 and / or circuit board 300 located in the sub-area SBA may be provided in the sub-area SBA. In the description of the embodiments, the term "connection" may refer to electrical connection and / or physical connection.

[0070] In an embodiment, the driver 200 (eg, a display driving circuit) may be mounted in the sub-area SBA. The circuit board 300 may be disposed in a portion of the sub-area SBA.

[0071] The driver 200 may include a data driving circuit for driving pixels. In one embodiment, the driver 200 may be formed as an integrated circuit (IC) chip and disposed in the sub-area SBA. In one embodiment, the driver 200 may be disposed on a circuit board 300 in the sub-area SBA, or may be disposed on another circuit board connected to the display panel 100 through the circuit board 300.

[0072] The circuit board 300 may be disposed on a portion of the sub-area SBA. In one embodiment, for example, the circuit board 300 may be bonded to a pad located in a portion (e.g., a lower edge) of the sub-area SBA, and may supply or transmit a power supply voltage and a driving signal for driving the display panel 100 to the display panel 100. In one embodiment, for example, the circuit board 300 may supply input image data (e.g., digital image data), a driving signal including a timing signal, and a driving voltage to the display panel 100. The circuit board 300 may be, but is not limited to, a flexible printed circuit board (FPCB), a printed circuit board (PCB), or a flexible film such as a chip on film (COF).

[0073] Figure 2 yes Figure 1 FIG. 1 is a plan view of a display device 10 . Figure 3 It is along Figure 2 A cross-sectional view taken along line AA'. Figure 4 It is taken along the second direction DR2 Figure 2 1 is a cross-sectional view of a display device 10 .

[0074] Figure 1The diagram shows a state in which the sub-area SBA of the display device 10 is unfolded without being bent, and Figure 2 and Figure 3 A state in which the bending area BA of the display device 10 is bent in the sub-area SBA is illustrated. Figure 1 The diagram shows a state in which the sub-area SBA is unfolded to be laid flat side by side with the main area MA, and Figure 2 and Figure 3 The diagram shows a state in which a part of the sub-area SBA is bent. Figure 4 The figure shows the cross-sectional shapes of the flat portion FA and the bent portions EBA1 and EBA2 of the display device 10 .

[0075] refer to Figures 2 to 4 , the display panel 100 may include a substrate 110 including a main area MA and a sub-area SBA, and a circuit layer 120, a light emitting element layer 130, and an encapsulation layer 140 sequentially disposed on the substrate 110. The circuit layer 120 may be located on the substrate 110 in the main area MA and the sub-area SBA. The light emitting element layer 130 and the encapsulation layer 140 may be located on a portion of the substrate 110 and the circuit layer 120. In one embodiment, for example, the light emitting element layer 130 and the encapsulation layer 140 may be located in the main area MA.

[0076] In an embodiment, the display device 10 may further include an additional element disposed on the display panel 100. In an embodiment, for example, the display device 10 may further include at least one of a sensor layer (e.g., a touch sensor layer), a polarizing layer, a color filter layer, and a protective layer (e.g., a window) disposed on the encapsulation layer 140. Each of the sensor layer, the polarizing layer, the color filter layer, and the protective layer may be integrally manufactured with the display panel 100, or may be manufactured separately from the display panel 100 and then attached to the display panel 100 by an adhesive layer or the like.

[0077] The substrate 110 may include an insulating material such as a polymer resin. In one embodiment, for example, the substrate 110 may be made of polyimide or other insulating materials. The substrate 110 may be a flexible substrate that can be bent, folded, or curled. Alternatively, the substrate 110 may include an insulating material such as glass.

[0078] The circuit layer 120 may include pixel circuits and lines. In one embodiment, for example, the circuit layer 120 may include circuit elements (e.g., pixel transistors and capacitors) constituting the pixel circuit of each pixel and lines connected to the pixels. In one embodiment, the circuit layer 120 may further include circuit elements constituting embedded circuits (such as scan drive circuits) and lines connected to the embedded circuits.

[0079] The light emitting element layer 130 may include a light emitting element disposed in an emission region of a pixel. In one embodiment, for example, each pixel may include at least one light emitting element and a pixel circuit connected to the light emitting element. Each pixel may be located in a pixel region including an emission region and a pixel circuit region. The light emitting element is disposed in the emission region, and the pixel circuit is disposed in the pixel circuit region. The emission region and the pixel circuit region of each pixel may overlap each other in the normal direction of the substrate 110, but the present disclosure is not limited thereto.

[0080] In the description of the embodiment, the circuit layer 120 and the light emitting element layer 130 are described as being separated from each other. However, the embodiment is not limited thereto. For another example, the circuit layer 120 and the light emitting element layer 130 may also be integrated.

[0081] The encapsulation layer 140 may cover the light emitting element layer 130 and extend to the non-display area NA to contact the circuit layer 120. In one embodiment, the encapsulation layer 140 may have a multilayer structure including at least two inorganic encapsulation layers overlapping each other in a normal direction of the substrate 110 and at least one organic encapsulation layer interposed between the inorganic encapsulation layers.

[0082] In an embodiment, the display panel 100 may be bent in the bending area BA. The bending area BA may be a part of the sub-area SBA and may be spaced apart from the main area MA.

[0083] The substrate 110 and the circuit layer 120 may be bent in the bending area BA corresponding to a portion of the sub-area SBA. Accordingly, the bezel area perceived as the non-display area NA by the user can be reduced or minimized.

[0084] In the display device 10, the substrate 110 may be a flexible substrate that can be bent, folded, or rolled, and the bent portions EBA1 and EBA2 located on opposite sides in the second direction DR2 may be bent downward (i.e., toward one side in the third direction DR3). The bent portions EBA1 and EBA2 may be bent toward a lower surface of the substrate 110 opposite to an upper surface of the substrate 110 on which the light emitting element layer 130 is disposed. A portion of the light emitting element layer 130 that emits light in the display device 10 may also be disposed in the bent portions EBA1 and EBA2 and may be bent downward (i.e., toward one side in the third direction DR3). Accordingly, light may also be emitted from some areas of the bent portions EBA1 and EBA2 of the display device 10.

[0085] Figure 5 is a plan view of a display panel 100 according to an embodiment. Figure 5 The display panel 100 is shown in an unfolded state and is not bent in the bending area BA.

[0086] refer to Figure 5, the display panel 100 may include a main area MA and a sub-area SBA. The main area MA may include a display area DA and a non-display area NA, and the sub-area SBA may include a bank area BNKA, a driving circuit mounting area ICA, and a pad area PA.

[0087] The display area DA may be an area where a plurality of pixels PX are disposed. The pixels PX and lines (or parts of the lines) connected to the pixels PX may be disposed in the display area DA.

[0088] The pixels PX may be provided in the circuit layer 120 and the light emitting element layer 130 of the display panel 100. In one embodiment, for example, each pixel PX may include a pixel circuit including circuit elements provided in the circuit layer 120 (eg, Figure 6 or Figure 7 The pixel circuit PCA) and the light emitting element (eg, Figure 6 or Figure 7 light-emitting element EL).

[0089] The pixel PX may include at least two sub-pixels SPX emitting light of different colors. In one embodiment, for example, the pixel PX may include a first color sub-pixel SPX1 emitting light of a first color (e.g., red light), a second color sub-pixel SPX2 emitting light of a second color (e.g., green light), and a third color sub-pixel SPX3 emitting light of a third color (e.g., blue light).

[0090] At least one first color sub-pixel SPX1, at least one second color sub-pixel SPX2, and at least one third color sub-pixel SPX3 adjacent to each other may form one unit pixel PX. In one embodiment, for example, one first color sub-pixel SPX1, two second color sub-pixels SPX2, and one third color sub-pixel SPX3 adjacent to each other may form one unit pixel PX. Each unit pixel PX may emit light of various colors including white light by mixing the colors of light emitted from the sub-pixels SPX1 to SPX3 forming the unit pixel PX. In one embodiment, the first color sub-pixel SPX1 and the third color sub-pixel SPX3 may be alternately arranged in the first direction DR1 and / or the second direction DR2, and the second color sub-pixel SPX2 may be continuously and / or sequentially arranged in the first direction DR1. The type, shape, and / or arrangement structure of the sub-pixels SPX1 to SPX3 may vary according to the embodiment. In addition, the type, number, ratio, and / or arrangement structure of the sub-pixels SPX1 to SPX3 forming each unit pixel PX may vary according to the embodiment.

[0091] The encapsulation layer 140 may be disposed on the pixel PX. In one embodiment, for example, the encapsulation layer 140 may be provided at least in the display area DA to cover the pixel PX, and a portion of the encapsulation layer 140 may extend to the non-display area NA.

[0092] The wire may be provided in the circuit layer 120 and located in the display area DA and the non-display area NA. In addition, the wire may be located in the sub-area SBA. In one embodiment, for example, the wire may extend from the sub-area SBA to the display area DA via the non-display area NA.

[0093] The non-display area NA may be located around the display area DA. In one embodiment, for example, the non-display area NA may be an edge area of ​​the main area MA located outside the display area DA.

[0094] The non-display area NA may include a dam area DAMA spaced apart from the display area DA, a first non-display area NA1 between the display area DA and the dam area DAMA, and a second non-display area NA2 outside the dam area DAMA. The dam area DAMA may be an area where a dam surrounding the display area DA is disposed. The second non-display area NA2 may include an inorganic encapsulation area IEA (also referred to as a "bonding area") where the inorganic encapsulation layers of the encapsulation layer 140 are bonded to each other.

[0095] The sub-area SBA may include a bank area BNKA, a driving circuit mounting area ICA, and a pad area PA sequentially disposed on one side of the main area MA. Lines (or portions of lines), banks, and pads PD may be disposed in the sub-area SBA. At least some of the lines may extend to the main area MA and may be connected to the pixels PX.

[0096] The bank area BNKA may be an area where a bank including at least one organic layer is provided. In one embodiment, the bank area BNKA may include a bending area BA. In one embodiment, for example, the bank area BNKA may include a bending area BA spaced apart from the main area MA and a first edge area BEA1 and a second edge area BEA2 located on opposite sides of the bending area BA in the first direction DR1. A bank may be provided in the bending area BA and an area around the bending area BA (e.g., the first edge area BEA1 and the second edge area BEA2 of the bank area BNKA) to cover a line passing through the bending area BA. The display panel 100 may be bent in the bending area BA so that a portion of the sub-area SBA is located on the rear surface of the main area MA.

[0097] The driving circuit mounting area ICA may be an area where the driver 200 is disposed. Pads for connecting at least some lines to the driver 200 may be disposed in the driving circuit mounting area ICA. In one embodiment, for example, input pads for connecting the driver 200 to certain pads (e.g., data input pads) of the pad area PA and output pads for connecting the driver 200 to the pixels PX may be disposed in the driving circuit mounting area ICA.

[0098] In some embodiments, the driver 200 may not be disposed on the display panel 100. In this case, the display panel 100 may not include the driving circuit mounting area ICA, and only the wires may be disposed in an area between the bank area BNKA and the pad area PA.

[0099] The pad area PA may be an area where pads PD for connecting the display panel 100 and / or the driver 200 to the circuit board 300, etc. are disposed. The circuit board 300 may be disposed or coupled on the pad area PA.

[0100] A plurality of pads PD including power pads and signal pads connected to the pixel PX, the driver 200 and / or the embedded circuit may be arranged in the pad area PA. A power supply voltage for driving the pixel PX, the driver 200 and / or the embedded circuit may be supplied to the power supply pad. A driving signal and / or image data for driving the pixel PX, the driver 200 and / or the embedded circuit may be supplied to the signal pad. The type, position, arrangement order and / or quantity of the pad PD may vary according to the embodiment.

[0101] Figure 6 is a pixel circuit diagram of a sub-pixel SPX according to an embodiment. Figure 7 is a pixel circuit diagram of a sub-pixel SPX according to an embodiment.

[0102] Figure 6 and Figure 7 Different embodiments of the pixel circuit PCA and the lines connected to the pixel circuit PCA are shown. The configuration of the pixel circuit PCA and the type and number of lines connected to the pixel circuit PCA may vary according to the embodiment.

[0103] Figure 6 In the embodiment shown in the figure, each pixel circuit PCA includes a first transistor T1 to a seventh transistor T7. Figure 6 The scan lines SL of the sub-pixel SPX may include a first scan line SL1, a second scan line SL2, a third scan line SL3, and a fourth scan line SL4, and are connected to Figure 6The power lines PL of the sub-pixel SPX may include a first pixel power line VDL, a second pixel power line VSL, a first initialization power line VIL, and a second initialization power line VAIL. Figure 6 The sub-pixel SPX may be further connected to an emission control line ECL.

[0104] Figure 7 In the embodiment shown in the figure, each pixel circuit PCA includes a first transistor T1 to an eighth transistor T8. Figure 7 The scan lines SL of the sub-pixel SPX may include a first scan line SL1, a second scan line SL2, a third scan line SL3, and a fifth scan line SL5, and are connected to Figure 7 The power lines PL of the sub-pixel SPX may include a first pixel power line VDL, a second pixel power line VSL, a first initialization power line VIL, a second initialization power line VAIL, and a bias power line VOBL. Figure 7 The sub-pixel SPX may be further connected to an emission control line ECL.

[0105] refer to Figure 6 , the sub-pixel SPX may include a light emitting unit EMU including at least one light emitting element EL and a pixel circuit PCA (also referred to as a “pixel driver”) connected to the light emitting unit EMU.

[0106] The light emitting element EL may be connected between a second pixel power line VSL to which a second pixel power voltage ELVSS is applied and the pixel circuit PCA. In one embodiment, the second pixel power voltage ELVSS may be a low potential pixel driving voltage. The light emitting element EL may be a light source of the pixel PX and may emit light in response to a driving current supplied from the pixel circuit PCA.

[0107] The light emitting element EL may be an organic light emitting diode. However, the present disclosure is not limited thereto. For another example, the light emitting element EL may also be an inorganic light emitting element, a quantum dot light emitting element or other types of light emitting elements.

[0108] The pixel circuit PCA can control the light emission timing and brightness of the light emitting element EL by controlling the driving current supplied to the light emitting element EL. The pixel circuit PCA may include at least one pixel transistor T and a capacitor Cst. In an embodiment, the pixel circuit PCA may include a pixel transistor T including a first transistor T1 to a seventh transistor T7.

[0109] The first transistor T1 may include a gate electrode connected to the first node N1, a first electrode electrically connected to the first pixel power line VDL through a fifth transistor T5, and a second electrode electrically connected to the light emitting unit EMU through a sixth transistor T6. One of the first electrode and the second electrode may be a source electrode, and the other may be a drain electrode. The first transistor T1 may control a source-drain current (hereinafter, referred to as a "driving current") flowing between the first electrode and the second electrode according to a voltage applied to the gate electrode (e.g., a voltage of the first node N1 corresponding to a voltage of a data signal). In one embodiment, for example, the first transistor T1 may be a driving transistor of a sub-pixel SPX.

[0110] The second transistor T2 may include a gate electrode connected to the first scan line SL1, a first electrode connected to the data line DL, and a second electrode connected to the first electrode of the first transistor T1. The second transistor T2 may be turned on by a first scan signal supplied to the first scan line SL1 to electrically connect the first electrode of the first transistor T1 to the data line DL. When the second transistor T2 is turned on, a voltage of a data signal supplied to the data line DL may be applied to the first electrode of the first transistor T1.

[0111] The third transistor T3 may include a gate electrode connected to the second scan line SL2, a first electrode connected to the second electrode of the first transistor T1, and a second electrode connected to the gate electrode (or the first node N1) of the first transistor T1. The third transistor T3 may be turned on by a second scan signal supplied to the second scan line SL2 to electrically connect the gate electrode and the second electrode of the first transistor T1. When the third transistor T3 is turned on, the first transistor T1 may operate as a diode.

[0112] The fourth transistor T4 may include a gate electrode connected to the third scan line SL3, a first electrode connected to the gate electrode of the first transistor T1, and a second electrode connected to the first initialization power line VIL. The fourth transistor T4 may be turned on by a third scan signal supplied to the third scan line SL3 to electrically connect the gate electrode of the first transistor T1 to the first initialization power line VIL. When the fourth transistor T4 is turned on, a first initialization voltage VINT (e.g., a gate initialization voltage) of the first initialization power line VIL may be applied to the gate electrode of the first transistor T1.

[0113] The fifth transistor T5 may include a gate electrode connected to an emission control line ECL, a first electrode connected to a first pixel power line VDL, and a second electrode connected to a first electrode of the first transistor T1. The fifth transistor T5 may be turned on by an emission control signal supplied to the emission control line ECL to electrically connect the first electrode of the first transistor T1 to the first pixel power line VDL to which the first pixel power voltage ELVDD is applied. When the fifth transistor T5 is turned on, the first pixel power voltage ELVDD may be applied to the first electrode of the first transistor T1. In one embodiment, the first pixel power voltage ELVDD may be a high potential pixel driving voltage.

[0114] The sixth transistor T6 may include a gate electrode connected to an emission control line ECL, a first electrode connected to the second electrode of the first transistor T1, and a second electrode connected to the light emitting element EL. The sixth transistor T6 may be turned on by an emission control signal supplied to the emission control line ECL to electrically connect the first transistor T1 to the light emitting element EL. When both the fifth transistor T5 and the sixth transistor T6 are turned on, a driving current of an amplitude corresponding to the voltage of the gate electrode of the first transistor T1 may flow to the light emitting element EL.

[0115] The seventh transistor T7 may include a gate electrode connected to the fourth scan line SL4, a first electrode connected to the anode of the light emitting element EL, and a second electrode connected to the second initialization power line VAIL. The seventh transistor T7 may be turned on by a fourth scan signal supplied to the fourth scan line SL4 to electrically connect the anode of the light emitting element EL to the second initialization power line VAIL. The fourth scan signal may be a signal that is the same as or different from the first scan signal. When the seventh transistor T7 is turned on, a second initialization voltage VAINT (e.g., an anode initialization voltage) of the second initialization power line VAIL may be applied to the anode of the light emitting element EL.

[0116] The capacitor Cst may be connected between the gate electrode of the first transistor T1 and the first pixel power line VDL. The capacitor Cst may be charged with a voltage corresponding to a voltage of a data signal applied to the gate electrode of the first transistor T1.

[0117] The active layer (e.g., semiconductor pattern including the channel region) of each of the pixel transistors T (e.g., the first transistor T1 to the seventh transistor T7) may include a semiconductor material selected from polysilicon, amorphous silicon, and an oxide semiconductor. In one embodiment, some of the pixel transistors T and other pixel transistors T may be formed as transistors of different conductivity types. In addition, some of the pixel transistors T and other pixel transistors T may include different types of semiconductor materials.

[0118] In one embodiment, for example, the first transistor T1, the second transistor T2, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 may be formed as P-type transistors (e.g., P-type MOSFETs) each including an active layer made of polysilicon, and the third transistor T3 and the fourth transistor T4 may be formed as N-type transistors (e.g., N-type MOSFETs) each including an active layer made of an oxide semiconductor. In one embodiment, transistors each including an active layer made of polysilicon and transistors each including an active layer made of an oxide semiconductor may be disposed in different layers within the circuit layer 120.

[0119] remove Figure 6 In addition, reference Figure 7 , the pixel circuit PCA may further include an eighth transistor T8. The eighth transistor T8 may include a gate electrode connected to the fifth scan line SL5, a first electrode connected to the bias power line VOBL, and a second electrode connected to the first electrode of the first transistor T1. The eighth transistor T8 may be turned on by the fifth scan signal supplied to the fifth scan line SL5 to electrically connect the first electrode of the first transistor T1 to the bias power line VOBL. When the eighth transistor T8 is turned on, the bias voltage VOBS supplied to the bias power line VOBL may be applied to the first electrode of the first transistor T1. In one embodiment, the bias voltage VOBS may have a voltage level suitable for compensating for the hysteresis characteristic of the first transistor T1. As the eighth transistor T8 is turned on, the first electrode of the first transistor T1 may be initialized to the bias voltage VOBS.

[0120] exist Figure 7 In the embodiment of the present invention, the gate electrode of the seventh transistor T7 can be connected to the fifth scan line SL5. Accordingly, the seventh transistor T7 can be turned on by the fifth scan signal supplied to the fifth scan line SL5 to connect the anode of the light emitting element EL to the second initialization power line VAIL.

[0121] Figure 8 is a cross-sectional view of a sub-pixel SPX of the display device 10 according to the embodiment. Figure 8 It is a cross-sectional view of a portion of a region corresponding to the sub-pixel SPX in the display area DA.

[0122] refer to Figure 8 The display panel 100 may include a substrate 110 and a circuit layer 120, a light emitting element layer 130, and an encapsulation layer 140 disposed on the substrate 110. The circuit layer 120, the light emitting element layer 130, and the encapsulation layer 140 may be sequentially disposed or stacked on the substrate 110 along the third direction DR3.

[0123] The substrate 110 may be made of a flexible material that can be bent, folded, or rolled. The substrate 110 may be made of an insulating material such as a polymer resin. In one embodiment, for example, the substrate 110 may be made of polyimide.

[0124] The circuit layer 120 may include a pixel circuit PXC and lines. In one embodiment, for example, the circuit layer 120 may include circuit elements (e.g., a pixel transistor T and a capacitor Cst) constituting the pixel circuit PXC of each sub-pixel SPX and lines (e.g., various power lines and signal lines including a power line PL, a scan line SL, an emission control line ECL, and a data line DL) electrically connected to the sub-pixel SPX.

[0125] Figure 8 The diagram may provide, among the elements in the circuit layer 120, a first thin film transistor TFT1 (also referred to as a "first pixel transistor"), a second thin film transistor TFT2 (also referred to as a "second pixel transistor"), and a capacitor Cst included in the pixel circuit PXC of each sub-pixel SPX. The first thin film transistor TFT1 may be a first type transistor (e.g., a P-type transistor) including a first semiconductor material (e.g., polysilicon) among the pixel transistors T constituting each pixel circuit PXC. In one embodiment, for example, the first thin film transistor TFT1 may be one of the first transistor T1, the second transistor T2, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, and the eighth transistor T8. Figure 8 In the embodiment, one transistor (eg, a first connection electrode CNE1 and a second connection electrode CNE2) among the first type transistors is connected to the light emitting element EL through at least one connection electrode (eg, a first connection electrode CNE1 and a second connection electrode CNE2). Figure 6 or Figure 7 The sixth transistor T6 of the pixel transistor T1 is illustrated as an example of the first thin film transistor TFT1. The second thin film transistor TFT2 may be a second type transistor (e.g., an N-type transistor) including a second semiconductor material (e.g., an oxide semiconductor) among the pixel transistors T. In one embodiment, for example, the second thin film transistor TFT2 may be one of the third transistor T3 and the fourth transistor T4.

[0126] The cross section of the subpixel SPX may vary according to the type and / or structure of each subpixel SPX and the display panel 100 including the subpixel SPX. In an embodiment, for example, the positions and formation order of the first thin film transistor TFT1, the second thin film transistor TFT2 and the capacitor Cst may vary according to the embodiment.

[0127] The circuit layer 120 may include semiconductor layers and conductive layers for forming circuit elements and lines, and insulating layers disposed between and / or around the conductive layers and the semiconductor layers. In one embodiment, for example, the circuit layer 120 may include a first semiconductor layer SCL1 (e.g., a polysilicon semiconductor layer), a first insulating layer 123 (e.g., a first gate insulating layer), a first conductive layer CDL1 (e.g., a first gate conductive layer), a second insulating layer 124 (e.g., a second gate insulating layer), a second conductive layer CDL2 (e.g., a second gate conductive layer), a third insulating layer 125 (e.g., a first interlayer insulating layer), a second semiconductor layer SCL2 (e.g., an oxide semiconductor layer), a fourth insulating layer 126 (e.g., a third gate insulating layer), a third conductive layer CDL3 (e.g., a third gate conductive layer), a fifth insulating layer 127 (e.g., a second interlayer insulating layer), a fourth conductive layer CDL4 (e.g., a first source-drain conductive layer), and a sixth insulating layer 128 (e.g., a first through-hole layer or a first planarization layer) sequentially disposed on the substrate 110 in the third direction DR3. In one embodiment, the circuit layer 120 may further include a fifth conductive layer CDL5 (e.g., a second source-drain conductive layer) and a seventh insulating layer 129 (e.g., a second via layer or a second planarization layer) sequentially disposed on the sixth insulating layer 128. In one embodiment, the circuit layer 120 may further include a bottom conductive layer BCDL disposed between the substrate 110 and the first semiconductor layer SCL1, a barrier layer 121 disposed between the substrate 110 and the bottom conductive layer BCDL, and a buffer layer 122 disposed between the bottom conductive layer BCDL and the first semiconductor layer SCL1.

[0128] The barrier layer 121 may be disposed on the substrate 110. The barrier layer 121 may protect the elements disposed in the circuit layer 120 and the light emitting element layer 130 from moisture introduced through the substrate 110 susceptible to moisture penetration. The barrier layer 121 may include at least one inorganic layer containing an inorganic insulating material (e.g., silicon nitride, silicon oxide, silicon oxynitride, titanium oxide, aluminum oxide, or other inorganic insulating materials). The material of the barrier layer 121 may vary according to the embodiment.

[0129] The bottom conductive layer BCDL may be disposed on the barrier layer 121. The bottom conductive layer BCDL may include a bottom metal layer BML overlapping an active layer (e.g., a first active layer ACT1 and / or a second active layer ACT2) and / or at least one line (or a portion of at least one line) of at least one pixel transistor T in a normal direction of the substrate 110. Figure 8In the embodiment, the bottom metal layer BML overlaps only with the first active layer ACT1 of the first thin film transistor TFT1 and the capacitor electrodes CAE1 and CAE2 of the capacitor Cst in the normal direction of the substrate 110, but the present disclosure is not limited thereto. In one embodiment, for example, the bottom metal layer BML may be patterned into an appropriate size and / or shape and thus disposed in a portion of the pixel circuit PXC, or may be disposed in the entire pixel circuit PXC. In one embodiment, for example, the bottom metal layer BML may be disposed only in a portion of the pixel region to overlap with the first active layer ACT1 of the first thin film transistor TFT1 and the capacitor electrodes CAE1 and CAE2 of the capacitor Cst in the normal direction of the substrate 110. Figure 6 and Figure 7 In one embodiment, the bottom metal layer BML may be used as a light shielding pattern and / or a back gate electrode of at least one pixel transistor T.

[0130] The buffer layer 122 may be disposed on the bottom conductive layer BCDL to cover the bottom conductive layer BCDL. The buffer layer 122 may include at least one inorganic layer including an inorganic insulating material.

[0131] The first thin film transistor TFT1, the second thin film transistor TFT2 and the capacitor Cst may be disposed on the surface of the substrate 110 including the buffer layer 122. The first thin film transistor TFT1 may include a first active layer ACT1 and a first gate electrode G1. The second thin film transistor TFT2 may include a second active layer ACT2 and a second gate electrode G2. In one embodiment, the second thin film transistor TFT2 may include a back gate electrode BG. The capacitor Cst may include a first capacitor electrode CAE1 and a second capacitor electrode CAE2.

[0132] The first semiconductor layer SCL1 may be disposed on the buffer layer 122. The first semiconductor layer SCL1 may include a first active layer ACT1 of a first thin film transistor TFT1. In one embodiment, for example, the first semiconductor layer SCL1 may include a first active layer ACT1 of each of the first transistor T1, the second transistor T2, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, and the eighth transistor T8.

[0133] The first active layer ACT1 may be provided in the first semiconductor layer SCL1, and may include a first semiconductor material (e.g., polysilicon). The first active layer ACT1 may include a first channel region CH1, a first source region S1, and a first drain region D1. The first channel region CH1 may overlap with the first gate electrode G1 in the third direction DR3. The first source region S1 may be disposed on one side of the first channel region CH1, and the first drain region D1 may be disposed on the other side of the first channel region CH1. The first source region S1 and the first drain region D1 may be regions formed to have conductivity by doping a semiconductor used to form the first active layer ACT1 with ions or impurities. In one embodiment, the first source region S1 may be a source electrode of the first thin film transistor TFT1. In one embodiment, the first thin film transistor TFT1 may include a separate source electrode connected to the first source region S1. In one embodiment, the first drain region D1 may be a drain electrode of the first thin film transistor TFT1. In one embodiment, the first thin film transistor TFT1 may include a separate drain electrode connected to the first drain region D1.

[0134] The first insulating layer 123 may be disposed on the first semiconductor layer SCL1. The first insulating layer 123 may cover the first semiconductor layer SCL1.

[0135] The first conductive layer CDL1 may be disposed on the first insulating layer 123. The first conductive layer CDL1 may include a first gate electrode G1 of the first thin film transistor TFT1. The first gate electrode G1 may overlap a portion of the first active layer ACT1 (e.g., the first channel region CH1) in a normal direction of the substrate 110. In one embodiment, the first conductive layer CDL1 may further include at least one line (or a portion of at least one line), a metal pattern (e.g., a bridge pattern), and / or a capacitor electrode. In one embodiment, for example, the first conductive layer CDL1 may further include a first capacitor electrode CAE1 of the capacitor Cst.

[0136] In one embodiment, the first capacitor electrode CAE1 may be formed integrally with a gate electrode of at least one first thin film transistor TFT1. Figure 6 and Figure 7 In one embodiment, for example, the first capacitor electrode CAE1 and the gate electrode of the first transistor T1 may be formed as one conductive pattern, and the second capacitor electrode CAE2 may be disposed to overlap the conductive pattern in the normal direction of the substrate 110 .

[0137] The second insulating layer 124 may be disposed on the first conductive layer CDL1. The second insulating layer 124 may cover the first conductive layer CDL1.

[0138] The second conductive layer CDL2 may be disposed on the second insulating layer 124. The second conductive layer CDL2 may include one electrode of the capacitor Cst, for example, the second capacitor electrode CAE2. In one embodiment, the second conductive layer CDL2 may further include at least one electrode, at least one line (or a portion of at least one line) and / or a metal pattern (for example, a bridge pattern). In one embodiment, for example, the second conductive layer CDL2 may further include a back gate electrode BG connected to the second gate electrode G2 of the second thin film transistor TFT2.

[0139] The third insulating layer 125 may be disposed on the second conductive layer CDL2. The third insulating layer 125 may cover the second conductive layer CDL2.

[0140] The second semiconductor layer SCL2 may be disposed on the third insulating layer 125. The second semiconductor layer SCL2 may include a second active layer ACT2 of the second thin film transistor TFT2. In an embodiment, for example, the second semiconductor layer SCL2 may include a second active layer ACT2 of each of the third transistor T3 and the fourth transistor T4.

[0141] The second active layer ACT2 may be provided in the second semiconductor layer SCL2 and may include a second semiconductor material (e.g., an oxide semiconductor) different from the first semiconductor material. In one embodiment, for example, the second active layer ACT2 may include IGZO (indium (In), gallium (Ga), zinc (Zn), and oxygen (O)), IGZTO (indium (In), gallium (Ga), zinc (Zn), tin (Sn), and oxygen (O)), or IGTO (indium (In), gallium (Ga), tin (Sn), and oxygen (O)).

[0142] The second active layer ACT2 may include a second channel region CH2, a second source region S2, and a second drain region D2. The second channel region CH2 may overlap with the second gate electrode G2 in the third direction DR3. The second source region S2 may be disposed on one side of the second channel region CH2, and the second drain region D2 may be disposed on the other side of the second channel region CH2. The second source region S2 and the second drain region D2 may be regions formed to have conductivity by doping a semiconductor used to form the second active layer ACT2 with ions or impurities. In one embodiment, the second source region S2 may be a source electrode of a second thin film transistor TFT2. In one embodiment, the second thin film transistor TFT2 may include a separate source electrode connected to the second source region S2. In one embodiment, the second drain region D2 may be a drain electrode of the second thin film transistor TFT2. In one embodiment, the second thin film transistor TFT2 may include a separate drain electrode connected to the second drain region D2.

[0143] The fourth insulating layer 126 may be disposed on the second semiconductor layer SCL2. The fourth insulating layer 126 may cover the second semiconductor layer SCL2.

[0144] The third conductive layer CDL3 may be disposed on the fourth insulating layer 126. The third conductive layer CDL3 may include a second gate electrode G2 of the second thin film transistor TFT2. The second gate electrode G2 may overlap a portion of the second active layer ACT2 (e.g., the second channel region CH2) in a normal direction of the substrate 110. In an embodiment, the third conductive layer CDL3 may further include at least one line (or a portion of at least one line), a metal pattern (e.g., a bridge pattern), and / or a capacitor electrode.

[0145] In one embodiment, each of the electrodes, conductive patterns and / or wires provided in the bottom conductive layer BCDL, the first conductive layer CDL1, the second conductive layer CDL2 and the third conductive layer CLD3 may include a conductive material (e.g., at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu) and other metals, alloys thereof or other conductive materials), and may have a single-layer or multi-layer structure. In one embodiment, for example, each of the electrodes, conductive patterns and / or wires provided in the bottom conductive layer BCDL, the first conductive layer CDL1, the second conductive layer CDL2 and the third conductive layer CLD3 may include molybdenum (Mo) or other metal materials. At least two of the bottom conductive layer BCDL, the first conductive layer CDL1, the second conductive layer CDL2 and the third conductive layer CLD3 may include the same material or different materials. The material of each of the bottom conductive layer BCDL, the first conductive layer CDL1, the second conductive layer CDL2 and the third conductive layer CLD3 is not limited and may vary according to the embodiment.

[0146] The fifth insulating layer 127 may be disposed on the third conductive layer CDL3. The fifth insulating layer 127 may cover the third conductive layer CDL3.

[0147] In one embodiment, each of the first insulating layer 123, the second insulating layer 124, the third insulating layer 125, the fourth insulating layer 126, and the fifth insulating layer 127 may be an inorganic insulating layer including an inorganic insulating material (e.g., silicon nitride, silicon oxide, silicon oxynitride, titanium oxide, aluminum oxide, or other inorganic insulating materials), and may have a single-layer or multi-layer structure. At least two of the first insulating layer 123, the second insulating layer 124, the third insulating layer 125, the fourth insulating layer 126, and the fifth insulating layer 127 may include the same material or different materials. The material of each of the first insulating layer 123, the second insulating layer 124, the third insulating layer 125, the fourth insulating layer 126, and the fifth insulating layer 127 may vary according to the embodiment.

[0148] The fourth conductive layer CDL4 may be disposed on the fifth insulating layer 127. The fourth conductive layer CDL4 may include a first connection electrode CNE1 (or a drain electrode of the first thin film transistor TFT1), a first bridge electrode BE1 (or a source electrode of the second thin film transistor TFT2), and a second bridge electrode BE2 (or a drain electrode of the second thin film transistor TFT2). The first connection electrode CNE1 may be provided in the fourth conductive layer CDL4 and connected to the first drain region D1 of the first active layer ACT1 through a first contact hole CT1 penetrating the first insulating layer 123, the second insulating layer 124, the third insulating layer 125, the fourth insulating layer 126, and the fifth insulating layer 127. The first bridge electrode BE1 may be provided in the fourth conductive layer CDL4 and connected to the second source region S2 of the second active layer ACT2 through a second contact hole CT2 penetrating the fourth insulating layer 126 and the fifth insulating layer 127. The second bridge electrode BE2 may be connected to the second drain region D2 of the second active layer ACT2 through a third contact hole CT3 penetrating the fourth insulating layer 126 and the fifth insulating layer 127. In one embodiment, the fourth conductive layer CDL4 may further include at least one line (or a portion of at least one line) and / or a metal pattern (e.g., a bridge pattern). In one embodiment, for example, the fourth conductive layer CDL4 may include a portion of a power line PL (e.g., a first pixel power line VDL and / or a second pixel power line VSL) provided inside and / or outside the display area DA.

[0149] The sixth insulating layer 128 may be disposed on the fourth conductive layer CDL4. The sixth insulating layer 128 may cover the fourth conductive layer CDL4.

[0150] The fifth conductive layer CDL5 may be disposed on the sixth insulating layer 128. The fifth conductive layer CDL5 may include a second connection electrode CNE2. The second connection electrode CNE2 may be provided in the fifth conductive layer CDL5 and connected to the first connection electrode CNE1 through a fourth contact hole CT4 (or a first through hole) penetrating the sixth insulating layer 128. In one embodiment, the fifth conductive layer CDL5 may further include at least one line (or a portion of at least one line) and / or a metal pattern (e.g., a bridge pattern). In one embodiment, for example, the fifth conductive layer CDL5 may include a portion of a power line PL (e.g., a first pixel power line VDL and / or a second pixel power line VSL) provided inside and / or outside the display area DA.

[0151] In one embodiment, each of the electrodes, conductive patterns and / or wires provided in the fourth conductive layer CDL4 and the fifth conductive layer CDL5 may include a conductive material (e.g., at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu) and other metals, alloys thereof or other conductive materials), and may have a single-layer or multi-layer structure. In one embodiment, for example, each of the electrodes, conductive patterns and / or wires provided in the fourth conductive layer CDL4 and the fifth conductive layer CDL5 may have a three-layer structure of titanium / aluminum / titanium (Ti / Al / Ti). The fourth conductive layer CDL4 and the fifth conductive layer CDL5 may include the same material or different materials. The material of each of the fourth conductive layer CDL4 and the fifth conductive layer CDL5 may vary according to the embodiment.

[0152] The seventh insulating layer 129 may be disposed on the fifth conductive layer CDL5. The seventh insulating layer 129 may cover the fifth conductive layer CDL5.

[0153] In one embodiment, each of the sixth insulating layer 128 and the seventh insulating layer 129 may be an organic insulating layer including an organic insulating material (e.g., acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin or other organic insulating material) to planarize the circuit layer 120, and may have a single-layer or multi-layer structure. The sixth insulating layer 128 and the seventh insulating layer 129 may include the same material or different materials. The material of each of the sixth insulating layer 128 and the seventh insulating layer 129 may vary according to the embodiment.

[0154] The light emitting element layer 130 may include a pixel defining layer 131 that separates the emission area EA of the pixel PX and the light emitting element EL located in the emission area EA. In one embodiment, the light emitting element layer 130 may further include a spacer 132 disposed on a portion of the pixel defining layer 131 (see Fig. 9 ).

[0155] Each light emitting element EL may include a first electrode ET1 (e.g., an anode) connected to at least one transistor T (e.g., a first thin film transistor TFT1) included in a corresponding sub-pixel SPX through a first connection electrode CNE1 and / or a second connection electrode CNE2, and a light emitting layer EML and a second electrode ET2 (e.g., a cathode) sequentially disposed on the first electrode ET1. In an embodiment, each light emitting element EL may further include a first intermediate layer (e.g., a hole layer including a hole transport layer) between the first electrode ET1 and the light emitting layer EML, and a second intermediate layer (e.g., an electron layer including an electron transport layer) between the light emitting layer EML and the second electrode ET2.

[0156] The first electrode ET1 of each light emitting element EL may include a conductive material and may be disposed on the circuit layer 120. In one embodiment, for example, the first electrode ET1 may be disposed on the seventh insulating layer 129 in each emission area EA. The first electrode ET1 may be connected to the second connection electrode CNE2 through a fifth contact hole CT5 (or a second through hole) penetrating the seventh insulating layer 129.

[0157] In one embodiment, the first electrode ET1 may include a metal material having a high reflectivity. In one embodiment, for example, the first electrode ET1 may have a single-layer structure of molybdenum (Mo), titanium (Ti), copper (Cu), or aluminum (Al), or may have a structure including indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium oxide (In 2 O 3 ) and multilayer structures of silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), lead (Pb), gold (Au), or nickel (Ni) (e.g., ITO / Mg, ITO / MgF 2 , ITO / Ag or ITO / Ag / ITO).

[0158] The light-emitting layer EML of each light-emitting element EL may include a polymer material or a low-molecular material. In one embodiment, a light-emitting layer EML may be provided for each sub-pixel SPX, and the light-emitting layer EML of each sub-pixel SPX may emit visible light of a color corresponding to the sub-pixel SPX. In one embodiment, the light-emitting layer EML may be a common layer shared by sub-pixels SPX of different colors, and a wavelength conversion layer and / or a color filter corresponding to the color (or wavelength band) of light to be emitted from each sub-pixel SPX may be provided in the emission area EA of at least some of the sub-pixels SPX.

[0159] The second electrode ET2 of each light emitting element EL may include a conductive material and may be connected to a second pixel power supply line VSL. In one embodiment, the second electrode ET2 may be a common layer formed throughout the entire display area DA to cover the light emitting layer EML and the pixel defining layer 131. In one embodiment, the second electrode ET2 may be made of a transparent conductive material (TCO) capable of transmitting light such as ITO or IZO, or a semi-transmissive conductive material such as magnesium (Mg), silver (Ag), or an alloy of Mg and Ag. When the second electrode ET2 is made of a semi-transmissive conductive material, it is expected that the light output efficiency will be improved by the microcavity effect.

[0160] The pixel defining layer 131 may define openings corresponding to the emission areas EA, respectively, and may surround the emission area EA. In one embodiment, for example, the pixel defining layer 131 may be formed to cover the edge of the first electrode ET1 of each light emitting element EL, and may define an opening exposing other portions of the first electrode ET1. The area where the exposed first electrode ET1 and the light emitting layer EML overlap in the normal direction of the substrate 110 (or the area including them) may be defined as the emission area EA of each pixel PX.

[0161] In one embodiment, the pixel defining layer 131 may include at least one organic layer including an organic insulating material. In one embodiment, for example, the pixel defining layer 131 may include polyacrylate resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin or benzocyclobutene (BCB), or may include other organic insulating materials.

[0162] The spacer 132 may be disposed on a portion of the pixel defining layer 131. The spacer 132 may include at least one organic layer including an organic insulating material. The spacer 132 may include the same material as the material of the pixel defining layer 131, or may include a material different from the material of the pixel defining layer 131. In one embodiment, the pixel defining layer 131 and the spacer 132 may be sequentially formed by respective mask processes. In one embodiment, the pixel defining layer 131 and the spacer 132 may be simultaneously formed using a halftone mask. In this case, the pixel defining layer 131 and the spacer 132 may be considered as an integral insulating layer. The organic insulating material forming the spacer 132 is not particularly limited and may vary according to the embodiment.

[0163] The encapsulation layer 140 may be disposed on the light emitting element layer 130 in the main area MA. In one embodiment, for example, the encapsulation layer 140 may be disposed in the display area DA and the non-display area NA to cover the light emitting element layer 130. The encapsulation layer 140 may block oxygen or moisture from penetrating into the light emitting element layer 130, and reduce electrical or physical impact on the circuit layer 120 and the light emitting element layer 130.

[0164] In one embodiment, the encapsulation layer 140 may include a first inorganic encapsulation layer 141, an organic encapsulation layer 142, and a second inorganic encapsulation layer 143 sequentially disposed on the light emitting element layer 130. The first and second inorganic encapsulation layers 141 and 143 may include inorganic materials, and the organic encapsulation layer 142 may include organic materials.

[0165] Fig. 9 is a cross-sectional view of an outer portion of the display panel 100 according to an embodiment. Fig. 9A portion of the display area DA and a portion of the non-display area NA of the display panel 100 are shown.

[0166] refer to Fig. 9 , the display panel 100 may include a plurality of dam structures DAM1 and DAM2 disposed in the dam area DAMA of the non-display area NA. In a plan view, the dam structures DAM1 and DAM2 may surround the display area DA of the display panel 100. In an embodiment, for example, the dam structures DAM1 and DAM2 may include a first dam DAM1 surrounding the display area DA and a second dam DAM2 surrounding the first dam DAM1. The second dam DAM2 may be disposed closer to the edge of the display panel 100 than the first dam DAM1. The display panel 100 including the dam structures DAM1 and DAM2 can prevent the organic material of the organic encapsulation layer 142 of the encapsulation layer 140 from overflowing.

[0167] In an embodiment, each of the first dam DAM1 and the second dam DAM2 may include a plurality of sub-dams SDAM1 to SDAM3. The sub-dams SDAM1 to SDAM3 may include the same material as that of the plurality of organic insulating material layers disposed in the display area DA, and may be formed simultaneously with the organic insulating material layers. Alternatively, the sub-dams SDAM1 to SDAM3 may be disposed in the same layer as the plurality of organic insulating material layers disposed in the display area DA, respectively.

[0168] In an embodiment, for example, each of the first dam DAM1 and the second dam DAM2 may include a first sub-dam SDAM1 and a second sub-dam SDAM2 disposed on the first sub-dam SDAM1. The second dam DAM2 may further include a third sub-dam SDAM3 disposed on the second sub-dam SDAM2. The first sub-dam SDAM1 may include the same material as the sixth insulating layer 128, and may be disposed at substantially the same layer as the sixth insulating layer 128. The second sub-dam SDAM2 may include the same material as the seventh insulating layer 129, and may be disposed at substantially the same layer as the seventh insulating layer 129. The third sub-dam SDAM3 may include the same material as the pixel defining layer 131 and / or the spacer 132, and may be disposed at substantially the same layer as the pixel defining layer 131 and / or the spacer 132. The first sub-dam SDAM1, the second sub-dam SDAM2, and the third sub-dam SDAM3 may be respectively regarded as parts of the sixth insulating layer 128, the seventh insulating layer 129, and the pixel defining layer 131 and / or the spacer 132 disposed in the display area DA.

[0169] Since the first dam DAM1 and the second dam DAM2 are spaced apart from the display area DA, a valley may be formed between the dam area DAMA and the display area DA and / or between adjacent dam structures DAM1 and DAM2. The valley may prevent the organic material of the organic encapsulation layer 142 from overflowing to the edge of the display panel 100. The organic encapsulation layer 142 may fill the valley between the first dam DAM1 and the display area DA.

[0170] The first inorganic encapsulation layer 141, the organic encapsulation layer 142, and the second inorganic encapsulation layer 143 of the encapsulation layer 140 may be disposed in the first non-display area NA1 between the first dam DAM1 and the display area DA and in the dam area DAMA of the non-display area NA. Since the organic encapsulation layer 142 does not extend beyond at least the second dam DAM2, it may not be disposed in the second non-display area NA2 between the second dam DAM2 and the edge of the non-display area NA. The first inorganic encapsulation layer 141 and the second inorganic encapsulation layer 143 of the encapsulation layer 140 may contact each other in the second non-display area NA2. The second non-display area NA2 in which the first inorganic encapsulation layer 141 and the second inorganic encapsulation layer 143 contact each other may be an inorganic encapsulation area IEA. The inorganic encapsulation area IEA in which the first inorganic encapsulation layer 141 and the second inorganic encapsulation layer 143 contact each other may be formed outside the second dam DAM2 to block a path through which moisture penetration from the outside may occur.

[0171] The display panel 100 may include a second pixel power line VSL disposed in the non-display area NA. The second pixel power line VSL may overlap the first dam DAM1 in the normal direction of the substrate 110 and may surround the display area DA. A portion of the second pixel power line VSL may not overlap the first dam DAM1 in the normal direction of the substrate 110 and may contact the second electrode ET2 of the light emitting element EL in a valley disposed between the first dam DAM1 and the display area DA. The second electrode ET2 of the light emitting element EL may receive a second power supply voltage from the second pixel power line VSL.

[0172] Despite Fig. 9 The first dam DAM1 and the second dam DAM2 are disposed on the second pixel power line VSL, but the present disclosure is not limited thereto. For another example, either the first dam DAM1 or the second dam DAM2 may not be disposed on the second pixel power line VSL. Alternatively, the first dam DAM1 and the second dam DAM2 may not be disposed on the second pixel power line VSL. In this case, the first dam DAM1 and the second dam DAM2 may be disposed outside the second pixel power line VSL.

[0173] Fig.101 is a schematic cross-sectional view of the encapsulation layer 140 in the flat portion FA and the bent portion EBA of the display device 10 in a flat state according to an embodiment.

[0174] refer to Fig.10 In the display device 10, the encapsulation layer 140 may be disposed throughout the flat portion FA and the bent portion EBA. Each of the first inorganic encapsulation layer 141, the organic encapsulation layer 142, and the second inorganic encapsulation layer 143 of the encapsulation layer 140 may be disposed in the flat portion FA and the bent portion EBA. The encapsulation layer 140 may protect the light emitting element EL disposed in the flat portion FA and the bent portion EBA, and may protect the display panel 100 from moisture penetration from the outside.

[0175] According to one embodiment, the organic encapsulation layer 142 of the encapsulation layer 140 in the display device 10 may have different cross-sectional shapes in the flat portion FA and the bent portion EBA. In one embodiment, for example, the organic encapsulation layer 142 of the encapsulation layer 140 may have a volume or amount of organic insulating material "per unit area" in the bent portion EBA that is larger than in the flat portion FA. A portion of the organic encapsulation layer 142 in the bent portion EBA may have a height higher than that of the organic encapsulation layer 142 in the flat portion FA. The organic encapsulation layer 142 may have an upwardly protruding portion in the bent portion EBA, and the protruding portion may form an area HVA, in which the volume of the organic insulating material per unit area is greater than the volume of the organic insulating material per unit area in the flat portion FA. In one embodiment, the protruding portion may be set to a curved area corresponding to the bent portion EBA. As used herein, the "unit area" is measured in a view in the normal direction of the main surface of the substrate 110, and the "height" is measured in the normal direction.

[0176] The display device 10 may include a bent portion EBA that is bent downward, which is different from the flat portion FA. In the bent portion EBA, the substrate 110, the circuit layer 120, the light-emitting element layer 130, and the encapsulation layer 140 may all be bent in one direction (e.g., toward the bottom of the display device 10). The encapsulation layer 140 including the inorganic encapsulation layers 141 and 143 and the organic encapsulation layer 142 may be damaged by the stress applied to the bent portion in the bent portion EBA. The display device 10 may be configured to reduce the stress applied to the encapsulation layer 140, and the encapsulation layer 140 (especially the second inorganic encapsulation layer 143) in the bent portion EBA may be prevented from being damaged by stress.

[0177] In one embodiment, for example, the display device 10 may include an area HVA in which the organic encapsulation layer 142 has a larger volume per unit area in the bent portion EBA than in the flat portion FA. In the display device 10, the maximum height H1 of the organic encapsulation layer 142 measured in the bent portion EBA may be greater than the maximum height H2 of the organic encapsulation layer 142 measured in the flat portion FA. In addition, the display device 10 may have a structure in which the second inorganic encapsulation layer 143 has a larger length in the bent portion EBA than in the flat portion FA. As shown in the drawings, the surface length L1 of the second inorganic encapsulation layer 143 measured in a unit area of ​​the bent portion EBA may be greater than the surface length L2 measured in a unit area of ​​the flat portion FA. In other words, the surface length L1 of the second inorganic encapsulation layer 143 corresponding to the unit area of ​​the bent portion EBA may be greater than the surface length L2 corresponding to the unit area of ​​the flat portion FA. When the display device 10 is bent, the area HVA in which the organic encapsulation layer 142 has a large volume per unit area can offset the thinning portion in the bent portion EBA. In addition, when the second inorganic encapsulation layer 143 is bent, it can be effectively prevented from being damaged by stress.

[0178] Fig.11 It is a detailed diagram Fig.10 1 is a cross-sectional view of the structure of the organic encapsulation layer 142 of the encapsulation layer 140 in the bent portion EBA. Fig.11 The bent portion of the organic encapsulating layer 142 in the bent portion EBA is illustrated in detail.

[0179] remove Fig.10 In addition, reference Fig.11 , the display device 10 may include a first area LSA formed by surface-treating a portion of the first inorganic encapsulation layer 141 or a pattern portion HSP disposed on the first inorganic encapsulation layer 141 to form a region where a portion of the organic encapsulation layer 142 is raised. Although the display device 10 includes both the first area LSA and the pattern portion HSP of the first inorganic encapsulation layer 141 in the drawings, the present disclosure is not limited thereto. In another embodiment, the display device 10 may include one of the first area LSA and the pattern portion HSP of the first inorganic encapsulation layer 141.

[0180] According to one embodiment, the first inorganic encapsulation layer 141 may include a surface-treated first area LSA and a second area other than the first area LSA in the bending portion EBA. The first area LSA may be an area that is surface-treated to have a surface energy lower than that of the second area. When an organic insulating material is applied to the first inorganic encapsulation layer 141 in the bending portion EBA, the organic insulating material applied to the first area LSA among the organic insulating materials may be gathered with each other. Since the organic insulating material applied around the first area LSA and the organic insulating material applied on the first area LSA are gathered with each other, the area on the first area LSA and around the first area LSA may be further convex upward than the surrounding area. Accordingly, the organic encapsulation layer 142 may be further convex on the first area LSA of the first inorganic encapsulation layer 141 or around the first area LSA than in other areas except the area including the pattern portion HSP.

[0181] Alternatively, the display device 10 may include a pattern portion HSP disposed on the first inorganic encapsulation layer 141 and including a material having a surface energy higher than that of the organic insulating material surrounding the pattern portion HSP. The organic insulating material applied on the first inorganic encapsulation layer 141 may gather around the pattern portion HSP and form a convex area together with the organic insulating material applied around the pattern portion HSP. Accordingly, the organic encapsulation layer 142 may be further convex in the area on or around the pattern portion HSP than in other areas except the area on the first area LSA. The height H1_1 of the organic encapsulation layer 142 in the area located on the first area LSA of the first inorganic encapsulation layer 141 or in the area overlapping with the pattern portion HSP in the normal direction of the substrate 110 may be greater than the height H1_2 of the organic encapsulation layer 142 in other areas. The first area LSA and / or the pattern portion HSP of the first inorganic encapsulation layer 141 may be placed to correspond to the area that is bent to the greatest extent in the bending portion EBA of the display device 10 or the area where the stress caused by the bending is the greatest. Accordingly, the organic encapsulation layer 142 may have the largest maximum height H1 in the area that is bent to the greatest extent in the bending portion EBA of the display device 10 or in the area where the stress caused by the bending is the largest. According to the arrangement of the first area LSA and / or the pattern portion HSP of the first inorganic encapsulation layer 141 in the bending portion EBA, a portion of the organic encapsulation layer 142 may have a protrusion and depression pattern in the bending portion EBA. However, the average height of the organic encapsulation layer 142 may be greater in the bending portion EBA than in the flat portion FA.

[0182] When the organic insulating material applied to the first inorganic encapsulation layer 141 is accumulated in a specific area due to the first area LSA and / or the pattern portion HSP of the first inorganic encapsulation layer 141, the organic insulating material remaining in other areas may be insufficient. In the process of manufacturing the display device 10, the amount of organic insulating material applied per unit area may be larger in the bending portion EBA where the first area LSA and / or the pattern portion HSP of the first inorganic encapsulation layer 141 is provided than in the flat portion FA. Accordingly, in the display device 10, even if the organic insulating material applied to the bending portion EBA is accumulated in a specific area, the volume of the organic encapsulation layer 142 per unit area may be larger in the bending portion EBA than in the flat portion FA.

[0183] Fig.12 The picture is in a bent state Fig.10 The bent portion EBA of the display device 10.

[0184] refer to Fig.12 In the display device 10, the base unit BS including the substrate 110, the circuit layer 120 and the light emitting element layer 130 and the encapsulation layer 140 disposed on the base unit BS may be bent together in the bent portion EBA. Fig.12 As shown in , the bent portion EBA may be bent toward a rear surface of the substrate 110 opposite to a surface of the substrate 110 on which the light emitting element layer 120 is disposed. The organic encapsulation layer 142 may include a region HVA in the bent portion EBA, in which the volume of the organic encapsulation layer 142 per unit area is larger than in the flat portion FA. The region HVA may be positioned to correspond to the region that is bent to the greatest extent in the display device 10. The organic encapsulation layer 142 may become relatively thin in the portion where the display device 10 is bent, compared to an unbent state (i.e., a flat state). However, according to an embodiment, since the region HVA where the volume of the organic encapsulation layer 142 per unit area is large is located in the bent portion EBA as described above, the thinning of the organic encapsulation layer 142 can be offset even in the bent state. In addition, the second inorganic encapsulating layer 143 disposed on the organic encapsulating layer 142 may have a larger surface length per unit area in the bent portion of the bent portion EBA than in the flat portion FA, so that stress applied when the display device 10 is bent can be well dispersed.

[0185] Fig.13 1 is a schematic cross-sectional view of an encapsulation layer in a flat portion FA and a bent portion EBA of a display device 10 in a flat state according to an embodiment. Fig.14 The picture is in a bent state Fig.13 The bent portion EBA of the display device 10.

[0186] refer to Fig.13 and Fig.14 In the display device 10 according to the embodiment, the organic encapsulation layer 142 may include a plurality of convex patterns PT in the bent portion EBA. The organic encapsulation layer 142 may have a greater average height and a greater volume per unit area in the bent portion EBA than in the flat portion FA, and may have a convex shape in some portions. Fig.11 or Fig.11 Although not shown in detail in the drawings, the convex pattern PT of the organic encapsulation layer 142 disposed in the bent portion EBA of the display device 10 may be formed by Fig.11 If the number of first areas LSA and / or pattern parts HSP of the first inorganic encapsulating layer 141 increases, the organic encapsulating layer 142 may include a plurality of convex patterns PT.

[0187] When the organic encapsulating layer 142 includes a plurality of convex patterns PT, the second inorganic encapsulating layer 143 disposed on the organic encapsulating layer 142 may have a greater surface length measured in a unit area. As the length of the second inorganic encapsulating layer 143 per unit area increases, stress applied when the display device 10 is bent can be more dispersed.

[0188] A method of manufacturing the display device 10 will now be described with reference to other drawings.

[0189] Fig.15 is a flowchart illustrating a method of manufacturing a display device according to an embodiment.

[0190] refer to Fig.15 , the method of manufacturing the display device 10 according to the embodiment may include forming a plurality of light emitting elements EL on a substrate (operation S10), forming a first inorganic encapsulation layer 141 on the light emitting element EL (operation S20), forming an organic encapsulation layer 142 on the first inorganic encapsulation layer 141 (operation S30), and forming a second inorganic encapsulation layer 143 on the organic encapsulation layer 142 (operation S40). In forming the organic encapsulation layer 142 (operation S30), the amount of organic insulating material applied per unit area may be different in the flat portion FA and the bent portion EBA, and a region in which a portion of the organic encapsulation layer 142 protrudes may be formed in the bent portion EBA.

[0191] Figures 16 to 19 are views sequentially illustrating a process of manufacturing a display device according to an embodiment.

[0192] refer to Fig.16 and Fig. 9, a light emitting element layer 130 is formed by forming a plurality of light emitting elements EL on a base substrate (operation S10), and a first inorganic encapsulation layer 141 is formed on the light emitting element EL (operation S20). A pixel defining layer 131 may be formed on the base substrate, and the light emitting element EL may be formed in an opening of the pixel defining layer 131. The structures of the pixel defining layer 131 and the light emitting element EL are the same as those described above. Each of the pixel defining layer 131 and the light emitting element EL may be formed by a typical patterning or deposition process.

[0193] Next, the first inorganic encapsulation layer 141 is formed on the light emitting element layer 130. In one embodiment, the first inorganic encapsulation layer 141 may be formed by a plasma enhanced chemical vapor deposition (PECVD) process using a gaseous precursor or a liquid precursor. However, the present disclosure is not limited thereto.

[0194] Although not illustrated in the drawings, the base substrate may include the above-mentioned substrate 110 and the circuit layer 120. Like the substrate 110, the base substrate may include a flat portion FA and a bent portion EBA.

[0195] refer to Fig.17 , the first area LSA is formed by surface-treating a portion of the first inorganic encapsulation layer 141 in the bending portion EBA. Alternatively, a pattern portion HSP is formed on the first inorganic encapsulation layer 141 in the bending portion EBA. Although both the first area LSA and the pattern portion HSP of the first inorganic encapsulation layer 141 are formed in the drawings, the present disclosure is not limited thereto. In the current process, at least any one of the first area LSA and the pattern portion HSP of the first inorganic encapsulation layer 141 may be formed.

[0196] Forming the first region LSA may include a process of treating the surface of the first inorganic encapsulation layer 141 to form a region with low surface energy. The first inorganic encapsulation layer 141 may include an inorganic insulating material. Through surface treatment, the surface energy of the above region of the first inorganic encapsulation layer 141 may become lower than the surface energy of its surrounding area. The first region LSA may cause the organic insulating materials applied in subsequent processes to aggregate with each other. The organic insulating materials applied on the first region LSA may aggregate with each other to bulge.

[0197] Unlike the first region LSA, the pattern portion HSP may include a material having high surface energy. The pattern portion HSP may be surrounded by an organic insulating material and may attract surrounding organic insulating materials. The organic insulating material applied to the first inorganic encapsulating layer 141 may gather and bulge around the pattern portion HSP.

[0198] refer to Fig.18, an organic encapsulation layer 142 is formed by applying an organic insulating material on the first inorganic encapsulation layer 141 (operation S30). In the process of forming the organic encapsulation layer 142, the method of applying the organic insulating material is not particularly limited. In one embodiment, for example, the organic encapsulation layer 142 can be formed by a chemical vapor deposition (CVD) or inkjet printing process.

[0199] In one embodiment, in forming the organic encapsulation layer 142, the amount of organic insulating material applied per unit area may be greater in the bending portion EBA than in the flat portion FA. If the amount of organic insulating material applied per unit area is the same in the flat portion FA and the bending portion EBA, the organic insulating material may be uniformly applied in the flat portion FA to have a uniform thickness. However, since the first area LSA and / or the pattern portion HSP of the first inorganic encapsulation layer 141 are disposed in the bending portion EBA, the organic insulating material may gather around them and may not have a uniform height in the bending portion EBA. In this case, the organic layer formed by the applied organic insulating material may not have a uniform height ML1, and a large bend may be formed in the bending portion EBA. If the organic encapsulation layer 142 is formed to have a large bend, the organic encapsulation layer 142 may be too thin in areas other than the area where the first area LSA and / or the pattern portion HSP of the first inorganic encapsulation layer 141 are disposed, and therefore may not be able to perform the encapsulation function.

[0200] According to an embodiment, the amount of organic insulating material applied per unit area in the process of forming the organic encapsulation layer 142 may be greater in the bent portion EBA than in the flat portion FA of the display device 10. In addition, the organic encapsulation layer 142 disposed in the bent portion EBA may have a large average height and may have a convex curved portion ( Fig.18 ML2). Since the amount of organic insulating material applied per unit area is greater in the bent portion EBA than in the flat portion FA, the bent portion of the organic encapsulation layer 142 does not have a large step difference despite the presence of the first area LSA and / or the pattern portion HSP of the first inorganic encapsulation layer 141. The upper surface of the organic encapsulation layer 142 may be flat in the flat portion FA and may have a partially curved shape in the bent portion EBA. The length of the second inorganic encapsulation layer 143 on the organic encapsulation layer 142 per unit area may vary.

[0201] refer to Fig.19, a second inorganic encapsulation layer 143 is formed on the organic encapsulation layer 142 (operation S40). The second inorganic encapsulation layer 143 may be formed by the same process as the first inorganic encapsulation layer 141. In one embodiment, for example, the second inorganic encapsulation layer 143 may be formed by a PECVD process using a gaseous precursor or a liquid precursor. However, the present disclosure is not limited thereto.

[0202] The second inorganic encapsulation layer 143 may be disposed on the entire organic encapsulation layer 142 throughout the flat portion FA and the bent portion EBA. Since the organic encapsulation layer 142 is formed to be flat in the flat portion FA and has a convex curved portion in some portions in the bent portion EBA, the surface length of the second inorganic encapsulation layer 143 measured in a unit area may be greater in the bent portion EBA than in the flat portion FA. Accordingly, the stress applied when the bent portion EBA of the display device 10 is bent can be smoothly dispersed, and damage to the encapsulation layer 140 can be effectively prevented.

[0203] In the display device 10 including the first area LSA formed in the first inorganic encapsulation layer 141 of the encapsulation layer 140 and / or the pattern portion HSP disposed on the first inorganic encapsulation layer 141, the organic encapsulation layer 142 may have a convex curved portion in some portions in the bent portion EBA. In addition, since the amount of organic insulating material applied per unit area in the process of forming the organic encapsulation layer 142 is larger in the bent portion EBA than in the flat portion FA, the organic encapsulation layer 142 can be prevented from becoming thinner in portions other than the convex portion of the organic encapsulation layer 142. In the display device 10, since the organic encapsulation layer 142 has a curved portion formed in the bent portion EBA, it is possible to effectively prevent the encapsulation layer 140 from being damaged when the display device 10 is bent. In addition, since the organic encapsulation layer 142 includes a bent portion with a small step difference in the bent portion EBA, the first inorganic encapsulation layer 141 and the second inorganic encapsulation layer 143 may not contact each other in the flat portion FA and the bent portion EBA, and may be able to perform an encapsulation function for protecting the display device 10.

[0204] Fig. 20 is a perspective view of a foldable display device 11 according to an embodiment. Fig.21 It is in folded state Fig. 20 A perspective view of the foldable display device 11. Fig. 20 The foldable display device 11 is shown unfolded without being bent at folding lines FL1 and FL2, and Fig.21 The foldable display device 11 is shown bent at folding lines FL1 and FL2.

[0205] refer to Fig. 20 and Fig.21, the display device 10 according to the embodiment may be applied to a foldable display device 11. The plane shape of the foldable display device 11 may be a quadrilateral shape such as a rectangular shape. Each corner of the foldable display device 11 may have a right-angle plane shape or an arc-shaped plane shape. The front surface of the foldable display device 11 may include two short sides extending in the second direction DR2 and two long sides extending in the first direction DR1.

[0206] The foldable display device 11 may include a display area DA and a non-display area NDA. The planar shape of the display area DA may follow the shape of the foldable display device 11. In one embodiment, for example, when the foldable display device 11 is rectangular in a plan view, the display area DA may also be rectangular in a plan view.

[0207] The display area DA may be an area including a plurality of pixels to display an image. The non-display area NDA may be an area that does not include pixels and therefore does not display an image. The non-display area NDA may be disposed around the display area DA. The non-display area NDA may surround the display area DA, but the embodiments of the present specification are not limited thereto. In another embodiment, the display area DA may also be partially surrounded by the non-display area NDA.

[0208] The foldable display device 11 can maintain both the first state and the second state, the first state being as follows: Fig. 20 The expanded state shown in the figure, the second state is as follows Fig.21 The folded state illustrated in FIG. The foldable display device 11 may be folded in an outer folding manner so that portions of the rear surface opposite to the display area DA face each other. In this case, when the foldable display device 11 is folded, portions of the rear surface of the foldable display device 11 may face each other. Alternatively, the foldable display device 11 may be folded in an inner folding manner so that portions of the front surface of the foldable display device 11 face each other.

[0209] The foldable display device 11 may include a folding area FDA, a first non-folding area NFA1, and a second non-folding area NFA2. The folding area FDA may be an area where the foldable display device 11 is bent or folded. The first non-folding area NFA1 and the second non-folding area NFA2 may be areas where the foldable display device 11 is not bent or folded. In one embodiment, the first non-folding area NFA1 and the second non-folding area NFA2 may be flat areas of the foldable display device 11.

[0210] The first non-folding area NFA1 may be disposed on one side of the folding area FDA, for example, on the left side. The second non-folding area NFA2 may be disposed on the other side of the folding area FDA, for example, on the right side. The folding area FDA may be an area defined by the first folding line FL1 and the second folding line FL2, and may be an area where the foldable display device 11 is bent with a predetermined curvature. The first folding line FL1 may be a boundary between the folding area FDA and the first non-folding area NFA1, and the second folding line FL2 may be a boundary between the folding area FDA and the second non-folding area NFA2.

[0211] like Fig. 20 and Fig.21 As shown in , the first folding line FL1 and the second folding line FL2 may extend in the first direction DR1. In this case, the foldable display device 11 may be folded along the first direction DR1. Therefore, since the length of the foldable display device 11 in the second direction DR2 can be reduced by about half, the user can easily carry the foldable display device 11.

[0212] When the first folding line FL1 and the second folding line FL2 extend in the first direction DR1, the length of the folding area FDA in the first direction DR1 may be greater than the length of the folding area FDA in the second direction DR2. In addition, the length of the first non-folding area NFA1 in the first direction DR1 may be greater than the length of the first non-folding area NFA1 in the second direction DR2. The length of the second non-folding area NFA2 in the first direction DR1 may be greater than the length of the second non-folding area NFA2 in the second direction DR2.

[0213] Each of the display area DA and the non-display area NDA may overlap at least one of the folding area FDA, the first non-folding area NFA1, and the second non-folding area NFA2 in the normal direction of the substrate 110. Fig. 20 and Fig.21 In the embodiment, each of the display area DA and the non-display area NDA overlaps the folding area FDA, the first non-folding area NFA1, and the second non-folding area NFA2 in the normal direction of the substrate 110.

[0214] Fig. 22 is based on Fig. 20 Schematic cross-sectional view of a foldable display device 11 of an embodiment. Fig.23 It is in folded state Fig. 22 A cross-sectional view of a foldable display device 11.

[0215] refer to Fig. 22 and Fig.23The foldable display device 11 may include a substrate 110 and a circuit layer 120, a light emitting element layer 130 and an encapsulation layer 140 sequentially disposed on the substrate 110. The foldable display device 11 may have a folding area FDA and non-folding areas NFA1 and NFA2. These elements may be similar to those in the above reference Figures 1 to 9 Describe the element.

[0216] The folding area FDA of the foldable display device 11 may be folded about the folding lines FL1 and FL2. As the folding area FDA is folded, the non-folding areas NFA1 and NFA2 may move downward, i.e., move toward one side in the third direction DR3, and the folding area FDA may become convex upward. Accordingly, the rear surfaces of the first non-folding area NFA1 and the second non-folding area NFA2 may face each other.

[0217] When the foldable display device 11 is folded in the folding area FDA, stress due to the folding may be applied to a portion of the encapsulation layer 140 located in the folding area FDA. As described above, the organic encapsulation layer 142 of the encapsulation layer 140 may have different cross-sectional shapes in the folding area FDA and the non-folding areas NFA1 and NFA2, and may well disperse stress generated during folding.

[0218] Fig.24 It is in a flat state Fig. 22 sectional view of the encapsulation layer 140 of the foldable display device 11. Fig.25 It is in folded state Fig.24 sectional view of the encapsulation layer 140 of the foldable display device 11.

[0219] refer to Fig.24 and Fig.25 In the foldable display device 11 according to the embodiment, the volume or amount of the organic insulating material per unit area in the organic encapsulation layer 142 of the encapsulation layer 140 may be larger in the folding area FDA than in the non-folding areas NFA1 and NFA2. A portion of the organic encapsulation layer 142 in the folding area FDA may have a height greater than that of the organic encapsulation layer 142 in the non-folding areas NFA1 and NFA2. The organic encapsulation layer 142 may have a portion protruding upward in the folding area FDA, and the protruding portion may form an area HVA in which the volume of the organic insulating material per unit area is greater than that in the non-folding areas NFA1 and NFA2. The maximum height H1 of the organic encapsulation layer 142 of the foldable display device 11 measured in the folding area FDA may be greater than the maximum height H2 measured in the non-folding areas NFA1 and NFA2.

[0220] In addition, the foldable display device 11 may have a structure in which the second inorganic encapsulation layer 143 is longer in the folding area FDA than in the non-folding areas NFA1 and NFA2 when measured in a unit area. Fig.10 ) may be greater than the surface length L2 measured in a unit area of ​​each of the non-folding areas NFA1 and NFA2 (see Fig.10 ). When the foldable display device 11 is folded, the region HVA having a large volume per unit area in the organic encapsulation layer 142 can offset the thinned portion in the folding region FDA. In addition, when the second inorganic encapsulation layer 143 is bent, it can effectively prevent it from being damaged by stress.

[0221] In the display device according to the embodiment, the organic encapsulation layer of the encapsulation layer may have a larger amount of organic material applied in the bending or folding region, and thus, it is possible to disperse stress generated during bending or folding.

[0222] In the display device according to the embodiment, it is possible to prevent the encapsulation layer from being damaged when being bent or folded.

[0223] At the end of the detailed description, those skilled in the art will appreciate that many changes and modifications may be made to the preferred embodiment without departing substantially from the principles of the present invention. Therefore, the disclosed preferred embodiments of the present invention are used only in a general and descriptive sense and not for the purpose of limitation.

Claims

1. A display device having a flat portion and a bent portion disposed on at least one side of the flat portion, the display device comprising: substrate; a light emitting element layer disposed on the substrate and comprising a plurality of light emitting elements disposed in the flat portion and the bent portion; as well as an encapsulation layer, which is arranged throughout the flat portion and the bent portion and includes a first inorganic encapsulation layer arranged on the light emitting element layer, an organic encapsulation layer arranged on the first inorganic encapsulation layer, and a second inorganic encapsulation layer arranged on the organic encapsulation layer, At least a portion of the organic encapsulation layer disposed in the bent portion includes a portion protruding in an upward direction from the substrate, and a maximum height of the portion of the organic encapsulation layer disposed in the bent portion is greater than a maximum height of the portion of the organic encapsulation layer disposed in the flat portion. 2 . The display device according to claim 1 , wherein an average height of the portion of the organic encapsulation layer disposed in the bent portion is greater than an average height of the portion of the organic encapsulation layer disposed in the flat portion. 3 . The display device according to claim 1 , wherein the organic encapsulation layer comprises an organic insulating material, and a volume of the organic insulating material per unit area of ​​the protruding portion in the bent portion is greater than a volume of the organic insulating material per unit area of ​​the flat portion. 4 . The display device of claim 1 , wherein a surface length of the second inorganic encapsulating layer measured in a unit area of ​​the bent portion is greater than a surface length of the second inorganic encapsulating layer measured in a unit area of ​​the flat portion.

5. A display device according to claim 1, wherein the first inorganic encapsulation layer includes a first region and a second region other than the first region in the bent portion, the first region has a surface energy lower than a surface energy of the second region, and a height of a portion of the organic encapsulation layer disposed on the first region is greater than a height of a portion of the organic encapsulation layer disposed on the second region.

6. The display device according to claim 1 further includes a pattern portion, which is arranged on the first inorganic encapsulation layer in the bending portion and includes a material having a surface energy higher than the surface energy of a material surrounding the pattern portion, wherein the organic encapsulation layer has a height in a portion of the bending portion overlapping with the pattern portion that is higher than a height in other portions of the bending portion. 7 . The display device according to claim 1 , wherein the protruding portion is provided in plural in the portion of the organic encapsulating layer disposed in the bent portion. 8 . The display device according to claim 1 , wherein the bent portion is bent toward a rear surface of the substrate, the rear surface of the substrate being opposite to a surface of the substrate on which the light emitting element layer is provided.

9. A display device according to claim 8, wherein the bent portion includes a first bent portion arranged on one side of the flat portion in a first direction and a second bent portion arranged on the other side of the flat portion in a direction opposite to the first direction, and the first bent portion, the second bent portion and the flat portion have the same length measured in a second direction intersecting the first direction. 10 . The display device according to claim 9 , wherein the protruding portion of the organic encapsulation layer is disposed to correspond to a bent area of ​​the bent portion.

11. A display device having a folding area foldable along a folding line extending in a first direction and a non-folding area arranged around the folding area, the display device comprising: substrate; a light emitting element layer, disposed on the substrate and comprising a plurality of light emitting elements disposed in the folding region and the non-folding region; as well as an encapsulation layer, which is arranged throughout the folding area and the non-folding area and includes a first inorganic encapsulation layer arranged on the light-emitting element layer, an organic encapsulation layer arranged on the first inorganic encapsulation layer and including an organic insulating material, and a second inorganic encapsulation layer arranged on the organic encapsulation layer, At least a portion of the organic encapsulation layer disposed in the folding region includes a portion protruding in an upward direction from the substrate, and a volume of the organic insulating material of the organic encapsulation layer per unit area of ​​the folding region is greater than a volume of the organic insulating material per unit area of ​​the non-folding region. 12 . The display device according to claim 11 , wherein a surface length of the second inorganic encapsulating layer measured in a unit area of ​​the folding region is greater than a surface length of the second inorganic encapsulating layer measured in a unit area of ​​the non-folding region. 13 . The display device according to claim 12 , wherein a maximum height of a portion of the organic encapsulation layer disposed in the folding region is greater than a maximum height of a portion of the organic encapsulation layer disposed in the non-folding region.

14. A method for manufacturing a display device, the display device having a flat portion and a bent portion disposed on at least one side of the flat portion, the method comprising: forming a light emitting element layer including a plurality of light emitting elements on a substrate; forming a first inorganic encapsulation layer on the light emitting element layer and forming an organic encapsulation layer by applying an organic insulating material on the first inorganic encapsulation layer; as well as forming a second inorganic encapsulation layer on the organic encapsulation layer, In the forming of the organic encapsulation layer, the amount of the organic insulating material applied per unit area of ​​the bent portion is greater than the amount of the organic insulating material applied per unit area of ​​the flat portion.

15. The method according to claim 14, further comprising: Before forming the organic encapsulation layer, a first region having a surface energy lower than that of an adjacent region is formed by surface treating a portion of the first inorganic encapsulation layer disposed in the bent portion.

16. The method according to claim 14, further comprising: After the forming of the first inorganic encapsulating layer, a pattern portion is formed, the pattern portion being disposed on the first inorganic encapsulating layer in the bent portion and including a material having a surface energy higher than that of the organic insulating material surrounding the pattern portion. 17 . The method of claim 16 , wherein in the applying the organic insulating material, the organic insulating material gathers around the pattern portion, and a portion of the organic encapsulation layer overlapping the pattern portion has a height higher than that of other portions. 18 . The method according to claim 14 , wherein a volume of the organic insulating material per unit area of ​​the bent portion is greater than a volume of the organic insulating material per unit area of ​​the flat portion. 19 . The method according to claim 14 , wherein a maximum height of a portion of the organic encapsulation layer disposed in the bent portion is greater than a maximum height of a portion of the organic encapsulation layer disposed in the flat portion. 20 . The method of claim 14 , wherein a surface length of the second inorganic encapsulating layer measured in a unit area of ​​the bent portion is greater than a surface length of the second inorganic encapsulating layer measured in a unit area of ​​the flat portion.

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