Display panel, display driving method and display device

Abstract

The present application belongs to the field of display driving technology, and specifically relates to a display panel, a display driving method and a display device, wherein the display panel includes N rows of scan lines, M columns of data lines, and N rows×2M columns of pixel circuits; each pixel circuit includes a pixel unit and a control unit, the first control end of the n-th row control unit is connected to the n-th row scan line, the second control end of the 2m-1-th column control unit, the input end of the 2m-1-th column control unit, the second control end of the 2m-th column control unit and the input end of the 2m-th column control unit are all connected to the m-th column data line; when the n-th row scan line is turned on, the data signal on the m-th column data line controls any one of the n-th row 2m-1 column control unit and the n-th row 2m column control unit to be turned on or turned on alternately in time-sharing manner; the present application reduces the number of data lines by half under display conditions of the same resolution, which not only reduces the power consumption and cost of the panel, but also improves the refresh rate and aperture ratio.

Description

Technical Field

[0001] The present disclosure belongs to the field of display driving technology, and particularly relates to a display panel, a display driving method, and a display device. Background Art

[0002] Current display panels are equipped with pixel units arranged in a matrix, and each pixel unit requires a data line for providing data signals and a scan line for controlling the pixel unit to turn on and off. With the continuous updating and iteration of display technology, high-resolution panels have gradually become mainstream products in the market. High resolution means that more data lines and scan lines are required, which causes the RC loading (resistance-capacitance load, abbreviated as RC loading) of the display panel to continue to increase, resulting in high power consumption of the display panel.

[0003] It can be seen that how to reduce the power consumption of display panels is an urgent problem to be solved. Summary of the Invention

[0004] The present application provides a display panel, a display driving method and a display device, which solve the problem of high power consumption of the display panel. The present application reduces the number of data lines by half under display conditions of the same resolution, which not only reduces the power consumption and cost of the panel, but also improves the refresh rate and aperture ratio.

[0005] In a first aspect, the present application provides a display panel, which includes: N rows of scan lines, M columns of data lines, and N rows×2M columns of pixel circuits; each pixel circuit includes a pixel unit and a control unit, and the control unit is used to charge the pixel unit through the data signal on the data line when it is in a conductive state; the control unit includes a first control end, a second control end, an input end, and an output end; the first control end of the n-th row control unit is connected to the n-th row scan line, and the second control end of the 2m-1 column control unit, the input end of the 2m-1 column control unit, the second control end of the 2m column control unit, and the input end of the 2m column control unit are all connected to the m-th column data line; the output end of each control unit is connected to the input end of the corresponding pixel unit; when the n-th row scan line is turned on, the data signal on the m-th column data line controls any one of the n-th row 2m-1 column control unit and the n-th row 2m column control unit to be turned on or turned on alternately in time-sharing manner; wherein n=[1,…,N], m=[1,…,M], and N and M are both positive integers greater than 1.

[0006] Optionally, the control unit includes: a first switch tube, wherein the control end of the first switch tube is connected to the data line, and the first end of the first switch tube is connected to the scan line; a second switch tube, wherein the control end of the second switch tube is connected to the second end of the first switch tube, the first end of the second switch tube is connected to the data line, and the second end of the second switch tube is connected to the pixel unit; wherein the turn-on voltage of the first switch tube of the control unit in the nth row and the 2m-1th column is opposite to that of the first switch tube of the control unit in the nth row and the 2mth column.

[0007] Optionally, the odd-numbered scan lines of the current frame are in an on-state, and during the on-time period of the odd-numbered scan lines of the current frame, each column of data lines alternately outputs a corresponding first data signal and a second data signal; or, the even-numbered scan lines of the current frame are in an on-state, and during the on-time period of the even-numbered scan lines of the current frame, each column of data lines alternately outputs a corresponding first data signal and a second data signal; wherein the polarities of the first data signal and the second data signal are opposite.

[0008] Optionally, during a time period in which the nth row of scan lines is on in a current frame, each column of data lines alternately outputs a corresponding first data signal and a second data signal, wherein the polarities of the first data signal and the second data signal are opposite;

[0009] Optionally, during a time period in which the n-th row of scan lines is turned on in the current frame, each column of data lines outputs a corresponding first data signal.

[0010] Optionally, the mth column data line outputs a first data signal during the nth row scan line on time period of the current frame, and the mth column data line outputs a second data signal during the n+1th row scan line on time period; wherein the polarities of the first data signal and the second data signal are opposite.

[0011] Optionally, the pixel unit in the 3i+1th column is a first color sub-pixel, the pixel unit in the 3i+2th column is a second color sub-pixel, and the pixel unit in the 3i+3th column is a third color sub-pixel; wherein, i=[0,1,2,…,I], when 2M is a multiple of 3 otherwise express The result of is rounded down;

[0012] Optionally, the pixel units in the 3j+1th row are first color sub-pixels, the pixel units in the 3j+2th row are second color sub-pixels, and the pixel units in the 3j+3th row are third color sub-pixels; wherein j = [0, 1, 2, ..., J], when 2N is a multiple of 3 otherwise express The result is rounded down.

[0013] Optionally, the pixel unit includes a liquid crystal capacitor, and a pixel electrode of the liquid crystal capacitor is connected to an output end of the control unit;

[0014] Optionally, the pixel unit includes: a storage capacitor, a driving transistor and a light-emitting diode, the first end of the storage capacitor is connected to the output end of the control unit, the second end of the storage capacitor is connected to the power supply end, the control end of the driving transistor is connected to the first end of the storage capacitor, the first end of the driving transistor is connected to the second end of the storage capacitor, the anode of the light-emitting diode is connected to the second end of the driving transistor, and the cathode of the light-emitting diode is grounded.

[0015] In a second aspect, the present application provides a display driving method, which includes: obtaining a first target conduction polarity corresponding to the first control end of each control unit in the display panel and a second target conduction polarity corresponding to the second control end of each control unit; generating a corresponding scan signal on each row of scan lines and a corresponding data signal on each column of data lines based on all first target conduction polarities, all second target conduction polarities and the display picture of the current frame, so that when the scan line of the nth row is turned on, the data signal on the data line of the mth column controls any one of the 2m-1 column control unit of the nth row and the 2m column control unit of the nth row to be turned on or turned on alternately in time-sharing manner.

[0016] In a third aspect, the present application provides a display device, comprising: a gate drive circuit for outputting a scan signal; a source drive circuit for outputting a data signal; and a display panel, wherein the scan line of the display panel is connected to the gate drive circuit, and the data line of the display panel is connected to the source drive circuit.

[0017] The technical solution provided by this application has at least the following beneficial effects:

[0018] 1. In the present application, two adjacent rows of pixel circuits share a scan line and two adjacent columns of pixel circuits share a data line, and the data lines and scan lines are used to jointly control the pixel circuits connected to the same scan line and the same data line from being turned on at the same time. Under display conditions of the same resolution, the number of scan lines and the number of data lines are reduced by at least half, so that the RC loading on the scan lines and data lines in the panel is also reduced, thereby greatly reducing the power consumption of the display panel.

[0019] 2. This application reduces the number of scan lines and data lines by half, thereby not only reducing the production cost of the display panel, but also increasing the refresh rate and aperture ratio of the panel, thereby improving the market competitiveness of the product.

[0020] 3. Since the RC loading value of the display panel is proportional to the noise value, this application can reduce the panel noise and improve display accuracy while reducing the panel RC loading. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The accompanying drawings are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification, are used to explain the principles of the present disclosure. Obviously, the drawings described below are only some embodiments of the present disclosure, and those skilled in the art can derive other drawings based on these drawings without inventive effort.

[0022] Figure 1 Shown is a structural schematic diagram of a display panel provided in an embodiment of the present application.

[0023] Figure 2 Shown is a circuit diagram of a first pixel circuit provided in an embodiment of the present application.

[0024] Figure 3 Shown is a circuit diagram of a second pixel circuit provided in an embodiment of the present application.

[0025] Figure 4 The figure is a flow chart of a display driving method provided in an embodiment of the present application.

[0026] Figure 5 Shown is a first display screen and waveform diagram provided in an embodiment of the present application.

[0027] Figure 6 Shown is a second display screen and waveform diagram provided in an embodiment of the present application.

[0028] Figure 7 Shown is a third display screen and waveform diagram provided in an embodiment of the present application.

[0029] Figure 8 Shown is a fourth display screen and waveform diagram provided in an embodiment of the present application.

[0030] Figure 9 FIG2 is a schematic diagram of a pixel structure of a display panel provided in an embodiment of the present application.

[0031] Description of reference numerals:

[0032] 100, display panel; 110, scan line; 120, data line; 130, pixel circuit; 131, control unit; 132, pixel unit;

[0033] T0, driving transistor; T1, first switching tube; T2, second switching tube; T3, third switching tube; Cc, storage capacitor; Cs, pixel capacitor; Ct, energy storage capacitor; OLED, light-emitting diode. DETAILED DESCRIPTION

[0034] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this application will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art.

[0035] In addition, described feature, structure or characteristic can be combined in one or more embodiments in any suitable manner.In the following description, many specific details are provided so as to provide a full understanding of the embodiments of the present application. However, it will be appreciated by those skilled in the art that the technical scheme of the present application can be put into practice without one or more of the specific details, or other methods, components, devices, steps etc. can be adopted. In other cases, known methods, devices, implementations or operations are not shown or described in detail to avoid blurring the various aspects of the application.

[0036] The present application is further described below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the technical features involved in the various embodiments of the present application described below can be combined with each other as long as they do not conflict with each other. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be understood as limiting the present application.

[0037] Figure 1 FIG. 1 is a schematic diagram of the structure of a display panel provided in an embodiment of the present application; FIG. Figure 1 As shown, the display panel 100 includes: N rows of scan lines 110, M columns of data lines 120, and pixel circuits 130 arranged in an array; wherein the number of columns of the pixel circuits 130 is 2M columns, and the number of rows is N rows; that is, the number of columns of the pixel circuits 130 in the display panel 100 is twice the number of data lines 120. Figure 1 The scan lines 110 and data lines 120 in FIG. 1 cross but are not connected. Figure 1 In the figure, G1, G2, G3, G4 and GN represent the first scan line, the second scan line, the third scan line, the fourth scan line and the N-th scan line, respectively; S1 and SM represent the first data line and the M-th data line, respectively.

[0038] In one embodiment, each pixel circuit 130 includes a pixel unit 132 and a control unit 131. The control unit 131 is used to input the data signal on the data line 120 into the pixel unit 132 when it is in a conductive state, thereby charging the pixel unit 132 through the data signal on the data line 120; on the contrary, when the control unit 131 is in an off state (i.e., a non-conductive state), the data signal on the data line 120 cannot be input into the pixel unit 132, thereby not charging the pixel unit 132; it should be noted that the display panel 100 can be a liquid crystal display (LCD) or an OLED (Organic Light-Emitting Diode) display; when the display panel 100 is a liquid crystal display, the pixel unit 132 includes liquid crystal molecules; when the display panel 100 is an OLED display, the pixel unit 132 includes a light-emitting diode.

[0039] like Figure 1 As shown, the control unit 131 includes a first control terminal K1, a second control terminal K2, an input terminal Vi and an output terminal Vo; the first control terminal K1 of the n-th row control unit 131 is connected to the n-th row scan line 110, the second control terminal K2 of the 2m-1-th column control unit 131, the input terminal Vi of the 2m-1-th column control unit 131, the second control terminal K2 of the 2m-th column control unit 131 and the input terminal Vi of the 2m-th column control unit 131 are all connected to the m-th column data line; the output terminal Vo of each control unit 131 is connected to the input terminal of the corresponding pixel unit 132.

[0040] It should be noted that n and m in this embodiment are variables, N and M are constants, the value range of variable n is 1 to N, the value range of variable m is 1 to M, and N and M are both positive integers greater than 1; in addition, the control units 131 of two adjacent columns in this embodiment are connected to the corresponding same data line 120, the adjacent two columns refer to the 2m-1 column and the 2m column, and the corresponding same data line 120 refers to the data line 120 of the mth column.

[0041] For example: when n=1, the first control end K1 of the first row control unit 131 is connected to the first row scan line 110; when n=2, the first control end K1 of the second row control unit 131 is connected to the second row scan line 110; and so on, when n=N, the first control end K1 of the Nth row control unit 131 is connected to the Nth row scan line 110.

[0042] When m=1, the second control terminals K2 of all control units 131 in the first column and the second control terminals K2 of all control units in the second column are connected to the first column data line 120, and the input terminals Vi of all control units 131 in the first column and the input terminals Vi of all control units 131 in the second column are also connected to the first column data line 120; when m=2, the second control terminals K2 of all control units 131 in the third column and the second control terminals K2 of all control units in the fourth column are connected to the second column data line 120, and The input terminal Vi of all control units 131 in the 3rd column and the input terminal Vi of all control units 131 in the 4th column are also connected to the data line 120 of the 2nd column; when m=M, the second control terminal K2 of all control units 131 in the 2M-1th column and the second control terminal K2 of all control units in the 2Mth column are both connected to the data line 120 of the Mth column, and the input terminal Vi of all control units 131 in the 2M-1th column and the input terminal Vi of all control units 131 in the 2Mth column are also connected to the data line 120 of the Mth column.

[0043] In the pixel circuit of the same row, the on-off states of the 2m-1 column control unit 131 and the 2m column control unit 131 are opposite at the same time, so that: when the scan line of the n-th row is turned on, the data signal on the data line 120 of the m-th column controls either the 2m-1 column control unit 131 or the 2m column control unit 131 of the n-th row to be turned on or turned on alternately in time-sharing manner.

[0044] It should be noted that, in this embodiment, the on / off state of the control unit 131 is controlled by both the scan line 110 and the data line 120 via the first control terminal K1 and the second control terminal K2, and two adjacent columns of control units in the same row of pixel circuits are controlled by the same column of data lines; therefore, in this embodiment, the data signal on the m-th column of data line 120 can control the 2m-1 column of control units 131 to be in the on state during the on-time period of the n-th row of scan line 110, and the data signal on the m-th column of data line 120 can control the 2m-1 column of control units 131 to be in the on state during the on-time period of the n-th row of scan line 110. When in the on state, the data signal on the m-th column data line 120 can also control the 2m-1-th column control unit 131 and the 2m-th column control unit 131 to be alternately turned on in a time-sharing manner during the on time period of the n-th row scan line 110; wherein the time-sharing alternating conduction includes the 2m-1-th column control unit 131 being turned on for a first time length first, and the 2m-th column control unit 131 being turned on for a second time length; or the 2m-th column control unit 131 being turned on for a first time length first, and the 2m-1-th column control unit 131 being turned on for a second time length; the sum of the first time length and the second time length is less than or equal to the on time length of the n-th row scan line 110.

[0045] In summary, the display panel provided in this embodiment has at least the following beneficial effects:

[0046] 1. In this application, two adjacent columns of pixel circuits share the same data line, and the two adjacent pixel circuits are not turned on at the same time under the joint control of the data line and the scan line. Under the display conditions of the same resolution, the number of data lines is reduced by half, so that the RC loading on the data line in the panel is also reduced, thereby greatly reducing the power consumption of the display panel.

[0047] 2. This application reduces the number of data lines by half, which not only reduces the production cost of the display panel, but also increases the refresh rate and aperture rate of the panel, thereby improving the market competitiveness of the product.

[0048] 3. Since the RC loading value of the display panel is proportional to the noise value, this application can reduce the panel noise and improve display accuracy while reducing the panel RC loading.

[0049] Figure 2 FIG. 1 is a circuit diagram of a first pixel circuit provided in an embodiment of the present application; FIG. Figure 2 As shown, the control unit 131 includes: a first switch tube T1 and a second switch tube T2; the control end of the first switch tube T1 is connected to the data line 120, and the first end of the first switch tube T1 is connected to the scan line 110; the control end of the second switch tube T2 is connected to the second end of the first switch tube T1, the first end of the second switch tube T2 is connected to the data line 120, and the second end of the second switch tube T2 is connected to the pixel unit 132; wherein, the turn-on voltage of the first switch tube T1 of the control unit in the nth row and 2m-1th column is opposite to that of the first switch tube T1 of the control unit in the nth row and 2mth column.

[0050] It should be noted that the turn-on voltages of the first switch tube T1 of the control unit in the nth row and the 2m-1th column and the first switch tube T1 of the control unit in the nth row and the 2mth column are opposite, which means that the types of the first switch tubes T1 between the two control units 131 in the same row and connected to the same data line are different, that is, the first switch tube T1 of one control unit 131 is a P-type MOS tube, and the first switch tube T1 of the other control unit 131 is an N-type MOS tube; for example: the first switch tube of the control unit in the 1st row and the 1st column is an NMOS tube, and the first switch tube of the control unit in the 1st row and the 2nd column is a PMOS tube; when the first switch tube of the control unit in the 2nd row and the 1st column is an NMOS tube, the first switch tube of the control unit in the 2nd row and the 2nd column is a PMOS tube, so that the data signal at the same time can control one of the two control units 131 to be in the on state, thereby preventing the problem of two pixel units being charged at the same time.

[0051] The specific working principle of the control unit 131 in this embodiment is as follows: taking the first switch tube T1 as a P-type MOS tube and the second switch tube T2 as an N-type MOS tube as an example, when the data signal output by the data line 120 of the mth column is low and the output of the scan line 110 of the nth row is high, the first switch tube T1 is turned on, and the high level on the scan line 110 of the nth row turns on the second switch tube T2, so that the data signal output by the data line 120 of the mth column charges the pixel unit 132; on the contrary, when the data signal output by the data line 120 of the mth column is high, the first switch tube T1 is turned off, regardless of the output of the scan line 110 of the nth row Whether the output is high or low, the second switch tube T2 cannot be turned on, and thus the pixel unit 132 cannot be charged. In addition, when the data line 120 of the mth column outputs a low level, the first switch tube T1 is turned on, but the scan line 110 of the nth row outputs a low level and still cannot turn on the second switch tube T2. Therefore, it can be seen that the switching states of the first switch tube T1 and the second switch tube T2 affect the on-off state of the control unit 131, that is, when both the first switch tube T1 and the second switch tube T2 are turned on, the control unit 131 is in the on state; when at least one of the first switch tube T1 and the second switch tube T2 is turned off, the control unit 131 is in the off state.

[0052] In this embodiment, by setting different types of first switching tubes between two control units connected to the same data line in the same row of pixel circuits, the data signal and scan signal at the same time can control one of the two adjacent control units to be in the on state, thereby avoiding the problem of pixel mischarging.

[0053] It is also worth noting that the switch tube formed by a-Si (amorphous silicon) can have a conduction (opening) voltage of about 0.2V. For the lowest grayscale display, the data voltage provided by the data line 120 is generally not 0V, but about 0.3V. Therefore, the first switch tube T1 can also be turned on for the lowest grayscale display. The scan line 110 provides a voltage of about 20V, causing the first switch tube T1 to enter the saturation region. The voltage of the scan line 110 is applied to the gate of the second switch tube T2 through the first switch tube T1, thereby controlling the second switch tube T2 to turn on.

[0054] Furthermore, the grayscale voltage above the lowest grayscale display is generally 0.5V, and any higher grayscale voltage is sufficient to activate the first switch T1. Furthermore, combined with the voltage provided by the scan line 110, the first switch T1 can operate in a saturation region. Therefore, when no data voltage is provided, the voltage on the data line 120 can remain at 0V.

[0055] In one embodiment of the present application, Figure 2As shown, the pixel unit 132 includes: a storage capacitor Cc, a driving transistor T0 and a light-emitting diode OLED, wherein the first end of the storage capacitor Cc is connected to the output end Vo of the control unit 131, and the second end of the storage capacitor Cc is connected to the power supply end VDD; the control end of the driving transistor T0 is connected to the first end of the storage capacitor Cc, and the first end of the driving transistor T0 is connected to the second end of the storage capacitor Cc; the anode of the light-emitting diode OLED is connected to the second end of the driving transistor T0, and the cathode of the light-emitting diode OLED is grounded VSS.

[0056] In this embodiment, when the control unit 131 is in the on state, the storage capacitor Cc is charged by the data signal on the data line 120, and under the action of the driving voltage output by the power supply end, the driving transistor T0 outputs a corresponding driving current to drive the light emitting diode OLED to emit light.

[0057] Figure 3 FIG. 1 is a circuit diagram of a second pixel circuit provided in an embodiment of the present application. Figure 4 As shown, the pixel unit 132 includes a liquid crystal capacitor Cs, and the pixel electrode of the liquid crystal capacitor Cs is connected to the output terminal Vo of the control unit 131; wherein, the liquid crystal capacitor Cs is generally formed by a pixel electrode, a common electrode, and liquid crystal molecules between the pixel electrode and the common electrode. Applying data signals of different sizes to the pixel electrode causes the liquid crystal molecules to rotate to different angles, thereby realizing brightness adjustment of the pixel unit 132.

[0058] In this embodiment, the pixel unit 132 further includes an energy storage capacitor Ct, and the pixel electrode of the energy storage capacitor Ct is connected to the output terminal Vo of the control unit 131 to maintain the charging voltage.

[0059] Figure 4 FIG. 1 is a flow chart of a display driving method provided by an embodiment of the present application; FIG. Figure 5 As shown, the display driving method applied to the display panel of the above embodiment specifically includes the following steps:

[0060] Step S100: Acquire a first target conduction polarity corresponding to a first control terminal of each control unit in the display panel and a second target conduction polarity corresponding to a second control terminal of each control unit.

[0061] In this embodiment, the first target conduction polarity represents the voltage polarity that turns on the second switch, and the second target conduction polarity represents the voltage polarity that turns on the first switch. If the second switch is a PMOS transistor, the corresponding first target conduction polarity is negative; if the first switch is an NMOS transistor, the corresponding second target conduction polarity is positive. The first target conduction polarity corresponding to the first control terminal and the second target conduction polarity corresponding to the second control terminal can be obtained based on the transistor types of the first and second switches in each control unit.

[0062] Step S200: Generate a corresponding scan signal on each row of the scan line and a corresponding data signal on each column of the data line based on all first target conduction polarities, all second target conduction polarities, and the display image of the current frame, so that when the scan line on the nth row is turned on, the data signal on the data line on the mth column controls either the 2m-1th column control unit on the nth row or the 2mth column control unit on the nth row to be turned on or to be turned on alternately in time-sharing manner.

[0063] In this embodiment, the display image of the current frame may include multiple situations, such as all pixel units are fully lit, two adjacent rows of pixel units are half lit, two adjacent columns of pixel units are half lit, and four adjacent pixels are half lit alternately. In this embodiment, N=2 and M=3 are used as an example to illustrate multiple display images:

[0064] (1) Case 1: When all pixel units are fully lit in the current frame display: During the period when the nth row scan line is on in the current frame, each column of data line alternately outputs the corresponding first data signal and second data signal, wherein the polarities of the first data signal and the second data signal are opposite, and the waveforms output by G1 and S1 are as follows: Figure 5 As shown in 5a in the figure, the fully lit display screen is as follows Figure 5 As shown in 5b in FIG, wherein the waveforms of G2 and G1 are the same, and the waveforms of S2 and S3 are similar to S1, which will not be described here.

[0065] (2) Case 2: When the display image of the current frame shows that half of the pixel units in two adjacent rows are bright:

[0066] The odd-numbered scan lines of the current frame are in an on-state, and during the on-time period of the odd-numbered scan lines of the current frame, each column of data lines alternately outputs the corresponding first data signal and the second data signal; or, the even-numbered scan lines of the current frame are in an on-state, and during the on-time period of the even-numbered scan lines of the current frame, each column of data lines alternately outputs the corresponding first data signal and the second data signal; this is equivalent to charging only the odd-numbered row pixel units in the current frame and charging only the even-numbered row pixel units in the next frame; wherein, the scan line being in an on-state means that the scan line outputs the first scan signal, and the first scan signal can be a high level or a low level, and the polarity of the first scan signal is determined according to the conduction polarity of the second switch tube; the output waveforms of G1, S1 and G2 are as follows Figure 6 As shown in 6a, the display image of two adjacent rows of pixel units with half of them lit is as follows Figure 6 As shown in Figure 6b; in addition, in the display of the next frame, the two adjacent rows of pixel units are symmetrically lit; in this case, by outputting different scanning signals in the current frame and the next frame through the scanning line, it is possible to charge only the odd-numbered rows of pixel units in the current frame and only the even-numbered rows of pixel units in the next frame. On the basis of the full-bright display of the picture in case 1, the power consumption can be further reduced by half or the refresh rate can be doubled; in addition, the interlaced display of two adjacent frames can also prevent screen crosstalk.

[0067] (3) Case 3: When the display image of the current frame is half-lit for two adjacent columns of pixel units: during the period when the nth row of scan lines is on in the current frame, each column of data line outputs a corresponding first data signal; wherein the first data signal can be a high level or a low level, and the polarity of the first data signal is determined according to the conduction polarity of the first switch tube; the waveforms output by G1 and S1 are as follows: Figure 7 As shown in 7a, the display image of two adjacent columns of pixel units with half of them lit is as follows Figure 7 As shown in 7b; in addition, in the display of the next frame, the two adjacent columns of pixel units light up the other half symmetrically; in this case, the power consumption can be reduced by half, all data lines can be charged at the same time to save scanning time, and the interlaced display of the upper and lower frames can prevent screen crosstalk.

[0068] (4) Case 4: When the display image of the current frame is a case where four adjacent pixels are half-illuminated: the data line of the mth column outputs the first data signal during the period when the nth row scan line is turned on, and the data line of the mth column outputs the second data signal during the period when the n+1th row scan line is turned on; wherein the polarities of the first data signal and the second data signal are opposite. The waveforms output by G1, S1 and G2 are as follows: Figure 8 As shown in 8a in FIG, the display image of the four adjacent pixel units of the current frame is half lit. Figure 8As shown in 8b; in addition, in the display of the next frame, the adjacent four pixel units cross-light the other half symmetrically; in this case, the power consumption can be reduced by half, all data lines can be charged at the same time to save scanning time, and the interlaced display of the upper and lower frames can prevent screen crosstalk.

[0069] In one embodiment of the present application, the pixel unit in the 3i+1th column is a first color sub-pixel, the pixel unit in the 3i+2th column is a second color sub-pixel, and the pixel unit in the 3i+3th column is a third color sub-pixel; wherein i = [0, 1, 2, ..., I], when 2M is a multiple of 3 otherwise express The result is rounded down.

[0070] It should be noted that when i=0, the pixel units in the first column are first color sub-pixels, the pixel units in the second column are second color sub-pixels, and the pixel units in the third column are third color sub-pixels, and so on. The first color sub-pixels, the second color sub-pixels, and the third color sub-pixels are arranged in columns; the first color sub-pixels, the second color sub-pixels, and the third color sub-pixels can be red sub-pixels, green sub-pixels, and blue sub-pixels, respectively; Figure 5-8 As shown, the first color sub-pixel, the second color sub-pixel and the third color sub-pixel may also be a blue sub-pixel, a green sub-pixel and a red sub-pixel respectively; in addition, The result of rounding down means taking the integer part of 2M divided by 3. For example, when M=7, then

[0071] In one embodiment of the present application, the pixel units in the 3j+1th row are first color sub-pixels, the pixel units in the 3j+2th row are second color sub-pixels, and the pixel units in the 3j+3th row are third color sub-pixels; wherein j = [0, 1, 2, ..., J], when N is a multiple of 3 otherwise express The result is rounded down; it should be noted that when j=0, the pixel units in the first row are all first color sub-pixels, the pixel units in the second row are all second color sub-pixels, the pixel units in the third row are all third color sub-pixels, and so on, the first color sub-pixels, the second color sub-pixels and the third color sub-pixels are arranged in rows; the first color sub-pixels, the second color sub-pixels and the third color sub-pixels can be red sub-pixels, green sub-pixels and blue sub-pixels respectively; in addition, The result of rounding down means taking the integer part of N divided by 3. For example, when N=7, then

[0072] For example: In this embodiment, N=6, M=2 is used as an example. Each row of pixel units represents red sub-pixels, green sub-pixels and blue sub-pixels in sequence. The pixel structure of the display panel is as follows: Figure 9 shown.

[0073] By sharing a common data line between two adjacent columns of pixel circuits, this application reduces the number of data lines by half, significantly reducing RC loading within the display panel and addressing the issue of high power consumption. Furthermore, by combining a drive method that illuminates half the pixels in one frame and the other half in the next, this further reduces power consumption and improves the refresh rate of the display panel. The panel driving method provided in this embodiment can be applied to both liquid crystal displays and organic light-emitting diode (OLED) displays, enhancing the market competitiveness of these products.

[0074] In one embodiment, the present application provides a display device, which includes: a gate driving circuit, a gate driving circuit and a display panel shown in the above embodiment; the gate driving circuit is used to output a scanning signal; the source driving circuit is used to output a data signal; the scanning line of the display panel is connected to the gate driving circuit, and the data line of the display panel is connected to the source driving circuit.

[0075] Furthermore, the terms "first," "second," "third," etc., are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Thus, a feature specified as "first," "second," or "third" may explicitly or implicitly include one or more of the features. In the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0076] In the description of this specification, the reference terms "some embodiments", "exemplarily", etc. mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification and features of different embodiments or examples without contradiction.

[0077] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application. Therefore, any changes or modifications made in accordance with the claims and description of the present application should fall within the scope of the patent application.

Claims

1. A display panel, characterized in that: The display panel includes: N rows of scan lines, M columns of data lines, and N rows×2M columns of pixel circuits; each pixel circuit includes a pixel unit and a control unit, the control unit being configured to charge the pixel unit via a data signal on the data line when in an on state; The control unit includes a first control terminal, a second control terminal, an input terminal, and an output terminal; the first control terminal of the n-th row control unit is connected to the n-th row scan line, the second control terminal of the 2m-1-th column control unit, the input terminal of the 2m-1-th column control unit, the second control terminal of the 2m-th column control unit, and the input terminal of the 2m-th column control unit are all connected to the m-th column data line; the output terminal of each control unit is connected to the input terminal of the corresponding pixel unit; When the scan line in the nth row is turned on, the data signal on the data line in the mth column controls either the control unit in the nth row and the 2m-1th column or the control unit in the nth row and the 2mth column to be turned on or turned on alternately in a time-sharing manner; wherein n=[1, ..., N], m=[1, ..., M], and N and M are both positive integers greater than 1; Wherein, the control unit includes: a first switch tube, wherein a control end of the first switch tube is connected to the data line, and a first end of the first switch tube is connected to the scan line; a second switch tube, wherein a control end of the second switch tube is connected to the second end of the first switch tube, a first end of the second switch tube is connected to the data line, and a second end of the second switch tube is connected to the pixel unit; The turn-on voltage of the first switch tube of the control unit in the nth row and the 2m-1th column is opposite to that of the first switch tube of the control unit in the nth row and the 2mth column.

2. The display panel according to claim 1, wherein: The odd-numbered scan lines of the current frame are in an on-state, and during the on-time period of the odd-numbered scan lines of the current frame, each column of data lines alternately outputs a corresponding first data signal and a second data signal; or, the even-numbered scan lines of the current frame are in an on-state, and during the on-time period of the even-numbered scan lines of the current frame, each column of data lines alternately outputs a corresponding first data signal and a second data signal; wherein the polarities of the first data signal and the second data signal are opposite.

3. The display panel according to claim 1, wherein: During the on-time period of the nth row of scan lines in the current frame, each column of data lines alternately outputs a corresponding first data signal and a second data signal, wherein the polarities of the first data signal and the second data signal are opposite.

4. The display panel according to claim 1, wherein: During the on-time period of the n-th row of scan lines in the current frame, each column of data lines outputs a corresponding first data signal.

5. The display panel according to claim 1, wherein: The mth column data line outputs a first data signal during the nth row scan line on time period of the current frame, and the mth column data line outputs a second data signal during the n+1th row scan line on time period; wherein the polarities of the first data signal and the second data signal are opposite.

6. The display panel according to claim 1, wherein: The pixel unit in the 3i+1th column is a first color sub-pixel, the pixel unit in the 3i+2th column is a second color sub-pixel, and the pixel unit in the 3i+3rd column is a third color sub-pixel; wherein, , when 2M is a multiple of 3, I= -1, otherwise I= express The result of is rounded down; Or, the pixel units in the 3j+1th row are first color sub-pixels, the pixel units in the 3j+2th row are second color sub-pixels, and the pixel units in the 3j+3th row are third color sub-pixels; wherein, , when 2N is a multiple of 3 = -1, otherwise = , express The result is rounded down.

7. The display panel according to any one of claims 1 to 6, characterized in that: The pixel unit includes a liquid crystal capacitor, and a pixel electrode of the liquid crystal capacitor is connected to the output end of the control unit; Alternatively, the pixel unit includes: a storage capacitor, a driving transistor and a light-emitting diode, the first end of the storage capacitor is connected to the output end of the control unit, the second end of the storage capacitor is connected to the power supply end, the control end of the driving transistor is connected to the first end of the storage capacitor, the first end of the driving transistor is connected to the second end of the storage capacitor, the anode of the light-emitting diode is connected to the second end of the driving transistor, and the cathode of the light-emitting diode is grounded.

8. A display driving method, characterized in that: Applied to the display panel according to any one of claims 1 to 7, the display driving method comprises: Acquire a first target conduction polarity corresponding to a first control terminal of each control unit in the display panel and a second target conduction polarity corresponding to a second control terminal of each control unit; According to all the first target conduction polarities, all the second target conduction polarities and the display picture of the current frame, the corresponding scan signal on each row of the scan line and the corresponding data signal on each column of the data line are generated, so that when the scan line of the nth row is turned on, the data signal on the data line of the mth column controls either the 2m-1th column control unit of the nth row or the 2mth column control unit of the nth row to be turned on or to be turned on alternately in time-sharing manner.

9. A display device, characterized in that: The display device comprises: A gate driving circuit for outputting a scanning signal; A source driving circuit, configured to output a data signal; The display panel according to any one of claims 1 to 7, wherein the scan lines of the display panel are connected to the gate drive circuit, and the data lines of the display panel are connected to the source drive circuit.

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