An analog front-end circuit and a transceiver

Abstract

The present application discloses an analog front-end circuit and a transceiver, which are applied to the field of signal processing technology to solve the problems of high power consumption of the analog front-end circuit and reduction of the linearity of the receiving circuit in the prior art. Specifically, a signal sending module performs digital-to-analog conversion and amplitude adjustment on an original sending signal output by a sending circuit to obtain a target sending signal in the form of a voltage, and outputs the target sending signal to an external device through a transceiver port. After a signal copying module copies the target sending signal according to a preset ratio to obtain a synchronous voltage signal, a voltage-current conversion is performed on the synchronous voltage signal to obtain a synchronous current signal, and the target sending signal in the mixed signal is cancelled based on the synchronous current signal to obtain a target receiving signal. In this way, the transmission of the target sending signal is carried out in the form of a voltage, reducing the consumed power; before the signal enters the receiving circuit, the target receiving signal is separated from the mixed signal, improving the linearity of the receiving circuit.

Description

Technical Field

[0001] The present application relates to the technical field of signal processing, and in particular, to an analog front-end circuit and a transceiver. Background Art

[0002] An SBD (Simultaneous Bidirectional) transceiver, that is, a simultaneous bidirectional transceiver, is a device that can simultaneously transmit and receive data on the same communication line. Different types of full-duplex interfaces can be set in the SBD transceiver, such as A-PHY (Automotive PHY), a high-speed, long-distance asymmetric serial interface for automotive applications. The full-duplex serial port feature of the A-PHY where the upstream and downstream signals share the same line requires the analog front-end circuit in the A-PHY transceiver to effectively separate the target transmit signal and the target receive signal in the mixed signal.

[0003] Currently, the methods for separating the target transmit signal and the target receive signal by the analog front-end circuit are divided into the following two types. The first signal separation method is to generate a current signal opposite to the target transmit signal in current form, and the opposite current signal and the mixed signal act on the same impedance. The target transmit signal in the mixed signal is cancelled out to obtain the target receive signal, further realizing signal separation. However, in this method, generating and transmitting the current signal often requires a large amount of power consumption. The second signal separation method is to generate a voltage signal opposite to the target transmit signal in voltage form, and the opposite voltage signal and the mixed signal act on the input end of the receiving circuit respectively. The target transmit signal in the mixed signal is cancelled out to obtain the target receive signal, further realizing signal separation. However, in this method, the mixed signal and the opposite voltage signal act on the input end of the receiving circuit respectively, resulting in a large signal amplitude at the input end of the receiving circuit and poor linearity of the receiving circuit. Summary of the Invention

[0004] The present application provides an analog front-end circuit and a transceiver to solve the problems in the prior art that the analog front-end circuit has high power consumption and reduces the linearity of the receiving circuit.

[0005] The technical solution provided by the present application is as follows:

[0006] On the one hand, the present application provides an analog front-end circuit, including: a signal transmission module, a signal replication module, a signal conversion module, and a signal cancellation module;

[0007] The input end of the signal transmission module and the input end of the signal replication module are respectively connected to the transmission circuit of the transceiver, and the output end of the signal transmission module and the first input end of the signal cancellation module are connected to the transceiver port of the transceiver; the output end of the signal replication module is connected to the input end of the signal conversion module, the output end of the signal conversion module is connected to the second input end of the signal cancellation module, and the output end of the signal cancellation module is connected to the receiving circuit of the transceiver;

[0008] The signal transmission module is used to perform digital-to-analog conversion and amplitude adjustment on the original transmission signal output by the transmission circuit to obtain a target transmission signal in the form of voltage; output the target transmission signal to an external device through the transceiver port;

[0009] The signal replication module is used to replicate the target transmission signal according to a preset ratio to obtain a synchronous voltage signal;

[0010] The signal conversion module is used to perform voltage-current conversion on the synchronous voltage signal to obtain a synchronous current signal;

[0011] The signal cancellation module is used to collect the mixed signal at the transceiver port, where the mixed signal includes the target transmission signal and the target reception signal; receive the synchronous current signal, and cancel the target transmission signal in the mixed signal based on the synchronous current signal to obtain the target reception signal.

[0012] Optionally, the signal transmission module includes: a main drive module, a first resistor, and a second resistor;

[0013] The first input end of the main drive module is connected to the positive output end of the transmission circuit, and the second input end of the main drive module is connected to the negative output end of the transmission circuit; the first output end of the main drive module is connected to the first end of the transceiver port through the first resistor; the second output end of the main drive module is connected to the second end of the transceiver port through the second resistor.

[0014] Optionally, the signal replication module includes: a sub-drive module, a third resistor, a fourth resistor, and a fifth resistor;

[0015] The first input end of the sub-drive module is connected to the positive output end of the transmission circuit, and the second input end of the sub-drive module is connected to the negative output end of the transmission circuit; the first output end of the sub-drive module is connected to the first end of the fifth resistor and the first input end of the signal conversion module through the third resistor; the second output end of the sub-drive module is connected to the second end of the fifth resistor and the second input end of the signal conversion module through the fourth resistor.

[0016] Optionally, the fifth resistor is an adjustable resistor.

[0017] Optionally, the signal conversion module includes: a voltage extraction module, an impedance matching module, and a current output module;

[0018] The voltage extraction module, impedance matching module, and current output module are connected in sequence. The input end of the voltage extraction module is connected to the output end of the signal replication module, and the output end of the current output module is connected to the second input end of the signal cancellation module;

[0019] The voltage extraction module is used to track and collect the synchronous voltage signal to obtain the target voltage signal;

[0020] The impedance matching module is used to perform impedance matching with the signal cancellation module and convert the target voltage signal into a synchronous current signal;

[0021] The current output module is used to output the synchronous current signal.

[0022] Optionally, the module includes a first impedance module and a second impedance module; the current output module includes a first field-effect transistor, a second field-effect transistor, a third field-effect transistor, a fourth field-effect transistor, and a first power supply;

[0023] The positive input end of the first operational amplifier is connected to the first output end of the signal replication module, and the negative input end and the output end of the first operational amplifier are both connected to the ground through the first impedance module; the source electrodes of the first field-effect transistor and the second field-effect transistor are respectively connected to the first power supply, and the gate electrode of the first field-effect transistor is respectively connected to the source electrode of the second field-effect transistor and the output end of the first operational amplifier; the drain electrode of the first field-effect transistor is connected to the output end of the first operational amplifier; the drain electrode of the second field-effect transistor is connected to the second input end of the signal cancellation module;

[0024] The positive input end of the second operational amplifier is connected to the second output end of the signal replication module, and the negative input end and the output end of the second operational amplifier are both connected to the ground through the second impedance module; the source electrodes of the third field-effect transistor and the fourth field-effect transistor are respectively connected to the first power supply, and the gate electrode of the third field-effect transistor is respectively connected to the source electrode of the fourth field-effect transistor and the output end of the second operational amplifier; the drain electrode of the third field-effect transistor is connected to the output end of the second operational amplifier; the drain electrode of the fourth field-effect transistor is connected to the second input end of the signal cancellation module.

[0025] Optionally, the signal cancellation module includes: a first current source, a second current source, a third impedance module, a fourth impedance module, and a second power supply;

[0026] The input ends of the first current source and the second current source are respectively connected to the second power supply, and the output end of the first current source is respectively connected to the first end of the third impedance module and the first output end of the signal conversion module; the first end of the third impedance module is also connected to the first input end of the receiving circuit; the second end of the third impedance module is connected to the second end of the transceiver port;

[0027] The output terminal of the second current source is respectively connected to the first end of the fourth impedance module and the second output terminal of the signal conversion module; the first end of the fourth impedance module is also connected to the second input terminal of the receiving circuit; the second end of the fourth impedance module is connected to the first end of the transceiver port.

[0028] Optionally, the third impedance module includes at least one of a resistor, a capacitor, and an inductor; the fourth impedance module includes at least one of a resistor, a capacitor, and an inductor; the total impedance of the third impedance module is the same as the total impedance of the fourth impedance module.

[0029] Optionally, the signal cancellation module further includes: a fifth field effect transistor and a sixth field effect transistor;

[0030] The gate of the fifth field effect transistor is connected to the gate of the sixth field effect transistor. The source of the fifth field effect transistor is respectively connected to the output terminal of the first current source and the first output terminal of the signal conversion module. The drain of the fifth field effect transistor is respectively connected to the first end of the third impedance module and the receiving circuit;

[0031] The source of the sixth field effect transistor is respectively connected to the output terminal of the second current source and the second output terminal of the signal conversion module. The drain of the sixth field effect transistor is respectively connected to the first end of the fourth impedance module and the receiving circuit.

[0032] On the other hand, the present application provides a transceiver, including: a transceiver port, a transmitting circuit, a receiving circuit, and the above-mentioned analog front-end circuit;

[0033] The analog front-end circuit is respectively connected to the transceiver port, the transmitting circuit, and the receiving circuit.

[0034] The beneficial effects of the present application are as follows:

[0035] The present application performs digital-to-analog conversion and amplitude adjustment on the original transmission signal output by the transmitting circuit through the signal transmission module to obtain a target transmission signal in the form of a voltage, and outputs the target transmission signal to an external device through the transceiver port, that is, transmits the target transmission signal in the form of a voltage, reducing the power consumption of the transmission and sending of the target transmission signal; the present application also copies the target transmission signal according to a preset ratio through the signal replication module to obtain a synchronous voltage signal, then performs voltage-current conversion on the synchronous voltage signal through the signal conversion module to obtain a synchronous current signal, and the signal cancellation module cancels the target transmission signal in the mixed signal based on the synchronous current signal to obtain a target received signal. Before the signal enters the receiving circuit, the target received signal is separated from the mixed signal, avoiding processing a high-amplitude mixed signal at the input end of the receiving circuit and improving the linearity of the receiving circuit.

[0036] Other features and advantages of the present application will be described in the following specification. Moreover, some of them will be apparent from the specification or can be learned by implementing the present application. The objectives and other advantages of the present application can be realized and achieved by the structure specifically pointed out in the written specification, claims, and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The drawings described herein are used to provide a further understanding of the present application and form a part of the present application. The schematic embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation to the present application. In the drawings:

[0038] Figure 1 is a schematic diagram of the first circuit structure of the analog front-end circuit in an embodiment of the present application;

[0039] Figure 2 is a schematic diagram of the second circuit structure of the analog front-end circuit in an embodiment of the present application;

[0040] Figure 3 is a schematic diagram of the third circuit structure of the analog front-end circuit in an embodiment of the present application;

[0041] Figure 4 is a schematic diagram of the fourth circuit structure of the analog front-end circuit in an embodiment of the present application;

[0042] Figure 5 is a schematic diagram of the structure of the transceiver in an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0043] In order to make the objectives, technical solutions, and beneficial effects of the present application clearer and more understandable, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.

[0044] First, a brief introduction to the application scenario and design concept of the embodiments of the present application will be given.

[0045] At present, SBD (Simultaneous Bidirectional) transceivers, i.e., simultaneous bidirectional transceivers, are devices that can send and receive data simultaneously on the same communication line. SBD transceivers are widely used in situations where high-speed and efficient data transmission is required, such as computer networks, communication networks, industrial automation and other fields. SBD transceivers can be set with different types of full-duplex interfaces, such as A-PHY (Automotive PHY), a high-speed, long-distance asymmetric serial interface for automotive applications, released by the MIPI (Mobile Industry Processor Interface) Alliance and incorporated into the IEEE standard. A-PHY meets the needs of asymmetric, high-throughput data communication between sensors (such as cameras, lidars, radars, etc.) and display devices and the system CPU through high-speed links. It provides a main unidirectional data flow, a bidirectional low-throughput control command and control data flow, and can also choose to directly provide the required power to peripheral devices (i.e., sensors and / or displays at the edge of the network) through the A-PHY data line. The full-duplex serial port feature of A-PHY's uplink and downlink signals are on the same line, so it is necessary to use the analog front-end circuit in the A-PHY transceiver to effectively separate the target transmission signal from the target reception signal in the mixed signal. The analog front-end circuit can separate the target transmission signal from the target reception signal in the following two ways. The first signal separation method is to generate a current signal opposite to the target transmission signal in the form of current, and the opposite current signal and the mixed signal act on the same impedance, so that the target transmission signal in the mixed signal is offset, and the target reception signal is obtained, and the signal separation is further realized. However, this method requires the generation and transmission of current signals, which often consumes a large amount of power. The second signal separation method is to generate a voltage signal opposite to the target transmission signal in the form of voltage, and the opposite voltage signal and the mixed signal act on the input end of the receiving circuit respectively, so that the target transmission signal in the mixed signal is offset, and the target reception signal is obtained, and the signal separation is further realized. However, in this method, the mixed signal and the opposite voltage signal act on the input end of the receiving circuit respectively, resulting in a large signal amplitude at the input end of the receiving circuit, which makes the linearity of the receiving circuit poor.

[0046] To this end, in the present application, the signal sending module performs digital-to-analog conversion and amplitude adjustment on the original transmission signal output by the transmission circuit to obtain a target transmission signal in the form of a voltage, and outputs the target transmission signal to an external device through the transceiver port, that is, the target transmission signal is transmitted in the form of a voltage, reducing the power consumption of the transmission and sending of the signal target transmission signal; the present application also copies the target transmission signal according to a preset ratio through the signal copying module to obtain a synchronous voltage signal, and then performs voltage-current conversion on the synchronous voltage signal through the signal conversion module to obtain a synchronous current signal. The signal cancellation module cancels the target transmission signal in the mixed signal based on the synchronous current signal to obtain a target reception signal. Before the signal enters the reception circuit, the target reception signal is separated from the mixed signal, avoiding processing a high-amplitude mixed signal at the input end of the reception circuit and improving the linearity of the reception circuit.

[0047] After introducing the application scenario and design concept of the embodiments of the present application, the technical solutions provided by the embodiments of the present application will be described in detail below.

[0048] The embodiments of the present application provide an analog front-end circuit. Refer to Figure 1 As shown, the analog front-end circuit 100 provided by the embodiments of the present application at least includes: a signal sending module 110, a signal copying module 120, a signal conversion module 130, and a signal cancellation module 140;

[0049] The input end of the signal sending module 110 and the input end of the signal copying module 120 are respectively connected to the transmission circuit of the transceiver. The output end of the signal sending module 110 and the first input end of the signal cancellation module 140 are connected to the transceiver port of the transceiver; the output end of the signal copying module 120 is connected to the input end of the signal conversion module 130, the output end of the signal conversion module 130 is connected to the second input end of the signal cancellation module 140, and the output end of the signal cancellation module 140 is connected to the reception circuit of the transceiver;

[0050] The signal sending module 110 is configured to perform digital-to-analog conversion and amplitude adjustment on the original transmission signal output by the transmission circuit to obtain a target transmission signal in the form of a voltage; output the target transmission signal to an external device through the transceiver port;

[0051] The signal copying module 120 is configured to copy the target transmission signal according to a preset ratio to obtain a synchronous voltage signal;

[0052] The signal conversion module 130 is configured to perform voltage-current conversion on the synchronous voltage signal to obtain a synchronous current signal;

[0053] The signal cancellation module 140 is used to collect the mixed signal of the transceiver port. The mixed signal includes a target transmission signal and a target reception signal. The signal cancellation module 140 receives a synchronous current signal and cancels the target transmission signal in the mixed signal based on the synchronous current signal to obtain the target reception signal.

[0054] In Figure 1 In the analog front-end circuit shown, the transceiver port is a single-wire full-duplex port for receiving and transmitting signals. The mixed signal of the transceiver port includes a target transmission signal and a target reception signal. The target transmission signal is a signal to be transmitted to an external first device, and the target reception signal is a signal received from an external second device. The external first device and the external second device can be the same device or different devices. The original transmission signal output by the transmission circuit of the transceiver is a digital signal generated by the transmission circuit. The signal transmission module 110 performs digital-to-analog conversion on this digital signal to obtain an analog signal in voltage form. To maintain the accuracy and stability of the signal and adapt to other modules in the analog front-end circuit and the external first device, the amplitude of the analog signal in voltage form can be reduced or amplified as a whole to obtain the target transmission signal in voltage form. The signal replication module 120 replicates the target transmission signal according to a preset ratio to obtain a synchronous voltage signal. The size of the preset ratio can be determined according to actual needs, and the general selection range is 0.125 - 0.5. The signal conversion module 130 performs voltage-current conversion on the synchronous voltage signal to obtain a synchronous current signal, where the voltage-current conversion is a linear conversion according to a preset first conversion ratio. After receiving the synchronous current signal, the signal cancellation module 140 performs current-voltage conversion on the synchronous current signal. The synchronous current signal is linearly converted according to a preset second conversion ratio to obtain a synchronous cancellation signal in voltage form. The synchronous cancellation signal in voltage form is equal in magnitude and opposite in direction to the target transmission signal in the mixed signal. The signal cancellation module 140 combines the synchronous cancellation signal in voltage form with the mixed signal to cancel the target transmission signal in the mixed signal and accurately separate the target reception signal.

[0055] In specific implementation, the signal transmission module in the analog front-end circuit has various structures to achieve its functions. Refer to Figure 2 shown, the signal transmission module may include: a main drive module MD1, a first resistor R1, and a second resistor R2;

[0056] The first input terminal of the main drive module MD1 is connected to the positive output terminal of the transmission circuit, and the second input terminal of the main drive module MD1 is connected to the negative output terminal of the transmission circuit. The first output terminal of the main drive module MD1 is connected to the first end of the transceiver port through the first resistor R1. The second output terminal of the main drive module MD1 is connected to the second end of the transceiver port through the second resistor R2.

[0057] In Figure 2 In the shown analog front-end circuit, the resistance values of the first resistor R1 and the second resistor R2 are equal. The original transmission signal is a differential signal, including a forward original transmission signal DIN and a reverse original transmission signal DIN-B. The transmission circuit inputs the forward original transmission signal DIN to the first input end of the main driving module through the forward output end, and inputs the reverse original transmission signal DIN-B to the second input end of the main driving module MD1 through the reverse output end. The main driving module MD1 is used to perform digital-to-analog conversion on the forward original transmission signal and the reverse original transmission signal respectively. The main driving module and the first resistor R1 adjust the amplitude of the forward original transmission signal DIN to obtain a forward target transmission signal VTXP. The main driving module MD1 and the second resistor R2 adjust the amplitude of the reverse original transmission signal DIN-B to obtain a reverse target transmission signal VTXN.

[0058] In specific implementation, the signal replication module in the analog front-end circuit has various structures to implement its functions. Refer to Figure 2 shown, the signal replication module may include: a sub-driving module CD1, a third resistor R3, a fourth resistor R4, and a fifth resistor R5;

[0059] The first input end of the sub-driving module CD1 is connected to the forward output end of the transmission circuit, and the second input end of the sub-driving module CD1 is connected to the reverse output end of the transmission circuit; the first output end of the sub-driving module CD1 is connected to the first end of the fifth resistor R5 and the first input end of the signal conversion module through the third resistor R3; the second output end of the sub-driving module CD1 is connected to the second end of the fifth resistor R5 and the second input end of the signal conversion module through the fourth resistor R4.

[0060] In Figure 2In the analog front-end circuit shown, the structure of the signal replication module is the same as that of the signal transmission module, and the structure of the secondary drive module CD1 is the same as that of the primary drive module MD1. However, the current output capacity of the primary drive module MD1 is 2 to 8 times that of the secondary drive module CD1. The resistance values of the third resistor R3 and the fourth resistor R4 are equal, and the resistance value of the third resistor R3 is greater than that of the first resistor R1 and is in a proportional relationship with the resistance value of the first resistor R1. By inputting the forward original transmission DIN signal and the reverse original transmission signal DIN-B into the secondary drive module CD1, and through the third resistor R3, the fourth resistor R4, and the fifth resistor R5, it is possible to replicate the target transmission signal according to a preset ratio to obtain a synchronous voltage signal. Among them, the magnitude of the preset ratio is determined according to the ratio of the current output capacities of the primary drive module MD1 and the secondary drive module CD1, the ratio of the resistance values of the first resistor R1 and the third resistor R3, and the magnitude of the fifth resistor R5. The synchronous voltage signal includes a forward synchronous voltage signal VREPP and a reverse synchronous voltage signal VREPN. The forward synchronous voltage signal VREPP is obtained by replicating the forward target transmission VRXP signal according to a preset ratio, and the reverse synchronous voltage signal VREPN is obtained by replicating the reverse target transmission signal VRXN according to a preset ratio.

[0061] In a possible implementation manner, the fifth resistor R5 is an adjustable resistor. The fifth resistor R5 is used to adjust the voltage difference between the forward synchronous voltage signal VREPP and the reverse synchronous voltage signal VREPN.

[0062] In specific implementation, the signal conversion module in the analog front-end circuit has various structures to achieve its functions. Refer to Figure 3 shown, the signal conversion module 130 may include: a voltage extraction module 131, an impedance matching module 132, and a current output module 133;

[0063] The voltage extraction module 131, the impedance matching module 132, and the current output module 133 are connected in sequence. The input end of the voltage extraction module 131 is connected to the output end of the signal replication module 120, and the output end of the current output module 133 is connected to the second input end of the signal cancellation module 140;

[0064] The voltage extraction module 131 is used to track and collect the synchronous voltage signal to obtain a target voltage signal;

[0065] The impedance matching module 132 is used to perform impedance matching with the signal cancellation module to convert the target voltage signal into a synchronous current signal;

[0066] The current output module 133 is used to output the synchronous current signal.

[0067] In Figure 3In the analog front-end circuit shown, the voltage extraction module 131 can generate a target voltage signal obtained by tracking a synchronous voltage signal in a synchronous closed-loop or open-loop manner. The reason for collecting the synchronous voltage signal by tracking instead of directly obtaining the synchronous voltage signal is to avoid drawing current from the generation end of the synchronous voltage signal, increasing the load and driving difficulty or speed of the signal replication module 120. The impedance matching module 132 converts the target voltage signal into a synchronous current signal by setting an impedance proportional and of the same type as the signal cancellation module 140, and through the impedance proportional and of the same type as the signal cancellation module 140, so that the current output module 133 outputs the synchronous current signal to the signal cancellation module.

[0068] Specifically, referring to Figure 4 shown, the voltage extraction module includes a first operational amplifier OTA1 and a second operational amplifier OTA2; the impedance matching module includes a first impedance module Z1 and a second impedance module Z2; the current output module includes a first field-effect transistor M1, a second field-effect transistor M2, a third field-effect transistor M3, a fourth field-effect transistor M4, and a first power supply;

[0069] The positive input terminal of the first operational amplifier OTA1 is connected to the first output terminal of the signal replication module, and the negative input terminal and the output terminal of the first operational amplifier OTA1 are both connected to the ground through the first impedance module Z1; the source electrodes of the first field-effect transistor M1 and the second field-effect transistor M2 are respectively connected to the first power supply, and the gate electrode of the first field-effect transistor M1 is respectively connected to the source electrode of the second field-effect transistor M2 and the output terminal of the first operational amplifier OTA1; the drain electrode of the first field-effect transistor M1 is connected to the output terminal of the first operational amplifier OTA1; the drain electrode of the second field-effect transistor M2 is connected to the second input terminal of the signal cancellation module;

[0070] The positive input terminal of the second operational amplifier OTA2 is connected to the second output terminal of the signal replication module, and the negative input terminal and the output terminal of the second operational amplifier OTA2 are both connected to the ground through the second impedance module Z2; the source electrodes of the third field-effect transistor M3 and the fourth field-effect transistor M4 are respectively connected to the first power supply, and the gate electrode of the third field-effect transistor M3 is respectively connected to the source electrode of the fourth field-effect transistor M4 and the output terminal of the second operational amplifier OTA2; the drain electrode of the third field-effect transistor M3 is connected to the output terminal of the second operational amplifier OTA2; the drain electrode of the fourth field-effect transistor M4 is connected to the second input terminal of the signal cancellation module.

[0071] In Figure 4In the shown analog front-end circuit, the first operational amplifier OTA1 generates a positive target voltage signal VG1 in a synchronous closed-loop manner. Specifically, the gain of the first operational amplifier OTA2 is set to a high gain so that the voltage signals at the positive input terminal and the output terminal of the first operational amplifier are the same. The input terminal of the first operational amplifier inputs a positive synchronous voltage signal VREPP, and the output terminal of the first operational amplifier is the positive target voltage signal VG1 obtained by tracking the positive synchronous voltage signal VREPP. The positive target voltage signal VG1 flows through the first impedance module Z1 to generate a positive synchronous current signal I BIAS1 ; The first field-effect transistor M1 and the second field-effect transistor M2 form a current mirror, and the positive synchronous current signal I BIAS1 is output to the signal cancellation module through the current mirror. Correspondingly, the second operational amplifier OTA2 generates a negative target voltage signal VG2 in a synchronous closed-loop manner. Specifically, the gain of the second operational amplifier OTA2 is set to a high gain so that the voltage signals at the positive input terminal and the output terminal of the second operational amplifier OTA2 are the same. The input terminal of the second operational amplifier OTA2 inputs a negative synchronous voltage signal VREPN, and the output terminal of the second operational amplifier OTA2 is the negative target voltage signal VG2 obtained by tracking the negative synchronous voltage signal VREPN. The negative target voltage signal VG2 flows through the second impedance module Z2 to generate a negative synchronous current signal I BIAS2 ; The third field-effect transistor M3 and the fourth field-effect transistor M4 form a current mirror, and the negative synchronous current signal I BIAS2 is output to the signal cancellation module through the current mirror. Among them, the internal structures of the first impedance module Z1 and the second impedance module Z2 are the same, and at least one of a resistor, a capacitor, and an inductor is provided in both the first impedance module Z1 and the second impedance module Z2; the total impedance of the first impedance module Z1 is the same as the total impedance of the second impedance module Z2.

[0072] In specific implementation, the signal cancellation module in the analog front-end circuit has various structures to achieve its function. Refer to Figure 4 shown, the signal cancellation module may include: a first current source I1, a second current source I2, a third impedance module Z3, a fourth impedance module Z4, and a second power supply;

[0073] The input terminals of the first current source I1 and the second current source I2 are respectively connected to the second power supply. The output terminal of the first current source I1 is respectively connected to the first end of the third impedance module Z3 and the first output terminal of the signal conversion module; the first end of the third impedance module Z3 is also connected to the first input terminal of the receiving circuit; the second end of the third impedance module Z3 is connected to the second end of the transceiver port;

[0074] The output terminal of the second current source I2 is respectively connected to the first terminal of the fourth impedance module Z4 and the second output terminal of the signal conversion module; the first terminal of the fourth impedance module Z4 is further connected to the second input terminal of the receiving circuit; the second terminal of the fourth impedance module Z4 is connected to the first terminal of the transceiver port.

[0075] In a possible implementation manner, the third impedance module includes at least one of a resistor, a capacitor, and an inductor; the fourth impedance module includes at least one of a resistor, a capacitor, and an inductor; the total impedance of the third impedance module is the same as the total impedance of the fourth impedance module. The first impedance module has the same impedance type as the third impedance module, and the total impedances are in proportion. The second impedance module has the same impedance type as the fourth impedance module, and the total impedances are in proportion.

[0076] In a possible implementation manner, referring to Figure 4 as shown, the signal cancellation module further includes: a fifth field-effect transistor M5 and a sixth field-effect transistor M6;

[0077] The gate of the fifth field-effect transistor M5 is connected to the gate of the sixth field-effect transistor M6. The source of the fifth field-effect transistor M5 is respectively connected to the output terminal of the first current source I1 and the first output terminal of the signal conversion module. The drain of the fifth field-effect transistor M5 is respectively connected to the first terminal of the third impedance module Z3 and the receiving circuit;

[0078] The source of the sixth field-effect transistor M6 is respectively connected to the output terminal of the second current source I2 and the second output terminal of the signal conversion module. The drain of the sixth field-effect transistor M6 is respectively connected to the first terminal of the fourth impedance module Z4 and the receiving circuit.

[0079] In Figure 4 the shown analog front-end circuit, the fifth field-effect transistor M5 is used to achieve isolation between the first output terminal of the signal conversion module and the second terminal of the transceiver port, and lift the restriction that the voltages of the first output terminal of the signal conversion module and the second terminal of the transceiver port are the same. The sixth field-effect transistor M6 is used to achieve isolation between the second output terminal of the signal conversion module and the first terminal of the transceiver port, and lift the restriction that the voltages of the second output terminal of the signal conversion module and the first terminal of the transceiver port are the same.

[0080] Next, taking Figure 4 the shown analog front-end circuit as an example, the principle of canceling the target transmission signal in the mixed signal to obtain the target reception signal will be described in detail.

[0081] Taking the output terminal RXP where the analog front-end circuit is connected to the receiving circuit as an example, according to Kirchhoff's law, the voltage V of the output terminal RXP of the analog front-end circuit can be calculated as RXPO follows:

[0082] (1)

[0083] Among them, V RXPO is the voltage value of the output terminal RXP of the analog front-end circuit, and V TXP is the voltage value of the target transmission signal in the mixed signal; V RXP is the voltage value of the target reception signal in the mixed signal; I REPN is the current value of the synchronization current signal obtained after the signal conversion module performs voltage-current conversion on the voltage V REPN of the synchronization voltage signal; Z HBY4 is the impedance value of the fourth impedance module Z4 in the signal cancellation module.

[0084] The current value I REPN of the synchronization current signal is obtained after the signal conversion module performs voltage-current conversion on the voltage V REPN of the synchronization voltage signal. The current value I REPN of the synchronization current signal is expressed by the following formula (2);

[0085] (2)

[0086] Among them, V REPN is the voltage value of the synchronization voltage signal obtained by the signal replication module replicating the voltage value V TXN of the target transmission signal according to a preset ratio. Z HBY2 is the impedance value of the second impedance module Z2 in the voltage extraction module.

[0087] The voltage value V REPN of the synchronization voltage signal and the voltage value V TXN of the target transmission signal output by the signal transmission module have a proportional relationship. Therefore, it can be obtained that:

[0088] (3)

[0089] Among them, a is the preset ratio of the signal replication module to replicate the target transmission signal.

[0090] Substituting the above formula (2) and formula (3) into formula (1), it can be obtained that:

[0091] (4)

[0092] Since the forward original transmission signal DIN and the reverse original transmission signal DIN-B are two completely opposite signals, correspondingly, the forward target transmission signal VTXP and the reverse target transmission signal VTXN obtained by performing digital-to-analog conversion and amplitude adjustment on the forward original transmission signal DIN and the reverse original transmission signal DIN-B are two completely opposite signals. Therefore, it can be determined that the voltage value VTXP and the voltage value V of the reverse target transmission signal VTXN TXN sum to zero, i.e., V TXP + V TXN = 0. In Equation (4), when the voltage of the output terminal RXP where the analog front-end circuit is connected to the receiving circuit , the cancellation of the target transmission signal VTXN in the mixed signal is achieved, and the target receiving signal VRXP is obtained. Similarly, for the output terminal RXN where the analog front-end circuit is connected to the receiving circuit, the cancellation of the target transmission signal VTXN in the mixed signal can also be achieved, and the target receiving signal VRXN is obtained.

[0093] Based on the above embodiments, an embodiment of the present application provides a transceiver. Referring to Figure 5 as shown, the transceiver 200 provided by the embodiment of the present application at least includes: a transceiver port 210, a transmitting circuit 220, a receiving circuit 230, and the analog front-end circuit 100 provided by the above embodiments;

[0094] The analog front-end circuit 100 is respectively connected to the transceiver port 210, the transmitting circuit 220, and the receiving circuit 230.

[0095] It should be noted that although several units or subunits of the device are mentioned in the above detailed description, this division is merely exemplary and not mandatory. In fact, according to the embodiments of the present application, the features and functions of the two or more units described above can be embodied in one unit. Conversely, the features and functions of one unit described above can be further divided and embodied by multiple units.

[0096] Although the preferred embodiments of the present application have been described, those skilled in the art can make additional changes and modifications once they learn the basic creative concept. Therefore, the appended claims are intended to be interpreted to include the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0097] Obviously, those skilled in the art can make various changes and modifications to the embodiments of the present application without departing from the spirit and scope of the embodiments of the present application. Thus, if these modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalent technologies, the present application also intends to include these changes and modifications.

Claims

1. An analog front-end circuit, characterized in that: Applied to a transceiver using A-PHY, including: a signal sending module, a signal copying module, a signal conversion module and a signal cancellation module; The input end of the signal sending module and the input end of the signal copying module are respectively connected to the sending circuit of the transceiver, and the output end of the signal sending module and the first input end of the signal cancellation module are connected to the transceiver port of the transceiver; the output end of the signal copying module is connected to the input end of the signal conversion module, the output end of the signal conversion module is connected to the second input end of the signal cancellation module, and the output end of the signal cancellation module is connected to the receiving circuit of the transceiver; The signal transmission module is used to perform digital-to-analog conversion and amplitude adjustment on the original transmission signal output by the transmission circuit to obtain a target transmission signal in the form of a voltage; and output the target transmission signal to an external device through a transceiver port; The signal replication module is used to replicate the target transmission signal according to a preset ratio to obtain a synchronous voltage signal; The signal conversion module is used to perform voltage-current conversion on the synchronous voltage signal to obtain a synchronous current signal; The signal cancellation module is used to collect the mixed signal of the transceiver port, wherein the mixed signal includes a target transmission signal and a target reception signal; receive the synchronous current signal, and cancel the target transmission signal in the mixed signal based on the synchronous current signal to obtain a target reception signal; The signal conversion module includes: a voltage extraction module, an impedance matching module and a current output module; The voltage extraction module, the impedance matching module and the current output module are connected in sequence, the input end of the voltage extraction module is connected to the output end of the signal replication module, and the output end of the current output module is connected to the second input end of the signal cancellation module; The voltage extraction module is used to track and collect the synchronous voltage signal to obtain a target voltage signal; The impedance matching module is used to perform impedance matching with the signal cancellation module to convert the target voltage signal into a synchronous current signal; the impedance matching module includes a first impedance module and a second impedance module, and the first impedance module and the second impedance module are both provided with at least one of a resistor, a capacitor and an inductor; The current output module is used to output the synchronous current signal.

2. The analog front-end circuit according to claim 1, characterized in that: The signal sending module includes: a main driving module, a first resistor and a second resistor; The first input end of the main driving module is connected to the forward output end of the sending circuit, and the second input end of the main driving module is connected to the reverse output end of the sending circuit; the first output end of the main driving module is connected to the first end of the transceiver port via a first resistor; the second output end of the main driving module is connected to the second end of the transceiver port via a second resistor.

3. The analog front-end circuit according to claim 1, characterized in that: The signal replication module includes: a secondary driving module, a third resistor, a fourth resistor and a fifth resistor; The first input end of the auxiliary driving module is connected to the forward output end of the transmitting circuit, and the second input end of the auxiliary driving module is connected to the reverse output end of the transmitting circuit; the first output end of the auxiliary driving module is connected to the first end of the fifth resistor and the first input end of the signal conversion module via a third resistor; the second output end of the auxiliary driving module is connected to the second end of the fifth resistor and the second input end of the signal conversion module via a fourth resistor.

4. The analog front-end circuit according to claim 3, characterized in that: The fifth resistor is an adjustable resistor.

5. The analog front-end circuit according to any one of claims 1 to 4, characterized in that: The voltage extraction module includes a first operational amplifier and a second operational amplifier; the impedance matching module includes a first impedance module and a second impedance module; the current output module includes a first field effect transistor, a second field effect transistor, a third field effect transistor, a fourth field effect transistor and a first power supply; The positive input terminal of the first operational amplifier is connected to the first output terminal of the signal replication module, and the reverse input terminal of the first operational amplifier and the output terminal of the first operational amplifier are both connected to the ground via the first impedance module; the source terminals of the first field effect transistor and the second field effect transistor are respectively connected to the first power supply, and the gate terminal of the first field effect transistor is respectively connected to the source terminal of the second field effect transistor and the output terminal of the first operational amplifier; the drain terminal of the first field effect transistor is connected to the output terminal of the first operational amplifier; and the drain terminal of the second field effect transistor is connected to the second input terminal of the signal cancellation module; The positive input terminal of the second operational amplifier is connected to the second output terminal of the signal replication module, and the reverse input terminal of the second operational amplifier and the output terminal of the second operational amplifier are both connected to the ground via the second impedance module; the sources of the third field effect transistor and the fourth field effect transistor are respectively connected to the first power supply, and the gate of the third field effect transistor is respectively connected to the source of the fourth field effect transistor and the output terminal of the second operational amplifier; the drain of the third field effect transistor is connected to the output terminal of the second operational amplifier; and the drain of the fourth field effect transistor is connected to the second input terminal of the signal cancellation module.

6. The analog front-end circuit according to claim 5, characterized in that: The signal cancellation module includes: a first current source, a second current source, a third impedance module, a fourth impedance module and a second power supply; The input end of the first current source and the input end of the second current source are respectively connected to the second power supply, and the output end of the first current source is respectively connected to the first end of the third impedance module and the first output end of the signal conversion module; the first end of the third impedance module is also connected to the first input end of the receiving circuit; the second end of the third impedance module is connected to the second end of the transceiver port; The output end of the second current source is respectively connected to the first end of the fourth impedance module and the second output end of the signal conversion module; the first end of the fourth impedance module is also connected to the second input end of the receiving circuit; the second end of the fourth impedance module is connected to the first end of the transceiver port.

7. The analog front-end circuit according to claim 6, characterized in that: The third impedance module includes at least one of a resistor, a capacitor and an inductor; the fourth impedance module includes at least one of a resistor, a capacitor and an inductor; and the total impedance of the third impedance module is the same as the total impedance of the fourth impedance module.

8. The analog front-end circuit according to claim 6, characterized in that: The signal cancellation module further includes: a fifth field effect transistor and a sixth field effect transistor; The gate of the fifth field effect tube is connected to the gate of the sixth field effect tube, the source of the fifth field effect tube is respectively connected to the output end of the first current source and the first output end of the signal conversion module, and the drain of the fifth field effect tube is respectively connected to the first end of the third impedance module and the receiving circuit; The source of the sixth field effect transistor is respectively connected to the output end of the second current source and the second output end of the signal conversion module, and the drain of the sixth field effect transistor is respectively connected to the first end of the fourth impedance module and the receiving circuit.

9. A transceiver, characterized in that: include: A transceiver port, a transmitting circuit, a receiving circuit, and an analog front-end circuit as claimed in any one of claims 1 to 8; The analog front-end circuit is connected to the transceiver port, the transmitting circuit and the receiving circuit respectively.

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