Asymmetric breakdown bidirectional silicon controlled rectifier electrostatic protection structure
By forming a distributed P well and a high-voltage N well on the epitaxial layer and forming a second P well in the high-voltage N well to form a PNP structure, the problem of difficult to achieve bidirectional asymmetric breakdown voltage design index in the prior art is solved, and asymmetric breakdown characteristics and high voltage thyristor electrostatic protection structure is realized.
Patent Information
- Application Number
- CN202510168140.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-17
- Publication Date
- 2025-03-18
- Estimated Expiration
- 2045-02-17
AI Technical Summary
The prior art is difficult to achieve the design index of bidirectional asymmetric breakdown voltage. When adjusting the geometric distance between the HVNW well and the SDPW well, the voltage adjustable range is limited, making it difficult to meet the requirements of large backward characteristics and high voltage withstand voltage.
By forming a first P well and a high-voltage N well distributed left and right on the epitaxial layer and having a spacing between each other, and forming a second P well within the high-voltage N well, a PNP structure is formed to achieve an asymmetric trigger voltage.
The asymmetric breakdown characteristics of the thyristor electrostatic protection structure are realized, the device's voltage withstand voltage and process compatibility is improved, and the needs of low-voltage and medium-low voltage platforms are met.
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Figure CN119653869A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of semiconductor technology, and in particular to an asymmetric breakdown bidirectional thyristor electrostatic protection structure. Background Art
[0002] In recent years, integrated circuit manufacturing technology has developed rapidly, bringing about the rapid upgrading of electronic products. Low-voltage ultra-high-speed data transmission interfaces such as USB3.1, HDMI2.1, and Type-C are widely used in electronic products. In order to ensure the quality and reliability of electronic products, their chips and external interface circuits must have a certain level of ESD (Electro-Staticdischarge) resistance, so more and more protection devices are needed.
[0003] SCR (Silicon-Controlled Rectifier) is a protection device with strong robustness per unit area and small parasitic capacitance and is widely used in various products. Figure 1 A conventional bidirectional SCR design is shown in FIG. 1 , in which the breakdown voltage and trigger voltage of the SCR are adjusted by adjusting the spacing D1 between the P-type SDPW well and the N-type HVNW well. This conventional design can achieve asymmetric breakdown by adjusting the geometric distance between the HVNW well and the left and right SDPW wells, but the voltage adjustable range of the HVNW well and the SDPW well is limited, and since the SCR needs to exhibit a large snapback characteristic, the concentration and width of the HVNW well are limited; therefore, this conventional structure is difficult to achieve the design index of bidirectional asymmetric breakdown voltage. Summary of the invention
[0004] In view of the problems existing in the prior art, the present invention provides an asymmetric breakdown bidirectional thyristor electrostatic protection structure, comprising a substrate, a first buried layer and an epitaxial layer arranged in sequence from bottom to top, a first P well and a high-voltage N well distributed left and right and spaced apart from each other are formed on the epitaxial layer, a second P well is formed in the high-voltage N well, and a PNP structure is formed in both the first P well and the second P well.
[0005] Preferably, the first P-well and the second P-well have the same doping structure.
[0006] Preferably, N wells are provided on both sides of the high-voltage N well, the doping concentration of the first P well is lower than the doping concentration of the second P well, and the junction depth of the first P well is greater than the junction depth of the second P well.
[0007] Preferably, the doping concentration of the N-well is higher than that of the high-voltage N-well, and the junction depth of the N-well is smaller than that of the high-voltage N-well.
[0008] Preferably, the N-well is flush with the top of the high-voltage N-well and their side surfaces partially overlap.
[0009] Preferably, a second buried layer is further formed in the epitaxial layer, and the second buried layer is located on at least one side of the high-voltage N-well and below the corresponding first P-well and the N-well.
[0010] Preferably, the first buried layer is an N-type buried layer, and the second buried layer is a P-type buried layer.
[0011] Preferably, the junction depth of the high-voltage N-well is the same as the thickness of the epitaxial layer.
[0012] Preferably, the substrate is a P-type substrate, and the epitaxial layer is a P-type epitaxial layer.
[0013] The above technical solution has the following advantages or beneficial effects: by forming a first P well and a high-voltage N well distributed on the left and right and with a distance between each other on the epitaxial layer, and forming a second P well in the high-voltage N well, the bidirectional thyristor electrostatic protection structure of the present invention can exhibit an asymmetric trigger voltage. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] Figure 1 It is a schematic diagram of the structure of a traditional bidirectional SCR; Figure 2 This is a schematic diagram of an electrostatic protection structure of a bidirectional thyristor with asymmetric breakdown in Example 1; Figure 3 This is a schematic diagram of an electrostatic protection structure of a bidirectional thyristor with asymmetric breakdown in Example 2; Figure 4 This is a schematic diagram of an electrostatic protection structure of a bidirectional thyristor with asymmetric breakdown in Example 3; Figure 5 This is a complete structural diagram of a bidirectional thyristor electrostatic protection structure with four input and output ports in Example 3; Figure 6 Schematic diagram of DCBV curves of three embodiments. DETAILED DESCRIPTION
[0015] The present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments. The present invention is not limited to this embodiment, and other embodiments may also fall within the scope of the present invention as long as they conform to the gist of the present invention.
[0016] Example 1 In this embodiment, based on the above problems existing in the prior art, a bidirectional thyristor electrostatic protection structure with asymmetric breakdown is provided, such as Figure 2As shown, it includes a substrate 1, a first buried layer 2 and an epitaxial layer 3 arranged in sequence from bottom to top, a first P well 4 and a high-voltage N well 5 distributed left and right and spaced apart from each other are formed on the epitaxial layer 3, a second P well 6 is formed in the high-voltage N well 5, and a PNP structure is formed in both the first P well 4 and the second P well 6.
[0017] In a preferred embodiment of the present invention, the first P-well 4 and the second P-well 6 have the same doping structure. Here, having the same doping structure can be understood as having the same doping characteristics, that is, the doping concentration and junction depth of the two are the same.
[0018] In this embodiment, the junction depth of the high-voltage N-well 5 is the same as the thickness of the epitaxial layer 3 .
[0019] In this embodiment, the substrate 1 is a P-type substrate, and the epitaxial layer 3 is a P-type epitaxial layer.
[0020] Specifically, in this embodiment, the PNP structure includes an N-type semiconductor region NSD, and P-type semiconductor regions PSD are provided on both sides of the N-type semiconductor region NSD. The PNP structure in the first P well 4 leads out the first input / output port IO1, and the PNP structure in the second P well 6 leads out the second input / output port IO2.
[0021] Furthermore, the junction depth of the first P well 4 is less than that of the high voltage N well 5, and the second P well 6 formed in the high voltage N well 5 adopts the same doping structure as the first P well 4, so that the bidirectional thyristor electrostatic protection structure of this embodiment can be applied to a low voltage process platform with an isolation device and has the characteristic of asymmetric breakdown. Since it involves the least injection level, this embodiment has the best process compatibility.
[0022] Example 2 In this embodiment, a bidirectional thyristor electrostatic protection structure with asymmetric breakdown is provided, such as Figure 3 As shown, it includes a substrate 1, a first buried layer 2 and an epitaxial layer 3 arranged in sequence from bottom to top, a first P well 4 and a high-voltage N well 5 distributed left and right and spaced apart from each other are formed on the epitaxial layer 3, a second P well 6 is formed in the high-voltage N well 5, and a PNP structure is formed in both the first P well 4 and the second P well 6.
[0023] In this embodiment, N wells 7 are provided on both sides of the high voltage N well 5 , the doping concentration of the first P well 4 is lower than that of the second P well 6 , and the junction depth of the first P well 4 is greater than that of the second P well 6 .
[0024] In this embodiment, the doping concentration of the N-well 7 is higher than that of the high-voltage N-well 5 , and the junction depth of the N-well 7 is smaller than that of the high-voltage N-well 5 .
[0025] In this embodiment, the top of the N-well 7 is flush with the high-voltage N-well 5 and the side surfaces thereof partially overlap.
[0026] In this embodiment, the junction depth of the high-voltage N-well 5 is the same as the thickness of the epitaxial layer 3 .
[0027] In this embodiment, the substrate 1 is a P-type substrate, and the epitaxial layer 3 is a P-type epitaxial layer.
[0028] Specifically, in this embodiment, based on Embodiment 1, the second P-well in the high-voltage N-well 5 is replaced with a doping structure different from the first P-well, and partially overlapping N-wells 7 are formed on both sides of the high-voltage N-well 5. The N-well 7 preferably has a junction depth comparable to that of the first P-well 4, and the junction depth of the second P-well 6 is not greater than that of the N-well 7. This enables the bidirectional thyristor electrostatic protection structure of this embodiment to be applied to medium and low voltage platforms, and also has the characteristics of asymmetric breakdown and good process compatibility.
[0029] Example 3 In this embodiment, a bidirectional thyristor electrostatic protection structure with asymmetric breakdown is provided, such as Figure 4 As shown, it includes a substrate 1, a first buried layer 2 and an epitaxial layer 3 arranged in sequence from bottom to top, a first P well 4 and a high-voltage N well 5 distributed left and right and spaced apart from each other are formed on the epitaxial layer 3, a second P well 6 is formed in the high-voltage N well 5, and a PNP structure is formed in both the first P well 4 and the second P well 6.
[0030] In this embodiment, N wells 7 are provided on both sides of the high voltage N well 5 , the doping concentration of the first P well 4 is lower than that of the second P well 6 , and the junction depth of the first P well 4 is greater than that of the second P well 6 .
[0031] In this embodiment, the doping concentration of the N-well 7 is higher than that of the high-voltage N-well 5 , and the junction depth of the N-well 7 is smaller than that of the high-voltage N-well 5 .
[0032] In this embodiment, the top of the N-well 7 is flush with the high-voltage N-well 5 and the side surfaces thereof partially overlap.
[0033] In this embodiment, the junction depth of the high-voltage N-well 5 is the same as the thickness of the epitaxial layer 3 .
[0034] In this embodiment, the substrate 1 is a P-type substrate, and the epitaxial layer 3 is a P-type epitaxial layer.
[0035] In this embodiment, a second buried layer 8 is further formed in the epitaxial layer 3 . The second buried layer 8 is located on at least one side of the high-voltage N-well 5 and below the corresponding first P-well 4 and N-well 7 .
[0036] In a preferred embodiment of the present invention, the first buried layer 2 is an N-type buried layer, and the second buried layer 8 is a P-type buried layer.
[0037] Specifically, in the traditional bidirectional SCR structure, as the voltage required at the high-voltage end increases, the withstand voltage can be increased by increasing the size of D1. However, when D1 increases to a certain extent, the withstand voltage will no longer rise further if the size of D1 continues to increase. At this time, the reason for limiting the further increase in the withstand voltage is that the electric field strength on the surface is too large, and the PN junction breaks down from the surface. In order to reduce the surface electric field strength, in this embodiment, on the basis of embodiment 2, a second buried layer 8, i.e., a P-type buried layer, is formed in the epitaxial layer 3, so that the three regions of the N well 7, the P-type buried layer PBL and the N-type NBL of the first buried layer 2 form a dual ReSurF (Reduced Surface Field) structure, and the maximum electric field strength is transferred from the surface to the body, which can improve the withstand voltage of the device. The advantage of this structure is that the withstand voltage of IO2-IO1 is further improved without increasing the size of the device.
[0038] Figure 4 In the embodiment, the N-well 7 is not only a part of the ResurF structure, but also a part of the equivalent base region, which increases the equivalent base region concentration of the parasitic PNP transistor and has the advantage of reducing the leakage current of the device.
[0039] Furthermore, if Figure 5 As shown, it is a complete schematic diagram of the embodiment 1 of the four-finger strip, that is, a complete schematic diagram of the electrostatic protection structure of the bidirectional thyristor with four input ports, wherein the first first P well 4, the first high-voltage N well 5, the second first P well 4 and the second high-voltage N well 5 are arranged in sequence from left to right, and the first first P well 4 and the N well 7 on the left side of the first high-voltage N well 5 are provided with a second buried layer 8 below, the N well 7 on the right side of the first high-voltage N well 5 and the left side of the second first P well 4 are provided with a second buried layer 8 below, and the right side of the second first P well 4 and the N well 7 on the left side of the second high-voltage N well 5 are provided with a second buried layer 8 below. An N well region NW with the same thickness as the epitaxial layer 3 is also formed on the left side of the first first P well 4 and the right side of the second high-voltage N well 5, that is, an N well region NW is provided above the two ends of the first buried layer 2, which is connected to the first buried layer 2, surrounds the internal interdigitated fingers, and can form a good isolation.
[0040] like Figure 6 The figure shows the DCBV (direct current breakdown characteristic) curves obtained by performing DC breakdown tests on the asymmetric breakdown bidirectional thyristor electrostatic protection structures of Example 1, Example 2 and Example 3. It can be seen that there are differences between the forward breakdown voltage and the reverse breakdown voltage of the three embodiments, and they have asymmetric breakdown characteristics.
[0041] The above description is only a preferred embodiment of the present invention, and does not limit the implementation mode and protection scope of the present invention. For those skilled in the art, it should be aware that all solutions obtained by equivalent substitutions and obvious changes made using the contents of this specification and illustrations should be included in the protection scope of the present invention.
Claims
1. A bidirectional thyristor electrostatic protection structure with asymmetric breakdown, characterized in that: The invention comprises a substrate, a first buried layer and an epitaxial layer arranged in sequence from bottom to top, wherein a first P-well and a high-voltage N-well are formed on the epitaxial layer and are distributed left and right and have a spacing therebetween, a second P-well is formed in the high-voltage N-well, and a PNP structure is formed in both the first P-well and the second P-well.
2. The bidirectional thyristor electrostatic protection structure according to claim 1, characterized in that: The first P-well and the second P-well have the same doping structure.
3. The bidirectional thyristor electrostatic protection structure according to claim 1, characterized in that: N wells are provided on both sides of the high-voltage N well, respectively. The doping concentration of the first P well is lower than that of the second P well, and the junction depth of the first P well is greater than that of the second P well.
4. The bidirectional thyristor electrostatic protection structure according to claim 3, characterized in that: The doping concentration of the N-well is higher than that of the high-voltage N-well, and the junction depth of the N-well is smaller than that of the high-voltage N-well.
5. The bidirectional thyristor electrostatic protection structure according to claim 3, characterized in that: The N-well is flush with the high-voltage N-well at the top and the side surfaces partially overlap with each other.
6. The bidirectional thyristor electrostatic protection structure according to claim 3, characterized in that: A second buried layer is also formed in the epitaxial layer. The second buried layer is located on at least one side of the high-voltage N-well and below the corresponding first P-well and the N-well.
7. The bidirectional thyristor electrostatic protection structure according to claim 6, characterized in that: The first buried layer is an N-type buried layer, and the second buried layer is a P-type buried layer.
8. The bidirectional thyristor electrostatic protection structure according to claim 1, characterized in that: The junction depth of the high-voltage N-well is the same as the thickness of the epitaxial layer.
9. The bidirectional thyristor electrostatic protection structure according to claim 1, characterized in that: The substrate is a P-type substrate, and the epitaxial layer is a P-type epitaxial layer.
Citation Information
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