Display device and method of driving same

Abstract

A display device and a method of driving the same are disclosed. The display device includes: a display layer; a sensor layer on the display layer; and a sensor driver for driving the sensor layer. The sensor layer includes: a plurality of sensing electrodes; a plurality of sensing lines respectively connected to the plurality of sensing electrodes; a multiplexer circuit connected to the plurality of sense lines and including a control transistor including a gate electrode; and a connection line connected between the multiplexer circuit and the sensor driver. The sensor driver includes a sensing circuit connected between the connection line and the gate electrode of the control transistor and for outputting a control signal to the gate electrode of the control transistor based on a sensing signal of the connection line.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0125405 filed in the Korean Intellectual Property Office on September 20, 2023, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] Aspects of embodiments of the present disclosure relate to a display device and a method of driving the display device. Background Art

[0004] An electronic device such as a smart phone, a digital camera, a notebook computer, a navigation system, or a smart TV includes a display device for displaying an image to a user. The display device generates an image and provides the image to the user through a display screen.

[0005] The display device includes a display panel generating an image and an input sensing part disposed on the display panel to sense an external input. The input sensing part includes a plurality of sensing electrodes for sensing the external input and sensing lines connected to the sensing electrodes.

[0006] The above information disclosed in this Background section is for enhancement of understanding of the background of the present disclosure and therefore it may contain information that does not constitute prior art. Summary of the invention

[0007] Embodiments of the present disclosure may be directed to a display device having improved sensing reliability and a method of driving the display device.

[0008] According to one or more embodiments of the present disclosure, a display device includes: a display layer; a sensor layer on the display layer; and a sensor driver configured to drive the sensor layer. The sensor layer includes: a plurality of sensing electrodes; a plurality of sensing lines respectively connected to the plurality of sensing electrodes; a multiplexer circuit connected to the plurality of sensing lines and including a control transistor including a gate electrode; and a connecting line connected between the multiplexer circuit and the sensor driver. The sensor driver includes a sensing circuit connected between the connecting line and the gate electrode of the control transistor and configured to output a control signal to the gate electrode of the control transistor based on a sensing signal of the connecting line.

[0009] In an embodiment, the sensor driver may be configured to output a driving signal to each of the plurality of sensing electrodes, and the driving signal may have a sinusoidal waveform.

[0010] In an embodiment, the sensing signal may have a sinusoidal waveform.

[0011] In an embodiment, the control signal may have a sinusoidal waveform.

[0012] In an embodiment, the voltage level of the control signal may vary depending on the voltage level of the sensing signal.

[0013] In an embodiment, the sensing circuit may include an operational amplifier.

[0014] In an embodiment, the operational amplifier may include: a first input node configured to receive a reference control signal; and a second input node connected to a current source electrically connected to the connection line.

[0015] In an embodiment, the control transistor may be a PMOS transistor.

[0016] In an embodiment, the voltage level of the control signal may be a negative level.

[0017] In an embodiment, a voltage level between a gate electrode and a source electrode of the control transistor may be uniform.

[0018] In an embodiment, each of the plurality of sensing electrodes may be configured to operate with self capacitance.

[0019] In an embodiment, a plurality of sensing electrodes may be positioned along a first direction and a second direction crossing the first direction.

[0020] In an embodiment, the display device may further include: a circuit board, on which the sensor driver may be mounted, and the circuit board may be connected to the display layer.

[0021] According to one or more embodiments of the present disclosure, a display device includes a display layer, a sensor layer on the display layer and including a plurality of sensing electrodes and a multiplexer circuit, and a sensor driver, and a method for driving the display device includes: providing a driving signal to each of the plurality of sensing electrodes by the sensor driver; receiving a sensing signal from each of the plurality of sensing electrodes by the multiplexer circuit; receiving a sensing signal from the multiplexer circuit by the sensor driver; sensing the sensing signal by a sensing circuit of the sensor driver; generating a control signal based on the sensing signal by the sensing circuit; and outputting the control signal to the multiplexer circuit by the sensing circuit.

[0022] In an embodiment, the multiplexer circuit may include a control transistor including a gate electrode, and the outputting of the control signal may include outputting the control signal to the gate electrode of the control transistor by the sensing circuit.

[0023] In an embodiment, the providing of the drive signal may include providing, by the sensor driver, the drive signal having a waveform of a sinusoidal wave.

[0024] In an embodiment, the outputting of the control signal may include outputting, by the sensing circuit, a control signal having a waveform of a sinusoidal wave.

[0025] In an embodiment, the method may further include sensing, by the sensor driver, an external input based on the sensing signal.

[0026] In an embodiment, the sensing of the external input may include driving a plurality of sensing electrodes independently of each other in a self-capacitance scheme by a sensor driver.

[0027] In an embodiment, the outputting of the control signal to the gate electrode of the control transistor may include maintaining a voltage level between the gate electrode and a source electrode of the control transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The above and other aspects and features of the present disclosure will be more clearly understood from the following detailed description of illustrative, non-limiting embodiments with reference to the accompanying drawings.

[0029] Figure 1 is a perspective view illustrating a display device according to an embodiment of the present disclosure.

[0030] Figure 2 is a cross-sectional view of a display device according to an embodiment of the present disclosure.

[0031] Figure 3 is a cross-sectional view of a display layer according to an embodiment of the present disclosure.

[0032] Figure 4 is a plan view of a portion of a display device according to an embodiment of the present disclosure.

[0033] Figure 5 According to an embodiment of the present disclosure, Figure 4 A cross-sectional view of the display layer taken along line II'.

[0034] Figure 6 is a plan view of a sensor layer according to an embodiment of the present disclosure.

[0035] Figure 7 is a circuit diagram illustrating a multiplexer circuit according to an embodiment of the present disclosure.

[0036] Figure 8 is a flowchart illustrating a driving method of a display device according to an embodiment of the present disclosure.

[0037] Fig. 9 is a block diagram illustrating a sensor layer and a sensor driving unit according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0038] Hereinafter, embodiments will be described in more detail with reference to the accompanying drawings, in which the same reference numerals always refer to the same elements. However, the present disclosure can be implemented in various forms and should not be construed as being limited to the illustrated embodiments herein. On the contrary, these embodiments are provided as examples so that the present disclosure will be thorough and complete, and will fully convey the aspects and features of the present disclosure to those skilled in the art. Accordingly, processes, elements and techniques that are unnecessary for those of ordinary skill in the art to fully understand the aspects and features of the present disclosure may not be described. Unless otherwise specified, the same reference numerals represent the same elements throughout the drawings and written descriptions, and therefore, their redundant descriptions may not be repeated.

[0039] When a specific embodiment can be implemented differently, the specific process order may be different from the described order. For example, two processes described successively may be performed simultaneously or substantially simultaneously or in the reverse order of the described order.

[0040] In the accompanying drawings, for the sake of clarity, the relative size, thickness and ratio of elements, layers and regions can be exaggerated and / or simplified. For ease of explanation, spatial relative terms such as "below ... ", "below ... ", "below ", "below ... ", "above ... " and "on " can be used in this article to describe the relationship between an element or feature as illustrated in the drawings and another (other) element or feature. It will be understood that, in addition to the orientation depicted in the drawings, spatial relative terms are intended to include different orientations of the device in use or in operation. For example, if the device in the drawings is turned over, the element described as "below" other elements or features, "below" or "below" will be oriented to "above" the other elements or features. Therefore, the example terms "below ... " and "below ... " can include two orientations above and below. The device can be oriented in other ways (for example, rotated 90 degrees or in other orientations), and the spatial relative descriptors used in this article should be interpreted accordingly.

[0041] In the accompanying drawings, the first direction, the second direction, and the third direction are not limited to directions corresponding to the three axes of the rectangular coordinate system, and can be interpreted in a broader sense. For example, the first direction, the second direction, and the third direction can be perpendicular or substantially perpendicular to each other, or can represent directions that are not perpendicular to each other and are different from each other.

[0042] It will be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Therefore, the first element, component, region, layer or section described below may be referred to as a second element, component, region, layer or section without departing from the spirit and scope of the present disclosure.

[0043] It will be understood that when an element or layer is referred to as being "on," "connected to," or "coupled to" another element or layer, it can be directly on, directly connected to, or directly coupled to the other element or layer, or there may be one or more intervening elements or layers. Similarly, when a layer, region, or element is referred to as being "electrically connected to" another layer, region, or element, it can be directly electrically connected to the other layer, region, or element, and / or can be indirectly electrically connected to the other layer, region, or element with one or more intervening layers, regions, or elements therebetween. Additionally, it will be understood that when an element or layer is referred to as being "between" two elements or layers, it can be the only element or layer between the two elements or layers, or there may also be one or more intervening elements or layers.

[0044] The terms used herein are used to describe the purpose of a particular embodiment, rather than to limit the present disclosure. As used herein, unless the context clearly indicates otherwise, the singular form "one" is intended to also include the plural form. It will be further understood that when used in this specification, the terms "include", "comprise", "have" and their variations indicate the existence of stated features, wholes, steps, operations, elements and / or parts, but do not exclude the existence or addition of one or more other features, wholes, steps, operations, elements, parts and / or their groups. As used herein, the term "and / or" includes any combination and all combinations of one or more related listed items. For example, the statement "A and / or B" means A, B or A and B. When a statement such as "at least one of ..." is after the list of elements, the list of the entire element is modified without modifying the individual elements of the list. For example, the statements "at least one of a, b and c" and "at least one of the group consisting of a, b and c" indicate only a, only b, only c, both a and b, both a and c, both b and c, all of a, b and c or their variations.

[0045] As used herein, the terms "substantially," "approximately," and similar terms are used as terms of approximation rather than as terms of degree, and are intended to account for the inherent deviations in measurements or calculations that one of ordinary skill in the art would recognize. In addition, when describing embodiments of the present disclosure, the use of "may" refers to "one or more embodiments of the present disclosure." As used herein, the term "using" and variations thereof may be considered synonymous with the term "utilizing" and variations thereof, respectively.

[0046] Unless otherwise defined, all terms (including technical and scientific terms) used in this article have the same meaning as those commonly understood by ordinary technicians in the field to which the present disclosure belongs. It will be further understood that terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant field and / or this specification, and unless explicitly defined as such in this article, should not be interpreted in an idealized or overly formal sense.

[0047] Figure 1 is a perspective view of a display device according to an embodiment of the present disclosure.

[0048] Reference Figure 1 , the display device DD may be in the shape of a rectangle having long sides (or long edges) extending in a first direction DR1 and short sides (or short edges) extending in a second direction DR2 intersecting or crossing the first direction DR1. However, the present disclosure is not limited thereto. For example, the display device DD may have various suitable shapes such as a circle or a polygon.

[0049] As used herein, a direction perpendicular or substantially perpendicular to a plane defined by the first direction DR1 and the second direction DR2 is defined as a third direction DR3. In addition, as used herein, the expressions "when viewed from above a plane" and "in a plan view" refer to a state viewed in the third direction DR3.

[0050] The upper surface of the display device DD may be defined as a display surface DAS. The display surface DAS may correspond to a plane defined by the first direction DR1 and the second direction DR2. The display device DD may provide an image IM to a user through the display surface DAS in a third direction DR3.

[0051] The display surface DAS may include an active area DSA and a non-active area NA around (e.g., adjacent to) the active area DSA. The active area DSA may display an image IM, and the non-active area NA may not display the image IM. The non-active area NA may surround the active area DSA (e.g., around the periphery of the active area DSA), and may define a border of the display device DD printed in a suitable color (e.g., a given or predetermined color).

[0052] The display device DD may be used for large electronic devices such as televisions, monitors, and outdoor billboards. In addition, the display device DD may be used for small and medium-sized electronic devices such as personal computers, notebook computers, personal digital terminals, car navigation units (e.g., navigation devices), game consoles, smart phones, and cameras. However, the present disclosure is not limited thereto, and the display device DD may be applied to any suitable electronic device.

[0053] Figure 2 is a cross-sectional view of a display device according to an embodiment of the present disclosure.

[0054] Reference Figure 2 , the display device DD may include a display layer DP, a sensor layer ISP, an anti-reflection layer RPL, a window WIN, a printing layer PIT, a panel protection film PPF, and first to third adhesive layers AL1 to AL3.

[0055] The display layer DP may be a flexible display panel. The display layer DP may be a light-emitting display panel, but the present disclosure is not limited thereto. For example, the display layer DP may be an organic light-emitting display panel, a quantum dot light-emitting display panel, a micro-LED display panel, or a nano-LED display panel. The light-emitting layer of the organic light-emitting display panel may include an organic light-emitting material. The light-emitting layer of the quantum dot light-emitting display panel may include quantum dots and / or quantum rods, etc. The light-emitting layer of the micro-LED display panel may include micro-LEDs. The light-emitting layer of the nano-LED display panel may include nano-LEDs.

[0056] The sensor layer ISP may be disposed on the display layer DP. The sensor layer ISP may include a plurality of sensors for sensing external inputs in a capacitive scheme. When manufacturing the display device DD, the sensor layer ISP may be directly manufactured on the display layer DP. However, the present disclosure is not limited thereto. For example, the sensor layer ISP may be manufactured as a separate panel independent of the display layer DP, and then may be attached to the display layer DP through an adhesive layer.

[0057] The anti-reflection layer RPL may be disposed on the sensor layer ISP. The anti-reflection layer RPL may be defined as a film for preventing or substantially preventing external light from being reflected. The anti-reflection layer RPL may reduce the reflectivity of external light incident from above the display device DD (e.g., in front of the display device DD) toward the display layer DP.

[0058] When external light traveling toward the display layer DP is reflected from the display layer DP like a mirror and then provided to the user, the user may visually perceive the external light. In order to reduce or prevent reflection, in an embodiment, the anti-reflection layer RPL may include a plurality of color filters for displaying the same color as the color of the pixels of the display layer DP.

[0059] The color filter may filter external light having the same color as the color of the pixel. In this case, the external light may not be visually perceived by the user. However, the present disclosure is not limited thereto. For example, the anti-reflection layer RPL may include a polarizing film including a retarder and / or a polarizer for reducing the reflectivity of the external light.

[0060] The window WIN may be disposed on the anti-reflection layer RPL. The window WIN may protect the display layer DP, the sensor layer ISP, and the anti-reflection layer RPL from external scratches and impacts.

[0061] The printing layer PIT may be disposed on the lower surface of the window WIN. The printing layer PIT may be disposed in the non-display area NDA. The printing layer PIT may be disposed closer to the outside than the boundary of the display area DA. The printing layer PIT may be printed in a desired color (e.g., a given or predetermined color) and may define the boundary of the display device DD.

[0062] The panel protection film PPF may be disposed under the display layer DP. The panel protection film PPF may protect a lower portion of the display layer DP. The panel protection film PPF may include a flexible plastic material such as polyethylene terephthalate (PET).

[0063] The first adhesive layer AL1 may be disposed between the display layer DP and the panel protection film PPF. The display layer DP and the panel protection film PPF may be connected or attached to (eg, closely coupled to) each other through the first adhesive layer AL1.

[0064] The second adhesive layer AL2 may be disposed between the anti-reflection layer RPL and the sensor layer ISP. The anti-reflection layer RPL and the sensor layer ISP may be connected or attached to (eg, tightly coupled to) each other through the second adhesive layer AL2.

[0065] The third adhesive layer AL3 may be disposed between the window WIN and the anti-reflection layer RPL. The window WIN and the anti-reflection layer RPL may be connected or attached to each other (eg, tightly coupled) through the third adhesive layer AL3. The printed layer PIT may be attached to the anti-reflection layer RPL through the third adhesive layer AL3.

[0066] Figure 3 is a cross-sectional view of a display layer according to an embodiment of the present disclosure.

[0067] Reference Figure 3 The display layer DP may include a substrate SUB, a circuit element layer DP-CL disposed on the substrate SUB, a display element layer DP-OLED disposed on the circuit element layer DP-CL, and a thin film encapsulation layer TFE disposed on the display element layer DP-OLED.

[0068] The substrate SUB may include a display area DA and a non-display area NDA around (eg, adjacent to) the display area DA. The substrate SUB may include a flexible plastic material such as polyimide (PI). The display element layer DP-OLED may be disposed in the display area DA.

[0069] A plurality of pixels may be arranged in the circuit element layer DP-CL and the display element layer DP-OLED. Each of the pixels may include a transistor arranged in the circuit element layer DP-CL and a light emitting element arranged in the display element layer DP-OLED and connected to the transistor. The construction of the pixel will be described in more detail below.

[0070] The thin film encapsulation layer TFE may be disposed on the circuit element layer DP-CL so as to cover the display element layer DP-OLED. The thin film encapsulation layer TFE may include an inorganic layer and an organic layer between the inorganic layers. The inorganic layer may protect the pixel from moisture / oxygen. The organic layer may protect the pixel from foreign matter such as dust particles.

[0071] Figure 4 is a plan view of a portion of a display device according to an embodiment of the present disclosure.

[0072] Reference Figure 4 , the display device DD may include a display layer DP, a circuit board PCB, a timing controller T-CON, and a sensor driving unit (eg, sensor driver) TIC.

[0073] The display layer DP may be a flexible display panel. The display layer DP may extend longer in the first direction DR1 than in the second direction DR2. For example, the display layer DP may be in the shape of a rectangle having a long side (or long edge) extending in the first direction DR1 and a short side (or short edge) extending in the second direction DR2.

[0074] The display layer DP may include a first area AA1, a second area AA2, and a bending area BA disposed therebetween. The bending area BA may extend in the second direction DR2 and may be arranged along the first direction DR1.

[0075] The first area AA1 may have long sides extending in the first direction DR1 and opposite to each other in the second direction DR2. The first area AA1 may include a display area DA and a non-display area NDA around the display area DA (e.g., adjacent to the display area DA). The non-display area NDA may surround the display area DA (e.g., around the periphery of the display area DA). The display area DA may be defined as a display area for displaying an image IM (e.g., referring to Figure 1 In a plan view, the display area DA may be aligned with the active area DSA (eg, Figure 1 The non-display area NDA may be defined as an area where the image IM is not displayed. In a plan view, the non-display area NDA may overlap with the non-active area NA.

[0076] The display layer DP may include a plurality of pixels PX, a plurality of scan lines SL1 to SLm, a plurality of data lines DL1 to DLn, a plurality of emission lines EL1 to ELm, a first control line CSL1 and a second control line CSL2, a first power line PL1, a second power line PL2, a connection line CNL, a plurality of first pads PD1, a scan driving unit (e.g., a scan driver) SDV, a data driving unit (e.g., a data driver) DDV, and an emission driving unit (e.g., an emission driver) EDV. Here, n and m may be natural numbers greater than 1.

[0077] The scan driving unit SDV and the emission driving unit EDV may be disposed in the non-display area NDA. For example, the scan driving unit SDV and the emission driving unit EDV may be disposed in the non-display area NDA so as to be adjacent to the long sides of the first area AA1, respectively. The data driving unit DDV may be disposed in the second area AA2. The data driving unit DDV may be manufactured in the form of an integrated circuit chip and may be mounted in the second area AA2.

[0078] The scan lines SL1 to SLm may extend in the second direction DR2 and may be connected to the scan driving unit SDV. The data lines DL1 to DLn may extend from the first area AA1 in the first direction DR1, may extend to the second area AA2 through the bending area BA, and may be connected to the data driving unit DDV. The emission lines EL1 to ELm may extend in the second direction DR2 and may be connected to the emission driving unit EDV.

[0079] The first power line PL1 may extend in the first direction DR1 and may be disposed in the non-display area NDA. The first power line PL1 may be disposed between the display area DA and the emission driving unit EDV. However, the present disclosure is not limited thereto. The first power line PL1 may be disposed between the display area DA and the scan driving unit SDV.

[0080] The first power line PL1 may extend to the second area AA2 through the bending area BA. In a plan view, the first power line PL1 may extend to a lower end of the second area AA2. The first power line PL1 may receive a first voltage.

[0081] The second power line PL2 may be disposed in the non-display area NDA. The second power line PL2 may be disposed closer to the outside than the scan driving unit SDV and the emission driving unit EDV.

[0082] The second power line PL2 may extend to the second area AA2 through the bending area BA. The second power line PL2 may extend in the first direction DR1 in the second area AA2. In a plan view, the second power line PL2 may extend toward a lower end of the second area AA2.

[0083] The second power line PL2 may receive a second voltage having a voltage level lower than that of the first voltage. Although not shown, the second power line PL2 may extend to the display area DA and may be connected to the pixel PX. The second voltage may be provided to the pixel PX through the second power line PL2.

[0084] The connection line CNL may extend in the second direction DR2 and may be arranged along the first direction DR1. The connection line CNL may be connected to the first power line PL1 and the pixel PX. The first voltage may be applied to the pixel PX through the first power line PL1 and the connection line CNL connected to each other.

[0085] The first control line CSL1 may be connected to the scan driving unit SDV and may extend to the lower end of the second area AA2 through the bending area BA. The second control line CSL2 may be connected to the emission driving unit EDV and may extend to the lower end of the second area AA2 through the bending area BA. The data driving unit DDV may be disposed between the first control line CSL1 and the second control line CSL2.

[0086] The first pad area PDA1, the second pad area PDA2, and the third pad area PDA3 may be defined in a portion of the second area AA2 adjacent to the lower end of the second area AA2. Each of the first pad area PDA1, the second pad area PDA2, and the third pad area PDA3 may extend in the second direction DR2, and the first pad area PDA1, the second pad area PDA2, and the third pad area PDA3 may be arranged along the second direction DR2. The first pad area PDA1 may be disposed between the second pad area PDA2 and the third pad area PDA3.

[0087] The first pad PD1 may be disposed in the first pad area PDA1. The data driving unit DDV, the first power line PL1, the second power line PL2, the first control line CSL1, and the second control line CSL2 may be connected to the first pad PD1.

[0088] The data lines DL1 to DLn may be connected to corresponding pads among the first pads PD1 through the data driving unit DDV. For example, the data lines DL1 to DLn may be connected to the data driving unit DDV, and the data driving unit DDV may be connected to the first pads PD1 among the first pads PD1 respectively corresponding to the data lines DL1 to DLn.

[0089] The circuit board PCB may be connected to the display layer DP. The timing controller T-CON and the sensor driving unit TIC may be disposed on the circuit board PCB. For example, each of the timing controller T-CON and the sensor driving unit TIC may be manufactured in the form of an integrated circuit chip and may be mounted on the circuit board PCB.

[0090] The first connection pad area CPA1, the second connection pad area CPA2, and the third connection pad area CPA3 may be defined in a portion of the circuit board PCB adjacent to one side of the circuit board PCB. Each of the first connection pad area CPA1, the second connection pad area CPA2, and the third connection pad area CPA3 may extend in the second direction DR2, and the first connection pad area CPA1, the second connection pad area CPA2, and the third connection pad area CPA3 may be arranged along the second direction DR2. The first connection pad area CPA1 may be disposed between the second connection pad area CPA2 and the third connection pad area CPA3.

[0091] The first connection pad PCB-PD1 may be disposed in the first connection pad area CPA1, the second connection pad PCB-PD2 may be disposed in the second connection pad area CPA2, and the third connection pad PCB-PD3 may be disposed in the third connection pad area CPA3. The first pad PD1 may be connected to the first connection pad PCB-PD1. The first connection pad PCB-PD1 may be connected to the timing controller T-CON. The second connection pad PCB-PD2 and the third connection pad PCB-PD3 may be connected to the sensor driving unit TIC.

[0092] The timing controller T-CON may control operations of the scan driving unit SDV, the data driving unit DDV, and the emission driving unit EDV. The timing controller T-CON may generate a scan control signal, a data control signal, and an emission control signal in response to a control signal from the outside.

[0093] The scan control signal may be provided to the scan driving unit SDV through the first control line CSL1. The emission control signal may be provided to the emission driving unit EDV through the second control line CSL2. The data control signal may be provided to the data driving unit DDV. The timing controller T-CON may receive an image signal from the outside, may convert the data format of the image signal so as to be suitable for the specification of the interface with the data driving unit DDV, and may provide the converted image signal to the data driving unit DDV.

[0094] The scan driving unit SDV may generate a plurality of scan signals in response to the scan control signal. The scan signals may be applied to the pixels PX through the scan lines SL1 to SLm. The scan signals may be sequentially applied to the scan lines SL1 to SLm.

[0095] The data driving unit DDV may generate a plurality of data voltages corresponding to the image data in response to the data control signal. The data voltages may be applied to the pixels PX through the data lines DL1 to DLn. The emission driving unit EDV may generate a plurality of emission signals in response to the emission control signal. The emission signals may be applied to the pixels PX through the emission lines EL1 to ELm.

[0096] The pixel PX may be supplied with a data voltage in response to the scan signal. The pixel PX may display an image IM (eg, referring to FIG. 1 ) by emitting light having a brightness value corresponding to the data voltage in response to the emission signal. Figure 1 ). The emission time of the pixel PX can be controlled by the emission signal.

[0097] Figure 5 According to an embodiment of the present disclosure, Figure 4 A cross-sectional view of the display layer taken along line II'.

[0098] Reference Figure 4 and Figure 5 , the transistor TR and the light emitting element OLED may be defined as a pixel among the pixels PX. The light emitting element OLED may include a first electrode AE, a second electrode CE, a hole control layer HCL, an electron control layer ECL, and a light emitting layer EML. The first electrode AE ​​may be an anode electrode, and the second electrode CE may be a cathode electrode.

[0099] The transistor TR and the light emitting element OLED may be disposed on the substrate SUB. In the embodiment, one transistor TR is illustrated. However, in practice, the pixel PX may include a plurality of transistors for driving the light emitting element OLED and at least one capacitor.

[0100] The display area DA may include a light emitting area PA corresponding to each of the pixels PX and a non-light emitting area NPA around (eg, adjacent to) the light emitting area PA. The light emitting element OLED may be disposed in the light emitting area PA.

[0101] The buffer layer BFL may be disposed on the substrate SUB. The buffer layer BFL may be an inorganic layer. The semiconductor pattern may be disposed on the buffer layer BFL. The semiconductor pattern may include polycrystalline silicon. However, the present disclosure is not limited thereto. For example, the semiconductor pattern may include amorphous silicon or metal oxide.

[0102] The semiconductor pattern may be doped with an N-type dopant or a P-type dopant. The semiconductor pattern may include a highly doped region and a lightly doped region. The conductivity of the highly doped region may be greater than the conductivity of the lightly doped region. The highly doped region may operate or substantially operate as a source or drain of the transistor TR. The lightly doped region may correspond or substantially correspond to an active region (e.g., a channel) of the transistor TR.

[0103] The source S, active area A, and drain D of the transistor TR may be formed of a semiconductor pattern. A first insulating layer INS1 may be disposed on the semiconductor pattern. A gate G of the transistor TR may be disposed on the first insulating layer INS1. A second insulating layer INS2 may be disposed on the gate G. A third insulating layer INS3 may be disposed on the second insulating layer INS2.

[0104] The connection electrode CNE may be disposed between the transistor TR and the light emitting element OLED, and may connect the transistor TR and the light emitting element OLED to each other. The connection electrode CNE may include a first connection electrode CNE1 and a second connection electrode CNE2.

[0105] The first connection electrode CNE1 may be disposed on the third insulating layer INS3 and may be connected to the drain D through a first contact hole CH1 defined in (e.g., penetrating) the first to third insulating layers INS1 to INS3. The fourth insulating layer INS4 may be disposed on the first connection electrode CNE1. The fifth insulating layer INS5 may be disposed on the fourth insulating layer INS4.

[0106] The second connection electrode CNE2 may be disposed on the fifth insulating layer INS5 and may be connected to the first connection electrode CNE1 through a second contact hole CH2 defined in (eg, penetrating) the fourth and fifth insulating layers INS4 and INS5.

[0107] The sixth insulating layer INS6 may be disposed on the second connection electrode CNE2. Layers from the buffer layer BFL to the sixth insulating layer INS6 may be defined as a circuit element layer DP-CL. The first to sixth insulating layers INS1 to INS6 may be inorganic layers or organic layers.

[0108] The first electrode AE ​​may be disposed on the sixth insulating layer INS6. The first electrode AE ​​may be connected to the second connection electrode CNE2 through a third contact hole CH3 defined in the sixth insulating layer INS6 (e.g., penetrating the sixth insulating layer INS6). A pixel defining layer PDL exposing a portion of the first electrode AE ​​may be disposed on the first electrode AE ​​and the sixth insulating layer INS6. An opening PX_OP for exposing the portion of the first electrode AE ​​may be defined in the pixel defining layer PDL.

[0109] The hole control layer HCL may be disposed on the first electrode AE ​​and the pixel defining layer PDL. The hole control layer HCL may be commonly disposed in the emission area PA and the non-emission area NPA. The hole control layer HCL may include a hole transport layer and a hole injection layer.

[0110] The light emitting layer EML may be disposed on the hole control layer HCL. The light emitting layer EML may be disposed in a region corresponding to the opening PX_OP. The light emitting layer EML may include an organic material and / or an inorganic material. The light emitting layer EML may generate light having one of red, green, and / or blue colors.

[0111] The electron control layer ECL may be disposed on the light emitting layer EML and the hole control layer HCL. The electron control layer ECL may be commonly disposed in the light emitting area PA and the non-light emitting area NPA. The electron control layer ECL may include an electron transport layer and an electron injection layer.

[0112] The second electrode CE may be disposed on the electronic control layer ECL. The second electrode CE may be commonly disposed in the pixel PX. The layer in which the light emitting element OLED is disposed may be defined as a display element layer DP-OLED.

[0113] The thin film encapsulation layer TFE may be disposed on the second electrode CE so as to cover the pixel PX. The thin film encapsulation layer TFE may include a first encapsulation layer EN1 disposed on the second electrode CE, a second encapsulation layer EN2 disposed on the first encapsulation layer EN1, and a third encapsulation layer EN3 disposed on the second encapsulation layer EN2.

[0114] The first encapsulation layer EN1 and the third encapsulation layer EN3 may be inorganic layers, and the second encapsulation layer EN2 may be an organic layer. Each of the first encapsulation layer EN1 and the third encapsulation layer EN3 may protect the pixel PX from moisture / oxygen. The second encapsulation layer EN2 may protect the pixel PX from foreign matter such as dust particles.

[0115] A first voltage may be applied to the first electrode AE ​​through the transistor TR, and a second voltage may be applied to the second electrode CE. When holes and electrons injected into the light emitting layer EML are bound, excitons may be formed. When the excitons transition to the ground state, the light emitting element OLED may emit light.

[0116] Figure 6 is a plan view of a sensor layer according to an embodiment of the present disclosure.

[0117] Reference Figure 6 , the sensor layer ISP may include a plurality of sensing electrodes SE, a plurality of lines SNL1 and SNL2 , a plurality of multiplexer circuits MX, and a plurality of second pads PD2 and a plurality of third pads PD3 .

[0118] Like the display layer DP, the planar area of ​​the sensor layer ISP may include a first area AA1, a second area AA2, and a bending area BA.

[0119] The first area AA1 may include an active area AA and a non-active area NAA around (eg, adjacent to) the active area AA. The non-active area NAA may surround (eg, around the periphery of) the active area AA.

[0120] When viewed from above a plane (eg, in a plan view), the active area AA may be aligned with the display area DA (eg, referring to Figure 4 ) overlaps, and the non-active area NAA may overlap with the non-display area NDA.

[0121] The second area AA2 and the bending area BA may be defined as a non-active area NAA.

[0122] A plurality of sensing electrodes SE may be disposed in the active area AA.

[0123] A plurality of second pads PD2 and a plurality of third pads PD3 may be disposed in the second area AA2 .

[0124] The plurality of lines SNL1 and SNL2 may include a plurality of sensing lines SNL1 and a plurality of connection lines SNL2 .

[0125] The plurality of sensing lines SNL1 may be connected to the plurality of sensing electrodes SE and may extend to the second area AA2 through the bending area BA. For example, when viewed from above a plane (e.g., in a plan view), the plurality of sensing lines SNL1 may be respectively connected to the right sides of the plurality of sensing electrodes SE and may extend in the first direction DR1. The plurality of sensing lines SNL1 may extend to the non-active area NAA.

[0126] The plurality of connection lines SNL2 may be disposed in the second area AA2. The plurality of connection lines SNL2 may be connected between the plurality of multiplexer circuits MX and the sensor driving unit TIC (eg, referring to Figure 4 ). The number of connection lines SNL2 may be less than the number of sensing lines SNL1. The plurality of connection lines SNL2 may be electrically connected to the plurality of second pads PD2 and the plurality of third pads PD3.

[0127] The plurality of sensing lines SNL1 and the plurality of connection lines SNL2 may be electrically connected to each other through a plurality of multiplexer circuits MX.

[0128] The plurality of second pads PD2 and the plurality of third pads PD3 may be connected to the second connection pad PCB-PD2 and the third connection pad PCB-PD3, respectively (eg, referring to Figure 4 ). The sensor driving unit TIC may control the operation of the sensor layer ISP through the plurality of second pads PD2 and the plurality of third pads PD3.

[0129] The plurality of sensing electrodes SE may have unique coordinate information. The plurality of sensing electrodes SE may be arranged along the first direction DR1 and the second direction DR2. For example, the plurality of sensing electrodes SE may be arranged in a matrix shape. However, the present disclosure is not limited thereto, and the arrangement of the plurality of sensing electrodes SE is not limited thereto.

[0130] The plurality of sensing electrodes SE may be connected to the plurality of sensing lines SNL1 , respectively.

[0131] Each of the plurality of sensing electrodes SE may operate in a self-capacitance scheme. Figure 4 ) can allow each of the plurality of sensing electrodes SE to operate as a driving electrode and a sensing electrode. Through the plurality of lines SNL1 and SNL2, the sensor driving unit TIC can apply a driving signal to each of the plurality of sensing electrodes SE, and can receive a sensing signal from each of the plurality of sensing electrodes SE. This will be described in more detail below.

[0132] The plurality of multiplexer circuits MX may be disposed in the second area AA2. The plurality of multiplexer circuits MX may be disposed between the plurality of sensing lines SNL1 and the plurality of connection lines SNL2. The plurality of multiplexer circuits MX may be adjacent to the bending area BA.

[0133] Figure 7 is a circuit diagram illustrating a multiplexer circuit according to an embodiment of the present disclosure.

[0134] Reference Figure 7 , the multiplexer circuit MX may include a plurality of control transistors CT.

[0135] Each of the plurality of control transistors CT may include a gate electrode GE, a first electrode, and a second electrode. Each of the plurality of control transistors CT may be a PMOS transistor. However, the present disclosure is not limited thereto, and the types of the plurality of control transistors CT are not limited thereto. For example, each of the plurality of control transistors CT may be an NMOS transistor.

[0136] A plurality of control transistors CT may be connected to a plurality of sensing lines SNL1 and a plurality of connection lines SNL2. A first electrode of each of the plurality of control transistors CT may be connected to a corresponding one of the plurality of sensing lines SNL1. A second electrode of each of the plurality of control transistors CT may be connected to any one of the plurality of connection lines SNL2.

[0137] Some of the plurality of control transistors CT may be commonly connected to one of the plurality of connection lines SNL2 , and the other remaining control transistors CT may be commonly connected to another of the plurality of connection lines SNL2 .

[0138] The control signal CS may be provided to the gate electrode GE of each of the plurality of control transistors CT. Each of the plurality of control transistors CT may be turned on by the control signal CS. The plurality of control transistors CT may be turned on sequentially by the control signal CS.

[0139] The control signal CS may have a sinusoidal wave. For example, the control signal CS may have a sinusoidal wave.

[0140] Through the plurality of lines SNL1 and SNL2 connected to each other by the plurality of multiplexer circuits MX, a driving signal may be applied to each of the plurality of sensing electrodes SE, and a sensing signal may be transmitted from each of the plurality of sensing electrodes SE to the sensor driving unit TIC.

[0141] Figure 8 is a flowchart illustrating a driving method of a display device according to an embodiment of the present disclosure. Fig. 9 is a block diagram illustrating a sensor layer and a sensor driving unit (eg, a sensor driver) according to an embodiment of the present disclosure.

[0142] Reference Figure 8 and Fig. 9 , the sensor driving unit TIC may include a driving signal output unit (eg, a driving signal output circuit) DU, a sensing signal receiving unit (eg, a sensing signal receiving circuit) SU, and a sensing circuit SSC.

[0143] The sensor driving unit TIC may provide a driving signal DS to each of the plurality of sensing electrodes SE. Specifically, the driving signal output unit DU may provide a driving signal DS to each of the plurality of sensing electrodes SE (step S100). The driving signal DS may be provided to each of the plurality of sensing electrodes SE through the connection line SNL2 and the sensing line SNL1.

[0144] The drive signal DS may have a sinusoidal wave. For example, the drive signal DS may be in the shape of a sinusoidal wave having one frequency.

[0145] In a comparative example in which the drive signal DS is in the shape of a square wave, the square wave may be formed by a plurality of frequencies. In this case, noise may occur due to harmonics of each of the plurality of frequencies. However, according to one or more embodiments of the present disclosure, the drive signal DS may be in the shape of a sine wave having one frequency. Noise due to harmonics may be prevented or removed. In this way, electromagnetic interference (EMI) due to noise may be prevented or substantially prevented from being generated, or electromagnetic interference (EMI) due to noise may be removed. Accordingly, a display device DD (for example, referring to FIG. 1 ) having improved reliability may be provided. Figure 1 ).

[0146] The multiplexer circuit MX may receive a sensing signal SS from each of the plurality of sensing electrodes SE (step S200 ). The sensing signal SS may be provided to the control transistor CT of the multiplexer circuit MX through the sensing line SNL1 .

[0147] The sensing signal SS may have a sinusoidal wave. Since the driving signal DS is provided in the shape of a sinusoidal wave, the sensing signal SS may also be in the shape of a sinusoidal wave. For example, the sensing signal SS may be in the shape of a sinusoidal wave swinging between -5V and +5V.

[0148] The sensor driving unit TIC may receive a sensing signal SS from the multiplexer circuit MX. Specifically, the sensing signal receiving unit SU may receive the sensing signal SS from the multiplexer circuit MX (step S300). The sensor driving unit TIC may sense an external input based on the sensing signal SS. Specifically, the sensing signal receiving unit SU may calculate the coordinates of the external input based on the sensing signal SS. The sensing of the external input may include driving a plurality of sensing electrodes SE independently of each other in a self-capacitance scheme by the sensor driving unit TIC.

[0149] The sensing circuit SSC may be connected between the connection line SNL2 and the gate electrode GE. The sensing circuit SSC may include an operational amplifier OP and a current source CRS.

[0150] The operational amplifier OP may include a first input node N1 and a second input node N2 .

[0151] The first input node N1 may receive a reference control signal RCS. The reference control signal RCS may be received from a digital-to-analog converter DAC. The reference control signal RCS may have a constant voltage. For example, the reference control signal RCS may have a voltage level of -8V or -12V. The first input node N1 may be referred to as a "positive input node".

[0152] The second input node N2 may be connected to a current source CRS electrically connected to a connection line SNL2. The second input node N2 may be referred to as a "negative input node".

[0153] The resistor R may be connected between the second input node N2 and the output node of the operational amplifier OP.

[0154] The current source CRS may adjust the amount of current provided to the second input node N2 in response to the sensing signal SS.

[0155] The sensing circuit SSC may sense the sensing signal SS and may generate a control signal CS based on the sensing signal SS (step S400 ). A voltage level of the control signal CS may be changed depending on the voltage level of the sensing signal SS.

[0156] The sensing circuit SSC may output a control signal CS to the gate electrode GE based on the sensing signal SS of the connection line SNL2. The control signal CS may be in the shape of a sinusoidal wave. For example, the control signal CS may be in the shape of a sinusoidal wave.

[0157] The voltage level (Vgs) between the gate electrode GE and the source electrode SSE of the control transistor CT may be uniform or substantially uniform. In other words, the output of the control signal CS to the gate electrode of the control transistor CT may include maintaining the voltage level between the gate electrode GE and the source electrode SSE of the control transistor CT.

[0158] The sensing circuit SSC may output a control signal CS to the multiplexer circuit MX (step S500). The voltage level of the control signal CS may be a negative level. The control signal CS may turn on or off the control transistor CT which is a PMOS transistor.

[0159] In a comparative example in which the sensing circuit SSC is not provided, a reference control signal RCS having a constant voltage may be provided to the gate electrode GE of the control transistor CT. Because the sensing signal SS is in the shape of a sine wave and the gate electrode GE is biased at a constant voltage, the voltage (Vgs) between the gate electrode GE and the source electrode SSE may be variable. In this case, the on-resistance of the control transistor CT may be variable. In this way, a sensing signal having an interfered sine wave may be output through the connecting line SNL2. The sensing signal having an interfered sine wave may cause harmonic-based noise. However, according to one or more embodiments of the present disclosure, the sensing circuit SSC may sense the sensing signal SS, and may convert the reference control signal RCS into a control signal CS in the shape of a sine wave. In this way, the voltage level (Vgs) between the gate electrode GE and the source electrode SSE of the control transistor CT may be uniform or substantially uniform. Distortion of the sensing signal SS may be prevented or removed. Accordingly, a display device DD (e.g., a reference display device DD having improved reliability) may be provided. Figure 1 ).

[0160] According to one or more embodiments of the present disclosure described above, the sensing circuit can sense the sensing signal, and can convert the reference control signal into a control signal in the shape of a sine wave. Both the control signal and the sensing signal can be in the shape of a sinusoidal wave. In this case, the voltage level (Vgs) between the gate electrode and the source electrode of the control transistor can be uniform or substantially uniform. The distortion of the sensing signal received by the sensing signal receiving unit can be prevented or removed. Accordingly, a display device with improved sensing reliability can be provided.

[0161] The electronic or electrical devices and / or any other related devices or components according to the embodiments of the present disclosure described herein may be implemented using any suitable hardware, firmware (e.g., application specific integrated circuits), software, or a combination of software, firmware, and hardware. For example, the various components of these devices may be formed on an integrated circuit (IC) chip or on a separate IC chip. In addition, the various components of these devices may be implemented on a flexible printed circuit film, a tape carrier package (TCP), a printed circuit board (PCB), or formed on a substrate. In addition, the various components of these devices may be processes or threads that run on one or more processors in one or more computing devices, execute computer program instructions, and interact with other system components to perform the various functions described herein. Computer program instructions may be stored in a memory implemented in a computing device using a standard memory device (such as a random access memory (RAM) as an example). Computer program instructions may also be stored in other non-temporary computer-readable media such as a CD-ROM or a flash drive as an example. In addition, it should be appreciated by those skilled in the art that the functions of various computing devices may be combined or integrated into a single computing device, or the functions of a particular computing device may be distributed across one or more other computing devices without departing from the spirit and scope of the exemplary embodiments of the present disclosure.

[0162] The foregoing is an explanation of some embodiments of the present disclosure and should not be interpreted as limiting it. Although some embodiments have been described, it will be readily understood by those skilled in the art that various modifications are possible in the embodiments without departing from the spirit and scope of the present disclosure. It will be understood that, unless otherwise described, the description of the features or aspects within each embodiment should generally be considered to be applicable to other similar features or aspects in other embodiments. Therefore, as will be apparent to those of ordinary skill in the art, unless otherwise specifically indicated, the features, characteristics and / or elements described in conjunction with a particular embodiment may be used alone or in combination with the features, characteristics and / or elements described in conjunction with other embodiments. Therefore, it should be understood that the foregoing is an explanation of various example embodiments and should not be interpreted as being limited to the specific embodiments disclosed herein, and various modifications to the disclosed embodiments and other example embodiments are intended to be included within the spirit and scope of the present disclosure as defined by the claims and their equivalents.

Claims

1. A display device, comprising: Display layer; a sensor layer on the display layer; as well as a sensor driver configured to drive the sensor layer, The sensor layer includes: a plurality of sensing electrodes; a plurality of sensing lines respectively connected to the plurality of sensing electrodes; a multiplexer circuit connected to the plurality of sensing lines and including a control transistor including a gate electrode; and a connecting line connected between the multiplexer circuit and the sensor driver, and The sensor driver includes a sensing circuit connected between the connection line and the gate electrode of the control transistor and configured to output a control signal to the gate electrode of the control transistor based on a sensing signal of the connection line.

2. The display device according to claim 1, wherein: The sensor driver is configured to output a driving signal to each of the plurality of sensing electrodes, and Wherein, the driving signal has a sinusoidal waveform.

3. The display device according to claim 2, wherein: The sensing signal has the sinusoidal waveform.

4. The display device according to claim 2, wherein: The control signal has the sinusoidal waveform.

5. The display device according to claim 2, wherein: A voltage level of the control signal varies depending on a voltage level of the sensing signal.

6. A method of driving a display device, the display device comprising a display layer, a sensor layer on the display layer and comprising a plurality of sensing electrodes and a multiplexer circuit, and a sensor driver, the method comprising: providing, by the sensor driver, a drive signal to each of the plurality of sensing electrodes; receiving, by the multiplexer circuit, a sensing signal from each of the plurality of sensing electrodes; receiving, by the sensor driver, the sense signal from the multiplexer circuit; sensing the sensing signal by a sensing circuit of the sensor driver, and generating a control signal by the sensing circuit based on the sensing signal; as well as The control signal is output by the sensing circuit to the multiplexer circuit.

7. The method according to claim 6, wherein: The multiplexer circuit includes a control transistor including a gate electrode, and The outputting of the control signal includes the sensing circuit outputting the control signal to the gate electrode of the control transistor.

8. The method according to claim 6, wherein: The providing of the drive signal includes providing, by the sensor driver, the drive signal having a waveform of a sinusoidal wave.

9. The method according to claim 6, wherein: The outputting of the control signal includes outputting, by the sensing circuit, the control signal having a waveform of a sinusoidal wave.

10. The method according to any one of claims 6 to 9, further comprising: An external input is sensed by the sensor driver based on the sensing signal.

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