Precise voltage measuring device for spinning electron memristor

Abstract

The invention provides a precise voltage measuring device for a spinning electron memristor. The device structurally comprises a PC (Personal Computer), a power supply circuit, a serial port communication unit, an FPGA (Field Programmable Gate Array) chip, a spinning electron memristor, a signal amplification circuit and an analog-to-digital conversion unit circuit. The spinning electron memristor passes through the signal amplification circuit and then is collected into the FPGA chip through the analog-to-digital conversion unit, and is transmitted to the PC through serial port communication, so that the precise voltage measurement function of the spinning electron memristor is realized, and a final result is stored in the PC. Weak signals output by the rotary electronic memristor unit are amplified through the signal amplification circuit, and accurate capture and analysis of weak voltage signals are achieved.

Description

Technical Field

[0001] The invention relates to a voltage measuring device, in particular to a precise voltage measuring device for a spin electronic memristor. Background Art

[0002] In today's rapidly developing information technology field, spintronic memristors, as an emerging non-volatile storage and computing element, are gradually showing their great potential in building efficient, low-power neural networks. This type of device can not only realize the integration of storage and computing functions in a single component, but also has a high degree of integration and stability, which is of great significance for promoting the innovation of cutting-edge technologies such as artificial intelligence and edge computing. However, although spintronic memristors have shown many advantages in neural network applications, the precise measurement of their electrical properties has become a technical problem that needs to be solved urgently.

[0003] Specifically, the voltage changes generated by spintronic memristors during operation are often in the microvolt (μV) or even smaller range. Such tiny signals are easily affected by environmental noise, internal interference in the circuit, and the accuracy limitations of the measurement equipment itself, which greatly reduces the accuracy and reliability of the voltage measurement results. This measurement challenge directly limits the performance of spintronic memristors in complex neural networks and affects the stability and efficiency of the entire system. Summary of the invention

[0004] The purpose of the present invention is to provide a precision voltage measurement device for a spin electronic memristor to solve the problem of inaccurate measurement of a tiny voltage signal generated by the spin electronic memristor due to the Hall effect.

[0005] The present invention is achieved in that:

[0006] A precision voltage measurement device for a spintronic memristor, comprising:

[0007] The PC is connected to the power supply circuit, and is used to receive data from the serial communication unit, save the data, and send instructions to the FPGA chip through the serial communication unit;

[0008] The serial port communication unit is connected to the power supply circuit and the FPGA chip respectively, and is used to bridge the IO port of the PC and the FPGA chip, and convert the level to meet the communication needs;

[0009] The FPGA chip is respectively connected to the serial communication unit, the power supply circuit and the analog-to-digital conversion unit, and is used to measure the voltage through the analog-to-digital conversion unit under the control instruction of the PC;

[0010] The analog-to-digital conversion unit is connected to the power supply circuit, the FPGA chip and the signal amplifier respectively, and is used to perform analog-to-digital conversion on the amplified signal, convert the analog quantity into a digital quantity and send it to the FPGA chip for reading;

[0011] The signal amplification circuit is connected to the power supply circuit, the spin electronic memristor chip and the analog-to-digital conversion unit respectively, and is used to condition and amplify the tiny voltage signal output by the spin electronic memristor chip, and output the amplified signal to the analog-to-digital conversion unit;

[0012] The spin electronic memristor is connected to the signal amplification circuit, and after detecting the change of the external magnetic field, it is used to output a voltage signal to the signal amplification circuit through the Hall effect; and

[0013] The power supply circuit is respectively connected to the host computer, FPGA chip, serial communication unit, analog-to-digital conversion unit and signal amplification circuit, and is used to provide working voltage for each circuit and provide an interface for the connection between the host computer and the serial communication unit.

[0014] The present invention provides a precision voltage measurement device for a spin electronic memristor, which is essentially a circuit system, and the circuit system structure includes a PC, a power supply circuit, a serial communication unit, an FPGA chip, an analog-to-digital conversion unit, a signal amplification circuit and a spin electronic memristor. The FPGA chip interface of the present invention is connected to the PC, and the FPGA chip is read and controlled by the PC, so that the precise measurement of the spin electronic memristor chip can be achieved. The interface of the FPGA chip is also connected to the output of the analog-to-digital converter, and the analog-to-digital converter input is connected to the signal amplification circuit. Finally, the voltage result collected by the FPGA chip through the analog-to-digital converter is sent to the PC through the serial communication unit. The tiny Hall voltage generated by the spin electronic memristor is collected into the FPGA chip through the analog-to-digital conversion unit after passing through the signal amplification circuit, and transmitted to the PC through the serial communication, so as to realize the precision voltage measurement function of the spin electronic memristor, and the final result is stored in the PC.

[0015] Furthermore, the power supply circuit comprises:

[0016] The switching power supply circuit is respectively connected with the 3.3V circuit, the 2.5V circuit and the 1.2V circuit to provide a 5V operating voltage;

[0017] A 3.3V power supply circuit is connected to the switching power supply circuit to provide a 3.3V operating voltage;

[0018] A 2.5V power supply circuit connected to the switching power supply circuit to provide a 2.5V operating voltage; and

[0019] The 1.2V power supply circuit is connected to the switching power supply circuit to provide a 1.2V operating voltage.

[0020] Furthermore, the structure of the serial communication unit is that pin 1 of the USB to serial port chip U1 is grounded, and pins 5, 6 and 16 are connected to the switching power supply circuit; capacitor C1 is connected between pins 1 and 16, and a test point terminal P1 is led out at the node where capacitor C1 and pin 16 are connected; pins 2 and 3 of the USB to serial port chip U1 are connected to the FPGA chip; and pin 4 is pulled down to GND through capacitor C2.

[0021] Furthermore, the model of the FPGA chip is EP4CE6E22C8N.

[0022] Furthermore, the structure of the analog-to-digital conversion unit is that pins 1 to 14 of the analog-to-digital converter U7 are connected to the FPGA chip, pins 15 and 26 of the analog-to-digital converter U7 are connected to a 5V power supply, and the inputs of pins 16, 17, 25 and 27 are divided into four paths, one of which is connected to GND; the second path is connected to pin 28 through capacitor C39, and capacitor C38 is connected in parallel at both ends of capacitor C39; the third path is connected to a 5V voltage through capacitor C37, and capacitor C36 is connected in parallel at both ends of capacitor C37; the fourth path is connected to pin 28 through capacitor C39, and capacitor C38 is connected in parallel at both ends of capacitor C39; the fifth path is connected to pin 28 through capacitor C37, and capacitor C36 is connected in parallel at both ends of capacitor C37; the fifth path is connected to pin 28 through capacitor C39, and the fifth path is connected to pin 28 through capacitor C39. The first path is connected to pin 18 through capacitor C40, the second path is connected to pin 24 through capacitor C41 and R14, capacitor C41 and capacitor C40 are connected in parallel; pin 22 is connected to GND through resistor R16, and pin 23 is connected to the signal amplifier circuit through resistor R15; pin 21 is connected to GND through capacitor C44, and pin 20 is connected to two input paths, one is connected to GND through capacitor C43, and the other is connected to GND through capacitor C42 and capacitor C44, and capacitor C45 is connected in parallel at both ends of capacitor C42.

[0023] The model of analog-to-digital converter U7 is AD9226.

[0024] Furthermore, the structure of the signal amplification circuit is that the 3rd pin of the dual-channel operational amplifier chip U5 is connected to two inputs, one of which is connected to the PGAU1 end of the spin electronic memristor, and the other is connected to GND through the capacitor C24; the 2nd pin of the dual-channel operational amplifier chip U5 is connected to two inputs, one of which is connected to the 6th pin of the dual-channel operational amplifier chip U5 through the resistor R4, and the other is connected to the 1st pin of the dual-channel operational amplifier chip U5 through the resistor R5, and the 1st pin of the dual-channel operational amplifier chip U5 is connected to the 3rd pin of the dual-channel operational amplifier chip U6; the 5th pin of the dual-channel operational amplifier chip U5 is divided into two inputs, one of which is connected to the PGAD1 end of the spin electronic memristor, and the other is connected to GND through the capacitor C28; the 4th pin is connected to the -5V power supply, and the 8th pin is connected to the 5V power supply; the 6th pin is connected to the 7th pin through the resistor R6. The 7th pin is connected to the 2nd pin of the dual-channel operational amplifier chip U6 through the resistor R8, and the 2nd pin of the dual-channel operational amplifier chip U6 is connected to the 1st pin of the dual-channel operational amplifier chip U6 through the resistor R9; the 1st pin of the dual-channel operational amplifier chip U6 is connected to the 6th pin of the dual-channel operational amplifier chip U6 through the resistor R10, and the 6th pin of the dual-channel operational amplifier chip U6 is connected to the 7th pin of the dual-channel operational amplifier chip U6 through the resistor R13, and the 7th pin of the dual-channel operational amplifier chip U6 is connected to the analog-to-digital conversion unit; the 5th pin of the dual-channel operational amplifier chip U6 is connected to two inputs, one of which is connected to the 2V power supply through the resistor R11, and the other is connected to GND through the resistor R12, and the 2V power supply is grounded through the capacitor C35; the 4th pin of the dual-channel operational amplifier chip U6 is connected to the -5V power supply, and the 8th pin of the dual-channel operational amplifier chip U6 is connected to the 5V power supply.

[0025] The models of the dual-channel operational amplifier chip U5 and the dual-channel operational amplifier chip U6 are both LT1807IS8#PBF chips.

[0026] Furthermore, the spintronic memristor comprises a Hallbar spintronic memristor, and the memristor material is a traditional CoFeB structure.

[0027] The present invention proposes a precision voltage measurement device for a spintronic memristor, and mainly focuses on the design and implementation of a precision Hall voltage acquisition circuit for a spintronic memristor. By optimizing the measurement circuit, the measurement performance can be significantly improved, and its application in a wider range of fields can be promoted. Combining the excellent characteristics of the spintronic memristor with the flexibility of the FPGA chip, the present invention not only provides a theoretical basis for the further development of related technologies, but also provides an effective solution to the technical bottlenecks faced in practical applications.

[0028] The present invention aims to overcome the measurement difficulties in the prior art. The present invention adopts advanced differential circuit design, effectively suppresses common mode noise through differential amplification technology, greatly improves the signal-to-noise ratio of signal acquisition, and can ensure high-precision measurement even in a small signal environment of micro-V level. The first-level differential amplification is performed by the dual-channel operational amplifier chip U5, and then the differential is converted to single-ended by the dual-channel operational amplifier chip U6, and then the second-level signal amplification is performed to achieve accurate capture and analysis of weak voltage signals. In addition, the system integrates a high-performance field programmable gate array (FPGA chip) as the main control unit, which not only enhances the data processing capability, but also provides an efficient communication interface with the PC, so that users can easily read and control the measurement system remotely through the PC, further improving the flexibility and ease of use of the system.

[0029] Therefore, the present invention not only solves the key technical bottleneck of voltage measurement of spintronic memristors in neural network applications, but also lays a solid foundation for the subsequent research and development and application of advanced electronic systems based on such devices, and is expected to play an important role in promoting the continuous progress and development of the field of information technology. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is the overall structure diagram of the circuit of the present invention.

[0031] Figure 2 It is a structural diagram of the power switch circuit.

[0032] Figure 3 (a) is a circuit structure diagram of a 3.3V power supply circuit, (b) is a circuit structure diagram of a 2.5V power supply circuit, and (c) is a circuit structure diagram of a 2.5V power supply circuit.

[0033] Figure 4 It is a circuit structure diagram of the serial communication unit in the present invention.

[0034] Figure 5 It is a circuit structure diagram of the FPGA chip in the present invention.

[0035] Figure 6 It is a circuit structure diagram of the analog-to-digital conversion unit in the present invention.

[0036] Figure 7 It is a circuit structure diagram of the signal amplifying circuit in the present invention. DETAILED DESCRIPTION

[0037] The present invention provides a precision voltage measurement device for a spintronic memristor, also known as a spintronic memristor Hall voltage measurement circuit. The overall framework of the circuit is as follows: Figure 1As shown, the circuit specifically includes a PC host, a power supply circuit, a serial communication unit, an FPGA chip, an analog-to-digital conversion unit, a signal amplification circuit and a spin electronic memristor.

[0038] The FPGA chip is connected to the serial communication unit and the analog-to-digital conversion unit respectively; the PC communicates with the FPGA chip via the serial communication unit. The analog-to-digital converter input is connected to the signal amplification circuit, and the output is connected to the FPGA chip. The signal amplification circuit is used to amplify the tiny Hall voltage generated by the spin electronic memristor and then output it to the analog-to-digital converter for collection. Finally, the voltage result collected by the FPGA chip through the analog-to-digital converter is sent to the PC through the serial communication unit, which is used to receive data from the serial communication unit, save the data, and send instructions to the FPGA chip through the serial communication unit.

[0039] The power supply circuit includes a power switch circuit ( Figure 2 ) and step-down circuit ( Figure 3 ).

[0040] like Figure 2 As shown, the power switch circuit includes a power socket DC1, a Typec-USB socket USB1, a dip switch K1, a resistor R1, a resistor R2, a resistor R3 and a red light diode POWER.

[0041] The structure of the power switch circuit is that the dip switch K1 is connected to the Typec-USB socket USB1 and the power socket DC1 respectively. The A1 and A12 pins of the Typec-USB socket USB1 are connected to GND, the A4 and A9 pins are connected to the 1 pin of the dip switch K1, the B5 pin is connected to GND through the resistor R1, and the A5 pin is connected to GND through the resistor R2; the B6 and A6 pins are connected to the 5 pin of the USB to serial port chip, and the B7 and A7 pins are connected to the 6 pin of the USB to serial port chip; the 4 pin of the power socket DC1 is connected to the 3 pin of the dip switch K1, and the 2 and 3 pins of the power socket DC1 are grounded; the 2 pin of the dip switch K1 is connected to two outputs, one is connected to the 5V power output, and the other is connected to GND after passing through the resistor R3 and the red light diode POWER.

[0042] Typec-USB socket USB1 is connected to the host computer so that the serial communication circuit can communicate with the PC.

[0043] The resistance values ​​of the resistor R1 and the resistor R2 are both 5.1 kΩ, and the resistance value of the resistor R3 is 10 kΩ.

[0044] The power socket DC1 provides DC5V voltage, and the Typec-USB socket USB1 also provides 5V voltage VBUS. The dual power supply determines which 5V voltage is connected to the system through the DIP switch K1. When the system has 5V voltage input, the power indicator (red diode POWER) lights up.

[0045] like Figure 3 As shown, the step-down circuit is used to convert 5V voltage into 3.3V voltage, 2.5V voltage and 1.2V voltage respectively. The step-down circuit includes a 3.3V power supply circuit, a 2.5V power supply circuit and a 1.2V power supply circuit, and the 3.3V power supply circuit, the 2.5V power supply circuit and the 1.2V power supply circuit all include a voltage conversion chip AMS1117. The output 5V voltage of the dip switch K1 is respectively used as the input end of the 3.3V power supply circuit, the 2.5V power supply circuit and the 1.2V power supply circuit, and is connected to the 3rd pin of the AMS1117 chip.

[0046] The 3.3V power supply circuit includes a voltage conversion chip U2 (AMS1117-3.3), capacitors C3, C4, C5, C6, C7 and C8. Pin 1 of the voltage conversion chip U2 is connected to GND, and the output of pin 2 is divided into two paths, one connected to the 3.3V output and the other connected to pin 4; pin 3 is connected to two inputs, one connected to the 5V power supply, and the other connected to ground through capacitor C3, and a polar capacitor C4 is connected in parallel at both ends of capacitor C3, the positive electrode of polar capacitor C4 is connected to pin 3, and the negative electrode is connected to GND, and a capacitor C5 is connected in parallel at both ends of polar capacitor C4; pin 4 is connected to two outputs, one connected to the 3.3V output, and the other connected to ground through capacitor C6, and a polar capacitor C7 is connected in parallel at both ends of capacitor C6, the positive electrode of polar capacitor C7 is connected to pin 4, and the negative electrode is connected to GND, and a capacitor C8 is connected in parallel at both ends of polar capacitor C7.

[0047] The 2.5V power supply circuit includes a voltage conversion chip U3 (AMS1117-2.5), capacitor C9, capacitor C10, capacitor C11 and capacitor C12. The structure of the 2.5V power supply circuit is that pin 1 of the voltage conversion chip U3 is connected to GND, pins 2 and 4 are both connected to 2.5V output, pin 4 is also connected to GND via capacitor C11, and C12 is connected in parallel at both ends of capacitor C11; pin 3 is connected to two inputs, one is connected to a 5V power supply, and the other is grounded via capacitor C9, and capacitor C10 is connected in parallel at both ends of capacitor C9.

[0048] The 1.2V power supply circuit includes a voltage conversion chip U4 (AMS1117-1.2), capacitors C13, C14, C15, C16, C17, C18, C19 and C20. Pin 1 of the voltage conversion chip U4 is connected to GND, pins 2 and 4 are connected to 1.2V output, pin 4 is also connected to GND through capacitor C16, capacitor C17 is connected in parallel at both ends of capacitor C16, capacitor C18 is connected in parallel at both ends of capacitor C17, polar capacitor C19 is connected in parallel at both ends of capacitor C18, the positive electrode of polar capacitor C19 is connected to pin 4, the negative electrode is connected to GND, and capacitor C20 is connected in parallel at both ends of polar capacitor C19; pin 3 is connected to two inputs, one is connected to a 5V power supply, and the other is connected to GND through capacitor C13, capacitor C14 is connected in parallel at both ends of capacitor C13, and capacitor C15 is connected in parallel at both ends of capacitor C14.

[0049] Among them, the capacitance values ​​of capacitor C3, polar capacitor C4, polar capacitor C7, capacitor C8, capacitor C9, capacitor C12, capacitor C13, capacitor C17 and capacitor C18 are all 100μF, the capacitance values ​​of capacitor C5, capacitor C6, capacitor C10, capacitor C11 and capacitor C14 are all 100nF, the capacitance values ​​of capacitor C15 and capacitor C20 are all 1μF, and the capacitance value of polar capacitor C19 is 47μF.

[0050] The capacitors are used for energy storage, filtering and eliminating power surges. The 2 and 4 pins of the AMS1117 chip are both output terminals, outputting 3.3V, 2.5V, and 1.2V voltages respectively. The capacitors at the output terminals are used for filtering and energy storage. The 1.2V voltage is used for the core operating voltage of the FPGA chip, and two 100uf large-capacity capacitors are used for energy storage. The 47uf, 1uf, and 100nf capacitors are each filtered to make the voltage stable. The 3.3V voltage is used to power the IO port of the FPGA chip and the AD9226 chip, and two 100uf capacitors are also used for energy storage; the 2.5V voltage is only needed to power the PLL part of the FPGA chip, using a 100uf capacitor for energy storage and a 100nf capacitor for filtering.

[0051] like Figure 4As shown, the serial communication unit includes a USB-to-serial chip U1 (CH340C chip), capacitor C1 and capacitor C2. The structure of the serial communication unit is that pin 1 of the USB-to-serial chip U1 is grounded, and pin 16 is connected to the power supply VBUS of the Typec-USB interface, that is, pins A4 and A9 of the Typec-USB seat USB1, so that data can be transmitted between the serial communication unit and the PC; capacitor C1 is connected between pins 1 and 16, and a 100nf capacitor is used for filtering (capacitor C1) and leading to the test point terminal P1. Pin 2 of the USB-to-serial chip U1 is connected to pin 106 of the GPIO interface of the FPGA chip through the network label RXD, and pin 3 is connected to pin 105 of the GPIO interface of the FPGA chip through the network label TXD, which is used for data transmission with the FPGA chip end; pin 4 is pulled down to GND through a 100nf capacitor (C2). Pin 5 of the USB-to-serial port chip U1 is connected to the DP pin (i.e., pin A6 and pin B6) of the Typec-USB interface through the network label CH340P, and pin 6 is connected to the DN pin (i.e., pin A7 and pin B7) of the Typec-USB interface through the network label CH340N, which is used for data transmission with the PC. The serial port communication unit bridges the IO port of the PC and the FPGA chip, and converts the electrical level to meet communication needs.

[0052] like Figure 5 As shown, the FPGA chip is used to control the analog-to-digital converter and communicate with the PC through the serial communication chip CH340C. The model of the FPGA chip U10 is the EP4CE6E22C8N chip, in which the 3.3V voltage and 1.2V voltage are used to power the chip's port VCCIO and core VCCINT (U10.11), and the 2.5V voltage is used to power VCCA. In U10.4, all GPIO ports of BANK4 are connected to the analog-to-digital converter AD9226 chip to control the analog-to-digital converter to measure voltage. Among them, ADDB1~ADDB12 are data ports, ADCLK is the clock required by the AD9226 chip, and ATOTR is the data overflow port.

[0053] like Figure 6 As shown, the analog-to-digital conversion unit is used to connect the FPGA chip and the signal amplification circuit, perform analog-to-digital conversion on the output signal of the signal amplification circuit, and then transmit the digital signal to the FPGA chip.

[0054] The analog-to-digital conversion unit includes an analog-to-digital converter U7 (i.e., an AD9226 chip), capacitors C36, C37, C38, C39, C40, C41, C42, C43, C44, resistors R14, R15, and R16. The structure of the analog-to-digital conversion unit is that pins 1 to 14 of the analog-to-digital converter U7 are connected to the FPGA chip for communication, ADCLK is the clock provided by the FPGA chip, ADDB1 to ADDB12 are data ports, and ATOTR is a data overflow port. Pins 15 and 26 of the analog-to-digital converter U7 are connected to a 5V power supply, and the inputs of pins 16, 17, 25 and 27 are divided into four paths, one of which is connected to GND; two paths are connected to pin 28 through capacitor C39, and capacitor C38 is connected in parallel at both ends of capacitor C39; three paths are connected to a 5V voltage through capacitor C37, and capacitor C36 is connected in parallel at both ends of capacitor C37; four paths are connected to pin 18 through capacitor C40, and five paths are connected to pin 24 through capacitor C41 and resistor R14. The analog-to-digital converter U7 connects the VINB pin to the 2V reference voltage generated by chip pin 18 VREF through a 33Ω resistor R14. Capacitor C41 and capacitor C40 are connected in parallel. Capacitor C40 with a resistance value of 100nF and capacitor C41 with a resistance value of 10μF are used for energy storage filtering, thereby configuring the AD9226 chip to a single-ended input mode. ; Pin 22 is connected to GND through resistor R16 with a resistance value of 1kΩ, and pin 23 is connected to the signal amplifier circuit through resistor R15; pin 21 is connected to GND through capacitor C44, and pin 20 is connected to two inputs, one is connected to GND through capacitor C43, and the other is connected to GND through capacitor C42 and capacitor C44. A capacitor C45 with a capacitance value of 10μF is connected in parallel at both ends of capacitor C42 with a capacitance value of 100nF for energy storage. The analog-to-digital conversion unit performs analog-to-digital conversion on the amplified signal, converts the analog quantity into digital quantity and sends it to the FPGA chip for reading.

[0055] The capacitance values ​​of capacitor C43 and capacitor C44 are both 100 nF.

[0056] Capacitors C36 and C38 with a capacitance value of 100nf form the power supply filter circuit, and capacitors C37 and C39 with a capacitance value of 100μf are the power supply energy storage circuit to prevent surges and noise from the power supply voltages 5V and 3.3V. The input end of the analog-to-digital converter is AMP1, which is connected to the single-ended input end VINA (i.e., pin 23) of AD9226 through a 33-ohm resistor (R15).

[0057] like Figure 7 As shown, the signal amplification circuit is used to amplify the tiny Hall voltage generated by the spin electronic memristor and transmit the amplified signal to the analog-to-digital conversion unit.

[0058] The structure of the signal amplification circuit is that the 3rd pin of the dual-channel operational amplifier chip U5 is connected to two inputs, one is connected to the PGAU1 end of the spin electronic memristor, and the other is connected to GND through capacitor C24; the 2nd pin of the dual-channel operational amplifier chip U5 is connected to two inputs, one is connected to the 6th pin of the dual-channel operational amplifier chip U5 through resistor R4, and the other is connected to the 1st pin of the dual-channel operational amplifier chip U5 through resistor R5, and the 1st pin of the dual-channel operational amplifier chip U5 is connected to the 3rd pin of the dual-channel operational amplifier chip U6; the 5th pin of the dual-channel operational amplifier chip U5 is divided into two inputs, one is connected to the PGAD1 end of the spin electronic memristor, and the other is connected to GND through capacitor C28; the 4th pin is connected to a -5V power supply, and the 8th pin is connected to a 5V power supply; the 6th pin is connected to the 7th pin through resistor R6, and the 7th pin is connected to the 5V power supply. The pin 2 of the dual-channel operational amplifier chip U6 is connected to the pin 1 of the dual-channel operational amplifier chip U6 through the resistor R9; the pin 1 of the dual-channel operational amplifier chip U6 is connected to the pin 6 of the dual-channel operational amplifier chip U6 through the resistor R10, the pin 6 of the dual-channel operational amplifier chip U6 is connected to the pin 7 of the dual-channel operational amplifier chip U6 through the resistor R13, and the pin 7 of the dual-channel operational amplifier chip U6 is connected to the analog-to-digital conversion unit; the pin 5 of the dual-channel operational amplifier chip U6 is connected to two inputs, one of which is connected to a 2V power supply through the resistor R11, and the other is connected to GND through the resistor R12, and the 2V power supply is grounded through the capacitor C35; the pin 4 of the dual-channel operational amplifier chip U6 is connected to a -5V power supply, and the pin 8 of the dual-channel operational amplifier chip U6 is connected to a 5V power supply.

[0059] Figure 7 U5.1 and U5.2 are two parts of the dual-channel operational amplifier chip U5, and U6.1 and U6.2 are two parts of the dual-channel operational amplifier chip U6.

[0060] After the spin electronic memristor detects changes in the external magnetic field, it is used to output a voltage signal to the signal amplification circuit through the Hall effect.

[0061] PGAU1 and PGAD1 are the two ends of the spintronic memristor, regardless of positive or negative. They are differentially amplified by the dual-channel op amp chip U5 (i.e., LT1807IS8#PBF), and then differentially converted to single-ended by the dual-channel op amp chip U6 (LT1807IS8#PBF) before secondary signal amplification. Among them, the 4-pin and 8-pin of the dual-channel op amp chip U5 and the dual-channel op amp chip U6 are both power supply pins, connected to 5V and negative 5V voltages, and filtered by 100nF, 1uf, and 22uF capacitors. The input terminals of PGAU1 and PGAD1 are connected to 18pf capacitors C24 and C28 to filter out high-frequency noise. The dual-channel operational amplifier chip U5 and the 1kΩ resistor R4, 10kΩ resistor R5 and resistor R6) form a first-stage differential amplifier circuit, with an amplification factor of (R5+R6+R4) / R4, a total of 21 times. The second-stage operational amplifier U6.1 converts differential to single-ended and passes through 1kΩ resistor R7 and resistor R8, as well as 20kΩ resistor R9, with a second-stage amplification factor of 20 times. The cascaded operational amplifier amplifies a total of 420 times. Since the AD9226 chip cannot input negative voltage, the voltage is raised by 2V through the U6.2 operational amplifier, where VREF2V is the reference voltage output by the AD9226. When the input is 0V, the output of the signal amplifier circuit is AMP1, and the zero point is above 2V.

[0062] The software design part of the present invention uses python 3.10 version in the WIN10 system host to control the board measurement operation by operating serial port communication, and saves the obtained results in a TXT document.

[0063] The method of using the device of the present invention is:

[0064] a. First, the host computer (PC) sends measurement instructions to the FPGA chip through the serial port.

[0065] b. After the FPGA chip detects the corresponding instruction, it will control the digital-to-analog conversion unit to collect the output of the signal amplification circuit and return the result to the device host computer.

[0066] c. The PC host computer determines the state of the spintronic memristor device by obtaining the measured Hall voltage value. This process can check whether the spintronic memristor has been written, whether it is currently damaged, whether the device is in a low resistance or high resistance state, etc.

[0067] d. Finally, the host computer of the device saves the collected data into a TXT text file on the computer for subsequent processing.

Claims

1. A precision voltage measurement device for a spintronic memristor, characterized in that: include: The PC is connected to the power supply circuit, and is used to receive data from the serial communication unit, save the data, and send instructions to the FPGA chip through the serial communication unit; The serial communication unit is connected to the power circuit and the FPGA chip respectively, and is used to bridge the IO port of the PC and the FPGA chip, and convert the level to meet the communication needs; The FPGA chip is respectively connected to the serial communication unit, the power supply circuit and the analog-to-digital conversion unit, and is used to measure the voltage through the analog-to-digital conversion unit under the control instruction of the PC; The analog-to-digital conversion unit is connected to the power supply circuit, the FPGA chip and the signal amplifier respectively, and is used to perform analog-to-digital conversion on the amplified signal, convert the analog quantity into a digital quantity and send it to the FPGA chip for reading; The signal amplification circuit is connected to the power supply circuit, the spin electronic memristor chip and the analog-to-digital conversion unit respectively, and is used to condition and amplify the tiny voltage signal output by the spin electronic memristor chip, and output the amplified signal to the analog-to-digital conversion unit; The spin electronic memristor is connected to the signal amplification circuit, and after detecting the change of the external magnetic field, it is used to output a voltage signal to the signal amplification circuit through the Hall effect; and The power supply circuit is respectively connected to the host computer, FPGA chip, serial communication unit, analog-to-digital conversion unit and signal amplification circuit, and is used to provide working voltage for each circuit and provide an interface for the connection between the host computer and the serial communication unit.

2. The precision voltage measuring device according to claim 1, characterized in that: The power supply circuit comprises: The switching power supply circuit is respectively connected with the 3.3V circuit, the 2.5V circuit and the 1.2V circuit to provide a 5V operating voltage; A 3.3V power supply circuit is connected to the switching power supply circuit to provide a 3.3V operating voltage; A 2.5V power supply circuit connected to the switching power supply circuit to provide a 2.5V operating voltage; and The 1.2V power supply circuit is connected to the switching power supply circuit to provide a 1.2V operating voltage.

3. The precision voltage measuring device according to claim 1, characterized in that: The structure of the serial communication unit is that pin 1 of the USB to serial port chip U1 is grounded, and pins 5, 6 and 16 are connected to the switching power supply circuit; capacitor C1 is connected between pins 1 and 16, and a test point terminal P1 is brought out at the node where capacitor C1 and pin 16 are connected; pins 2 and 3 of the USB to serial port chip U1 are connected to the FPGA chip; and pin 4 is pulled down to GND through capacitor C2.

4. The precision voltage measuring device according to claim 1, characterized in that: The model of the FPGA chip is EP4CE6E22C8N.

5. The precision voltage measuring device according to claim 1, characterized in that: The structure of the analog-to-digital conversion unit is that pins 1 to 14 of the analog-to-digital converter U7 are connected to the FPGA chip, pins 15 and 26 of the analog-to-digital converter U7 are connected to a 5V power supply, and the inputs of pins 16, 17, 25 and 27 are divided into four paths, one of which is connected to GND; the second path is connected to pin 28 through capacitor C39, and capacitor C38 is connected in parallel at both ends of capacitor C39; the third path is connected to a 5V voltage through capacitor C37, and capacitor C36 is connected in parallel at both ends of capacitor C37; the fourth path is connected to GND through capacitor C39. The pin 18 is connected through capacitor C40, the five paths are connected to pin 24 through capacitor C41 and electronic R14, capacitor C41 and capacitor C40 are connected in parallel; pin 22 is connected to GND through resistor R16, and pin 23 is connected to the signal amplifier circuit through resistor R15; pin 21 is connected to GND through capacitor C44, and pin 20 is connected to two inputs, one is connected to GND through capacitor C43, and the other is connected to GND through capacitor C42 and capacitor C44, and capacitor C45 is connected in parallel at both ends of capacitor C42.

6. The precision voltage measuring device according to claim 1, characterized in that: The structure of the signal amplification circuit is as follows: the 3rd pin of the dual-channel operational amplifier chip U5 is connected to two inputs, one of which is connected to the PGAU1 end of the spin electronic memristor, and the other is connected to GND through a capacitor C24; the 2nd pin of the dual-channel operational amplifier chip U5 is connected to two inputs, one of which is connected to the 6th pin of the dual-channel operational amplifier chip U5 through a resistor R4, and the other is connected to the 1st pin of the dual-channel operational amplifier chip U5 through a resistor R5, and the 1st pin of the dual-channel operational amplifier chip U5 is connected to the 3rd pin of the dual-channel operational amplifier chip U6; the 5th pin of the dual-channel operational amplifier chip U5 is divided into two inputs, one of which is connected to the PGAD1 end of the spin electronic memristor, and the other is connected to GND through a capacitor C28; the 4th pin is connected to a -5V power supply, and the 8th pin is connected to a 5V power supply; the 6th pin is connected to the 7th pin through a resistor R6, and the 7th pin is connected to the 5th pin. The pin is connected to pin 2 of the dual operational amplifier chip U6 through resistor R8, and pin 2 of the dual operational amplifier chip U6 is connected to pin 1 of the dual operational amplifier chip U6 through resistor R9; pin 1 of the dual operational amplifier chip U6 is connected to pin 6 of the dual operational amplifier chip U6 through resistor R10, and pin 6 of the dual operational amplifier chip U6 is connected to pin 7 of the dual operational amplifier chip U6 through resistor R13, and pin 7 of the dual operational amplifier chip U6 is connected to the analog-to-digital conversion unit; pin 5 of the dual operational amplifier chip U6 is connected to two inputs, one is connected to a 2V power supply through resistor R11, and the other is connected to GND through resistor R12, and the 2V power supply is grounded through capacitor C35; pin 4 of the dual operational amplifier chip U6 is connected to a -5V power supply, and pin 8 of the dual operational amplifier chip U6 is connected to a 5V power supply.

7. The precision voltage measuring device according to claim 1, characterized in that: The spin electronic memristor includes a Hallbar spin electronic memristor, and the memristor material is a traditional CoFeB structure.

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