High-brightness Micro-LED chip and manufacturing method thereof

By designing two bonding layers with different materials in the Micro-LED chip and setting a regular conical second bonding layer, the problem of low light output efficiency of the chip is solved and higher brightness and stability are achieved.

CN119677250APending Publication Date: 2025-03-21NANCHANG KINGJET SEMICON TECH CO LTD
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Patent Information

Application Number
CN202411924409.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-25
Publication Date
2025-03-21

AI Technical Summary

Technical Problem

In applications, Micro-LED chips have poor light from the front surface or have poor reflection effects and unequal light output angles, resulting in poor light output efficiency and affecting brightness and stability.

Method used

The bonding layer design with two layers of materials is adopted, and the second bonding layer is set into a regular conical shape. The total reflection is reduced by the refractive index of materials after different refractive index materials, and the light exit angle is changed, so as to better concentrate the light to the back surface to emit light.

Benefits of technology

The luminous intensity and quality of Micro-LED chips are improved, and the brightness and stability of the chip are enhanced.

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Abstract

The invention belongs to the technical field of LED chips, and particularly relates to a high-brightness Micro-LED chip and a manufacturing method thereof. The high-brightness Micro-LED chip comprises a second bonding layer, a first bonding layer, a P-type semiconductor layer, a light-emitting layer, an N-type semiconductor layer, a P contact electrode, an N contact electrode and a passivation layer from bottom to top, and the second bonding layer is of a conical body structure and is regularly distributed on the back surface of the chip. The bonding layers are reasonably designed, the two bonding layers made of different materials are designed, and the second bonding layer is arranged to be in a regular cone shape, so that the luminous intensity and quality of the Micro-LED chip can be improved; meanwhile, the compactness and bonding strength of the first bonding layer and the second bonding layer can be improved through a high-temperature quenching process in the manufacturing process, and the obtained chip is high in brightness and good in stability.
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Description

Technical Field

[0001] The present invention belongs to the technical field of LED chips, and specifically relates to a high-brightness Micro-LED chip and a manufacturing method thereof. Background Art

[0002] Micro-LED not only brings stunning display effects with its high resolution and high contrast, but is also known as the ultimate goal of display technology because of its thinness and miniaturization. Although terminal application products have appeared, the development of Micro-LED is still in its early stages, and its application still faces a series of technical problems, such as the front light being absorbed by the material or the reflection effect is poor or the light angle is unequal, the light output efficiency is poor, and the brightness is affected; the bonding effect is poor, which affects the chip stability, etc. Therefore, the development of a high-brightness Micro-LED chip can alleviate the problem of slow application to a certain extent. Summary of the invention

[0003] In view of the deficiencies in the prior art, the present invention provides a high-brightness Micro-LED chip and a method for manufacturing the same. The Micro-LED chip has the characteristics of high brightness and stable quality.

[0004] In order to achieve the above object, the present invention provides the following technical solutions: The first object of the present invention is to provide a method for preparing a high-brightness Micro-LED chip, comprising the following steps: S1. Provide a GaAs substrate, and sequentially epitaxially grow an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer; S2, depositing a first bonding layer and a second bonding layer having a regular cone structure on the epitaxial wafer, and producing a desired pattern; S3, bonding the second bonding layer of the epitaxial wafer to the sapphire substrate through a temporary bonding adhesive; S4, after the rotation, etching the epitaxial wafer by ICP dry etching to expose the P-type semiconductor layer; S5, evaporating a P contact electrode on the exposed surface of the P-type semiconductor layer; S6, evaporating an N contact electrode on the surface of the N-type semiconductor layer; S7, using ICP dry etching to etch the P-type semiconductor layer cleanly and make a cutting path; S8, depositing a passivation layer on the surface of the epitaxial wafer, and exposing the P contact electrode and the N contact electrode by ICP dry etching; S9, evaporation welding wire electrode; S10, remove the temporary bonding glue, complete the separation of the epitaxial layer and the sapphire substrate, and obtain the Micro-LED chip.

[0005] The Micro-LED chip of the present invention rationally designs the bonding layer, uses two bonding layers with different materials, and sets the second bonding layer into a regular cone shape. This allows the light in the light-emitting area to be refracted after passing through materials with different refractive indices, reduces total reflection, and changes the light output angle, thereby better concentrating the light on the back side to improve the luminous intensity and quality of the Micro-LED chip.

[0006] Furthermore, in the above technical solution S1, the N-type semiconductor layer consists of an N-AlGaInP confinement layer, a GaAs contact layer, and an N-AlGaInP current spreading layer, and the P-type semiconductor layer consists of a GaP window layer and a P-AlGaInP confinement layer.

[0007] Furthermore, in the above technical solution S2, the material of the first bonding layer is SiN, the thickness is 1±0.2 μm, and the manufacturing method is: using an iodic acid roughening solution on the P-type semiconductor to roughen the GaP structure on the surface of the P-type semiconductor layer, and then depositing SiN, the roughening depth is 0.2-0.3 μm. Specifically, the iodic acid roughening solution is a mixed solution of iodic acid, sulfuric acid and water in any proportion.

[0008] Furthermore, in the above technical solution S2, the material of the second bonding layer is SiO2, and its shape is a cone with regular bottom surfaces connected but not overlapping.

[0009] Furthermore, in the above technical solution, the bottom diameter of the cone is 2.5±0.2 μm, and the height is 2±0.2 μm.

[0010] Furthermore, in the above technical solution, the method for making the second bonding layer is as follows: first, the surface of the first bonding layer is polished, and the surface roughness is controlled to be 1-5nm, and then a mask pattern is made on the polished first bonding layer using a negative photoresist, and then SiO2 is deposited at 160°C, and the wafer source is placed in a 90°C degumming solution to remove the photoresist, so as to obtain a cone with regular bottom surfaces connected but not overlapping, and finally the epitaxial wafer is quenched in a 380°C alloy furnace to obtain the second bonding layer. In this technical solution, after the surface of the first bonding layer is polished, a mask pattern is made using a negative photoresist, and then the second bonding layer is deposited, and the desired pattern is prepared by removing the photoresist of the second bonding layer, and then high-temperature quenching is performed, which can effectively improve the compactness and bonding strength of the first bonding layer and the second bonding layer, and has good stability.

[0011] Furthermore, in the above technical solution S3, the temporary bonding adhesive is an ultra-thin polymer coating, specifically BrewerBOND® 701, with a thickness of 5±0.5 μm.

[0012] Furthermore, in the above technical solution S8, the material of the passivation layer is SiO2, and the thickness is 300±20nm.

[0013] The second object of the present invention is to provide a high-brightness Micro-LED chip manufactured by the above-mentioned manufacturing method.

[0014] Compared with the prior art, the present invention has the following beneficial effects: In the process of making a Micro-LED chip, the present invention first deposits a first bonding layer on an epitaxial wafer, polishes the first bonding layer, makes a mask pattern with a negative photoresist, and then deposits a second bonding layer, and prepares a desired pattern by removing the photoresist of the second bonding layer, improves the compactness and bonding strength of the first bonding layer and the second bonding layer by high-temperature quenching, and has good stability, uses a temporary bonding glue to bond the second bonding layer to a temporary substrate, and after completing the chip process, removes the temporary bonding glue by a debonding process to complete the separation of the epitaxial layer and the substrate, and obtains a Micro-LED chip. The manufacturing process reasonably designs the bonding layer, designs two bonding layers with different materials, and sets the second bonding layer into a regular cone shape, so that the light in the luminous area can be refracted after passing through materials with different refractive indices, reduces total reflection, and changes the light output angle, so that the light can be better concentrated to the back side to output light, thereby improving the luminous intensity and quality of the Micro-LED chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0016] Figure 1 This is a schematic diagram of the structure of a high-brightness Micro-LED chip manufactured after S9 of the present invention; Figure 2 This is a schematic diagram of the structure of the high-brightness Micro-LED chip of the present invention.

[0017] Description of the numbers in the schematic diagram: 1. P-type semiconductor layer; 2. Light-emitting layer; 3. N-type semiconductor layer; 4. Temporary bonding glue; 5. P contact electrode; 6. N contact electrode; 7. Passivation layer; 8. First bonding layer; 9. Second bonding layer; 10. Sapphire substrate. DETAILED DESCRIPTION

[0018] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and is by no means intended to limit the present application and its application or use. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0019] In the description of the present application, it should be understood that the use of terms such as "first" and "second" to limit components is only for the convenience of distinguishing the corresponding components. Unless otherwise stated, the above terms have no special meaning and therefore cannot be understood as limiting the scope of protection of the present application.

[0020] In the description of the present application, it should be understood that the directions or positional relationships indicated by directional words such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom" are usually based on the directions or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description. Unless otherwise specified, these directional words do not indicate or imply that the device or element referred to must have a specific direction or be constructed and operated in a specific direction, and therefore cannot be understood as limiting the scope of protection of the present application; the directional words "inside and outside" refer to the inside and outside relative to the contours of each component itself.

[0021] See also Figure 1 to Figure 2 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and therefore the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the form, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0022] Some embodiments of the present invention provide a method for preparing a high-brightness Micro-LED chip, comprising the following steps: S1. Provide a GaAs substrate, and sequentially epitaxially grow an N-type semiconductor layer 3, a light-emitting layer 2, and a P-type semiconductor layer 1; specifically, place the GaAs substrate into a MOCVD (metal organic chemical vapor deposition) device, and sequentially epitaxially grow an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer; wherein the N-type semiconductor layer sequentially includes an N-AlGaInP confinement layer, a GaAs contact layer, and an N-AlGaInP current spreading layer, and the P-type semiconductor layer sequentially includes a GaP window layer and a P-AlGaInP confinement layer.

[0023] S2, depositing a first bonding layer 8 and a second bonding layer 9 having a regular cone structure on the epitaxial wafer, and producing a desired pattern; Specifically, an iodic acid-based roughening solution is used to roughen the GaP window layer structure on the surface of the P-type semiconductor layer, wherein the roughening solution is a mixed solution containing a certain proportion of iodic acid, sulfuric acid and water, and the roughening depth is 0.2-0.3 μm; then, SiN with a thickness of 1±0.2 μm is deposited on the roughened surface as the first bonding layer, and the first bonding layer is polished, and the surface roughness is controlled at 1-5 nm; after making a mask pattern on the first bonding layer after polishing with a negative photoresist, SiO2 with a thickness of 3±0.2 μm is deposited at 160°C as the second bonding layer, and the excess photoresist is removed by placing the wafer source in a 90°C degumming solution to obtain a regular cone with a bottom diameter of 2.5±0.2 μm and a height of 2±0.2 μm; finally, the epitaxial wafer is placed in a 380°C alloy furnace to quench the bonding layer, which can effectively improve the bonding between the bonding surfaces and the density of the bonding layer, and has good stability.

[0024] S3. Bond the second bonding layer of the epitaxial wafer to the sapphire substrate 10 through a temporary bonding adhesive 4; specifically, apply a layer of temporary bonding adhesive (BrewerBOND® 701) with a thickness of 5±0.5 μm on the second bonding layer and bond it to the sapphire substrate.

[0025] S4. After the rotation, the epitaxial wafer is etched by ICP dry etching to expose the P-type semiconductor layer. Specifically, a mask pattern is made using a positive photoresist, and the N-type semiconductor layer and the light-emitting layer in the area not covered by the photoresist are etched cleanly by ICP dry etching to expose the P-type semiconductor layer.

[0026] S5, vapor-depositing a P contact electrode on the exposed surface of the P-type semiconductor layer; specifically, cleaning the surface of the epitaxial wafer, making a mask pattern with a negative photoresist, and then vapor-depositing a P contact electrode 5 on the surface of the P-type semiconductor without the photoresist.

[0027] S6, vapor-depositing an N contact electrode on the surface of the N-type semiconductor layer; specifically, using a negative photoresist to make a mask pattern on the surface of the N-type semiconductor layer to vapor-deposit the N contact electrode 6.

[0028] S7. Etch the P-type semiconductor layer cleanly by ICP dry etching and make cutting paths; specifically, make a mask pattern on the chip surface by using positive photoresist, and then etch the P-type semiconductor layer cleanly by ICP dry etching and make cutting paths.

[0029] S8. Deposit a passivation layer on the surface of the epitaxial wafer, and use ICP dry etching to expose the P contact electrode and the N contact electrode; specifically, deposit SiO2 with a thickness of 300±20nm on the epitaxial wafer, use positive photoresist to make a mask pattern, and use BOE solution to remove SiO2 outside the empty areas where the P contact electrode and the N contact electrode contact.

[0030] S9, evaporating the bonding wire electrode; specifically, using a negative photoresist to make a mask pattern, and then evaporating the bonding wire electrode, the structural schematic diagram of the obtained Micro-LED chip is as follows Figure 1 shown.

[0031] S10. Use laser lift-off technology to remove the temporary bonding glue, complete the separation of the epitaxial layer and the sapphire substrate, and obtain the Micro-LED chip.

[0032] In some specific embodiments of the present invention, a high-brightness Micro-LED chip is also provided, and its structural schematic diagram is as follows: Figure 2 As shown, the Micro-LED chip includes a second bonding layer 9, a first bonding layer 8, a P-type semiconductor layer 1, a light-emitting layer 2, an N-type semiconductor layer 3, a P contact electrode 5, an N contact electrode 6, and a passivation layer 7 from bottom to top; the second bonding layer is a conical structure and is regularly distributed on the back of the chip; the passivation layer covers other chip surface areas except the P contact electrode and the N contact electrode.

[0033] In summary, the present invention reasonably designs the bonding layer, designs two bonding layers with different materials, and sets the second bonding layer into a regular cone shape, so that the light in the light-emitting area can be refracted after passing through materials with different refractive indices, reduce total reflection, and change the light output angle, so as to better concentrate the light on the back side, thereby improving the luminous intensity and quality of the Micro-LED chip; at the same time, the high-temperature quenching process can be used during the production process to improve the density and bonding strength of the first bonding layer and the second bonding layer, and the chip has good stability.

[0034] Finally, it should be emphasized that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various changes and modifications. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A method for manufacturing a high-brightness Micro-LED chip, characterized in that: The steps include: S1. Provide a GaAs substrate, and sequentially epitaxially grow an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer; S2, depositing a first bonding layer and a second bonding layer having a regular cone structure on the epitaxial wafer, and producing a desired pattern; S3, bonding the second bonding layer of the epitaxial wafer to the sapphire substrate through a temporary bonding adhesive; S4, after the rotation, etching the epitaxial wafer by ICP dry etching to expose the P-type semiconductor layer; S5, evaporating a P contact electrode on the exposed surface of the P-type semiconductor layer; S6, evaporating an N contact electrode on the surface of the N-type semiconductor layer; S7, using ICP dry etching to etch the P-type semiconductor layer cleanly and make a cutting path; S8, depositing a passivation layer on the surface of the epitaxial wafer, and exposing the P contact electrode and the N contact electrode by ICP dry etching; S9, evaporation welding wire electrode; S10, remove the temporary bonding glue, complete the separation of the epitaxial layer and the sapphire substrate, and obtain the Micro-LED chip.

2. The method according to claim 1, characterized in that: In S1, the N-type semiconductor layer is composed of an N-AlGaInP confinement layer, a GaAs contact layer, and an N-AlGaInP current spreading layer, and the P-type semiconductor layer is composed of a GaP window layer and a P-AlGaInP confinement layer.

3. The method according to claim 1, characterized in that: In S2, the material of the first bonding layer is SiN, with a thickness of 1±0.2 μm, and the manufacturing method is: using an iodic acid-based roughening solution on the P-type semiconductor to roughen the GaP structure on the surface of the P-type semiconductor layer, and then depositing SiN with a roughening depth of 0.2-0.3 μm.

4. The method according to claim 1, characterized in that: In S2, the material of the second bonding layer is SiO2, and its shape is a cone with regular bottom surfaces connected but not overlapping.

5. The method according to claim 1, characterized in that: The bottom diameter of the cone is 2.5±0.2 μm, and the height is 2±0.2 μm.

6. The method according to claim 4, characterized in that: The method for making the second bonding layer is as follows: first polish the surface of the first bonding layer and control the surface roughness to 1-5nm, then use a negative photoresist to make a mask pattern on the polished first bonding layer, then deposit SiO2 at 160°C, and place the wafer source in a 90°C degumming solution to remove the photoresist to obtain a regular cone with connected but non-overlapping bottom surfaces, and finally quench the bonding layer of the epitaxial wafer in a 380°C alloy furnace to obtain the second bonding layer.

7. The manufacturing method according to claim 1, characterized in that: In S3, the temporary bonding adhesive is an ultra-thin polymer coating with a thickness of 5±0.5 μm.

8. The manufacturing method according to claim 1, characterized in that: In S8, the material of the passivation layer is SiO2, and the thickness is 300±20 nm.

9. A high-brightness Micro-LED chip made by the manufacturing method according to any one of claims 1 to 8.