A current reference circuit with high precision and wide output voltage range

Abstract

The application belongs to the field of analog integrated circuits and relates to a current reference circuit with high precision and a wide output voltage range, comprising a clamping circuit, an asymmetric operational amplifier A, an isolation tube MP1 and a sampling resistor R; one end of the clamping circuit is connected with a power supply, and the other end is connected with a non-inverting terminal of the asymmetric operational amplifier A; an output terminal of the asymmetric operational amplifier A is connected with a gate of the isolation tube MP1; a source of the isolation tube MP1 is connected with an inverting terminal of the asymmetric operational amplifier A, and a drain of the isolation tube MP1 is an output terminal of the current reference circuit; one end of the sampling resistor R is connected with the power supply, and the other end is connected with the source of the isolation tube MP1; the current reference circuit can directly output a reference voltage and a high-precision current generated by the resistor R, does not need a mirror circuit and a special band-gap reference voltage generating circuit, has a simple structure and a wide output voltage range.

Description

Technical Field

[0001] This invention belongs to the field of analog integrated circuits and relates to a high-precision current reference circuit with a wide output voltage range. Background Technology

[0002] Current references are widely used in analog integrated circuits such as LDOs, DC / DC converters, and DACs / ADCs, and are an indispensable part of most analog and mixed-signal integrated circuits. A current reference circuit can generate a stable reference current that is insensitive to changes in power supply voltage, temperature, and process technology, thereby ensuring the performance of the overall circuit.

[0003] Traditional current reference circuits, such as Figure 1 As shown, this is based on the band gap reference voltage V REF It consists of a resistor R that defines the current magnitude, a negative feedback loop composed of a high-gain operational amplifier A and an NMOS transistor MN1, and a mirror circuit.

[0004] However, the above circuit requires a bandgap reference voltage generation circuit, a high-gain operational amplifier circuit, and a mirror, which makes the structure complex. Furthermore, the output reference current is a mirror of the bandgap reference voltage and the high-precision current generated by the resistor R. Due to the compatibility issues of the mirror transistor, the accuracy of the output current cannot be guaranteed. Summary of the Invention

[0005] To address the aforementioned problems in the prior art, this invention employs a high-precision current reference circuit with a wide output voltage range, comprising: a clamping circuit, an asymmetric operational amplifier A, an isolation transistor MP1, and a sampling resistor R; one end of the clamping circuit is connected to the power supply, and the other end is connected to the non-inverting input of the asymmetric operational amplifier A; the output terminal of the asymmetric operational amplifier A is connected to the gate of the isolation transistor MP1; the source of the isolation transistor MP1 is connected to the inverting input of the asymmetric operational amplifier A, and the drain is the output terminal of the current reference circuit; one end of the sampling resistor R is connected to the power supply, and the other end is connected to the source of the isolation transistor MP1.

[0006] The voltage V across the clamping circuit C The temperature coefficient is negative, and the offset voltage V of the asymmetric operational amplifier A is... OS The temperature coefficient is positive.

[0007] The voltage V across the sampling resistor R R The temperature coefficient of the sample resistor R is the same.

[0008] The asymmetric operational amplifier includes: transistors Q7 to Q20, resistors R11 to R21, and capacitor C1; one end of resistors R11 to R12 is connected to the power supply V. DDThe other end of the resistor R11 is connected with the collector of the transistor Q7, the other end of the resistor R12 is connected with the collector of the transistor Q8, the base of the transistor Q8 is connected with the sampling resistor R, the emitter of the transistor Q7 and the emitter of the transistor Q8 are connected with the collector of the transistor Q12, the emitter of the transistor Q12 is connected with the collector of the transistor Q13, the emitter of the transistor Q13 is connected with one end of the resistor R17, the other end of the resistor R17 is grounded; the emitter of the transistor Q9 is connected with the other end of the resistor R11, the base is connected with one end of the resistor R14, the other end of the resistor R14 is connected with the collector of the transistor Q9 and one end of the resistor R15 respectively, the other end of the resistor R15 is connected with the base of the transistor Q10 respectively, the collector of the transistor Q9 is connected with the collector of the transistor Q14, the emitter of the transistor Q14 is connected with the collector of the transistor Q15, the emitter of the transistor Q15 is connected with one end of the resistor R18, the other end of the resistor R18 is grounded; the emitter of the transistor Q10 is connected with the other end of the resistor R12, the base is connected with one end of the resistor R16, the other end of the resistor R16 is connected with the upper plate of the capacitor C1; the collector of the transistor Q10 and the lower plate of the capacitor C1 are connected with the collector of the transistor Q16, the emitter of the transistor Q16 is connected with the collector of the transistor Q17, the emitter of the transistor Q17 is connected with one end of the resistor R19, the other end of the resistor R19 is grounded; one end of the resistor R13 is connected with the power supply V DD The emitter of the transistor Q11 is connected with the other end of the resistor R13, the base is connected with the collector of the transistor Q10, the collector is connected with the collector of the transistor Q19 and the gate of the isolation transistor MP1 respectively, the emitter of the transistor Q19 is connected with the collector of the transistor Q20, the emitter of the transistor Q20 is connected with one end of the resistor R20, the other end of the resistor R20 is grounded.

[0009] The transistor Q7 and the transistor Q8 are bipolar transistors, and the ratio of the emitter areas is 1:n; wherein, n is any real number greater than 1.

[0010] The clamping circuit comprises: the transistor Q4 and the resistors R8-R9; one end of the resistor R8 is connected with the power supply V DD The other end is connected with one end of the resistor R9 and the base of the transistor Q7 respectively; the collector of the transistor Q4 is connected with the power supply V DD The base is connected with the collector of the transistor Q4, and the emitter is connected with the other end of the resistor R9.

[0011] The current reference circuit further comprises: a starting and biasing circuit; the starting and biasing circuit comprises: the resistors R1-R7 and the transistors Q1-Q3; one end of the resistor R1 is connected with the voltage V B, the other end of the resistor R2 is connected with the base of the transistor Q2 and the base of the transistor Q1, the other end of the resistor R3 is connected with the ground, the collector of the transistor Q1 is connected with the resistor R11, the collector of the transistor Q2 is connected with the resistor R12; the emitter of the transistor Q1 and the emitter of the transistor Q2 are connected with the one end of the resistor R4, the other end of the resistor R4 is connected with the ground; the one end of the resistor R5 is connected with the voltage V B , the other end of the resistor R6 is connected with the collector of the transistor Q3, the base of the transistor Q3 is connected with the other end of the resistor R6, the emitter of the transistor Q3 is connected with the one end of the resistor R7, the other end of the resistor R7 is connected with the ground.

[0012] The current reference circuit further comprises: transistors Q5-Q6 and resistor R10; the clamping circuit, the transistors Q5-Q6 and the resistor R10 form an input branch of the non-symmetrical operational amplifier A; the collector of the transistor Q5 is connected with the clamping circuit, the emitter of the transistor Q5 is connected with the collector of the transistor Q6, the emitter of the transistor Q6 is connected with the one end of the resistor R10, the other end of the resistor R10 is connected with the ground.

[0013] The bases of the transistor Q5, the transistor Q12, the transistor Q14, the transistor Q16 and the transistor Q19 are connected with the voltage V B of the non-symmetrical operational amplifier A through the resistor R16; the bases of the transistor Q6, the transistor Q13, the transistor Q15, the transistor Q17 and the transistor Q20 are connected with the resistor R6.

[0014] Beneficial effects:

[0015] The current reference circuit of the present application comprises: a clamping circuit, a non-symmetrical operational amplifier A, an isolation transistor MP1 and a sampling resistor R for defining the current size, can directly output the reference voltage and the high-precision current generated by the sampling resistor R, does not need a mirror circuit and a special band-gap reference voltage generating circuit, has a simple structure, a wide output voltage range and can be widely applied in LDO, DC / DC converter, DAC / ADC and other analog integrated circuits requiring current reference. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 The circuit diagram based on the band-gap reference voltage generating reference current is provided for the embodiment of the present application;

[0017] Figure 2 The current reference circuit principle diagram with high precision and wide output voltage range is provided for the embodiment of the present application;

[0018] Figure 3 The current reference circuit diagram with high precision and wide output voltage range is provided for the embodiment of the present application;

[0019] Figure 4 The simulation graph of the current reference circuit provided by the embodiment of the present application changes with temperature;

[0020] Figure 5 The simulation graph of the current reference circuit provided by the embodiment of the present application changes with power voltage. DETAILED DESCRIPTION

[0021] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present application.

[0022] As shown in Figure 2 , the embodiment of the present application adopts a current reference circuit with high precision and wide output voltage range, which comprises a clamping circuit, an asymmetric operational amplifier A, an isolation tube MP1 and a sampling resistor R. One end of the clamping circuit is connected with a power supply V DD , and the other end is connected with a non-inverting terminal of the asymmetric operational amplifier A. An output terminal of the asymmetric operational amplifier A is connected with a gate of the isolation tube MP1. A source of the isolation tube MP1 is connected with an inverting terminal of the asymmetric operational amplifier A, and a drain of the isolation tube MP1 is an output terminal of the current reference circuit. One end of the sampling resistor R is connected with a power supply, and the other end is connected with the source of the isolation tube MP1.

[0023] Among them, the voltage V C between the two ends of the clamping circuit is a negative temperature characteristic, that is, the temperature coefficient is negative. The offset voltage V OS of the asymmetric operational amplifier A is a positive temperature characteristic, that is, the temperature coefficient is positive. After the negative feedback loop is established, the voltage V R between the two ends of the resistor R is a voltage formed by superimposing a negative temperature characteristic voltage and a positive temperature characteristic voltage, which is:

[0024] V R = V DD -V A+ = V C + V OS (1)

[0025] According to the temperature coefficient of the resistor R, the temperature coefficients of V C and V OS are adjusted, so that the voltage V R with the same temperature coefficient as the resistor R can be obtained, so that the current flowing through the resistor R is zero temperature number, and the current flowing through the resistor R can be directly output through MP1. The current I REF flowing through the resistor R is:

[0026]

[0027] In one embodiment, such as Figure 3 As shown, resistors R1 to R7 and transistors Q1 to Q3 constitute the startup and bias circuit. Transistors Q7 to Q20, resistors R11 to R21, and capacitor C1 constitute an asymmetric operational amplifier. The asymmetric operational amplifier and MP1 constitute a negative feedback operational amplifier. Q4, R8, and R9 constitute a clamping circuit. The clamping circuit, Q5, Q6, and R10 constitute the input branch of the non-inverting terminal of the asymmetric operational amplifier.

[0028] In an asymmetric operational amplifier, one end of resistors R11 to R12 is connected to the power supply V. DD The connections are as follows: the other end of resistor R11 is connected to the collector of transistor Q7; the other end of resistor R12 is connected to the collector of transistor Q8; the base of transistor Q8 is connected to the sampling resistor R; the emitters of transistors Q7 and Q8 are connected to the collector of transistor Q12; the emitter of transistor Q12 is connected to the collector of transistor Q13; the emitter of transistor Q13 is connected to one end of resistor R17, and the other end of resistor R17 is grounded; the emitter of transistor Q9 is connected to the other end of resistor R11, and its base is connected to one end of resistor R14; the other end of resistor R14 is connected to the collector of transistor Q9 and one end of resistor R15, respectively; the other end of resistor R15 is connected to the base of transistor Q10. The collector of transistor Q9 is connected to the collector of transistor Q14. The emitter of transistor Q14 is connected to the collector of transistor Q15. The emitter of transistor Q15 is connected to one end of resistor R18, and the other end of resistor R18 is grounded. The emitter of transistor Q10 is connected to the other end of resistor R12, and its base is connected to one end of resistor R16. The other end of resistor R16 is connected to the upper plate of capacitor C1. The collector of transistor Q10 and the lower plate of capacitor C1 are connected to the collector of transistor Q16. The emitter of transistor Q16 is connected to the collector of transistor Q17. The emitter of transistor Q17 is connected to one end of resistor R19, and the other end of resistor R19 is grounded. One end of resistor R13 is connected to the power supply V. DD The transistors are connected as follows: the emitter of transistor Q11 is connected to the other end of resistor R13; the base is connected to the collector of transistor Q10; the collector is connected to the collector of transistor Q19 and the gate of isolation transistor MP1, respectively; the emitter of transistor Q19 is connected to the collector of transistor Q20; the emitter of transistor Q20 is connected to one end of resistor R20; and the other end of resistor R20 is grounded.

[0029] In the clamping circuit, one end of resistor R8 is connected to the power supply V. DD One end is connected to the resistor R9 and the other end is connected to the base of transistor Q7; the collector of transistor Q4 is connected to the power supply V. DDThe connection, base and collector of transistor Q4 are connected with the other end of the emitter of resistor R9.

[0030] In the starting and biasing circuit, one end of resistor R1 is connected with the voltage V B of the inverting terminal of the asymmetric operational amplifier A, and the other end is connected with one end of resistor R2 and the base of transistor Q2, respectively. B The other end of resistor R2 is connected with one end of resistor R3 and the base of transistor Q1, respectively. The other end of resistor R3 is grounded. The collector of transistor Q1 is connected with resistor R11, and the collector of transistor Q2 is connected with resistor R12. The emitters of transistors Q1 and Q2 are connected with one end of resistor R4, and the other end of resistor R4 is grounded. One end of resistor R5 is connected with the voltage V B of the inverting terminal of the asymmetric operational amplifier A, and the other end is connected with one end of resistor R6 and the collector of transistor Q3, respectively. The base of transistor Q3 is connected with the other end of resistor R6, and the emitter is connected with one end of resistor R7. The other end of resistor R7 is grounded.

[0031] The collector of transistor Q5 is connected with resistor R9 of the clamping circuit, and the emitter is connected with the collector of transistor Q6. The emitter of transistor Q6 is connected with one end of resistor R10, and the other end of resistor R10 is grounded.

[0032] The bases of transistor Q5, transistor Q12, transistor Q14, transistor Q16 and transistor Q19 are connected with the voltage V A of the non-inverting terminal of the asymmetric operational amplifier A through resistor R16. The bases of transistor Q6, transistor Q13, transistor Q15, transistor Q17 and transistor Q20 are connected with the other end of resistor R6.

[0033] Among them, the base of Q7 transistor (point A) is the non-inverting terminal of the asymmetric operational amplifier, and the base of Q8 transistor (point B) is the inverting terminal of the asymmetric operational amplifier. The input branch of the non-inverting terminal of the asymmetric operational amplifier is composed of the clamping circuit, Q5-Q6 and R10, so the input voltage V C7 of the non-inverting terminal of the asymmetric operational amplifier is:

[0034]

[0035] After the establishment of the negative feedback loop of the operational amplifier, I C8 = I C , I C7 and I C8 are the collector currents of Q7 transistor and Q8 transistor. Since Q7 transistor and Q8 transistor are the same type of bipolar transistors (NPN transistors), and the ratio of the emitter areas is 1:n (n>1), there is a deviation voltage V OS between the non-inverting terminal and the inverting terminal of the operational amplifier, and V OS is:

[0036]

[0037] Then the voltage V across the sampling resistor R R for:

[0038]

[0039] The current I flowing through resistor R REF for:

[0040]

[0041] R8 and R9 are resistors of the same type. As can be seen from the formula, their temperature coefficients cancel each other out. Differentiating the voltage across the sampling resistor R with respect to temperature T, we get:

[0042]

[0043] Among them, V T E represents thermal voltage. g The bandgap of the semiconductor is represented by q, the unit electron charge is represented by k, the Boltzmann constant is represented by m, the temperature exponent of mobility is represented by n, and the emitter area ratio of the Q8 and Q7 transistors is represented by V. BE,Q4 V is the emitter-junction voltage of transistor Q4. BE,Q7 V is the emitter-junction voltage of transistor Q7. BE,Q8 V is the emitter-junction voltage of transistor Q8. B,Q7 V is the base voltage of transistor Q7. B,Q8 I is the base voltage of transistor Q8. S7 I is the reverse saturation current of the emitter junction of transistor Q7. S8 V is the reverse saturation current of the emitter junction of Q8. B Let be the voltage at point B.

[0044] Because the BE junction voltage V of the bipolar transistor BE It has a negative temperature coefficient and a thermal voltage V T It has a positive temperature coefficient, so that the voltage V R The temperature coefficient of R is equal to that of the resistor R. The ratio of R8 to R9 and the bias current of Q4 can be calculated according to formula (7). At this time, the current flowing through the resistor R can achieve high accuracy. Design I REF =100uA, simulation results of the output current of the current reference circuit as a function of temperature (temp) are as follows: Figure 4 As shown, within the range of -55℃ to +125℃, the reference current changed by only 0.05uA, with a relative change rate of only five ten-thousandths.

[0045] Because the voltage across the sampling resistor R is based on the power supply V DDThe generated band-gap reference voltage is not based on ground, so the voltage of the current reference output end is not limited by ground, and the voltage of the current reference output end can also increase with the increase of the power supply voltage V DD The PMOS tube MP1 is selected at the reference current output end, and the influence of the existence of the base current of the transistor on the reference current accuracy can be avoided. In order to ensure the reference current accuracy, the MP1 tube must work in the saturation region, so that:

[0046]

[0047] The source voltage V S of the MP1 tube is V B , and the drain voltage V DD of the MP1 tube is V R , so that:

[0048]

[0049] Wherein, μ p is the carrier mobility of the MP1 tube, C OX is the gate oxide capacitance of the MP1 tube, C OX and μ p are process parameters, is the ratio of the width W and the length L of the gate of the MP1 tube, and is a design parameter, V SG is the source-gate voltage of the MP1 tube, and V TH is the threshold voltage of the MP1 tube.

[0050] Therefore, the output end voltage is in the range of , and the reference power supply can accurately output; Figure 5 The simulation result of the output end current I REF of the current reference circuit of the application changes with the output voltage V out (that is, the output end voltage V D ) is shown in the table. In the output voltage range of 0V-15V, the size of the reference current I REF only changes by 19pA, and the relative change is 0.19ppm, which is very high in accuracy; wherein, ppm represents one per million.

[0051] In summary, the application adopts a high-precision current reference circuit, does not need a special band-gap reference voltage generating circuit and a mirror circuit, and can realize a reference voltage relative to the power supply voltage V DD at both ends of the sampling resistor through an asymmetric operational amplifier, realizes good accuracy, a wide output voltage range, and a simple circuit structure.

[0052] The above examples further illustrate the objects, technical solutions and advantages of the present application. It should be understood that the above examples are only preferred embodiments of the present application and are not intended to limit the present application. Any modification, equivalent replacement, improvement, etc. made to the present application within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A current reference circuit with high precision and wide output voltage range, characterized by, The application relates to a current reference circuit, which comprises: a clamping circuit, an asymmetric operational amplifier A, an isolation transistor MP1 and a sampling resistor R; one end of the clamping circuit is connected with a power supply, the other end is connected with a non-inverting terminal of the asymmetric operational amplifier A, an output terminal of the asymmetric operational amplifier A is connected with a gate of the isolation transistor MP1, a source of the isolation transistor MP1 is connected with an inverting terminal of the asymmetric operational amplifier A, a drain of the isolation transistor MP1 is an output terminal of a current reference circuit, one end of the sampling resistor R is connected with the power supply, the other end is connected with the source of the isolation transistor MP1; The asymmetric operational amplifier comprises transistors Q7-Q20, resistors R11-R20 and capacitor C1. One end of resistor R11 is connected to power supply V DD , the other end of resistor R11 is connected to the collector of transistor Q7, one end of resistor R12 is connected to the collector of transistor Q8, the base of transistor Q8 is connected to sampling resistor R, the emitters of transistors Q7 and Q8 are connected to the collector of transistor Q12, the emitter of transistor Q12 is connected to the collector of transistor Q13, the emitter of transistor Q13 is connected to one end of resistor R17, the other end of resistor R17 is grounded; the emitter of transistor Q9 is connected to the other end of resistor R11, the base of transistor Q9 is connected to one end of resistor R14, the other end of resistor R14 is connected to the collector of transistor Q9 and one end of resistor R15, the other end of resistor R15 is connected to the base of transistor Q10, the collector of transistor Q9 is connected to the collector of transistor Q14, the emitter of transistor Q14 is connected to the collector of transistor Q15, the emitter of transistor Q15 is connected to one end of resistor R18, the other end of resistor R18 is grounded; the emitter of transistor Q10 is connected to the other end of resistor R12, the base of transistor Q10 is connected to one end of resistor R16, the other end of resistor R16 is connected to the upper plate of capacitor C1; the collector of transistor Q10 and the lower plate of capacitor C1 are connected to the collector of transistor Q16, the emitter of transistor Q16 is connected to the collector of transistor Q17, the emitter of transistor Q17 is connected to one end of resistor R19, the other end of resistor R19 is grounded; one end of resistor R13 is connected to power supply V DD , the emitter of transistor Q11 is connected to the other end of resistor R13, the base of transistor Q11 is connected to the collector of transistor Q10, the collector of transistor Q11 is connected to the collector of transistor Q19 and the gate of isolation transistor MP1, the emitter of transistor Q19 is connected to the collector of transistor Q20, the emitter of transistor Q20 is connected to one end of resistor R20, the other end of resistor R20 is grounded. The clamping circuit comprises: transistor Q4 and resistors R8-R9; one end of the resistor R8 is connected with the power supply V DD , the other end is connected with one end of the resistor R9 and the base of the transistor Q7 respectively; the collector of the transistor Q4 is connected with the power supply V DD , the base is connected with the collector of the transistor Q4, and the emitter is connected with the other end of the resistor R9.

2. The high precision and wide output voltage range current reference circuit according to claim 1, wherein, The voltage V across the clamp circuit C has a negative temperature coefficient, and the offset voltage V OS of the asymmetrical operational amplifier A has a positive temperature coefficient.

3. The high precision and wide output voltage range current reference circuit of claim 1, wherein, The voltage V across the sampling resistor R R The temperature coefficient of the voltage V is the same as the temperature coefficient of the sampling resistor R.

4. The high precision and wide output voltage range current reference circuit of claim 1, wherein, The transistor Q7 and the transistor Q8 are bipolar transistors, and the ratio of the emitter areas is 1:n; wherein n is an arbitrary real number greater than 1.

5. The high precision and wide output voltage range current reference circuit of claim 1, wherein, Further comprising: a starting and biasing circuit; The starting and biasing circuit comprises resistors R1-R7 and transistors Q1-Q3. One end of the resistor R1 is connected to the voltage V of the inverting terminal of the asymmetric operational amplifier A B , the other end is connected to one end of the resistor R2 and the base of the transistor Q2 respectively, the other end of the resistor R2 is connected to one end of the resistor R3 and the base of the transistor Q1 respectively, the other end of the resistor R3 is grounded, the collector of the transistor Q1 is connected to the resistor R11, the collector of the transistor Q2 is connected to the resistor R12; the emitters of the transistors Q1 and Q2 are connected to one end of the resistor R4, the other end of the resistor R4 is grounded; one end of the resistor R5 is connected to the voltage V of the inverting terminal of the asymmetric operational amplifier A B , the other end is connected to one end of the resistor R6 and the collector of the transistor Q3 respectively, the base of the transistor Q3 is connected to the other end of the resistor R6, the emitter is connected to one end of the resistor R7, the other end of the resistor R7 is grounded.

6. The high precision and wide output voltage range current reference circuit of claim 5, wherein, Further comprising: transistors Q5-Q6 and a resistor R10; The clamping circuit, the transistors Q5-Q6 and the resistor R10 constitute an input branch of a non-inverting terminal of the asymmetric operational amplifier A; The collector of the transistor Q5 is connected with the clamping circuit, the emitter is connected with the collector of the transistor Q6, the emitter of the transistor Q6 is connected with one end of the resistor R10, and the other end of the resistor R10 is grounded.

7. The high precision and wide output voltage range current reference circuit of claim 6, wherein, The bases of transistors Q5, Q12, Q14, Q16 and Q19 are connected through resistor R16 to the voltage V B at the inverting terminal of the non-inverting amplifier A; the bases of transistors Q6, Q13, Q15, Q17 and Q20 are connected to resistor R6.

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