Method and system for synthesizing any digital signal

Abstract

The invention discloses an arbitrary digital signal synthesis method and system. The method comprises the following steps: analyzing a target parameter of a digital signal to be synthesized; generating a first multi-path baseband waveform by using a digital direct frequency synthesizer according to a modulation rate parameter in the target parameters, and reading pre-stored noise data to generate a second multi-path baseband waveform; selecting a plurality of appointed baseband waveforms, and modulating the plurality of baseband waveforms by using carrier frequency and bandwidth parameters in target parameters to obtain a plurality of instantaneous frequency curves; and integrating the multiple instantaneous frequency curves to obtain a phase stepping curve of each path, selecting a phase modulation curve according to a phase modulation type in the target parameters, and performing digital direct frequency synthesis on the phase stepping curve and the phase modulation curve of each path to generate multiple parallel digital synthesis signals. According to the invention, the synthesis process of the digital signals of different modulation types is uniformly decomposed, so that the coupling degree of the module and the complexity of the system are greatly reduced, and meanwhile, the resource consumption is reduced.

Description

Technical Field

[0001] The present invention relates to electronic information technology, and in particular to an arbitrary digital signal synthesis method and system. Background Art

[0002] With the development of high-speed digital circuit technology, analog waveform generation methods have been gradually replaced by digital generation methods. With the rapid development of digital technology, especially the rapid increase in the integration of integrated circuits, the realization of digital direct frequency synthesizer (DDS) has become possible. Digital direct frequency synthesis is based on sampling theory. The signal waveform is sampled at very small intervals of phase, and the amplitude of the signal waveform corresponding to the corresponding phase is calculated to form a phase-amplitude table, which is stored in the waveform memory (ROM) of the DDS device.

[0003] The current DDS-based digital signal synthesis method has high requirements for the coupling degree between modules and system complexity, which leads to high resource consumption. At the same time, the current maximum processing clock of general chips is 300MHz, which cannot directly cover high-speed and large-bandwidth modulation signals. Summary of the invention

[0004] The technical problem to be solved by the present invention is: in response to the technical problems existing in the prior art, the present invention provides a method and system for synthesizing any digital signal, which can support the generation of any high-speed and large-bandwidth modulated signal, significantly reduce the coupling degree of the modules and the complexity of the system, and at the same time reduce the consumption of resources, and can complete the general generation of high-speed and large-bandwidth modulated signals.

[0005] In order to solve the above technical problems, the technical solution proposed by the present invention is:

[0006] A method for synthesizing an arbitrary digital signal comprises the following steps:

[0007] S101) analyzing target parameters of the digital signal to be synthesized;

[0008] S102) generating a first multi-channel baseband waveform using a digital direct frequency synthesizer DDS according to a modulation rate parameter in the target parameter, and simultaneously reading pre-stored noise data to generate a second multi-channel baseband waveform;

[0009] S103) selecting a specified multi-channel baseband waveform, modulating the multi-channel baseband waveform using the carrier frequency and bandwidth parameters in the target parameters, and obtaining a multi-channel instantaneous frequency curve;

[0010] S104) Integrating the multiple instantaneous frequency curves to obtain a phase step curve for each channel, selecting a phase modulation curve according to the phase modulation type in the target parameter, performing digital direct frequency synthesis on each phase step curve and phase modulation curve using a digital direct frequency synthesizer DDS to generate multiple parallel digital synthesized signals.

[0011] Furthermore, step S101 also includes the step of performing frequency hopping on the multi-frequency input signal, including:

[0012] S201) acquiring a frequency effective signal until the data of the frequency effective signal reaches a specified symbol length;

[0013] S202) cyclically increasing the value of the current frequency symbol number, or multiplying the value of the current frequency symbol number by the pseudo noise sequence to obtain a new frequency symbol number;

[0014] S203) searching for a new frequency value according to the new number of frequency symbols, and obtaining a new frequency valid signal according to the new frequency value.

[0015] Further, in step S102, when a first multi-channel baseband waveform is generated using a digital direct frequency synthesis DDS according to a modulation rate parameter in the target parameter, the method includes:

[0016] S301) obtaining a frequency sweep period T, and multiplying the frequency sweep period T by the DAC sampling rate clock Fs to obtain a frequency sweep clock number L of a single cycle;

[0017] S302) dividing the DDS depth of the digital direct frequency synthesizer DDS by the number of frequency sweep clocks L of a single cycle to obtain a first phase step word;

[0018] S303) calculating the phase step word and initial phase of each channel respectively according to the first phase step word;

[0019] S304) performing digital direct frequency synthesis on the phase step word and the initial phase word of each channel using a digital direct frequency synthesizer DDS, and obtaining a sinusoidal baseband waveform, a sawtooth baseband waveform and an upper triangle baseband waveform according to the digital direct frequency synthesis results of each channel;

[0020] S305) Obtain a frequency sweep type, and select a specified waveform from a sinusoidal baseband waveform, a sawtooth baseband waveform, and an upper triangle baseband waveform as a first multi-channel baseband waveform.

[0021] Furthermore, in step S303, the phase step word and initial phase expression of each channel are as follows:

[0022]

[0023] in, is the initial phase, Pstep is the phase step word, n is the number of first phase step words in each channel, n = 0, 1, 2...N-1, 2 M is the DDS depth, and N is the total number of parallel paths.

[0024] Furthermore, in step S102, when the pre-stored noise data is read to generate the second multi-channel baseband waveform, it includes:

[0025] Wait for and obtain a valid signal, take the symbol length of the valid signal as a period, cyclically read the noise data pre-stored in the corresponding address of the ROM as the second multi-channel baseband waveform, wherein the noise data is a multi-channel uniformly distributed noise waveform.

[0026] Furthermore, in step S103, when the carrier frequency and bandwidth parameters in the target parameters are used to modulate the multi-channel baseband waveform, it includes:

[0027] S401) multiplying the signal bandwidth and the signal frequency by the DDS depth of the digital direct frequency synthesizer DDS respectively, and dividing by the DAC sampling rate to obtain a corresponding bandwidth control word and frequency control word;

[0028] S402) After multiplying the multiple baseband waveforms by the bandwidth control word, the waveforms are added to the frequency control word to obtain multiple instantaneous frequency curves.

[0029] Furthermore, in step S104, the phase step curve expression of each channel is as follows:

[0030]

[0031] in, is the instantaneous frequency curve, N is the total number of parallel paths, and n is the number of progressive instantaneous frequency curves of each path.

[0032] Further, in step S104, when selecting a phase modulation curve according to the phase modulation type in the target parameter, it includes: multiplying the second multi-channel baseband waveform by a preset phase modulation coefficient to obtain a noise phase modulation curve; or, using an externally configured phase encoding curve as the phase modulation curve; or, the phase modulation curve uses a constant value of 0.

[0033] Furthermore, after step S104, the method further includes: generating a band-limited white noise according to the bandwidth parameter in the target parameter, multiplying the band-limited white noise with the digital synthetic signal to obtain a noisy modulated signal, and performing on-off control of two channels of the modulated signal to obtain flicker interference.

[0034] The present invention also provides an arbitrary digital signal synthesis system, comprising:

[0035] A baseband frequency waveform generating module is used to generate a first multi-channel baseband waveform using a digital direct frequency synthesizer DDS according to a modulation rate parameter in a target parameter of a digital signal to be synthesized, and to generate a second multi-channel baseband waveform by reading pre-stored noise data;

[0036] A multi-channel instantaneous frequency curve generation module is used to select a specified multi-channel baseband waveform according to the input information, and modulate the multi-channel baseband waveform using the carrier frequency and bandwidth parameters in the target parameters to obtain a multi-channel instantaneous frequency curve;

[0037] The instantaneous frequency curve integration module integrates multiple instantaneous frequency curves to obtain the phase step curve of each channel, and selects the phase modulation curve according to the phase modulation type in the target parameter;

[0038] The multi-channel parallel digital signal synthesis module is used to perform digital direct frequency synthesis on each phase step curve and phase modulation curve using a digital direct frequency synthesizer DDS to generate multi-channel parallel digital synthesized signals; it is also used to generate band-limited white noise according to the bandwidth parameter in the target parameter, multiply the band-limited white noise with the digital synthesized signal to obtain a noisy modulation signal, and perform on-off control of two channels of the modulation signal to obtain flicker interference.

[0039] Compared with the prior art, the advantages of the present invention are:

[0040] 1. By decomposing the synthesis of digital signals of different modulation types into several sub-processes, namely, baseband waveform generation, baseband waveform selection and conversion into instantaneous frequency curve, instantaneous frequency curve integration to complete phase step calculation, and multi-channel parallel digital signal synthesis, the corresponding functional modules are realized, which greatly reduces the coupling degree of modules and the complexity of the system. At the same time, through unified decomposition, the reusability of each module is improved, and the consumption of chip resources is greatly reduced:

[0041] 2. It can receive any baseband frequency sweep waveform and generate a digital signal of any frequency sweep waveform according to the input frequency and bandwidth;

[0042] 3. Digital modulation based on the DAC sampling rate can generate various high-speed modulation signals with large bandwidth if the chip resources are sufficient, and their phase changes continuously at the DAC sampling rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 It is an overall flow chart of an embodiment of the present invention.

[0044] Figure 2 The flowchart is a flow chart of frequency hopping for a multi-frequency input signal in an embodiment of the present invention.

[0045] Figure 3This is a flow chart of using a digital direct frequency synthesizer DDS to generate a first multi-channel baseband waveform in an embodiment of the present invention.

[0046] Figure 4 The present invention is a flowchart of reading pre-stored noise data to generate a second multi-channel baseband waveform in an embodiment of the present invention.

[0047] Figure 5 The flowchart of generating multi-channel instantaneous frequency curves in an embodiment of the present invention.

[0048] Figure 6 The present invention is a flowchart of generating multi-channel parallel digital synthesis signals in an embodiment of the present invention. DETAILED DESCRIPTION

[0049] The present invention is further described below in conjunction with the accompanying drawings and specific preferred embodiments, but the protection scope of the present invention is not limited thereby.

[0050] Embodiment 1

[0051] In order to realize arbitrary high-speed digital signal synthesis while reducing system complexity and coupling degree, and also reducing resource consumption, this embodiment proposes the following concepts:

[0052] Complete the generation of multi-channel parallel sweep waveforms, noise waveforms, and single-tone waveforms;

[0053] The baseband waveform is selected according to the input information and converted to the specified center frequency and bandwidth to obtain the instantaneous frequency curve, which is in the depth of DDS;

[0054] Complete the calculation of the phase step of each DDS, and select the initial phase of each DDS according to the input phase modulation type;

[0055] Call multiple DDS channels to generate multiple parallel signals;

[0056] Finally, the signal is superimposed with band-limited white noise and on-off control, and flicker, narrowband and broadband interference signals can also be generated.

[0057] Based on the above concept, this embodiment proposes a method for synthesizing arbitrary digital signals, such as Figure 1 As shown, the following steps are included:

[0058] S101) analyzing target parameters of the digital signal to be synthesized;

[0059] S102) generating a first multi-channel baseband waveform using a digital direct frequency synthesizer DDS according to a modulation rate parameter in the target parameter, and simultaneously reading pre-stored noise data to generate a second multi-channel baseband waveform;

[0060] S103) selecting a specified multi-channel baseband waveform, modulating the multi-channel baseband waveform using the carrier frequency and bandwidth parameters in the target parameters, and obtaining a multi-channel instantaneous frequency curve;

[0061] S104) Integrating the multiple instantaneous frequency curves to obtain a phase step curve for each channel, selecting a phase modulation curve according to the phase modulation type in the target parameter, performing digital direct frequency synthesis on each phase step curve and phase modulation curve using a digital direct frequency synthesizer DDS to generate multiple parallel digital synthesized signals.

[0062] S105) generating a band-limited white noise according to the bandwidth parameter in the target parameter, multiplying the band-limited white noise with the digital synthesis signal to obtain a noisy modulation signal, and performing on-off control of two channels of the modulation signal to obtain flicker interference.

[0063] Through the above steps, high-speed and large-bandwidth modulation signals can be generated, including but not limited to sine, triangle, sawtooth, noise phase modulation, noise frequency modulation, FSK, etc. By decomposing the synthesis process of digital signals of different modulation types into several sub-modules, namely, baseband waveform generation, baseband waveform selection and conversion to instantaneous frequency curve, instantaneous frequency curve integration to complete phase step calculation, and multi-channel parallel digital signal synthesis, the coupling degree of modules and the complexity of the system are greatly reduced. At the same time, through unified decomposition, the reusability of each module is improved, and the consumption of chip resources is greatly reduced.

[0064] Each step is described in detail below.

[0065] In step S101 of this embodiment, the input signal type, interference bandwidth, frequency point and other parameters are analyzed to convert the unit and bit width for subsequent use.

[0066] Step S101 analyzes the target parameters and, when multiple frequency points are input, frequency hopping is required according to a certain symbol length. In this embodiment, a maximum of 128 frequency points that are continuously input are cached into RAM. When a certain frequency point generates a signal of a specified length, it is read again in sequence, or the frequency points in RAM are read according to a pseudo noise sequence. Figure 2 As shown, step S101 also includes a step of performing frequency hopping for a multi-frequency input signal, including:

[0067] S201) acquiring a frequency effective signal until the data of the frequency effective signal reaches a specified symbol length;

[0068] S202) cyclically increasing the value of the current frequency symbol number, or multiplying the value of the current frequency symbol number by a pseudo noise sequence to obtain a new frequency symbol number. In this embodiment, the pseudo noise sequence is a 16-bit M sequence;

[0069] S203) Searching for a new frequency value in RAM according to the new frequency symbol number, and obtaining a new frequency valid signal according to the new frequency value.

[0070] In this embodiment, a maximum of 128 frequency points input continuously are cached into the RAM. After a certain frequency point generates a signal of a specified length, the frequency points in the RAM are read again in sequence, or the pseudo noise sequence is read according to the pseudo noise sequence, where the pseudo noise sequence is a 16-bit M sequence.

[0071] In step S102 of this embodiment, according to the modulation rate parameter obtained by analysis, a swept frequency baseband waveform is synchronously generated using DDS, and data in ROM is cyclically read to generate a noise baseband waveform. In addition, other baseband waveforms input from the outside are received. In order to distinguish, in this embodiment, the multi-channel swept frequency baseband waveform is referred to as the first multi-channel baseband waveform, the multi-channel noise baseband waveform is referred to as the second multi-channel baseband waveform, and the multi-channel other baseband waveforms (such as Figure 1 The single frequency, no waveform, constant zero value, etc. shown in the figure is called the third multi-channel baseband waveform. Since the third multi-channel baseband waveform is directly input from the outside, how to obtain the waveform input from the outside is well known to those skilled in the art and will not be repeated here. The following only describes the generation process of the first multi-channel baseband waveform and the second multi-channel baseband waveform.

[0072] like Figure 3 As shown, in step S102, when a first multi-channel baseband waveform is generated using a digital direct frequency synthesis DDS according to a modulation rate parameter in a target parameter, the method includes:

[0073] S301) obtaining a frequency sweep period T, and multiplying the frequency sweep period T by the DAC sampling rate clock Fs to obtain a frequency sweep clock number L of a single cycle;

[0074] S302) dividing the DDS depth of the digital direct frequency synthesizer DDS by the number of frequency sweep clocks L of a single cycle to obtain a DDS address step under the DAC sampling rate clock Fs, which is referred to as a first phase step word in this embodiment;

[0075] S303) Calculate the phase step word and initial phase of each channel according to the first phase step word, and the phase step word and initial phase of each channel are expressed as follows:

[0076]

[0077] in, is the initial phase, P step is the phase step word, n is the number of first phase step words in each channel, n = 0, 1, 2...N-1, 2 Mis the DDS depth, N is the total number of parallel paths of FPGA; in this embodiment, the FPGA single-path processing clock is 150MHz, there are 32 paths in total, and the DAC sampling rate is 4800MHz, so,

[0078]

[0079] S304) performing digital direct frequency synthesis on the phase step word and the initial phase word of each channel using a digital direct frequency synthesizer DDS, and obtaining a sinusoidal baseband waveform, a sawtooth baseband waveform and an upper triangle baseband waveform according to the digital direct frequency synthesis results of each channel;

[0080] How to use a digital direct frequency synthesizer DDS to perform digital direct frequency synthesis according to a phase step word and an initial phase word is well known to those skilled in the art, and the specific process will not be described in detail in this embodiment. Figure 3 As shown, a sinusoidal baseband waveform with a continuous phase at the DAC sampling rate and a period of T is obtained by the initial phase and phase step words of each DDS; the phase word corresponding to the sinusoidal waveform can be regarded as a sawtooth baseband waveform with a period of T; the phase word corresponding to the sinusoidal waveform is shifted left by one bit to obtain an upper triangular baseband waveform with a period of T;

[0081] S305) Obtain a delayed synchronous frequency sweep type, and select a specified waveform from a sinusoidal baseband waveform, a sawtooth baseband waveform, and an upper triangle baseband waveform as a first multi-channel baseband waveform.

[0082] like Figure 4 As shown, for generating a uniformly distributed noise baseband waveform, it is only necessary to cyclically read the noise data pre-stored in the ROM with the symbol length as a period. Therefore, in step S102, when reading the pre-stored noise data to generate the second multi-channel baseband waveform, it includes:

[0083] Wait for and obtain a valid signal, take the symbol length of the valid signal as a period, cyclically read the noise data pre-stored in the corresponding address of the ROM as the second multi-channel baseband waveform, wherein the noise data is a multi-channel uniformly distributed noise waveform.

[0084] Specifically, in this embodiment, since the total number of parallel paths of the FPGA is 32, every time the data of the acquired valid signal reaches the corresponding code element length, the value of the address counter is cyclically incremented, and 32 uniformly distributed noises are obtained in the ROM according to the new address value, thereby outputting the valid signal together with the 32 uniformly distributed noise waveforms.

[0085] In step S103 of this embodiment, by selecting a specified baseband waveform, the baseband waveform is modulated by the analyzed carrier frequency and bandwidth parameters to obtain an instantaneous frequency curve of the signal to be generated; Figure 5As shown, in this embodiment, the baseband waveform can be specified to select a corresponding waveform according to the parameter type included in the target parameter, or can be specified to select a corresponding waveform according to an external input instruction.

[0086] In step S103 of this embodiment, when the carrier frequency and bandwidth parameters in the target parameters are used to modulate the multi-channel baseband waveform, it includes:

[0087] S401) After multiplying the signal bandwidth and the signal frequency by the DDS depth of the digital direct frequency synthesizer DDS, the signal bandwidth and the signal frequency are divided by the DAC sampling rate to obtain the corresponding bandwidth control word and the frequency control word. In this embodiment, after the frequency and the bandwidth are converted into the corresponding bandwidth control word and the frequency control word in step S101, the synchronization is delayed to step S103 to generate the instantaneous frequency curve. The conversion relationship is expressed by the formula as follows:

[0088]

[0089] Where X is the input signal frequency (bandwidth), unit Hz, Y fcw is the frequency control word (bandwidth control word), the denominator 4800e6 corresponds to the DAC sampling rate of 4800MHz of the FPGA in this embodiment, 2 32 Corresponding to the DDS depth of this embodiment;

[0090] S402) After multiplying the multiple baseband waveforms by the bandwidth control word, the waveforms are added to the frequency control word to obtain multiple instantaneous frequency curves.

[0091] Through the above steps, the instantaneous frequency curve in units of DDS resolution, that is, the phase step word at 4800 MHz, is finally obtained.

[0092] In step S104 of this embodiment, when the signal is processed in parallel in multiple channels, the instantaneous frequency curve is converted into a frequency control word, and then multi-channel integration is performed to obtain continuous phase step curves modulated at the DAC sampling rate, and then the corresponding digital signal is obtained using DDS based on the phase step curve and the corresponding noise phase modulation curve.

[0093] Specifically, Figure 6 As shown, in this embodiment, multiple instantaneous frequency curves are integrated to obtain a phase step curve of each channel, and the expression of the phase step curve of each channel is as follows:

[0094]

[0095] in, is the instantaneous frequency curve, N is the total number of parallel paths in FPGA, and n is the number of progressive instantaneous frequency curves in each path.

[0096] Since the FPGA in this embodiment has a single-channel processing clock of 150MHz, a total of 32 channels, and the DAC uses a rate of 4800MHz, the instantaneous frequency curve is a phase step word at 4800MHz, so the integration of the 32-channel phase step word at 4800MHz is used to obtain 32 phase step words at 150MHz unit time. The integration process is described in the form of a formula as follows:

[0097]

[0098] After the calculation of the phase step word of the 32-channel DDS is completed, for the initial phase word, the noise phase modulation curve can be obtained by multiplying the noise waveform in step S102 with the phase modulation coefficient, or the corresponding phase encoding curve can be configured externally, or the phase is not modulated and a constant value of 0 is used. Therefore, in step S104, when selecting the phase modulation curve according to the phase modulation type in the target parameter, it includes: multiplying the second multi-channel baseband waveform with the preset phase modulation coefficient to obtain a noise phase modulation curve; or, using the phase encoding curve configured externally as the phase modulation curve; or, the phase modulation curve uses a constant value of 0.

[0099] After obtaining the phase step curve and phase modulation curve of each channel, when using a digital direct frequency synthesizer DDS to perform digital direct frequency synthesis on the phase step curve and phase modulation curve of each channel respectively, the phase step word at the current moment can be obtained from the phase step curve, and the initial phase word at the current moment can be obtained from the phase modulation curve, so as to use the digital direct frequency synthesizer DDS to perform digital direct frequency synthesis on the phase step word and initial phase word of each channel at the current moment to obtain a digital synthesized signal for each channel. In this embodiment, 32 parallel digital synthesized signals with continuous phase modulation at 4800MHz are finally generated.

[0100] In this embodiment, step S105 superimposes the generated band-limited white noise with the synthesized digital signal and performs on-off control of the two channels according to the parameters to complete the flickering function. The generation process of the band-limited white noise is well known to those skilled in the art and will not be described in detail in this embodiment.

[0101] Embodiment 2

[0102] This embodiment proposes an arbitrary digital signal synthesis system based on the first embodiment, including baseband frequency waveform generation, multi-channel instantaneous frequency curve generation, instantaneous frequency curve integration, multi-channel parallel digital signal synthesis and other modules arranged in the FPGA, wherein:

[0103] The baseband frequency waveform generation module is used to complete the generation of multi-channel parallel sweep waveforms, noise waveforms, and single-tone waveforms. Specifically, according to the modulation rate parameters in the target parameters of the digital signal to be synthesized, a digital direct frequency synthesizer DDS is used to generate a first multi-channel baseband waveform, and pre-stored noise data is read to generate a second multi-channel baseband waveform. The third multi-channel baseband waveform is also generated by obtaining other baseband waveforms input from the outside.

[0104] The multi-channel instantaneous frequency curve generation module is used to select a baseband waveform according to the input information, and convert it into a specified center frequency and bandwidth to obtain an instantaneous frequency curve, which is in units of DDS depth. Specifically, the specified multi-channel baseband waveform is selected according to the input information, and the carrier frequency and bandwidth parameters in the target parameters are used to modulate the multi-channel baseband waveform to obtain a multi-channel instantaneous frequency curve;

[0105] The instantaneous frequency curve integration module is used to complete the calculation of the phase step of each DDS channel, and select the initial phase of each DDS channel according to the input phase modulation type. Specifically, the multiple instantaneous frequency curves are integrated to obtain the phase step curve of each channel, and the phase modulation curve is selected according to the phase modulation type in the target parameter;

[0106] The multi-channel parallel digital signal synthesis module is used to call multiple DDSs to complete the generation of multiple parallel signals; finally, the signal is superimposed with band-limited white noise and on-off control, and the generation of flicker, narrowband, and broadband interference signals can also be completed. Specifically, the phase step curve and phase modulation curve of each channel are respectively subjected to digital direct frequency synthesis using a digital direct frequency synthesizer DDS to generate multiple parallel digital synthesized signals; it is also used to generate band-limited white noise according to the bandwidth parameters in the target parameters, multiply the band-limited white noise with the digital synthesized signal to obtain a noisy modulated signal, and the modulated signal is subjected to on-off control of two channels to obtain flicker interference.

[0107] In summary, the present invention discloses a method and system for synthesizing arbitrary digital signals, which can generate high-speed and large-bandwidth modulation signals, including but not limited to sine, triangle, sawtooth, noise phase modulation, noise frequency modulation, FSK, etc. Compared with the currently published FPGA digital signal synthesis circuit, the present invention has the following advantages:

[0108] The present invention decomposes digital signals of different modulation types into several groups of module data in a unified manner, thereby greatly reducing the coupling degree of modules and the complexity of the system. At the same time, the unified decomposition improves the reusability of each sub-module and greatly reduces the consumption of chip resources: the current circuit system can receive any baseband frequency sweep waveform, and generate a digital signal of any frequency sweep waveform according to the input frequency and bandwidth; when the chip resources are sufficient, the present invention performs digital modulation according to the DAC rate to generate a large-bandwidth high-speed modulation signal, and the signal phase changes continuously at the DAC rate, which can support the generation of any high-speed and large-bandwidth modulation signal, such as 32 channels of 150MHz in Example 1, that is, 4.8G bandwidth signals.

[0109] The above is only a preferred embodiment of the present invention, and does not limit the present invention in any form. Although the present invention has been disclosed as a preferred embodiment, it is not used to limit the present invention. For example, a series of parameters such as the FPGA processing clock and the number of parallel signal transmission paths can also be modified. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solution of the present invention should fall within the scope of protection of the technical solution of the present invention.

Claims

1. A method for synthesizing an arbitrary digital signal, characterized in that: The following steps are involved: S101) analyzing target parameters of the digital signal to be synthesized; S102) generating a first multi-channel baseband waveform using a digital direct frequency synthesizer DDS according to a modulation rate parameter in the target parameter, and simultaneously reading pre-stored noise data to generate a second multi-channel baseband waveform; S103) selecting a specified multi-channel baseband waveform, modulating the multi-channel baseband waveform using the carrier frequency and bandwidth parameters in the target parameters, and obtaining a multi-channel instantaneous frequency curve; S104) Integrating the multiple instantaneous frequency curves to obtain a phase step curve for each channel, selecting a phase modulation curve according to the phase modulation type in the target parameter, performing digital direct frequency synthesis on each phase step curve and phase modulation curve using a digital direct frequency synthesizer DDS to generate multiple parallel digital synthesized signals.

2. The arbitrary digital signal synthesis method according to claim 1, characterized in that: Step S101 also includes the step of performing frequency hopping on the multi-frequency input signal, including: S201) acquiring a frequency effective signal until the data of the frequency effective signal reaches a specified symbol length; S202) cyclically increasing the value of the current frequency symbol number, or multiplying the value of the current frequency symbol number by the pseudo noise sequence to obtain a new frequency symbol number; S203) Find a new frequency value according to the new frequency symbol number, and obtain a new frequency valid signal according to the new frequency value.

3. The arbitrary digital signal synthesis method according to claim 1, characterized in that: In step S102, when a first multi-channel baseband waveform is generated using a digital direct frequency synthesizer DDS according to a modulation rate parameter in the target parameter, the method includes: S301) obtaining a frequency sweep period T, and multiplying the frequency sweep period T by the DAC sampling rate clock Fs to obtain a frequency sweep clock number L of a single cycle; S302) dividing the DDS depth of the digital direct frequency synthesizer DDS by the number of frequency sweep clocks L of a single cycle to obtain a first phase step word; S303) calculating the phase step word and initial phase of each channel respectively according to the first phase step word; S304) performing digital direct frequency synthesis on the phase step word and the initial phase word of each channel using a digital direct frequency synthesizer DDS, and obtaining a sinusoidal baseband waveform, a sawtooth baseband waveform and an upper triangle baseband waveform according to the digital direct frequency synthesis results of each channel; S305) Obtain a frequency sweep type, and select a specified waveform from a sinusoidal baseband waveform, a sawtooth baseband waveform, and an upper triangle baseband waveform as a first multi-channel baseband waveform.

4. The arbitrary digital signal synthesis method according to claim 3, characterized in that: In step S303, the phase step word and initial phase expression of each channel are as follows: in, is the initial phase, P step is the phase step word, n is the number of first phase step words in each channel, n = 0, 1, 2...N-1, 2 M is the DDS depth, and N is the total number of parallel paths.

5. The arbitrary digital signal synthesis method according to claim 1, characterized in that: In step S102, when the pre-stored noise data is read to generate the second multi-channel baseband waveform, it includes: Wait for and obtain a valid signal, take the symbol length of the valid signal as a period, cyclically read the noise data pre-stored in the corresponding address of the ROM as the second multi-channel baseband waveform, wherein the noise data is a multi-channel uniformly distributed noise waveform.

6. The arbitrary digital signal synthesis method according to claim 1, characterized in that: In step S103, when the carrier frequency and bandwidth parameters in the target parameters are used to modulate the multi-channel baseband waveform, it includes: S401) multiplying the signal bandwidth and the signal frequency by the DDS depth of the digital direct frequency synthesizer DDS respectively, and dividing by the DAC sampling rate to obtain a corresponding bandwidth control word and frequency control word; S402) After multiplying the multiple baseband waveforms by the bandwidth control word, the waveforms are added to the frequency control word to obtain multiple instantaneous frequency curves.

7. The arbitrary digital signal synthesis method according to claim 1, characterized in that: In step S104, the phase step curve expression of each channel is as follows: in, is the instantaneous frequency curve, N is the total number of parallel paths, and n is the number of progressive instantaneous frequency curves of each path.

8. The arbitrary digital signal synthesis method according to claim 1, characterized in that: In step S104, when selecting a phase modulation curve according to the phase modulation type in the target parameter, it includes: multiplying the second multi-channel baseband waveform by a preset phase modulation coefficient to obtain a noise phase modulation curve; or using an externally configured phase encoding curve as the phase modulation curve; or, the phase modulation curve uses a constant value of 0.

9. The arbitrary digital signal synthesis method according to claim 1, characterized in that: After step S104, the method further includes: generating band-limited white noise according to the bandwidth parameter in the target parameter, multiplying the band-limited white noise with the digital synthesis signal to obtain a noisy modulation signal, and performing on-off control of two channels of the modulation signal to obtain flicker interference.

10. An arbitrary digital signal synthesis system, characterized in that: include: A baseband frequency waveform generation module is used to generate a first multi-channel baseband waveform using a digital direct frequency synthesizer DDS according to a modulation rate parameter in a target parameter of a digital signal to be synthesized, and to generate a second multi-channel baseband waveform by reading pre-stored noise data; A multi-channel instantaneous frequency curve generation module is used to select a specified multi-channel baseband waveform according to the input information, and modulate the multi-channel baseband waveform using the carrier frequency and bandwidth parameters in the target parameters to obtain a multi-channel instantaneous frequency curve; The instantaneous frequency curve integration module integrates multiple instantaneous frequency curves to obtain the phase step curve of each channel, and selects the phase modulation curve according to the phase modulation type in the target parameter; The multi-channel parallel digital signal synthesis module is used to perform digital direct frequency synthesis on each phase step curve and phase modulation curve using a digital direct frequency synthesizer DDS to generate multi-channel parallel digital synthesized signals; it is also used to generate band-limited white noise according to the bandwidth parameter in the target parameter, multiply the band-limited white noise with the digital synthesized signal to obtain a noisy modulation signal, and perform on-off control of two channels of the modulation signal to obtain flicker interference.

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