Fast frequency adaptive inverter control method and system applied to grid-type V2G charging piles
By adopting a fast frequency adaptive inverter control method, the problems of insufficient support capacity and low power quality of V2G charging piles under grid frequency fluctuations are solved, achieving efficient power quality synchronous grid connection and fast response, and reducing system recovery time and memory usage.
Patent Information
- Application Number
- CN202411849575.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-16
- Publication Date
- 2025-12-02
- Estimated Expiration
- 2044-12-16
AI Technical Summary
Traditional V2G charging piles are insufficient in supporting grid frequency fluctuations and have low output power quality. Existing control strategies have inherent constraints on tracking accuracy and disturbance suppression performance, leading to system instability and poor power quality.
A fast frequency adaptive inverter control method is adopted. By collecting the output voltage and current of the inverter side, calculating the phase angle and virtual potential, a reference voltage signal is obtained. The signal is then modulated using a fast frequency adaptive repetitive controller with active disturbance rejection. Combined with a discretized hybrid control scheme, a linear active disturbance rejection controller is constructed to suppress noise interference and improve power quality.
Under grid frequency fluctuations, high-quality synchronous grid-connected voltage was achieved, reducing system recovery time, improving power quality, reducing the risk of power oscillation, and reducing the memory footprint of digital implementation.
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Figure CN119695907B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of three-phase inverter control for V2G charging piles for electric vehicles, and in particular to a fast frequency adaptive inverter control method and system for grid-type V2G charging piles. Background Technology
[0002] Traditional DC-AC inverters used in the front-end of electric vehicle charging stations employ direct power control and dual closed-loop voltage and current control strategies to achieve performance such as unity power factor, sinusoidal AC current, and stable DC bus voltage. However, this result faces significant challenges in complex real-world grid environments, such as those with frequency fluctuations. Therefore, how V2G charging stations for electric vehicles can proactively participate in grid frequency regulation and improve output power quality to achieve grid-friendly grid connection is a pressing issue that needs to be addressed.
[0003] To mitigate the adverse effects of phase-locked loops (PLLs) on frequency control loops, existing technologies employ a grid-based power control strategy that replaces the actual grid-connected angular frequency with the rated angular frequency. However, the differences between frequency regulation and damping functions during dynamic adjustment can trigger severe power oscillations, leading to system instability. Furthermore, considering actual grid frequency fluctuations, the virtual angular frequency will deviate from the rated frequency, following the actual grid frequency, causing the reference signal received by the underlying control loop to exhibit frequency conversion characteristics. Existing technologies still employ proportional-integral (PI) control strategies in a synchronous rotating coordinate system or traditional repetitive control strategies in a stationary coordinate system. However, these traditional strategies have inherent constraints on tracking accuracy and disturbance suppression performance, requiring complex decoupling operations and having a very limited range of harmonic orders that can be suppressed. Summary of the Invention
[0004] The technical problem to be solved by the present invention is to provide a fast frequency adaptive inverter control method and system for grid-type V2G charging piles, which addresses the shortcomings of existing technologies and solves the problems of insufficient support capacity and low output power quality of traditional V2G charging piles when dealing with grid frequency fluctuations.
[0005] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is: a fast frequency adaptive inverter control method applied to grid-type V2G charging piles, comprising the following steps:
[0006] The output voltage and current of the three-phase inverter side of the V2G charging pile are collected, and the instantaneous output power is calculated. The collected three-phase output voltage is then subjected to Clark transformation to obtain the inverter side output voltage v along the α axis. αo ;
[0007] Calculate the phase angle θ and virtual potential E of the V2G charging pile m And using the phase angle θ and virtual potential Em The three-phase reference voltage signal is acquired, and the reference voltage under the α axis is obtained after the three-phase reference voltage signal is transformed by Clark.
[0008] The reference voltage along the α axis and v αo The difference between the two is the tracking difference v. e , will v e The signal is fed into a fast frequency adaptive repetitive controller based on active disturbance rejection. The tracking difference is calculated in each control cycle to obtain the modulation signal of the inverter bridge. After being modulated by a PWM modulator, the duty cycle signal for controlling the switching of the three-phase inverter in the V2G charging pile is obtained.
[0009] The formula for calculating instantaneous power is: Among them, u a u b u c For three-phase output voltage; i a i b i c For the three-phase output current, P e Q e These are instantaneous active power and instantaneous reactive power, respectively.
[0010] The formula for calculating the phase angle θ is: θ=∫ωdt; where ω is the mechanical angular velocity.
[0011] Reference voltage signal v along the α axis αref Represented as:
[0012] v αref =E m sin(θ).
[0013] The linear extended state observer in the active disturbance rejection control loop is constructed as follows:
[0014]
[0015] In the formula, For the corresponding state vector x(k), the extended observation vector is... L c The observation gain to be adjusted. For the corresponding output variable y(k)=v αo (k)+δ y The observed variable, δ y Indicates measurement noise interference; where:
[0016]
[0017] A d B d and C dThe coefficient matrix is represented as follows:
[0018]
[0019] Among them, T s For the controller sampling period, b0 = 1 / L f C f L f and C f These represent the inductance and capacitance of the LC filter on the inverter side of the V2G charging pile, respectively. The modulation signal of the inverter bridge, i gα Represents the grid current, Δv α The voltage error caused by unmeasurable signals, T pwm The delay introduced by SPWM modulation, R L i is the equivalent resistance on the inductor. Lα ν αo The inductance L in the LC filter are respectively represented by f Current and capacitance C f The output voltage.
[0020] in, and Let represent the first derivatives of the inductor current, capacitor voltage, and grid current in the LC filter, respectively, and t be the time variable.
[0021] The expression for the modulation signal u(k) of the inverter bridge at time k is:
[0022]
[0023] In the formula, k1 and k2 are the error control gains, and v e G is the tracking difference of the output voltage; FARC The transfer function represents a repetitive controller with frequency adaptability; the compensation amount is known from the model information. The expression is
[0024] Transfer function G of a repetitive controller with frequency adaptation capability FARC The expression is:
[0025]
[0026] In the formula, k rc Given a constant control gain, S(z) is the calibration function, and G... FD (z) is a filter with a farrow structure, and Q(z) represents a zero-phase-shift low-pass filter, which is chosen as a constant of 0.95; It is a periodic delay unit, where N1 is the delay step size. N is the delay unit for the forward channel, and N2 is the delay step size.
[0027] Filter G with farrow structure FD The expression for (z) is:
[0028]
[0029] In the formula, the delay time p d =(n s -n c )-n d ; sampling times n s and delay compensation times n d The calculation formulas are as follows: n s =f s / (k h f n ), n d =floor(n s -n c ), floor is the floor function; f s k is the sampling frequency. h To enable the repetitive controller to suppress harmonics, setting the number of harmonic suppression cycles to a constant of 1 allows for zero steady-state error tracking in a two-phase stationary coordinate system. n For the periodic nominal frequency, n c For a given advance beat.
[0030] As an inventive concept, the present invention also provides a fast frequency adaptive inverter control system for grid-type V2G charging piles, including a memory, a processor, and a computer program stored in the memory; the processor executes the computer program to implement the steps of the above method.
[0031] This invention provides an input signal for the instantaneous power calculation loop to the grid-type power control loop, which simultaneously retains the inverter system's frequency regulation and damping functions to reduce the risk of power oscillations. By constructing a reference frequency synchronized with the actual power grid, a discrete hybrid control scheme with rapid frequency adaptation capability is employed to improve output power quality. The frequency adaptation strategy in the voltage inner loop control scheme ensures high-quality synchronous grid-connected voltage even when the grid frequency drops. Combined with a linear active disturbance rejection controller, the final voltage inner loop control loop can be used to eliminate potential non-periodic noise interference in the charging pile inverter system, thereby shortening the system recovery time.
[0032] Compared with existing technologies, the advantages of this invention are as follows: The grid-type power control loop of this invention retains both the actual damping effect and frequency regulation function, and can provide a frequency conversion reference signal that changes synchronously with the grid frequency for the inner power quality control loop while providing power support. Furthermore, the proposed inner power quality controller has a simple yet accurate frequency adaptive capability, effectively tracking the reference signal of any period and compensating for harmonic distortion. In particular, the delay coefficient in the proposed scheme does not require online updating, reducing the memory footprint of conventional frequency adaptive schemes during digital implementation. Through an integrated discrete active disturbance rejection controller, the proposed scheme can also actively suppress external interference to provide a fast dynamic response complementary to the frequency adaptive repetitive controller, overcoming the inherent shortcomings of traditional control schemes that require a trade-off between tracking accuracy and dynamic performance. Attached Figure Description
[0033] Figure 1 This is a circuit topology and overall control block diagram of a V2G charging pile according to an embodiment of the present invention;
[0034] Figure 2 This is a block diagram of the fast frequency adaptive inverter control for a V2G charging pile according to an embodiment of the present invention;
[0035] Figures 3(a) and 3(b) are output voltage response and harmonic content analysis diagrams under grid frequency drop when the proposed control method is not applied in the embodiments of the present invention.
[0036] Figures 4(a) and 4(b) are output voltage responses and harmonic content analyses under grid frequency drops when the proposed control method is applied according to an embodiment of the present invention. Detailed Implementation
[0037] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0038] Example 1
[0039] Figure 1 This is a system structure diagram of a three-phase inverter applied to a V2G charging pile for electric vehicles according to an embodiment of the present invention, including a three-phase inverter bridge and an LC-type filter circuit (L... f and C f The system includes an A / D sampling circuit, a DSP28335 controller, and a drive protection circuit. It also includes a three-phase programmable AC power supply that simulates grid frequency fluctuations. gabcThe main circuit is powered by the grid, LC filter, and inverter circuit connected in sequence. The grid-side LC filter circuit is used to filter out high-frequency noise from the grid; the digital sampling signal comes from the output side of the LC filter circuit; the drive circuit drives and controls the switching of the fully controlled power devices in the inverter circuit; the complete control method and processing are implemented on the TMS320F28335 digital signal processor.
[0040] Figure 2 The block diagram for the fast frequency adaptive control in this embodiment of the invention mainly consists of a grid-type power control loop, a voltage control loop with fast frequency adaptation, and an SPWM modulation module. The voltage control method is implemented by a frequency adaptive repetitive controller based on active disturbance rejection.
[0041] The implementation process of a fast frequency adaptive inverter control method for grid-type V2G charging piles according to an embodiment of the present invention is as follows:
[0042] 1) At the start of each sampling cycle, the controller activates the A / D converter to sample the output voltage and current of the three-phase inverter bridge of the V2G charging pile. The collected data, after A / D conversion, is transmitted to the DSP digital signal processor through a parallel interface for further processing;
[0043] 2) The DSP controller calculates the instantaneous output power based on the output voltage and current values acquired in step 1), and obtains the reference voltage amplitude E through a network control loop. m And the phase angle θ, thus obtaining the three-phase voltage reference signal u ref ;
[0044] The formula for calculating instantaneous power is:
[0045] P e =u a i a +u b i b +u c i c
[0046]
[0047] In the formula, u a u b u c For three-phase output voltage; i a i b i c This is the three-phase output current.
[0048] The formula for calculating the reference voltage signal along the α axis is:
[0049] v αref =E msin(θ)
[0050] Among them, the phase angle θ and the virtual potential E m The calculation formula is:
[0051]
[0052] In the formula, ω is the mechanical angular velocity, and U n Indicates the output voltage reference value; U peka D represents the peak value of the sampled output voltage. q Q is the voltage regulation coefficient; ref Reactive power reference value, Q e is the instantaneous value of reactive power; K is the integral regulation coefficient.
[0053] 3) The DSP controller performs calculations on the output voltage acquired in step 1) and the voltage reference value calculated in step 2), and outputs the voltage tracking error value;
[0054] 4) The output voltage tracking error value is sent to the fast frequency adaptive repetitive controller based on self-disturbance rejection in each control cycle to obtain the SPWM modulation signal and control the switching of the three-phase inverter in the V2G charging pile.
[0055] The specific transfer function of the frequency adaptive repetitive controller is expressed as follows:
[0056]
[0057] In the formula, k rc Given a constant control gain, S(z) is the calibration function, and G... FD (z) is a filter with a farrow structure, and Q(z) represents a zero-phase-shift low-pass filter, which is empirically chosen to be a constant of 0.95; It is a periodic delay unit, where N1 is the delay step size. N is the delay unit for the forward channel, and N2 is the delay step size.
[0058] The discrete linear extended state observer in the active disturbance rejection control loop is represented as:
[0059]
[0060] In the formula, For the corresponding state vector x(k), the extended observation vector is... L c The observation gain to be adjusted. For the corresponding output variable y(k)=v αo (k)+δ y The observed variable, δ yExpressions representing measurement noise interference; expressions that include total external interference such as measurement noise include:
[0061]
[0062] A d B d and C d The coefficient matrix is represented as follows:
[0063]
[0064] Among them, T s For the controller sampling period, b0 = 1 / L f C f These are fixed constants related to the model of the controlled object.
[0065] The final modulation signal expression for the inverter bridge is:
[0066]
[0067] In the formula, k1 and k2 are the error control gains, and v e G is the tracking difference of the output voltage. FARC This represents the transfer function of a repetitive controller with frequency adaptation capability. The compensation amount is the known model information.
[0068] The filter G in the aforementioned frequency adaptive repetitive controller FD (z) The transfer function is:
[0069]
[0070] In the formula, the delay time p d =(n s -n c )-n d ; sampling times n s and delay compensation times n d The calculation formulas are as follows: n s =f s / (k h f n ), n d =floor(n s -n c ), floor is the floor function; f s k is the sampling frequency. h To enable the repetitive controller to suppress harmonics, setting the number of harmonic suppression cycles to a constant of 1 allows for zero steady-state error tracking in a two-phase stationary coordinate system. n For the periodic nominal frequency, n c For a given advance beat.
[0071] Figures 3(a), 3(b), 4(a), and 4(b) show the output voltage response and harmonic content analysis when using the traditional embedded repetitive control method and the control method proposed in this embodiment, respectively. Figure 3(a) shows the simulated waveform of the output voltage and tracking error under the traditional embedded repetitive control method when the grid frequency drops, and Figure 3(b) shows the total distortion rate of the output voltage under the traditional embedded repetitive control method when the grid frequency drops. When using the traditional embedded repetitive control method, the output voltage is greatly affected by the reference frequency, the tracking error increases significantly, and the waveform quality is poor (total distortion rate is 5.21%), which does not meet the grid-connected power quality requirements. Figure 4(a) shows the simulated waveform of the output voltage and tracking error under the proposed control method when the grid frequency drops, and Figure 4(b) shows the total distortion rate of the output voltage under the proposed control method when the grid frequency drops. When using the control method proposed in this invention, no switching spikes are observed in the output voltage, and the tracking error fluctuation is small, with better waveform quality (total distortion rate is only 2.13%). The grid-connected power quality is significantly improved.
[0072] Example 2
[0073] Embodiment 2 of the present invention provides a system corresponding to Embodiment 1 above, including a memory, a processor, and a computer program stored in the memory; the processor executes the computer program in the memory to implement the steps of the method of Embodiment 1 above.
[0074] In some implementations, the memory may be high-speed random access memory (RAM), and may also include non-volatile memory, such as at least one disk storage device.
[0075] In other implementations, the processor can be any type of general-purpose processor, such as a central processing unit (CPU) or a digital signal processor (DSP), and there is no limitation here.
[0076] Example 3
[0077] Embodiment 3 of the present invention provides a computer-readable storage medium corresponding to Embodiment 1 above, on which a computer program / instructions are stored. When the computer program / instructions are executed by a processor, they implement the steps of the method of Embodiment 1 above.
[0078] A computer-readable storage medium can be a tangible device that holds and stores instructions for use by an instruction execution device. A computer-readable storage medium can be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any combination thereof.
[0079] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The solutions in the embodiments of this application can be implemented in various computer languages, such as the object-oriented programming language Java and the interpreted scripting language JavaScript.
[0080] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0081] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0082] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.
[0083] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.
Claims
1. A fast frequency adaptive inverter control method applied to grid-type V2G charging piles, characterized in that, Includes the following steps: The output voltage and current of the three-phase inverter side of the V2G charging pile are collected, and the instantaneous output power is calculated. The collected three-phase output voltage is then subjected to Clark transformation to obtain the inverter side output voltage v along the α axis. αo ; Calculate the phase angle θ and virtual potential E of the V2G charging pile m And using the phase angle θ and virtual potential E m The three-phase reference voltage signal is acquired, and the reference voltage under the α axis is obtained after the three-phase reference voltage signal is transformed by Clark. The reference voltage along the α axis is compared with the capacitor C in the LC filter on the inverter side of the V2G charging pile. f The output voltage v on αo The difference between the two is the tracking difference v. e , will v e The signal is fed into a fast frequency adaptive repetitive controller based on active disturbance rejection. The tracking difference is calculated in each control cycle to obtain the modulation signal of the inverter bridge. After being modulated by a PWM modulator, the duty cycle signal for controlling the switching of the three-phase inverter in the V2G charging pile is obtained. The linear extended state observer in the active disturbance rejection control loop is constructed as follows: In the formula, Let x(k) be the expanded observation vector corresponding to the state vector. L c The observation gain to be adjusted. For the corresponding output variable y(k)=v αo (k)+δ y The observed variable, δ y Indicates measurement noise interference; in: A d B d and C d The coefficient matrix is represented as follows: Among them, T s For the controller sampling period, b0 = 1 / L f C f L f and C f These represent the inductance and capacitance of the LC filter on the inverter side of the V2G charging pile, respectively. The modulation signal of the inverter bridge, Δv α The voltage error caused by unmeasurable signals, T pwm The delay introduced by SPWM modulation, R L i is the equivalent resistance on the inductor. Lα In an LC filter, the inductance L represents... f Current on The first derivative of the grid current.
2. The fast frequency adaptive inverter control method for grid-type V2G charging piles according to claim 1, characterized in that, The formula for calculating instantaneous power is: Among them, u a u b u c For three-phase output voltage; i a i b i c For the three-phase output current, P e Q e These are instantaneous active power and instantaneous reactive power, respectively.
3. The fast frequency adaptive inverter control method for grid-type V2G charging piles according to claim 1, characterized in that, The formula for calculating the phase angle θ is: θ=ρωdt; where ω is the mechanical angular velocity.
4. The fast frequency adaptive inverter control method for V2G charging piles according to claim 1, characterized in that, Reference voltage signal v along the α axis αref Represented as: v αref =E m sin(θ).
5. The fast frequency adaptive inverter control method for grid-type V2G charging piles according to claim 1, characterized in that, in, Let represent the first derivatives of the inductor current and the capacitor voltage in the LC filter, respectively, where t is the time variable.
6. The fast frequency adaptive inverter control method for V2G charging piles according to claim 1, characterized in that, The expression for the modulation signal u(k) of the inverter bridge at time k is: In the formula, k1 and k2 are the error control gains, and v e G is the tracking difference of the output voltage; FARC The transfer function represents a repetitive controller with frequency adaptability; the compensation amount is known from the model information. The expression is 7. The fast frequency adaptive inverter control method for grid-type V2G charging piles according to claim 6, characterized in that, Transfer function G of a repetitive controller with frequency adaptation capability FARC The expression is: In the formula, k rc Given a constant control gain, S(z) is the calibration function, and G... FD Q(z) represents a filter with a farrow structure, and Q(z) represents a zero-phase-shift low-pass filter. It is a periodic delay unit, where N1 is the delay step size. N is the delay unit of the forward channel, and N2 is the delay step size; preferably, Q(z) is set to a constant of 0.
95.
8. The fast frequency adaptive inverter control method for grid-type V2G charging piles according to claim 7, characterized in that, Filter G with farrow structure FD The expression for (z) is: In the formula, the delay time p d =(n s -n c )-n d ; sampling times n s and delay compensation times n d The calculation formulas are as follows: n s =f s / (k h f n ), n d =floor(n s -n c ), floor is the floor function; f s k is the sampling frequency. h For the repetitive controller to suppress harmonics, f n For the periodic nominal frequency, n c For a given advance beat.
9. A fast frequency adaptive inverter control system for grid-type V2G charging piles, comprising a memory, a processor, and a computer program stored in the memory; characterized in that, The processor executes the computer program to implement the steps of the method according to any one of claims 1 to 8.
Citation Information
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