Video encoding method and apparatus, and video decoding method and apparatus

Abstract

This disclosure describes techniques for enabling very precise on / off control of two or more different decoder-side refinement tools. This disclosure describes techniques for enabling or disabling different decoder-side refinement tools for pictures (or portions thereof) within a sequence of video data that includes a plurality of pictures.

Description

[0001] This application is a divisional application of an invention patent application with an application date of June 5, 2020, application number 202080039981.4, and invention name “Decoder-side motion vector refinement tool on / off control”.

[0002] This application claims priority to U.S. Patent Application No. 16 / 892,714, filed on June 4, 2020, which claims the benefit of U.S. Provisional Application No. 62 / 858,094, filed on June 6, 2019, and U.S. Provisional Application No. 62 / 863,080, filed on June 18, 2019, the entire contents of each of the above applications are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to video encoding and video decoding. Background Art

[0004] Digital video capabilities can be incorporated into a wide range of devices, including digital televisions, digital direct broadcast systems, wireless broadcast systems, personal digital assistants (PDAs), laptop or desktop computers, tablet computers, e-book readers, digital cameras, digital recording devices, digital media players, video game devices, video game consoles, cellular or satellite radio telephones, so-called "smart phones", video teleconferencing devices, video streaming devices, etc. Digital video devices implement video coding techniques, such as those described in the standards defined by MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4, Part 10, Advanced Video Coding (AVC), ITU-T H.265 / High Efficiency Video Coding (HEVC), or extensions of such standards. By implementing such video coding techniques, video devices can more efficiently send, receive, encode, decode and / or store digital video information.

[0005] Video coding techniques include spatial (intra-picture) prediction and / or temporal (inter-picture) prediction to reduce or remove redundancy inherent in video sequences. For block-based video coding, a video slice (e.g., a video picture or a portion of a video picture) may be divided into video blocks, which may also be referred to as coding tree units (CTUs), coding units (CUs), and / or coding nodes. Video blocks in an intra-coded (I) slice of a picture are encoded using spatial prediction relative to reference samples in neighboring blocks in the same picture. Video blocks in an inter-coded (P or B) slice of a picture may use spatial prediction relative to reference samples in neighboring blocks in the same picture or temporal prediction relative to reference samples in other reference pictures. Pictures may be referred to as frames, and reference pictures may be referred to as reference frames. Summary of the invention

[0006] In the development of the Versatile Video Coding (VVC) standard, a variety of decoder-side motion refinement tools have been proposed and / or adopted into the standard to improve compression efficiency. One example is Bidirectional Optical Flow (BDOF), and another example tool is Decoder-side Motion Vector Refinement (DMVR). In general, the present disclosure describes a variety of different video encoding and decoding techniques, including techniques for decoder-side refinement tool on / off control.

[0007] More specifically, the present disclosure describes techniques for very precise on / off control of enabling two or more different decoder-side refinement tools. Rather than just enabling or enabling these tools for an entire video sequence of video data, the present disclosure describes techniques for enabling or disabling different decoder-side refinement tools for a subset (or portion) of a video sequence. In this way, these techniques can provide greater flexibility between the competing goals of reducing decoding complexity and improving compression efficiency in different video applications or settings.

[0008] In some examples, the present disclosure describes a method for decoding a video data sequence comprising a plurality of pictures. The method may include decoding a first syntax element indicating whether a first decoder-side refinement tool is enabled or disabled for a first subset of video data within the video data sequence, and determining whether the first decoder-side refinement tool is enabled for the first subset of video data based on a value of the first syntax element. In addition, the method may include decoding a second syntax element indicating whether a second decoder-side refinement tool is enabled or disabled for a first subset of video data having the video data sequence, and determining whether the second decoder-side refinement tool is enabled or disabled for the first subset of video data based on a value of the first syntax element. As an example, the first subset of video data may include a slice, picture, sub-picture, frame, or block of video data within the video sequence. Decoding the first subset of the video data may include decoding the first subset of the video data using the first decoder-side refinement tool in response to enabling the first decoder-side refinement tool for the first subset, decoding the first subset of the video data without using the first decoder-side refinement tool in response to disabling the first decoder-side refinement tool for the first subset, decoding the first subset of the video data using the second decoder-side refinement tool in response to the second decoder-side refinement tool being disabled, and decoding the subset of the video data without using the second decoder-side refinement tool in response to disabling the second decoder-side refinement tool for the first subset.

[0009] In other examples, the disclosure describes a method of encoding a video data sequence comprising a plurality of pictures. The method may include encoding a first instance of a first syntax element to identify whether a first decoder-side refinement tool is enabled or disabled for a first subset of video data within the video data sequence, encoding a second instance of the first syntax element to identify whether the first decoder-side refinement tool is enabled or disabled for a second subset of video data within the video data sequence, wherein the second subset is different from the first subset, encoding a first instance of a second syntax element to identify whether a second decoder-side refinement tool is enabled or disabled for the first subset of video data within the video data sequence, and encoding a second instance of the second syntax element to identify whether the second decoder-side refinement tool is enabled or disabled for a second subset of video data in the video data sequence.

[0010] In some examples, the present disclosure describes a video decoding device that includes a memory configured to store a video data sequence including a plurality of pictures, and processing circuitry configured to decode a first syntax element that indicates whether a first decoder-side refinement tool is enabled or disabled for a first subset of video data within the video data sequence, determine whether the first decoder-side refinement tool is enabled or disabled for the first subset of video data based on a value of the first syntax element, decode a second syntax element that indicates whether a second decoder-side refinement tool is enabled or disabled for the first subset of video data within the video sequence, and determine whether the first decoder-side refinement tool is enabled or disabled for the first subset of the video sequence based on the value of the first syntax element. The processing circuit may be further configured to decode the first subset of the video data using the first decoder-side refinement tool in response to enabling the first decoder-side refinement tool for the first subset, decode the first subset of the video data without using the first decoder-side refinement tool in response to disabling the first decoder-side refinement tool for the first subset, decode the first subset of the video data using the second decoder-side refinement tool in response to enabling the second decoder-side refinement tool for the first subset, and decode the subset of the video data without using the second decoder-side refinement tool in response to disabling the second decoder-side refinement tool for the first subset.

[0011] In some examples, the present disclosure describes a video encoding device that includes a memory configured to store a video data sequence including a plurality of pictures, and is configured to encode a first instance of a first syntax element to identify whether a first decoder-side refinement tool is enabled or disabled for a first subset of video data within the video data sequence, encode a second instance of the first syntax element to identify whether the first decoder-side refinement tool is enabled or disabled for a second subset of video data within the video data sequence, wherein the second subset is different from the first subset, encode the first instance of the second syntax element to identify whether a second decoder-side refinement tool is enabled or disabled for the first subset of video data within the video data sequence, and encode the second instance of the second syntax element to identify whether the second decoder-side refinement tool is enabled or disabled for the second subset of video data within the video data sequence.

[0012] In other examples, the present disclosure describes a computer-readable storage medium storing instructions that, when executed, cause one or more processors of a video device to perform the encoding or decoding method of the present disclosure.

[0013] In other examples, the present disclosure describes a method for decoding a video data sequence including a plurality of pictures. The method includes: decoding a first syntax element indicating whether a first decoder-side refinement tool is enabled or disabled for a first portion of a first picture of the plurality of pictures within the video data sequence; determining, based on a value of the first syntax element, to enable the first decoder-side refinement tool for the first portion of the first picture; decoding a second syntax element indicating whether a second decoder-side refinement tool is enabled or disabled for the first portion of the first picture, wherein the first decoder-side refinement tool and the second decoder-side refinement tool are enabled to refine motion information associated with the plurality of pictures; determining, based on a value of the second syntax element, to disable the second decoder-side refinement tool for the first portion of the first picture; and in response to determining that the first decoder-side refinement tool is enabled for the first portion of the first picture, and in response to determining that the second decoder-side refinement tool is disabled for the first portion of the first picture, decoding the first portion of the first picture using the first decoder-side refinement tool.

[0014] In other examples, the present disclosure describes a method for encoding a video data sequence including a plurality of pictures. The method includes: encoding a first instance of a first syntax element to identify that a first decoder-side refinement tool is enabled for a first portion of a first picture of the plurality of pictures within the video data sequence; encoding a second instance of the first syntax element to identify that the first decoder-side refinement tool is disabled for a first portion of a second picture of the plurality of pictures within the video data sequence, wherein the second picture is different from the first picture, and wherein the first decoder-side refinement tool and the second decoder-side refinement tool are enabled to refine motion information associated with the plurality of pictures; encoding a first instance of a second syntax element to identify that a second decoder-side refinement tool is disabled for a first portion of the first picture of the plurality of pictures within the video data sequence; and encoding a second instance of the second syntax element to identify that the second decoder-side refinement tool is enabled for a first portion of the second picture of the plurality of pictures within the video data sequence.

[0015] In other examples, the present disclosure describes a video decoding device, including: a memory configured to store a video data sequence including multiple pictures; and a processing circuit configured to: decode a first syntax element, the first syntax element indicating whether a first decoder-side refinement tool is enabled or disabled for a first portion of a first picture of the multiple pictures within the video data sequence; determine, based on a value of the first syntax element, to enable the first decoder-side refinement tool for the first portion of the first picture; decode a second syntax element, the second syntax element indicating whether a second decoder-side refinement tool is enabled or disabled for the first portion of the first picture of the multiple pictures within the video data sequence, wherein the first decoder-side refinement tool and the second decoder-side refinement tool are enabled to refine motion information associated with the multiple pictures; determine, based on a value of the second syntax element, to disable the second decoder-side refinement tool for the first portion of the first picture; and in response to determining that the first decoder-side refinement tool is enabled for the portion of the first picture, and in response to determining that the second decoder-side refinement tool is disabled for the portion of the first picture, decode the first portion of the first picture using the first decoder-side refinement tool.

[0016] In other examples, the present disclosure describes a video encoding device comprising: a memory configured to store a video data sequence comprising a plurality of pictures; and a processing circuit configured to: encode a first instance of a first syntax element to identify that a first decoder-side refinement tool is enabled for a first portion of a first picture of the plurality of pictures within the video data sequence; encode a second instance of the first syntax element to identify that the first decoder-side refinement tool is disabled for a first portion of a second picture of the plurality of pictures within the video data sequence, wherein the second picture is different from the first picture, and wherein the first decoder-side refinement tool and the second decoder-side refinement tool are enabled to refine motion information associated with the plurality of pictures; encode a first instance of a second syntax element to identify that a second decoder-side refinement tool is disabled for a first portion of the first picture of the plurality of pictures within the video data sequence; and encode a second instance of the second syntax element to identify that the second decoder-side refinement tool is enabled for a first portion of the second picture of the plurality of pictures within the video data sequence.

[0017] In other examples, the present disclosure describes a video decoding device configured to decode a video data sequence including a plurality of pictures, the video decoding device comprising: means for decoding a first syntax element, the first syntax element indicating whether a first decoder-side refinement tool is enabled or disabled for a first portion of a first picture of the plurality of pictures within the video data sequence; means for determining, based on a value of the first syntax element, whether to enable the first decoder-side refinement tool for the first portion of the first picture; means for decoding a second syntax element, the second syntax element indicating whether a second decoder-side refinement tool is enabled or disabled for the first portion of the first picture of the plurality of pictures within the video data sequence, wherein the first decoder-side refinement tool and the second decoder-side refinement tool are enabled to refine motion information associated with the plurality of pictures; means for determining, based on a value of the second syntax element, whether to disable the second decoder-side refinement tool for the first portion of the first picture; and means for decoding the first portion of the first picture using the first decoder-side refinement tool in response to determining that the first decoder-side refinement tool is enabled for the first portion of the first picture of the plurality of pictures, and in response to determining that the second decoder-side refinement tool is disabled for the first portion of the first picture of the plurality of pictures.

[0018] In other examples, the present disclosure describes a video encoding device configured to encode a video data sequence including a plurality of pictures, the video encoding device comprising: a first instance of a first syntax element for encoding to identify a component for enabling a first decoder-side refinement tool for a first portion of a first picture of the plurality of pictures within the video data sequence; a second instance of the first syntax element for encoding to identify a component for disabling the first decoder-side refinement tool for a first portion of a second picture of the plurality of pictures within the video data sequence, wherein the second picture is different from the first picture, and wherein the first decoder-side refinement tool and the second decoder-side refinement tool are enabled to refine motion information associated with the plurality of pictures; a first instance of a second syntax element for encoding to identify a component for disabling a second decoder-side refinement tool for a first portion of a second picture of the plurality of pictures within the video data sequence; and a second instance of the second syntax element for encoding to identify a component for enabling the second decoder-side refinement tool for a first portion of the second picture of the plurality of pictures within the video data sequence.

[0019] In other examples, the present disclosure describes a non-transitory computer-readable storage medium storing instructions that, when executed, cause one or more processors of a video decoding device to perform the following operations: decode a first syntax element, the first syntax element indicating whether a first decoder-side refinement tool is enabled or disabled for a first portion of a first picture of the plurality of pictures within the video data sequence; determine, based on a value of the first syntax element, to enable the first decoder-side refinement tool for the first portion of the first picture; decode a second syntax element, the second syntax element indicating whether a second decoder-side refinement tool is enabled or disabled for the first portion of the first picture of the plurality of pictures within the video data sequence, wherein the first decoder-side refinement tool and the second decoder-side refinement tool are enabled to refine motion information associated with the plurality of pictures; determine, based on a value of the second syntax element, to disable the second decoder-side refinement tool for the first portion of the first picture; and in response to determining that the first decoder-side refinement tool is enabled for the first portion of the first picture of the plurality of pictures, and in response to determining that the second decoder-side refinement tool is disabled for the first portion of the first picture of the plurality of pictures, decode the first portion of the first picture using the first decoder-side refinement tool.

[0020] In other examples, the present disclosure describes a non-transitory computer-readable storage medium storing instructions that, when executed, cause one or more processors of a video encoding device to perform the following operations: encode a first instance of a first syntax element to identify that a first decoder-side refinement tool is enabled for a first portion of a first picture of the plurality of pictures within the video data sequence; encode a second instance of the first syntax element to identify that the first decoder-side refinement tool is disabled for a first portion of a second picture of the plurality of pictures within the video data sequence, wherein the second picture is different from the first picture, and wherein the first decoder-side refinement tool and the second decoder-side refinement tool are enabled to refine motion information associated with the plurality of pictures; encode a first instance of a second syntax element to identify that a second decoder-side refinement tool is disabled for a first portion of the first picture of the plurality of pictures within the video data sequence; and encode a second instance of the second syntax element to identify that the second decoder-side refinement tool is enabled for a first portion of the second picture of the plurality of pictures within the video data sequence.

[0021] The details of one or more examples are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will be apparent from the description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a block diagram illustrating an example video encoding and decoding system that may perform the techniques of this disclosure.

[0023] Figure 2A and 2B is a conceptual diagram illustrating an example quadtree binary tree (QTBT) structure and a corresponding coding tree unit (CTU).

[0024] Figure 3 is a block diagram illustrating an example video encoder that may perform the techniques of this disclosure.

[0025] Figure 4 is a block diagram illustrating an example video decoder that may perform the techniques of this disclosure.

[0026] Figure 5 is a conceptual diagram illustrating an extended coding unit area used in a bidirectional optical flow.

[0027] Figure 6 is a conceptual diagram illustrating an example of decoder-side motion vector refinement.

[0028] Figure 7 is a conceptual diagram illustrating an example merge mode with motion vector difference search points.

[0029] Figure 8is a flowchart illustrating an example encoding method of the present disclosure.

[0030] Fig. 9 is a flow chart illustrating an example decoding method of the present disclosure.

[0031] Fig.10 is a flow chart illustrating another decoding method consistent with the present disclosure.

[0032] Fig.11 is a flow chart illustrating another encoding method consistent with the present disclosure. DETAILED DESCRIPTION

[0033] The present disclosure describes techniques for enabling very precise on / off control of two or more different decoder-side refinement tools. With some video compression standards, such as the Versatile Video Coding (VVC) standard currently under development, several decoder-side motion refinement tools have been adopted to improve compression efficiency. However, while decoder-side motion refinement tools can improve compression efficiency, they also increase decoding complexity, which is undesirable in some cases. The techniques of the present disclosure can provide greater flexibility in the ability to enable or disable decoder-side refinement tools, thereby providing flexibility between the competing goals of reducing decoding complexity and improving compression efficiency in different video applications or settings.

[0034] One example decoder-side refinement tool is the Bidirectional Optical Flow (BDOF) tool, while another example decoder-side refinement tool is the Decoder-Side Motion Vector Refinement (DMVR) tool. In general, this disclosure describes techniques for decoder-side motion refinement on / off control of these or other decoder-side refinement tools. In particular, the described techniques can allow very precise on / off control of subsets of video data within a video sequence. For example, rather than only allowing or enabling these tools for a video sequence, this disclosure describes techniques for enabling or disabling different decoder-side refinement tools for a subset (or portion) of a video sequence.

[0035] In some examples, separate on / off controls for different decoder-side refinement tools may be enabled or disabled for different subsets or portions of a video sequence (e.g., for slices of video data within a video sequence, frames of video data within a video sequence, pictures of video data within a video sequence, sub-pictures of video data within a video sequence, blocks of video data within a video sequence, or another portion (some but not all) of video data of a video sequence). In this way, greater flexibility may be achieved between the competing goals of reducing decoding complexity and improving compression efficiency in different video applications or settings. For example, a subset of a video sequence may include at least a portion of a first picture of a plurality of pictures of a video data sequence.

[0036] According to the present disclosure, one or more decoder-side refinement tools may be enabled to improve compression efficiency, or alternatively, one or more decoder-side refinement tools may be disabled to improve decoder simplicity. Such control may be more adaptive by allowing control over subsets of video data (e.g., only for a portion or part of an entire video sequence). On / off control may be signaled via one or more syntax elements of a decoded bitstream for a video data frame, a video data picture, a video data slice, a video data sub-picture, a video data block, or other subsets or sub-portions of a larger video sequence.

[0037] The following acronyms will be used in this disclosure:

[0038] Decoding unit: CU

[0039] Coding Tree Unit: CTU

[0040] Motion Vector: MV

[0041] Motion Vector Difference: MVD

[0042] Motion Vector Predictor: MVP

[0043] Figure 1 1 is a block diagram illustrating an example video encoding and decoding system 100 that can perform the techniques of the present disclosure. The techniques of the present disclosure are generally for decoding (encoding and / or decoding) video data. Generally, video data includes any data used to process video. Therefore, video data can include original, unencoded video, encoded video, decoded (e.g., reconstructed) video, and video metadata such as signaling data.

[0044] like Figure 1 As shown, in this example, system 100 includes a source device 102 that provides encoded video data to be decoded and displayed by a destination device 116. In particular, source device 102 provides the video data to destination device 116 via computer-readable medium 110. Source device 102 and destination device 116 may include any of a variety of devices, including desktop computers, notebook (i.e., laptop) computers, tablet computers, set-top boxes, telephone handsets such as smartphones, televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, etc. In some cases, source device 102 and destination device 116 may be equipped for wireless communication and, therefore, may be referred to as wireless communication devices.

[0045] exist Figure 1In the example of , source device 102 includes video source 104, memory 106, video encoder 200 and output interface 108. Destination device 116 includes input interface 122, video decoder 300, memory 120 and display device 118. According to the present disclosure, the video encoder 200 of source device 102 and the video decoder 300 of destination device 116 can be configured to apply technology for decoder-side motion refinement on / off control. Therefore, source device 102 represents an example of a video encoding device, and destination device 116 represents an example of a video decoding device. In other examples, the source device and the destination device may include other components or arrangements. For example, source device 102 may receive video data from an external video source such as an external camera. Similarly, destination device 116 may interface with an external display device instead of including an integrated display device.

[0046] like Figure 1 The system 100 shown is just an example. In general, any digital video encoding and / or decoding device can perform the technology for decoder-side motion refinement on / off control. The source device 102 and the destination device 116 are just examples of such decoding devices, wherein the source device 102 generates decoded video data for transmission to the destination device 116. The present disclosure refers to a "decoding" device as a device that performs decoding (encoding and / or decoding) of data. Therefore, the video encoder 200 and the video decoder 300 represent examples of decoding devices, particularly video encoders and video decoders, respectively. In some examples, the devices 102, 116 can operate in a substantially symmetrical manner so that each of the devices 102, 116 includes video encoding and decoding components. Therefore, the system 100 can support one-way or two-way video transmission between video devices 102, 116, such as for video streaming, video playback, video broadcasting or video telephony.

[0047] In general, the video source 104 represents a source of video data (i.e., raw, unencoded video data) and provides a series of consecutive pictures (also referred to as "frames") of video data to the video encoder 200, which encodes the data of the pictures. The video source 104 of the source device 102 may include a video capture device, such as a camera, a video archive containing previously captured raw video, and / or a video feed interface for receiving video from a video content provider. As a further alternative, the video source 104 may generate computer graphics-based data as the source video, or a combination of live video, archived video, and computer-generated video. In each case, the video encoder 200 encodes the captured, pre-captured, or computer-generated video data. The video encoder 200 may rearrange the pictures from the receiving order (sometimes referred to as the "display order") to the decoding order for decoding. The video encoder 200 may generate a bitstream including the encoded video data. The source device 102 may then output the encoded video data to the computer-readable medium 110 via the output interface 108 for reception and / or retrieval by, for example, the input interface 122 of the destination device 116.

[0048] The memory 106 of the source device 102 and the memory 120 of the destination device 116 represent general purpose memory. In some examples, the memories 106, 120 can store original video data, such as original video from the video source 104 and original decoded video data from the video decoder 300. Additionally or alternatively, the memories 106, 120 can store software instructions that can be executed by the video encoder 200 and the video decoder 300, respectively. Although shown separately from the video encoder 200 and the video decoder 300 in this example, it should be understood that the video encoder 200 and the video decoder 300 can also include internal memory for functionally similar or equivalent effects. In addition, the memories 106, 120 can store, for example, encoded video data output from the video encoder 200 and input to the video decoder 300. In some examples, portions of the memories 106, 120 can be allocated as one or more video buffers, for example, for storing original, decoded and / or encoded video data.

[0049] The computer-readable medium 110 may represent any type of medium or device capable of transmitting the encoded video data from the source device 102 to the destination device 116. In one example, the computer-readable medium 110 represents a communication medium to enable the source device 102 to transmit the encoded video data directly to the destination device 116 in real time, for example, via a radio frequency network or a computer-based network. According to a communication standard such as a wireless communication protocol, the output interface 108 can modulate a transmission signal including the encoded video data, and the input interface 122 can demodulate the received transmission signal. The communication medium may include any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form part of a packet-based network, such as a local area network, a wide area network, or a global network such as the Internet. The communication medium may include a router, a switch, a base station, or any other device that can be used to facilitate communication from the source device 102 to the destination device 116.

[0050] In some examples, source device 102 may output the encoded data from output interface 108 to storage device 112. Similarly, destination device 116 may access the encoded data from storage device 112 via input interface 122. Storage device 112 may include a variety of distributed or locally accessed data storage media, such as a hard drive, Blu-ray disc, DVD, CD-ROM, flash memory, volatile or non-volatile memory, or any other suitable digital storage medium for storing encoded video data.

[0051] In some examples, source device 102 may output the encoded video data to file server 114 or another intermediate storage device that may store the encoded video generated by source device 102. Destination device 116 may access the stored video data from file server 114 via streaming or downloading. File server 114 may be any type of server device capable of storing encoded video data and transmitting the encoded video data to destination device 116. File server 114 may represent a network server (e.g., for a website), a file transfer protocol (FTP) server, a content delivery network device, or a network attached storage (NAS) device. Destination device 116 may access the encoded video data from file server 114 via any standard data connection including an Internet connection. This may include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., a digital subscriber line (DSL), a cable modem, etc.), or a combination of both suitable for accessing the encoded video data stored on file server 114. File server 114 and input interface 122 may be configured to operate according to a streaming protocol, a downloading transmission protocol, or a combination thereof.

[0052] Output interface 108 and input interface 122 may represent wireless transmitters / receivers, modems, wired network components (e.g., Ethernet cards), wireless communication components that operate according to any of the various IEEE 802.11 standards, or other physical components. In examples where output interface 108 and input interface 122 include wireless components, output interface 108 and input interface 122 may be configured to transmit data, such as encoded video data, according to a cellular communication standard such as 4G, 4G-LTE (Long Term Evolution), LTE Advanced, 5G, etc. In some examples where output interface 108 includes a wireless transmitter, output interface 108 and input interface 122 may be configured to transmit data, such as encoded video data, according to other wireless standards such as IEEE 802.11 specifications, IEEE 802.15 specifications (e.g., ZigBee 5G, etc.). TM ), Bluetooth TM Standards, etc.) to transmit data such as encoded video data. In some examples, source device 102 and / or destination device 116 may include corresponding system-on-chip (SoC) devices. For example, source device 102 may include a SoC device for performing functions belonging to video encoder 200 and / or output interface 108, and destination device 116 may include a SoC device 122 for performing functions belonging to video decoder 300 and / or input interface.

[0053] The techniques of the present disclosure may be applied to support video decoding for any of a variety of multimedia applications, such as over-the-air television broadcasts, cable television transmissions, satellite television transmissions, Internet streaming video transmissions such as Dynamic Adaptive Streaming over HTTP (DASH), digital video encoded onto a data storage medium, decoding of digital video stored on a data storage medium, or other applications.

[0054] The input interface 122 of the destination device 116 receives the encoded video bitstream from the computer-readable medium 110 (e.g., the storage device 112, the file server 114, etc.). The encoded video bitstream may contain signaling information defined by the video encoder 200 and also used by the video decoder 300, such as syntax elements with values ​​describing characteristics and / or processing of video blocks or other coded units (e.g., slices, pictures, groups of pictures, sequences, etc.). The display device 118 displays decoded pictures of the decoded video data to a user. The display device 118 may represent any of a variety of display devices, such as a cathode ray tube (CRT), a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or other types of display devices.

[0055] Although Figure 1Not shown, but in some examples, the video encoder 200 and the video decoder 300 may also each be integrated with an audio encoder and / or an audio decoder, and may include appropriate MUX-DEMUX units or other hardware and / or software to process a multiplexed stream including both audio and video in a common data stream. If applicable, the MUX-DEMUX unit may conform to the ITU H.223 multiplexer protocol or other protocols such as the User Datagram Protocol (UDP).

[0056] The video encoder 200 and the video decoder 300 can each be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When these techniques are partially implemented in software, the device can store instructions for the software in a suitable non-transitory computer-readable medium and use one or more processors to execute the instructions in hardware to perform the techniques of the present disclosure. Each of the video encoder 200 and the video decoder 300 can be included in one or more encoders or decoders, any of which can be integrated as part of a combined encoder / decoder (CODEC) in a corresponding device. A device including the video encoder 200 and / or the video decoder 300 can include an integrated circuit, a microprocessor, and / or a wireless communication device such as a cellular phone.

[0057] The video encoder 200 and the video decoder 300 may operate according to a video coding standard such as ITU-T H.265, also known as High Efficiency Video Coding (HEVC) or an extension thereof, such as a multi-view and / or scalable video coding extension. Alternatively, the video encoder 200 and the video decoder 300 may operate according to other proprietary or industry standards such as the Joint Exploration Test Model (JEM) or ITU-T H.266, also known as Versatile Video Coding (VVC). Bross et al. describe the latest draft of the VVC standard, “Versatile Video Coding (Draft 5)”, Joint Video Experts Group (JVET) of ITU-T SG 16WP3 and ISO / IEC JTC 1 / SC 29 / WG11, 14th Meeting: Geneva, March 19-27, 2019, JVET-N1001-v3 (hereinafter referred to as “VVC Draft 5”). However, the technology of the present disclosure is not limited to any particular coding standard.

[0058] Typically, the video encoder 200 and the video decoder 300 can perform block-based decoding of pictures. The term "block" generally refers to a structure that includes data to be processed (e.g., encoded, decoded, or otherwise used in an encoding and / or decoding process). For example, a block may include a two-dimensional matrix of samples of luminance and / or chrominance data. Typically, the video encoder 200 and the video decoder 300 can decode video data represented in a YUV (e.g., Y, Cb, Cr) format. That is, the video encoder 200 and the video decoder 300 can decode luminance and chrominance components instead of decoding red, green, and blue (RGB) data of picture samples, where the chrominance components may include both red hue and blue hue chrominance components. In some examples, the video encoder 200 converts the received RGB format data to a YUV representation before encoding, and the video decoder 300 converts the YUV representation to an RGB format. Alternatively, a pre-processing and post-processing unit (not shown) may perform these conversions.

[0059] The present disclosure may generally relate to the decoding (e.g., encoding and decoding) of a picture to include the process of encoding or decoding the data of the picture. Similarly, the present disclosure may relate to the decoding of a block of a picture to include the process of encoding or decoding the data of the block, such as prediction and / or residual decoding. The encoded video bitstream typically includes a series of values ​​of syntax elements that represent encoding decisions (e.g., encoding modes) and partitioning of the picture into blocks. Therefore, references to encoded pictures or blocks should generally be understood as the encoded values ​​of the syntax elements used to form the picture or block.

[0060] HEVC defines various blocks, including coding units (CUs), prediction units (PUs), and transform units (TUs). According to HEVC, a video decoder (such as the video encoder 200) divides a coding tree unit (CTU) into CUs according to a quadtree structure. That is, the video decoder divides the CTU and CU into four equal, non-overlapping squares, and each node of the quadtree has zero or four child nodes. A node without child nodes may be referred to as a "leaf node", and the CU of such a leaf node may include one or more PUs and / or one or more TUs. The video decoder may further divide the PU and TU. For example, in HEVC, a residual quadtree (RQT) represents a partition of a TU. In HEVC, a PU represents inter-frame prediction data, and a TU represents residual data. An intra-predicted CU includes intra-frame prediction information, such as an intra-frame mode indication.

[0061] As another example, the video encoder 200 and the video decoder 300 may be configured to operate according to JEM or VVC. According to JEM or VVC, a video decoder (such as the video encoder 200) divides a picture into a plurality of coding tree units (CTUs). The video encoder 200 may divide the CTUs according to a tree structure (such as a quadtree-binary tree (QTBT) structure or a multi-type tree (MTT) structure). The QTBT structure removes the concept of multiple partition types, such as the separation between CU, PU, ​​and TU of HEVC. The QTBT structure includes two levels: the first level is divided according to a quadtree, and the second level is divided according to a binary tree. The root node of the QTBT structure corresponds to a CTU. The leaf nodes of the binary tree correspond to coding units (CUs).

[0062] In the MTT partition structure, blocks can be partitioned using quadtree (QT) partitioning, binary tree (BT) partitioning, and one or more types of ternary tree (TT) partitioning. A ternary tree partition is a partition in which a block is divided into three sub-blocks. In some examples, the ternary tree partition divides the block into three sub-blocks without dividing the original block through the center. The partition types in MTT (e.g., QT, BT, and TT) can be symmetric or asymmetric.

[0063] In some examples, the video encoder 200 and the video decoder 300 may use a single QTBT or MTT structure to represent each of the luma and chroma components, while in other examples, the video encoder 200 and the video decoder 300 may use two or more QTBT or MTT structures, such as one QTBT / MTT structure for the luma component and another QTBT / MTT structure for the two chroma components (or two QTBT / MTT structures for corresponding chroma components).

[0064] The video encoder 200 and the video decoder 300 may be configured to use quadtree partitioning, QTBT partitioning, MTT partitioning, or other partitioning structures according to HEVC. For illustrative purposes, the description of the technology of the present disclosure is presented with respect to QTBT partitioning. However, it should be understood that the technology of the present disclosure may also be applied to a video decoder configured to use quadtree partitioning or other types of partitioning.

[0065] This disclosure uses "NxN" and "N by N" interchangeably to refer to the sample dimensions of a block (such as a CU or other video block) in terms of vertical and horizontal dimensions, for example, 16x16 samples or 16 by 16 samples. Typically, a 16x16 CU will have 16 samples in the vertical direction (y=16) and 16 samples in the horizontal direction (x=16). Similarly, an NxN CU generally has N samples in the vertical direction and N samples in the horizontal direction, where N represents a non-negative integer value. The samples in a CU can be arranged in rows and columns. In addition, the number of samples in the horizontal direction of a CU does not have to be the same as the number of samples in the vertical direction. For example, a CU may include NxM samples, where M is not necessarily equal to N.

[0066] The video encoder 200 encodes the video data of the CU representing the prediction and / or residual information and other information. The prediction information indicates how the CU will be predicted to form a prediction block for the CU. The residual information generally represents the sample-by-sample difference between the samples of the CU before encoding and the prediction block.

[0067] In order to predict a CU, the video encoder 200 may typically form a prediction block for the CU by inter-frame prediction or intra-frame prediction. Inter-frame prediction generally refers to predicting a CU based on data of a previously decoded picture, while intra-frame prediction generally refers to predicting a CU based on previously decoded data of the same picture. In order to perform inter-frame prediction, the video encoder 200 may generate a prediction block using one or more motion vectors. The video encoder 200 may typically perform a motion search to identify a reference block that closely matches the CU, for example, in terms of the difference between the CU and the reference block. The video encoder 200 may calculate a difference metric using the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean squared difference (MSD), or other such difference calculations to determine whether the reference block closely matches the current CU. In some examples, the video encoder 200 may use unidirectional prediction or bidirectional prediction to predict the current CU.

[0068] Some examples of JEM and VVC also provide an affine motion compensation mode, which can be considered an inter-frame prediction mode. In the affine motion compensation mode, the video encoder 200 can determine two or more motion vectors representing non-translational motion (such as zooming in or out, rotation, perspective motion, or other irregular motion types).

[0069] To perform intra prediction, the video encoder 200 may select an intra prediction mode to generate a prediction block. Some examples of JEM and VVC provide 67 intra prediction modes, including various directional modes as well as planar and DC modes. In general, the video encoder 200 selects an intra prediction mode that describes neighboring samples of a current block (e.g., a block of a CU) from which samples of the current block are predicted. Assuming that the video encoder 200 decodes CTUs and CUs in raster scan order (from left to right, top to bottom), such samples may typically be above, to the upper left, or to the left of the current block in the same picture as the current block).

[0070] The video encoder 200 encodes data representing the prediction mode of the current block. For example, for inter-frame prediction mode, the video encoder 200 can encode data indicating which of the various available inter-frame prediction modes is used and motion information of the corresponding mode. For example, for unidirectional or bidirectional inter-frame prediction, the video encoder 200 can encode the motion vector using advanced motion vector prediction (AMVP) or merge mode. The video encoder 200 can use a similar mode to encode the motion vector for affine motion compensation mode.

[0071] After a prediction such as intra prediction or inter prediction of a block, the video encoder 200 may calculate residual data for the block. Residual data such as a residual block represents sample-by-sample differences between a block and a prediction block formed using a corresponding prediction mode for the block. The video encoder 200 may apply one or more transforms to the residual block to generate transformed data in a transform domain rather than a sample domain. For example, the video encoder 200 may apply a discrete cosine transform (DCT), an integer transform, a wavelet transform, or a conceptually similar transform to the residual video data. In addition, the video encoder 200 may apply a secondary transform after the first transform, such as a mode-dependent non-separable secondary transform (MDNSST), a signal-dependent transform, a Karhunen-Loeve transform (KLT), etc. The video encoder 200 generates transform coefficients after applying one or more transforms.

[0072] As described above, after any transforms that produce transform coefficients, the video encoder 200 may perform quantization of the transform coefficients. Quantization generally refers to the process of quantizing transform coefficients to potentially reduce the amount of data used to represent the coefficients, thereby providing further compression. By performing the quantization process, the video encoder 200 may reduce the bit depth associated with some or all coefficients. For example, the video encoder 200 may round down an n-bit value to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, the video encoder 200 may perform a bitwise right shift of the value to be quantized.

[0073] After quantization, the video encoder 200 may scan the transform coefficients to generate a one-dimensional vector from a two-dimensional matrix including the quantized transform coefficients. The scan may be designed to place coefficients with higher energy (and therefore lower frequency) in front of the vector and transform coefficients with lower energy (and therefore higher frequency) in the back of the vector. In some examples, the video encoder 200 may scan the quantized transform coefficients using a predefined scan order to generate a serialized vector, and then entropy encode the quantized transform coefficients of the vector. In other examples, the video encoder 200 may perform adaptive scanning. After scanning the quantized transform coefficients to form a one-dimensional vector, the video encoder 200 may entropy encode the one-dimensional vector, for example, according to context adaptive binary arithmetic coding (CABAC). The video encoder 200 may also entropy encode the values ​​of the syntax elements describing the metadata associated with the encoded video data for use by the video decoder 300 when decoding the video data.

[0074] To perform CABAC, the video encoder 200 may assign context within a context model to a symbol to be transmitted. The context may relate to, for example, whether neighboring values ​​of the symbol are zero values. The probability determination may be based on the context assigned to the symbol.

[0075] The video encoder 200 may also generate syntax data, such as block-based syntax data, picture-based syntax data, and sequence-based syntax data, to the video decoder 300, for example, in a picture header, a block header, a slice header, or other syntax data such as a sequence parameter set (SPS), a picture parameter set (PPS), or a video parameter set (VPS). The video decoder 300 may also decode such syntax data to determine how to decode the corresponding video data. In fact, the present disclosure contemplates decoder-side refinement control signaling that appears in a parameter set associated with a portion or subset (e.g., some but not all) of a video sequence. For example, such signaling may apply to a picture, a frame, a slice, a sub-picture, a video block, or another subset of video data within a larger video data sequence. Thus, decoder-side refinement control signaling may be controlled such that a first subset of video data associated with a video sequence (e.g., a first picture, slice, frame, sub-picture, block, or other subset of video data) is decoded using different decoder-side refinement tools than a second subset of video data (e.g., a different picture, slice, frame, block, sub-picture, or other subset of video data) within the same video sequence, the second subset of video data being different from the first subset of video data.

[0076] In this way, the video encoder 200 can generate a bitstream containing coded video data (e.g., syntax elements describing the division of a picture into blocks (e.g., CUs)) and prediction and / or residual information for the blocks. Ultimately, the video decoder 300 can receive the bitstream and decode the coded video data. The on / off signaling of the decoder-side refinement tool can ensure that the decoder is correctly configured to apply any desired decoder-side refinement, and the control can be finer than traditional control.

[0077] In general, the video decoder 300 performs a process that is the opposite of the process performed by the video encoder 200 to decode the encoded video data of the bitstream. For example, the video decoder 300 can use CABAC to decode the values ​​of the syntax elements of the bitstream in a manner that is substantially similar but reciprocal to the CABAC encoding process of the video encoder 200. The syntax elements can define the partition information of the picture as CTUs, and partition each CTU according to a corresponding partition structure such as a QTBT structure to define the CUs of the CTU. In addition, the syntax elements can allow precise (sub-sequence level) control of whether the decoder-side refinement tools are turned on or off for different parts of the video sequence. The syntax elements can further define the prediction and residual information of the video data block (e.g., CU).

[0078] The residual information may be represented by, for example, quantized transform coefficients. The video decoder 300 may inverse quantize and inverse transform the quantized transform coefficients of the block to reproduce the residual block of the block. The video decoder 300 uses the signal prediction mode (intra-frame or inter-frame prediction) and related prediction information (e.g., motion information for inter-frame prediction) to form a prediction block for the block. The video decoder 300 may then combine the prediction block and the residual block (on a sample-by-sample basis) to reproduce the original block. The video decoder 300 may perform additional processing, such as performing a deblocking process to reduce visual artifacts along block boundaries.

[0079] According to the technology of the present disclosure, the video encoder 200 and the video decoder 300 can be configured to encode syntax elements indicating whether the decoder-side motion refinement mode is turned on or off for a subset of video data within a video sequence (e.g., a slice, picture, frame, sub-picture, block, or other subset), and the video encoder 200 and the video decoder 300 can configure code blocks for the subset of video data based on the syntax elements associated with the subset (e.g., a slice, picture, frame, sub-picture, block, or other subset).

[0080] The present disclosure may generally refer to "signaling" certain information such as syntax elements. The term "signaling" may generally refer to the transmission of values ​​of syntax elements and / or other data used to decode encoded video data. That is, the video encoder 200 may signal the values ​​of syntax elements in the bitstream. Generally, signaling refers to generating a value in the bitstream. As described above, the source device 102 may transmit the bitstream to the destination device 116 substantially in real time or in non-real time, such as may occur when the syntax elements are stored to the storage device 112 for later retrieval by the destination device 116. According to the present disclosure, different syntax elements may be used to signal whether different decoder-side refinement tools are enabled, and syntax elements may be signaled multiple times for a video sequence to allow decoder-side refinement tools to be enabled or disabled for different subsets or portions of the video sequence (e.g., for different slices, pictures, frames, sub-pictures, or blocks of video data within a larger video sequence of video data).

[0081] Figure 2A and 2B 1 is a conceptual diagram illustrating an example quadtree binary tree (QTBT) structure 130 and a corresponding coding tree unit (CTU) 132. Solid lines represent quadtree splitting, while dashed lines represent binary tree splitting. In each split (i.e., non-leaf) node of the binary tree, a flag is signaled to indicate which split type (i.e., horizontal or vertical) is used, where 0 indicates horizontal splitting and 1 indicates vertical splitting in this example. For quadtree splitting, there is no need to indicate the split type because the quadtree node splits a block horizontally and vertically into 4 sub-blocks of equal size. Therefore, the video encoder 200 can encode and the video decoder 300 can decode syntax elements (such as split information) at the regional tree level (i.e., solid line) of the QTBT structure 130 and syntax elements (such as split information) for the prediction tree level (i.e., dashed line) of the QTBT structure 130. For the CU represented by the terminal leaf node of the QTBT structure 130, the video encoder 200 can encode and the video decoder 300 can decode video data such as prediction and transform data.

[0082] generally, Figure 2B The CTU 132 may be associated with parameters defining the size of blocks of nodes corresponding to the first and second levels of the QTBT structure 130. These parameters may include a CTU size (representing the size of the CTU 132 in samples), a minimum quadtree size (MinQTSize, representing the minimum allowed quadtree leaf node size), a maximum binary tree size (MaxBTSize, representing the maximum allowed binary tree root node size), a maximum binary tree depth (MaxBTDepth, representing the maximum allowed binary tree depth), and a minimum binary tree size (MinBTSize, representing the minimum allowed binary tree leaf node size).

[0083] The root node of the QTBT structure corresponding to the CTU can have four child nodes at the first level of the QTBT structure, and each child node can be divided according to the quadtree partition. That is, the nodes of the first level are either leaf nodes (no child nodes) or have four child nodes. The example of the QTBT structure 130 represents such a node as a parent node and a child node including a solid line for branching. If the node of the first level is not larger than the maximum allowed binary tree root node size (MaxBTSize), the node can be further divided by the respective binary trees. The binary tree splitting of a node can be iterated until the node generated by the split reaches the minimum allowed binary tree leaf node size (MinBTSize) or the maximum allowed binary tree depth (MaxBTDepth). The example of the QTBT structure 130 represents such a node as having a dotted line for branching. The binary tree leaf node is called a decoding unit (CU) for prediction (e.g., intra-picture or inter-picture prediction) and transformation without any further division. As described above, a CU may also be referred to as a "video block" or "block".

[0084] In one example of a QTBT partition structure, the CTU size is set to 128x128 (luminance sample and two corresponding 64x64 chroma samples), MinQTSize is set to 16x16, MaxBTSize is set to 64x64, MinBTSize (for both width and height) is set to 4, and MaxBTDepth is set to 4. Quadtree partitioning is first applied to the CTU to generate quadtree leaf nodes. The size of the quadtree leaf node can range from 16x16 (i.e., MinQTSize) to 128x128 (i.e., CTU size). If the leaf quadtree node is 128x128, it will not be further split by the binary tree because the size exceeds MaxBTSize (i.e., 64x64 in this case). Otherwise, the leaf quadtree node will be further divided by the binary tree. Therefore, the quadtree leaf node is also the root node of the binary tree, and the binary tree depth is 0. When the binary tree depth reaches MaxBTDepth (4 in this example), further splitting is not allowed. When the width of a binary tree node is equal to MinBTSize (4 in this case), it means that no further horizontal splitting is allowed. Similarly, a binary tree node with a height equal to MinBTSize means that no further vertical splitting is allowed for the binary tree node. As mentioned above, the leaf nodes of the binary tree are called CUs and are further processed according to prediction and transformation without further division.

[0085] Figure 3 is a block diagram illustrating an example video encoder 200 that may perform the techniques of this disclosure. Figure 3The above description is provided for the purpose of illustration and should not be considered as limiting the techniques broadly illustrated and described in this disclosure. For the purpose of illustration, this disclosure describes the video encoder 200 in the context of video coding standards such as the HEVC video coding standard and the H.266 video coding standard under development. However, the techniques of this disclosure are not limited to these video coding standards and are generally applicable to video encoding and decoding.

[0086] exist Figure 3 In the example of , the video encoder 200 includes a video data memory 230, a mode selection unit 202, a residual generation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a filter unit 216, a decoded picture buffer (DPB) 218, and an entropy coding unit 220. Any or all of the video data memory 230, the mode selection unit 202, the residual generation unit 204, the transform processing unit 206, the quantization unit 208, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the filter unit 216, the DPB 218, and the entropy coding unit 220 may be implemented in one or more processors or processing circuits. In addition, the video encoder 200 may include additional or alternative processors or processing circuits to perform these and other functions.

[0087] Video data memory 230 may store video data to be encoded by components of video encoder 200. Video encoder 200 may receive video data from, for example, video source 104 ( Figure 1 ) receives video data stored in video data memory 230. DPB 218 can act as a reference picture memory, which stores reference video data for prediction of subsequent video data by video encoder 200. Video data memory 230 and DPB 218 can be formed by any of a variety of memory devices (such as dynamic random access memory (DRAM), including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM) or other types of storage devices). Video data memory 230 and DPB 218 can be provided by the same memory device or separate memory devices. In various examples, video data memory 230 can be on chip with other components of video encoder 200, as shown, or off chip relative to those components.

[0088] In the present disclosure, references to the video data memory 230 should not be interpreted as limited to only memory internal to the video encoder 200 (unless specifically described as such), or memory external to the video encoder 200 (unless specifically described as such). Rather, references to the video data memory 230 should be understood as reference memory storing video data received by the video encoder 200 for encoding (e.g., video data of a current block to be encoded). Figure 1 The memory 106 may also provide temporary storage of outputs from the various units of the video encoder 200 .

[0089] Figure 3 The various units are illustrated to help understand the operations performed by the video encoder 200. These units may be implemented as fixed-function circuits, programmable circuits, or a combination thereof. A fixed-function circuit refers to a circuit that provides a specific function and pre-sets the operations that can be performed. A programmable circuit refers to a circuit that can be programmed to perform various tasks and provides flexible functions in the operations that can be performed. For example, a programmable circuit can execute software or firmware that causes the programmable circuit to operate in a manner defined by the instructions of the software or firmware. Fixed-function circuits can execute software instructions (for example, to receive parameters or output parameters), but the type of operation performed by the fixed-function circuit is generally immutable. In some examples, one or more units may be different circuit blocks (fixed function or programmable), and in some examples, one or more units may be integrated circuits.

[0090] The video encoder 200 may include an arithmetic logic unit (ALU), an elementary function unit (EFU), a digital circuit, an analog circuit, and / or a programmable core formed by a programmable circuit. In an example where the operation of the video encoder 200 is performed using software executed by a programmable circuit, the memory 106 ( Figure 1 ) may store object code for software received and executed by the video encoder 200, or another memory (not shown) within the video encoder 200 may store such instructions.

[0091] The video data memory 230 is configured to store received video data. The video encoder 200 may retrieve pictures of video data from the video data memory 230 and provide the video data to the residual generation unit 204 and the mode selection unit 202. The video data in the video data memory 230 may be original video data to be encoded.

[0092] The mode selection unit 202 includes a motion estimation unit 222, a motion compensation unit 224, and an intra prediction unit 226. The mode selection unit 202 may include additional functional units to perform video prediction according to other prediction modes. As an example, the mode selection unit 202 may include a palette unit, an intra-block copy unit (which may be part of the motion estimation unit 222 and / or the motion compensation unit 224), an affine unit, a linear model (LM) unit, and the like.

[0093] The mode selection unit 202 typically coordinates multiple encoding passes to test combinations of encoding parameters and the resulting rate-distortion values ​​of such combinations. The encoding parameters may include the division of the CTU into CUs, the prediction mode of the CU, the transform type of the residual data of the CU, the quantization parameter of the residual data of the CU, etc. The mode selection unit 202 may ultimately select a combination of encoding parameters that has a better rate-distortion value than other tested combinations.

[0094] The video encoder 200 may divide the picture retrieved from the video data memory 230 into a series of CTUs, and encapsulate one or more CTUs in a slice. The mode selection unit 202 may divide the CTUs of the picture according to a tree structure, such as the QTBT structure or quadtree structure of HEVC described above. As described above, the video encoder 200 may form one or more CUs by dividing the CTUs according to the tree structure. Such CUs may also be generally referred to as "video blocks" or "blocks".

[0095] In general, the mode selection unit 202 also controls its components (e.g., the motion estimation unit 222, the motion compensation unit 224, and the intra prediction unit 226) to generate a prediction block for the current block (e.g., the current CU, or in HEVC, the overlapping portion of the PU and TU). For inter prediction of the current block, the motion estimation unit 222 may perform a motion search to identify one or more closely matching reference blocks in one or more reference pictures (e.g., one or more previously decoded pictures stored in the DPB 218). In particular, the motion estimation unit 222 may calculate values ​​representing how similar the potential reference blocks are to the current block, for example, based on the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean squared difference (MSD), and the like. The motion estimation unit 222 may generally perform these calculations using sample-by-sample differences between the current block and the reference block under consideration. The motion estimation unit 222 may identify the reference block having the lowest value resulting from these calculations, indicating the reference block that most closely matches the current block.

[0096] The motion estimation unit 222 may form one or more motion vectors (MVs) that define the position of a reference block in a reference picture relative to the position of a current block in a current picture. The motion estimation unit 222 may then provide the motion vectors to the motion compensation unit 224. For example, for unidirectional inter prediction, the motion estimation unit 222 may provide a single motion vector, and for bidirectional inter prediction, the motion estimation unit 222 may provide two motion vectors. The motion compensation unit 224 may then use the motion vectors to generate a prediction block. For example, the motion compensation unit 224 may use the motion vectors to retrieve data for the reference block. As another example, if the motion vector has fractional sample accuracy, the motion compensation unit 224 may interpolate the value of the prediction block according to one or more interpolation filters. In addition, for bidirectional inter prediction, the motion compensation unit 224 may retrieve data for two reference blocks identified by the corresponding motion vectors, and combine the retrieved data, for example, by sample-by-sample averaging or weighted averaging.

[0097] As another example, for intra prediction or intra prediction coding, the intra prediction unit 226 may generate a prediction block from samples adjacent to the current block. For example, for directional mode, the intra prediction unit 226 may generally mathematically combine the values ​​of the adjacent samples and pad these calculated values ​​in a defined direction across the current block to generate a prediction block. As another example, for DC mode, the intra prediction unit 226 may calculate an average value of adjacent samples of the current block and generate a prediction block to include the average value obtained for each sample of the prediction block.

[0098] The mode selection unit 202 provides the prediction block to the residual generation unit 204. The residual generation unit 204 receives the original, uncoded version of the current block from the video data memory 230 and receives the prediction block from the mode selection unit 202. The residual generation unit 204 calculates the sample-by-sample difference between the current block and the prediction block. The generated sample-by-sample difference defines a residual block for the current block. In some examples, the residual generation unit 204 may also determine the difference between the sample values ​​in the residual block to generate the residual block using residual differential pulse code modulation (RDPCM). In some examples, the residual generation unit 204 may be formed using one or more subtractor circuits that perform binary subtraction.

[0099] In the example where the mode selection unit 202 divides the CU into PUs, each PU may be associated with a luma prediction unit and a corresponding chroma prediction unit. The video encoder 200 and the video decoder 300 may support PUs of various sizes. As described above, the size of the CU may refer to the size of the luma coding block of the CU, and the size of the PU may refer to the size of the luma prediction unit of the PU. Assuming that the size of a particular CU is 2Nx2N, the video encoder 200 may support PU sizes of 2Nx2N or NxN for intra-frame prediction, and symmetric PU sizes of 2Nx2N, 2NxN, Nx2N, NxN or the like for inter-frame prediction. The video encoder 200 and the video decoder 300 may also support asymmetric partitioning of PU sizes of 2NxnU, 2NxnD, nLx2N and nRx2N for inter-frame prediction.

[0100] In an example where the mode selection unit does not further divide the CU into PUs, each CU may be associated with a luma coding block and a corresponding chroma coding block. As described above, the size of a CU may refer to the size of the luma coding block of the CU. The video encoder 200 and the video decoder 120 may support a CU size of 2Nx2N, 2NxN, or Nx2N.

[0101] For other video coding techniques, such as intra-block copy mode coding, affine mode coding, and linear model (LM) mode coding as a few examples, the mode selection unit 202 generates a prediction block for the current block being encoded via various units associated with the coding technique. In some examples, such as palette mode coding, the mode selection unit 202 may not generate a prediction block, but instead generate syntax elements indicating how to reconstruct the block based on the selected palette. In such a mode, the mode selection unit 202 may provide these syntax elements to the entropy coding unit 220 to be encoded.

[0102] As described above, the residual generation unit 204 receives video data of a current block and a corresponding prediction block. The residual generation unit 204 then generates a residual block for the current block. To generate the residual block, the residual generation unit 204 calculates the sample-by-sample difference between the prediction block and the current block.

[0103] The transform processing unit 206 applies one or more transforms to the residual block to generate a transform coefficient block (referred to herein as a "transform coefficient block"). The transform processing unit 206 may apply various transforms to the residual block to form a transform coefficient block. For example, the transform processing unit 206 may apply a discrete cosine transform (DCT), a directional transform, a Karhunen-Loeve transform (KLT), or a conceptually similar transform to the residual block. In some examples, the transform processing unit 206 may perform multiple transforms on the residual block, such as a primary transform and a secondary transform, such as a rotation transform. In some examples, the transform processing unit 206 does not apply a transform to the residual block.

[0104] The quantization unit 208 may quantize the transform coefficients in the transform coefficient block to produce a quantized transform coefficient block. The quantization unit 208 may quantize the transform coefficients of the transform coefficient block according to a quantization parameter (QP) value associated with the current block. The video encoder 200 (e.g., via the mode selection unit 202) may adjust the degree of quantization applied to the transform coefficient block associated with the current block by adjusting the QP value associated with the CU. Quantization may result in a loss of information, and thus the quantized transform coefficients may have a lower precision than the original transform coefficients produced by the transform processing unit 206.

[0105] The inverse quantization unit 210 and the inverse transform processing unit 212 may apply inverse quantization and inverse transform, respectively, to the quantized transform coefficient block to reconstruct a residual block from the transform coefficient block. The reconstruction unit 214 may generate a reconstructed block corresponding to the current block (although possibly with some degree of distortion) based on the reconstructed residual block and the prediction block generated by the mode selection unit 202. For example, the reconstruction unit 214 may add the corresponding samples converted from the prediction block generated by the mode selection unit 202 to generate a reconstructed block.

[0106] Filter unit 216 may perform one or more filter operations on the reconstructed block. For example, filter unit 216 may perform a deblocking operation to reduce blocking artifacts along CU edges. In some examples, the operations of filter unit 216 may be skipped.

[0107] The video encoder 200 stores the reconstructed blocks in the DPB 218. For example, in examples where the operation of the filter unit 216 is not required, the reconstruction unit 214 can store the reconstructed blocks to the DPB 218. In examples where the operation of the filter unit 216 is required, the filter unit 216 can store the filtered reconstructed blocks to the DPB 218. The motion estimation unit 222 and the motion compensation unit 224 can retrieve a reference picture from the DPB 218, which is formed by the reconstructed (and possibly filtered) blocks to inter-predict blocks of subsequently encoded pictures. In addition, the intra-prediction unit 226 can use the reconstructed blocks in the DPB 218 of the current picture to intra-predict other blocks in the current picture.

[0108] In general, the entropy coding unit 220 may entropy encode syntax elements received from other functional components of the video encoder 200. For example, the entropy coding unit 220 may entropy encode a quantized transform coefficient block from the quantization unit 208. As another example, the entropy coding unit 220 may entropy encode a prediction syntax element (e.g., motion information for inter-frame prediction or intra-frame mode information for intra-frame prediction) from the mode selection unit 202. The entropy coding unit 220 may perform one or more entropy coding operations on syntax elements as another example of video data to generate entropy encoded data. For example, the entropy coding unit 220 may perform a context adaptive variable length coding (CAVLC) operation, a CABAC operation, a variable to variable (V2V) length coding operation, a syntax-based context adaptive binary arithmetic coding (SBAC) operation, a probability interval partition entropy (PIPE) coding operation, an exponential-Golomb coding operation, or other types of data entropy coding operations. In some examples, the entropy coding unit 220 may operate in a bypass mode in which the syntax elements are not entropy encoded.

[0109] The video encoder 200 may output a bitstream including entropy coding syntax elements required to reconstruct a block of a slice or picture. In particular, the entropy coding unit 220 may output a bitstream.

[0110] The operations described above are described with respect to blocks. This description should be understood as operations on luma coding blocks and / or chroma coding blocks. As described above, in some examples, the luma coding blocks and chroma coding blocks are the luma and chroma components of a CU. In some examples, the luma coding blocks and chroma coding blocks are the luma and chroma components of a PU.

[0111] In some examples, operations performed with respect to luma coding blocks need not be repeated for chroma coding blocks. As an example, operations to identify motion vectors (MVs) and reference pictures for luma coding blocks need not be repeated to identify MVs and reference pictures for chroma blocks. Instead, the MVs of luma coding blocks may be scaled to determine MVs of chroma blocks, and the reference pictures may be the same. As another example, the intra prediction process may be the same for luma coding blocks and chroma coding blocks.

[0112] The video encoder 200 represents an example of a device configured to encode video data, the device comprising a memory configured to store the video data and one or more processing units implemented in circuits and configured to decode (e.g., at a slice level, a picture level, a sub-picture level, a frame level, or a block level) a syntax element indicating whether a decoder-side motion refinement mode is on or off for a subset of video data within a video sequence, and to decode video data blocks in the subset of video data based on the syntax element.

[0113] According to some examples, decoder-side refinement signaling (e.g., on / off control of a subset of a video sequence) may be performed by mode selection unit 202, and possibly applied by motion estimation unit 222 and motion compensation unit 224, as part of a decoding loop during encoding. For example, the enabling or disabling of a DMVR tool may be signaled by mode selection unit 202 by outputting a value indicating the on or off of DMVR to entropy coding unit 220. Similarly, the enabling or disabling of a BDOF tool may be signaled by mode selection unit 202 by outputting a value indicating the on or off of BDOF to entropy coding unit 220. However, other types of decoder-side refinements that may be enabled or disabled as described herein may also be enabled by other units such as prediction unit 226 and / or filter unit 216.

[0114] In some examples, the video encoder 200 may be configured to encode a video data sequence comprising a plurality of pictures. In doing so, the video encoder 200 (particularly the motion compensation unit 224 and the entropy coding unit 220) may be configured to encode a first instance of a first syntax element to identify whether a first decoder-side refinement tool is enabled or disabled for a first subset of video data within the video data sequence, and to encode a second instance of the first syntax element to identify whether the first decoder-side refinement tool is enabled or disabled for a second subset of video data within the video data sequence, wherein the second subset is different from the first subset. In addition, the video encoder 200 (particularly the motion compensation unit 224 and the entropy coding unit 220) may be further configured to encode a first instance of a second syntax element to identify whether a second decoder-side refinement tool is enabled or disabled for the first subset of video data within the video data sequence, and to encode a second instance of a second syntax element to identify whether a second decoder-side refinement tool is enabled or disabled for the second subset of video data within the video data sequence. In this way, on / off control of two different decoder-side refinement tools may be enabled or disabled in the decoded bitstreams of different subsets of the decoded video sequence. Video data memory 230 may include a memory configured to store a video data sequence including a plurality of pictures, and motion compensation unit 224 and entropy coding unit 220 may include processing circuitry configured to perform encoding and determination associated with decoder-side refinement.

[0115] Figure 4 is a block diagram illustrating an example video decoder 300 that may perform the techniques of this disclosure. Figure 4It is provided for the purpose of illustration and does not limit the techniques widely illustrated and described in this disclosure. For the purpose of illustration, this disclosure describes a video decoder 300 according to the techniques of JEM, VVC, and HEVC. However, the techniques of this disclosure can be performed by a video decoding device configured for other video decoding standards.

[0116] exist Figure 4 In the example of , the video decoder 300 includes a coded picture buffer (CPB) memory 320, an entropy decoding unit 302, a prediction processing unit 304, an inverse quantization unit 306, an inverse transform processing unit 308, a reconstruction unit 310, a filter unit 312, and a decoded picture buffer (DPB) 314. Any or all of the CPB memory 320, the entropy decoding unit 302, the prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, the filter unit 312, and the DPB 314 may be implemented in one or more processors or processing circuits. In addition, the video decoder 300 may include additional or alternative processors or processing circuits to perform these and other functions.

[0117] The prediction processing unit 304 includes a motion compensation unit 316 and an intra prediction unit 318. The prediction processing unit 304 may include an addition unit to perform prediction according to other prediction modes. As an example, the prediction processing unit 304 may include a palette unit, an intra-block copy unit (which may form part of the motion compensation unit 316), an affine unit, a linear model (LM) unit, etc. In other examples, the video decoder 300 may include more, fewer, or different functional components.

[0118] The CPB memory 320 may store video data, such as an encoded video bitstream, to be decoded by components of the video decoder 300. The video data stored in the CPB memory 320 may be obtained, for example, from the computer-readable medium 110 ( Figure 1). The CPB memory 320 may include a CPB that stores coded video data (e.g., syntax elements) from a coded video bitstream. In addition, the CPB memory 320 may store video data other than syntax elements of decoded pictures, such as temporary data representing outputs from various units of the video decoder 300. The DPB 314 typically stores decoded pictures, which the video decoder 300 may output and / or use as reference video data when decoding subsequent data or pictures of the coded video bitstream. The CPB memory 320 and the DPB 314 may be formed by any of a variety of memory devices (e.g., DRAM, including SDRAM, MRAM, RRAM, or other types of memory devices). The CPB memory 320 and the DPB 314 may be provided by the same memory device or by separate memory devices. In various examples, the CPB memory 320 may be on-chip with other components of the video decoder 300, or off-chip relative to those components.

[0119] Additionally or alternatively, in some examples, video decoder 300 may retrieve the video from memory 120 ( Figure 1 ) to retrieve the encoded video data from the CPB memory 320. That is, the memory 120 may store data as discussed above along with the CPB memory 320. Likewise, when some or all of the functionality of the video decoder 300 is implemented in software to be executed by the video decoder 300, the memory 120 may store instructions to be executed by the processing circuitry of the video decoder 300. In some examples, decoder-side refinement (when enabled) is performed by a unit within the video decoder 300 (e.g., such as the processing unit 304, the motion compensation unit 316, the intra-prediction unit 318, and / or the filter unit 312). For example, DMVR may be performed by the motion compensation unit 316 when enabled and BDOF may be performed by the motion compensation unit when enabled. In other examples, other types of decoder-side refinement that may be enabled or disabled as described herein may be performed by the motion compensation unit 316 or other units (such as the intra-prediction unit 318 and / or the filter unit 312).

[0120] Figure 4 The various units shown are illustrated to aid in understanding the operations performed by the video decoder 300. These units may be implemented as fixed function circuits, programmable circuits, or a combination thereof. Figure 3, fixed-function circuits are circuits that provide specific functions, with pre-set operations that can be performed. Programmable circuits are circuits that can be programmed to perform a variety of tasks and provide flexible functionality in the operations that can be performed. For example, a programmable circuit can execute software or firmware that causes the programmable circuit to operate in a manner defined by the instructions of the software or firmware. Fixed-function circuits can execute software instructions (e.g., receive parameters or output parameters), but the type of operation performed by the fixed-function circuit is generally immutable. In some examples, one or more units may be different circuit blocks (fixed function or programmable), and in some examples, one or more units may be integrated circuits.

[0121] The video decoder 300 may include an ALU, an EFU, a digital circuit, an analog circuit, and / or a programmable core formed by a programmable circuit. In an example where the operation of the video decoder 300 is performed by software executed on a programmable circuit, an on-chip or off-chip memory may store instructions (e.g., object code) of the software received and executed by the video decoder 300.

[0122] The entropy decoding unit 302 may receive the encoded video data from the CPB and entropy decode the video data to reproduce the syntax elements. The prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, and the filter unit 312 may generate decoded video data based on the syntax elements extracted from the bitstream.

[0123] Generally speaking, the video decoder 300 reconstructs a picture on a block-by-block basis. The video decoder 300 may perform a reconstruction operation on each block individually (where the block currently being reconstructed, ie, decoded, may be referred to as a "current block").

[0124] The entropy decoding unit 302 may entropy decode syntax elements defining quantized transform coefficients of the quantized transform coefficient block and transform information such as a quantization parameter (QP) and / or a transform mode indication. The inverse quantization unit 306 may use the QP associated with the quantized transform coefficient block to determine a degree of quantization and, likewise, a degree of inverse quantization to be applied by the inverse quantization unit 306. The inverse quantization unit 306 may, for example, perform a bitwise left shift operation to inverse quantize the quantized transform coefficients. The inverse quantization unit 306 may thereby form a transform coefficient block including the transform coefficients.

[0125] After the inverse quantization unit 306 forms the transform coefficient block, the inverse transform processing unit 308 may apply one or more inverse transforms to the transform coefficient block to generate a residual block associated with the current block. For example, the inverse transform processing unit 308 may apply an inverse DCT, an inverse integer transform, an inverse Karhunen-Loeve transform (KLT), an inverse rotational transform, an inverse directional transform, or another inverse transform to the coefficient block.

[0126] In addition, prediction processing unit 304 generates a prediction block based on the prediction information syntax element entropy decoded by entropy decoding unit 302. For example, if the prediction information syntax element indicates that the current block is inter-predicted, motion compensation unit 316 can generate the prediction block. In this case, the prediction information syntax element can indicate a reference picture in DPB 314 from which the reference block is retrieved, and a motion vector that identifies the position of the reference block in the reference picture relative to the position of the current block in the current picture. Motion compensation unit 316 can generally generate a prediction block in the same manner as described for motion compensation unit 224 ( Figure 3 ) is performed in a manner substantially similar to that described herein.

[0127] As another example, if the prediction information syntax element indicates that the current block is intra-predicted, the intra-prediction unit 318 may generate a prediction block according to the intra-prediction mode indicated by the prediction information syntax element. Similarly, the intra-prediction unit 318 may generally generate a prediction block in the same manner as described for the intra-prediction unit 226 ( Figure 3 The intra prediction process is performed in a manner substantially similar to that described in the foregoing description. The intra prediction unit 318 may retrieve data of neighboring samples of the current block from the DPB 314.

[0128] The reconstruction unit 310 may reconstruct the current block using the prediction block and the residual block. For example, the reconstruction unit 310 may add samples of the residual block to corresponding samples of the prediction block to reconstruct the current block.

[0129] The filter unit 312 may perform one or more filter operations on the reconstructed block. For example, the filter unit 312 may perform a deblocking operation to reduce blocking artifacts along the edges of the reconstructed block. The operations of the filter unit 312 are not necessarily performed in all examples.

[0130] The video decoder 300 may store the reconstructed blocks in the DPB 314. As described above, the DPB 314 may provide reference information to the prediction processing unit, such as samples of the current picture for intra-frame prediction and previously decoded pictures for subsequent motion compensation. In addition, the video decoder 300 may output decoded pictures from the DPB 314 for subsequent display on a display device such as a Figure 1 presentation on a display device 118).

[0131] In this manner, video decoder 300 represents an example of a video decoding device that includes a memory configured to store video data and one or more processing circuits implemented in circuits and configured to decode (e.g., at a slice level, a picture level, a sub-picture level, a frame level, or a block level) a syntax element indicating whether a decoder-side motion refinement mode is on or off for a subset of video data within a video sequence, and to decode a video data block in the subset of video data based on the syntax element.

[0132] For example, the video decoder 300 (specifically, the entropy decoding unit 302 and the motion compensation unit 316) may be configured to decode a first syntax element indicating whether a first decoder-side refinement tool is enabled or disabled for a first subset of video data within a video data sequence, determine whether the first decoder-side refinement tool is enabled or disabled for the first subset of video data based on a value of the first syntax element, decode a second syntax element indicating whether a second decoder-side refinement tool is enabled or disabled for the first subset of video data within the video data sequence, and determine whether the second decoder-side refinement tool is enabled or disabled for the first subset of video data based on a value of the first syntax element. The video decoder 300 (particularly the entropy decoding unit 302 and the motion compensation unit 316) may decode the first subset of the video data using the first decoder-side refinement tool in response to enabling the first decoder-side refinement tool for the first subset, decode the first subset of the video data using the second decoder-side refinement tool without using the first decoder-side refinement tool in response to disabling the first decoder-side refinement tool for the first subset, decode the first subset of the video data using the second decoder-side refinement tool in response to enabling the second decoder-side refinement tool for the first subset, and decode the first subset of the video data without using the second decoder-side refinement tool in response to disabling the second decoder-side refinement tool for the first subset. The CPB memory 320 may include a memory configured to store a sequence of video data including a plurality of pictures, and the entropy decoding unit 302 and the motion compensation unit 316 may include processing circuitry configured to perform decoding and determination associated with the decoder-side refinement tool.

[0133] Bidirectional Optical Flow (BDOF)

[0134] The Bidirectional Optical Flow (BDOF) mode, previously also referred to as BIO, is a tool that can be used to refine the bidirectional prediction signal of a coding unit (CU) at the 4×4 sub-block level. As the name implies, the BDOF mode is based on the concept of optical flow, which assumes that the motion of objects is smooth. For each 4×4 sub-block, the video encoder 200 and the video decoder 300 can calculate the motion refinement (v x ,vy ). The video encoder 200 and the video decoder 300 may then use motion refinement to adjust the bi-directionally predicted sample values ​​in the 4x4 sub-blocks.

[0135] The following steps may be applied in the BDOF process. First, the video encoder 200 and the video decoder 300 may calculate the horizontal and vertical gradients, and The two prediction signals are calculated by directly calculating the difference between two adjacent samples, that is,

[0136]

[0137] Among them, I (k) (i,j) is the sample value at coordinate (i,j) of the prediction signal in list k, k=0,1.

[0138] Then, the video encoder 200 and the video decoder 300 may calculate the autocorrelation and cross-correlation of the gradients S1, S2, S3, S5, and S6 as follows:

[0139] S1=∑ (i,j)∈Ω ψ x (i,j)·ψ x (i,j),S3=∑ (i,j)∈Ω θ(i,j)·ψ x (i,j)

[0140] S2=∑ (i,j)∈Ω ψ x (i,j)·ψ y (i,j)

[0141] S5=∑ (i,j)∈Ω ψ y (i,j)·ψ y (i,j) S6=∑ (i,j)∈Ω θ(i,j)·ψ y (i,j),

[0142] in

[0143]

[0144] θ(i,j)=(I (1) (i,j)>>n b )-(I (0) (i,j)>>n b ),

[0145] and where Ω is a 6×6 window around the 4×4 sub-block.

[0146] The video encoder 200 and the video decoder 300 may use the following equation to derive the motion refinement (v x ,v y ):

[0147]

[0148] in is the floor function.

[0149] Based on the motion refinement and gradients, the video encoder 200 and the video decoder 300 may calculate the following adjustments for each sample in a 4×4 sub-block:

[0150]

[0151] Finally, the video encoder 200 and the video decoder 300 may calculate the BDOF samples of the CU by adjusting the bi-predicted samples as follows:

[0152] pred BDOF (x,y)=(I (0) (x,y)+I (1) (x,y)+b(x,y)+o offset )>>shift

[0153] These values ​​are chosen so that the multiplier in the BDOF process does not exceed 15 bits and the maximum bit width of the intermediate parameters in the BDOF process remains within 32 bits.

[0154] To derive the gradient value, the video encoder 200 and the video decoder 300 may generate some prediction samples I in a list k (k=0, 1) outside the current CU boundary. (k) (i,j). Figure 5 5 is a conceptual diagram illustrating an extended decoding unit area 501 used in a bidirectional optical flow. Figure 5 As shown, BDOF in VVC Test Model 4.0 (VTM4) uses an extended row / column around the CU boundary. In order to control the computational complexity of generating out-of-bounds prediction samples, the video encoder 200 and the video decoder 300 can generate prediction samples in the extended area by directly obtaining reference samples at nearby integer positions (using floor() operations on coordinates) without interpolation, and generate prediction samples within the CU (grayscale position) using a normal 8-tap motion compensated interpolation filter. In some examples, the video encoder 200 and the video decoder 300 may use these extended sample values ​​only in gradient calculations. For the remaining steps in the BDOF process, if any samples and gradient values ​​outside the CU boundary are needed, the video encoder 200 and the video decoder 300 may fill (e.g., repeat) samples and gradient values ​​from their nearest neighbors.

[0155] In one example of VTM, the video encoder 200 and the video decoder 300 may be configured to apply BDOF to a CU coded with the following conditions:

[0156] -Bidirectional prediction MV

[0157] - Bidirectional prediction has equal weights for both directions

[0158] - One reference image is in the past, and the other reference image is in the future with respect to the current image

[0159] -CU has more than 64 luma samples and CU height is greater than or equal to 8 luma samples

[0160] Decoder-side motion vector refinement (DMVR)

[0161] In order to increase the accuracy of the MV of the merge mode, the video encoder 200 and the video decoder 300 can be configured to apply decoder-side motion vector refinement based on bilateral matching. In some examples, the video encoder 200 can apply the decoder-side motion vector refinement technique in the reconstruction loop. In the bidirectional prediction operation, the video decoder 300 can be configured to search for the refined MV around the initial MV in the reference picture list L0 and the reference picture list L1. The video decoder 300 can use a block matching method to calculate the distortion between the two candidate blocks in the reference picture list L0 and the list L1. Figure 6 is a conceptual diagram illustrating an example of decoder-side motion vector refinement.

[0162] like Figure 6 As shown, the video decoder 300 may calculate the sum of absolute differences (SAD) between blocks labeled 601 and 602 based on each MV candidate around the initial MV. The MV candidate with the lowest SAD becomes the refined MV and is used by the video decoder 300 to generate a bidirectional prediction signal.

[0163] In one example of VTM, DMVR is applied to a CU that is decoded using the following conditions:

[0164] -CU level merge mode with bi-prediction MV

[0165] - Bidirectional prediction has equal weights for both directions

[0166] - One reference image is in the past, and the other reference image is in the future with respect to the current image

[0167] - The distance from the two reference pictures to the current picture (i.e. POC difference) is the same

[0168] -CU has more than 64 luma samples, CU height is more than 8 luma samples

[0169] Merge mode with motion vector difference (MMVD)

[0170] In addition to the merge mode (in which the implicitly derived motion information is directly used for prediction sample generation of the current CU), a merge mode with motion vector difference (MMVD) is introduced in VVC. The video encoder 200 can be configured to signal the MMVD flag after sending the skip flag and the merge flag to specify whether the MMVD mode is used for the CU.

[0171] In MMVD, after selecting a merge candidate, the video encoder 200 and the video decoder 300 can further refine the merge candidate using the signaled MVD information. Further information includes a merge candidate flag, an index specifying the magnitude of motion, and an index for indicating the direction of motion. In MMVD mode, the video encoder 200 and the video decoder 300 can select one for the first two candidates in the merge list to use as the MV basis. The video encoder 200 signals the merge candidate flag to specify which one to use. The video decoder 300 decodes the flag to determine the merge candidate to use.

[0172] The distance index (IDX) specifies the motion magnitude information and indicates a predefined offset from the starting point. Figure 7 701 and 702. Figure 7 In the example, the offset is added to the horizontal or vertical component of the starting MV. The relationship between the distance index and the predefined offset is shown in Table 1-1.

[0173] Table 11 - Relationship between distance index and predefined offset

[0174]

[0175] The direction index (IDX) indicates the direction of the MVD relative to the starting point. The direction index can represent four directions, as shown in Table 1-2. The meaning of the MVD symbol may vary depending on the information of the starting MV. When the starting MV(s) is a uni-predicted MV or a bi-predicted MV, both lists point to the same side of the current picture (that is, the POCs of both references are greater than the POC of the current picture, or are less than the POC of the current picture), and the symbols in Table 1-2 specify the sign of the MV offset added to the starting MV. When the starting MV is a bi-predicted MV, the two MVs point to different sides of the current picture (that is, the POC of one reference is greater than the POC of the current picture, and the POC of the other reference is less than the POC of the current picture), and the symbols in Table 1-2 specify the sign of the MV offset added to the list0MV component of the starting MV, and the signs of the list1 MV have opposite values.

[0176] Table 1-2 – Sign of MV offset specified by direction index

[0177] Directions to IDX 00 01 10 11 X-axis + – N / A N / A y-axis N / A N / A + –

[0178] The above decoder side motion refinement tool can improve compression efficiency. However, the use of the decoder side motion refinement tool also increases encoding / decoding complexity. In the present disclosure, a technique for on / off control of the decoder side motion refinement tool is disclosed to provide implementers with options to select the best tradeoff between complexity and compression efficiency in different applications.

[0179] The present disclosure generally describes on / off control applied to subsets of video data within a video sequence. Thus, according to the present disclosure, control of different decoder-side refinement tools may be enabled or disabled for different subsets or portions of a video sequence (e.g., for slices of video data, frames of video data, pictures of video data, sub-pictures of video data, or blocks of video data within a video sequence). In this way, greater flexibility may be achieved between the competing goals of reducing decoding complexity and improving compression efficiency in different video applications or settings. For example, a subset of a video sequence may include at least a portion of a first picture of a plurality of pictures of a video data sequence.

[0180] A slice may refer to a portion or subset of video data. A slice may include an entire picture or a portion thereof of a video sequence. A video sequence may include multiple pictures. For example, a subset of a video sequence may include at least a portion of a first picture of multiple pictures of a video data sequence, such as an entire picture or frame, some but not all pictures of a sequence, a portion of a sequence of pictures, a slice (which may include some or all of a picture), a group of blocks, or a single video block). According to the present disclosure, control may be provided at any of these different levels, as long as the control may allow different decoder-side refinements to be applied to different portions of a video sequence.

[0181] Slice-level control

[0182] In one example of the present disclosure, the video encoder 200 and the video decoder 300 may be configured to decode slice-level on / off control. That is, the video encoder 200 and the video decoder 300 may be configured to apply (i.e., turn on) or not apply (i.e., turn off) one or more decoder-side motion refinement techniques (e.g., DMVR, BDOF, etc.) at the slice level. Similar techniques to slice-level control may be applied to other sub-portions of a sequence.

[0183] In one example, the video encoder 200 and the video decoder 300 may decode a first syntax element (e.g., a flag) at a slice header to indicate the on / off state of DMVR in a slice, and the video encoder 200 and the video decoder 300 may decode a second syntax element (e.g., a flag) at a slice header to indicate the on / off state of BDOF in a slice, or vice versa.

[0184] In another example, the video encoder 200 and the video decoder 300 may decode one syntax element (eg, a flag) at a slice header to indicate the on / off status of both DMVR and BDOF in a slice.

[0185] In yet another example, the video encoder 200 and the video decoder 300 may decode only one syntax element (e.g., a flag) at the slice header to indicate the on / off state of DMVR in the slice. The on / off control of the slice-level BDOF is not available. That is, in this example, BDOF is not turned on / off at the slice level.

[0186] In yet another example, the video encoder 200 and the video decoder 300 may decode only one syntax element (e.g., a flag) at the slice header to indicate the on / off state of BDOF in the slice. Slice-level DMVR on / off control is not available. That is, in this example, DMVR is not turned on / off at the slice level. A slice may refer to an entire picture or a subset or portion of a picture.

[0187] Block-level control

[0188] In yet another example, the video encoder 200 and the video decoder 300 may code syntax elements at the block level for finer control. Several different approaches may be used, as described below.

[0189] Block-level on / off flag

[0190] In one example, the video encoder 200 and the video decoder 300 may decode a flag of a merge mode CU (ie, a CU coded using the merge mode) to indicate an on / off state of DMVR.

[0191] In a variation of the above technique, the video encoder 200 and the video decoder 300 may decode a flag of the merge mode CU to indicate the on / off status of both DMVR and BDOF.

[0192] In another variation of the above technique, the video encoder 200 and the video decoder 300 may encode and decode a flag to indicate the on / off state of DMVR (or BDOF) only when the merge candidate index is within a certain range. In one example, the range may be from 0 to N, where N may be 1, 2, 3, 4, etc. In another example, the range may be from N to the maximum allowed index, where N may be 1, 2, 3, 4, etc.

[0193] In another example, the DMVR on / off flag (also referred to as an enable flag) and the BDOF on / off (enable) flag may be part of the motion information and borrowed (e.g., reused) from a neighboring block as a motion vector candidate. When an artificial motion vector candidate is derived, the video encoder 200 and the video decoder 300 may set those flags to, for example, 0.

[0194] In other examples, control may be provided for other defined subsets of video data within a larger video sequence, such as for a group of pictures (but only a portion of a video sequence), for a single picture, for a frame of video data, for a sub-picture or portion of a picture, for a fragment, for a block, or for another subset of video data within a larger video sequence, rather than block-level or slice-level control.

[0195] Zero MVD in MMVD mode

[0196] In another example, the video encoder 200 and the video decoder 300 can implement block-level on / off control via zero MVD that allows MMVD mode. DMVR is not currently applied if the block is decoded using MMVD mode. Therefore, if the MVD of the MMVD mode is zero, it is equivalent to a normal merge mode without DMVR. The same idea can be applied to the BDOF case. That is, in MMVD mode, BDOF is not used with zero MVD.

[0197] When zero MVD for MMVD mode is applied, the video encoder 200 and the video decoder 300 may modify the relationship between the distance index and the predefined offset so that the first index indicates a zero offset and the other offset value indexes are therefore incremented by one. An example of the modified table is shown in Table 2-1. Note that it is not necessary to change the signaling of the distance index. However, if zero MVD is applied and the distance index signaled is 0, the video encoder 200 and the video decoder 300 may not need to index the direction because zero MVD has no direction.

[0198] Table 2-1 – Relationship between distance index and predefined offsets when zero MVD is applied

[0199]

[0200] Adaptive Zero MVD in MMVD Mode

[0201] In another example of the present disclosure, the video encoder 200 and the video decoder 300 may adaptively apply zero MVD on the MMVD mode according to a block size and / or a slice type.

[0202] For P or low-delay coded slices, where DMVR cannot be applied, the video encoder 200 and the video decoder 300 may not apply zero MVD to the MMVD mode. Similarly, if the size of the block does not meet the size constraint, DMVR will not be applied to the block. In this example, the video encoder 200 and the video decoder 300 may not apply zero MVD to the MMVD mode of the block.

[0203] The same techniques described above can be applied to BDOF mode.

[0204] BDOF

[0205] In some examples, zero MVD may also be used to control BDOF. For example, if zero MVD is applied, video encoder 200 and video decoder 300 may not perform BDOF.

[0206] Redundancy removal

[0207] In another example of the present disclosure, the video encoder 200 and the video decoder 300 may apply zero MVD on the selected basic merge candidate. Even if the current slice is a B slice and the current block satisfies the size constraint, the basic merge candidate may not satisfy all DMVR conditions. Therefore, the DMVR of the corresponding merge candidate cannot be guaranteed. If zero MVD is applied to the basic merge candidate, it may be the same as the merge candidate in the conventional merge mode. It is recommended to remove those redundant MMVD candidates by modifying the redundant MMVD candidates. For example, the video encoder 200 and the video decoder 300 can be configured to change the prediction direction, reference picture / index and motion vector.

[0208] There may also be redundancy in the above-mentioned method of referring to the block-level on / off flag. For example, when the CU-level flag is turned on, the flag indicates that DMVR and / or BDOF can be applied to the current CU. However, some merge candidates may not meet all DMVR / BDOF conditions. Therefore, if the candidate is selected, the CU-level flag will eventually get the same result whether it is turned on or off.

[0209] Therefore, additional examples of redundancy removal are described below.The following techniques can be applied with any combination of the above block level on / off flag technique, the zero MVD of the above MMVD mode technique, or any other block level DMVR / BDOF on / off control technique.

[0210] Converting a single prediction to a double prediction

[0211] In another example of the present disclosure, if the selected base merge candidate is uni-predicted, the video encoder 200 and the video decoder 300 may convert the selected base merge candidate to bi-predicted for redundancy removal.

[0212] In one example, the video encoder 200 and the video decoder 300 may perform the conversion by mirroring the unidirectional motion. In one example, if the unidirectional motion vector is MV0, the reference list is L0, and the reference index is refIdx0, then the mirrored motion vector in the other list is MV1=-MV0, the reference list is L1, and the reference index is refIdx1=refIdx0. In another example, the mirrored reference index is always 0, and the mirrored motion vector is scaled according to the POC distance between the current picture and the reference picture indicated by refIdx0 in L0 and reference index 0 in L1.

[0213] Add a new distance offset value

[0214] In some examples, if the selected base merge candidate is bi-predictive but does not meet the DMVR condition, the video encoder 200 and the video decoder 300 may interpret the distance index 0 as not existing in the MMVD offset table, for example, 1 / 8, 1 / 16, etc.

[0215] Instead of converting uni-prediction to bi-prediction, the method of adding new offset values ​​can also be applied to the base merge candidate of uni-prediction.

[0216] Converting a bi-prediction to a uni-prediction

[0217] In another example of removing redundancy of a bi-predictive base merge candidate, the video encoder 200 and the video decoder 300 may convert the bi-predictive base merge candidate to a uni-predictive one. For example, if the selected base merge candidate is bi-predictive but does not meet the DMVR condition, the L0 / L1 motion is discarded.

[0218] Switching between unequally weighted and equally weighted biprediction

[0219] In some cases, if the weighting parameters of the two directions are not equal, the video encoder 200 and the video decoder 300 may not perform DMVR on the bidirectional prediction merging candidate. If non-equal weight bidirectional prediction is allowed in the MMVD and zero MVD is applied, the video encoder 200 and the video decoder 300 may convert the non-equal weight bidirectional prediction base merging candidate into an equal weight bidirectional prediction base merging candidate, and the video encoder 200 and the video decoder 300 may convert the equal weight bidirectional prediction base merging candidate into a non-equal weight bidirectional prediction base merging candidate.

[0220] In some cases, sequence-level controls may determine whether one or more decoder-side refinement tools are available for a large video sequence, and lower-level controls (e.g., for subsets of the sequence) may allow decoder-side refinement tools to control turning different subsets of the video sequence on or off.

[0221] Figure 8 2 is a flowchart illustrating an example method for encoding a current block. The current block may include a current CU. Although with respect to the video encoder 200 ( Figure 1 and 3 ), but it should be understood that other devices may also be configured to perform similar Figure 8 method of method of method.

[0222] In this example, the video encoder 200 initially predicts a current block (350). For example, the video encoder 200 may form a prediction block for the current block. The video encoder 200 may then calculate a residual block for the current block (352). In order to calculate the residual block, the video encoder 200 may calculate the difference between the original uncoded block and the prediction block for the current block. The video encoder 200 may then transform and quantize the coefficients of the residual block (354). Next, the video encoder 200 may scan the quantized transform coefficients of the residual block (356). During or after the scan, the video encoder 200 may entropy encode the coefficients (358). For example, the video encoder 200 may encode the coefficients using CAVLC or CABAC. The video encoder 200 may then output entropy coded data for the block (360).

[0223] In with Figure 8 In some consistent examples, the encoding process (such as the step of predicting the current block (350)) may include a step for enabling or disabling decoder-side refinement. Thus, the encoding process may include a step for encoding syntax elements as described herein for enabling or disabling such decoder-side refinement tools for different subsets or portions of a larger video sequence.

[0224] Fig. 9 300 ( Figure 1 and Figure 4 ), but it should be understood that other devices may also be configured to perform similar Fig. 9 method of method of method.

[0225] The video decoder 300 may receive entropy coded data for the current block, such as entropy coded prediction information and entropy coded data corresponding to coefficients of a residual block of the current block (370). The video decoder 300 may entropy decode the coded data to determine prediction information for the current block and reproduce coefficients of the residual block (372). The video decoder 300 may predict the current block (374), for example, by calculating a prediction block for the current block using an intra-frame or inter-frame prediction mode indicated by the prediction information of the current block. The video decoder 300 may then reverse scan the reproduced coefficients (376) to create a quantized transform coefficient block. The video decoder 300 may then inverse quantize and inverse transform the coefficients to produce a residual block (378). The video decoder 300 may ultimately decode the current block (380) by combining the prediction block and the residual block.

[0226] In with Fig. 9In some consistent examples, the decoding process (e.g., the step of predicting the current block (374)) may include the application of one or more decoder-side refinement tools. Thus, the decoding process may include a step for decoding syntax elements as described herein, which allows the decoder-side refinement tools to be enabled or disabled for different subsets or portions of a larger video sequence. Fig.10 and 11 Some additional details are provided about examples for decoding and encoding different subsets of video data within a larger video sequence, where different subsets (e.g., different slices, different pictures, different sub-pictures, different frames, different sets of pictures, different blocks, or other different subsets) respectively enable or disable decoder-side refinement tools.

[0227] like Fig.10 As shown, the video decoder 300 may include processing circuitry configured to decode a first syntax element (402) and determine whether to enable or disable a first decoder-side refinement tool (404) for a subset of video data based on a value of the first syntax element. For example, the first syntax element may include a flag or bit associated with a DMVR tool, and the subset of video data may include a portion (some but not all) of a video sequence, the video sequence including a plurality of pictures of video data. In particular, a subset as described herein may include a slice of video data within a video sequence, a picture of video data, a sub-picture of video data, a frame of video data, a block of video data, or another sub-portion of video data. The video decoder 300 may be configured to decode a second syntax element (406) and determine whether to enable or disable a second decoder-side refinement tool (408) for a subset of video data based on a value of the second syntax element. For example, the second syntax element may include a flag or bit associated with a BDOF tool. The video decoder 300 then decodes the subset (i.e., a slice, picture, sub-picture, frame, block, or other subset of a larger sequence) based on the determination (410). For example, decoder 300 may be configured to decode a subset of video data (e.g., a first subset of video data) using the first decoder-side refinement tool in response to enabling the first decoder-side refinement tool for the first subset, decode the subset of video data without using the first decoder-side refinement tool in response to disabling the first decoder-side refinement tool for the first subset, decode the subset of video data using the second decoder-side refinement tool in response to enabling the second decoder-side refinement tool for the first subset, and decode the subset of video data without using the second decoder-side refinement tool in response to disabling the second decoder-side refinement tool for the first subset.

[0228] The video decoder 300 may be configured to determine whether there is another subset of the video data to decode (412), such as another slice, picture, sub-picture, frame, block, or other subset. If so, (the "yes" branch of 412), the process is repeated for a second subset of the video data, such as a different slice, picture, sub-picture, frame, block, or other subset within the same video sequence that includes the first subset of the video data. In this example, the first step of decoding the first syntax element (404) may include decoding a first instance of the first syntax element and the first step of decoding the second syntax element (405) may include decoding a first example of the second syntax element. Thus, the video decoder 300 may (upon identifying another subset - the "yes" branch of 412) decode a second instance of the first syntax element (402), the second instance identifying whether the first decoder-side refinement tool is enabled or disabled for a second subset of the video data within the video data sequence, wherein the second subset is different from the first subset. The video decoder 300 may then determine whether to enable or disable the first decoder-side refinement tool for a second subset of the video data based on the value of the second instance of the first syntax element (404), decode the second instance of the second syntax element for determining whether to enable or disable the second decoder-side refinement tool for a second subset of the video data within the video data sequence (406), and determine whether to enable or disable the second decoder-side refinement tool for the second subset of the video sequence based on the value of the second instance of the second syntax element (408). The decoder 300 may be configured to decode the second subset of the video data (410), which may include decoding the second subset of the video data using the second decoder-side refinement tool in response to enabling the first decoder-side refinement tool for the second subset, decoding the second subset of the video data without using the first decoder-side refinement tool in response to disabling the first decoder-side refinement tool for the second subset, decoding the second subset of the video data using the second decoder-side refinement tool in response to enabling the second decoder-side refinement tool for the second subset, and decoding the second subset of the video data without using the second decoder-side refinement tool in response to disabling the second decoder-side refinement tool for the second subset.

[0229] Video decoder 300 may be configured to again determine whether there is another subset of video data to decode (412), such as another slice, picture, sub-picture, frame, block, or other subset. If so, ("yes" branch of 412), the process is repeated for a third subset of video data, such as a different slice, picture, sub-picture, frame, block, or other subset within the same video sequence that includes the first subset of video data. In practice, the process may be repeated for many subsets of video data within a larger video sequence.

[0230] For example, for a third subset of video data, the video decoder 300 may include processing circuitry configured to decode a third instance of the first syntax element (402) indicating whether the first decoder-side refinement tool is enabled or disabled for a third subset of video data within the video data sequence, wherein the third subset is different from the first subset and the third subset is different from the second subset. The video decoder may also be configured to determine whether to enable or disable the first decoder-side refinement tool for a third subset of the video data based on a value of a third instance of the first syntax element (404), decode a third instance of the second syntax element that identifies whether to enable or disable the second decoder-side refinement tool for a third subset of the video data within the video data sequence (406), and determine whether to enable or disable the second decoder-side refinement tool for the third subset of the video data based on the value of the third instance of the second syntax element (408). The decoder 300 may decode the third subset of the video data (410), which may include decoding the third subset of the video data using the first decoder-side refinement tool in response to enabling the first decoder-side refinement tool for the third subset, decoding the third subset of the video data without using the first decoder-side refinement tool in response to disabling the first decoder-side refinement tool for the third subset, decoding the third subset of the video data using the second decoder-side refinement tool in response to enabling the second decoder-side refinement tool for the third subset, and decoding the third subset of the video data without using the second decoder-side refinement tool in response to disabling the second decoder-side refinement tool for the third subset.

[0231] In this way, the decoder-side refinement tool may be enabled or disabled multiple times for different subsets of data within a video sequence. For example, the video decoder 300 may be configured to determine that a first decoder-side refinement tool is enabled for a first subset of video data based on a value of a first instance of a first syntax element, to determine that a second decoder-side refinement tool is disabled for the first subset of video data based on a value of a first instance of a second syntax element, and to decode the first subset of video data using the first decoder-side refinement tool without using the second decoder-side refinement tool. Then, for the same video sequence, the video decoder 300 may be configured to determine that the first decoder-side refinement tool is disabled for a second subset of video data based on a value of a second instance of a second syntax element, to determine that a second decoder-side refinement tool is enabled for a second subset of video data based on a value of a second instance of a second syntax element, and to decode the second subset of video data using the second decoder-side refinement tool without using the first subset of decoder-side refinement tool.

[0232] The first and second decoder-side refinement tools may generally be used to decode any of a plurality of pictures of a video data sequence, but one or both of the first and second decoder-side refinement tools may be enabled for some subsets of the video data within the video data sequence, while one or both of the first and second decoder-side refinement tools may be disabled for other subsets of the video data within the video data sequence.

[0233] In some examples, the general availability of decoder-side refinement tools may be defined at a sequence level, where more granular on / off control may be available for subsets of the sequence (e.g., slices, blocks, pictures, sub-pictures, frames, or other subsets). For example, the video decoder 300 may include processing circuitry configured to decode one or more syntax elements associated with a video data sequence, and determine, based on the one or more syntax elements associated with the video data sequence, that first and second decoder-side refinement tools are enabled so as to be available for decoding a plurality of pictures of the video data sequence. The video decoder 300 may then perform Fig.10 For each subset of video data within a sequence, on / off control of the decoder-side refinement tool may be done at a subsequence level. In some examples, each subset of video data having on / off control signaled for the subset may include at least a portion of a picture among a plurality of pictures of the video data sequence. Again, as examples, a subset may include a segment of video data within a sequence, a frame of video data within a sequence, a picture among a plurality of pictures of a video data sequence, a sub-picture of video data, or a block of video data in a sequence.

[0234] Fig.11 is an example flow chart illustrating an encoding technique consistent with the present disclosure whereby two or more decoder-side refinement tools may be enabled or disabled for different portions or subsets of a video sequence comprising a plurality of pictures. Fig.11As shown, the video encoder 200 can be configured to determine whether a decoder-side refinement tool is available for a video sequence (502). In some cases, the availability of the decoder-side refinement tool is implicit (and not signaled), and in some cases, the video encoder 200 can be configured to encode one or more sequence-level syntax elements to identify that one or more decoder-side refinement tools are available for the sequence. In any case, upon determining that one or more decoder-side refinement tools are available (the "yes" branch of 502), the video encoder 200 can encode a first syntax element to identify whether the first decoder-side refinement tool is enabled for a subset of the video sequence (504). In addition, the video encoder 200 can be configured to encode a second syntax element to identify whether a second decoder-side refinement tool is enabled for a subset of the video sequence (506). The video encoder 200 can then determine whether there is another subset of video data to be encoded for the sequence, and if so (the "yes" branch of 508), the video encoder 200 can repeat the steps of encoding the first and second syntax elements (504 and 506) for the next subset.

[0235] Thus, the video encoder 200 may include processing circuitry configured to encode a first instance of a first syntax element to identify whether first decoder-side refinement tool data is enabled or disabled for a first subset of video data within a video sequence (504), encode a second instance of the first syntax element to identify whether the first decoder-side refinement tool is enabled or disabled for a second subset of video data within the video data sequence (506), wherein the second subset is different from the first subset, encode a first instance of a second syntax element to identify whether a second decoder-side refinement tool is enabled or disabled for the first subset of video data within the video data sequence (504), and encode a second instance of the second syntax element to identify whether the second decoder-side refinement tool is enabled or disabled for the second subset of video data within the video data sequence. Again, as an example, the first decoder-side refinement tool may include a DMVR tool and the second decoder-side refinement tool may include a BDOF tool.

[0236] Similarly, the process may be repeated for other subsets of data within the video sequence, such as other frames, slices, pictures, sub-pictures, blocks, or other sub-portions (some but not all) of the video sequence. Thus, in some examples, the video encoder 200 may encode a third instance of the first syntax element to identify whether to enable or disable the first decoder-side refinement tool for a third subset of video data within the video data sequence (504), where the third subset is different from the first subset and the third subset is different from the second subset, and encode a third instance of the second syntax element to identify whether to enable or disable the second decoder-side refinement tool for the third subset of video data in the video data sequence.

[0237] Thus, one or both of the first and second decoder-side refinement tools may be enabled for some subsets of video data within a video data sequence and may be disabled for other subsets of video data within the video data sequence.

[0238] In some examples, the general availability of decoder-side refinement tools may be defined at a sequence level, where more granular on / off controls may be available for subsets of the sequence (e.g., slices, blocks, pictures, sub-pictures, frames, or other subsets). For example, video encoder 200 may include processing circuitry configured to encode one or more syntax elements associated with a video data sequence to indicate that first and second decoder-side refinement tools may be available for decoding a plurality of pictures of the video data sequence. In these or other examples, as described herein, one or both of the first and second decoder-side refinement tools may be enabled for some subsets of video data within the video data sequence, and one or both of the first and second decoder-side refinement tools may be disabled for other subsets of video data within the video data sequence.

[0239] Likewise, a subset of video data may refer to at least a portion of a first picture of a plurality of pictures of a sequence of video data. For example, a subset of video data may include one or more of a slice, a frame, a picture, a sub-picture, a block, or another portion (some but not all) of video data within a video sequence.

[0240] It should be appreciated that, according to examples, certain actions or events of any technology described herein may be performed in a different order, may be added, combined, or omitted entirely (e.g., not all described actions or events are required for the practice of the technology). In addition, in some examples, actions or events may be performed simultaneously, such as by multithreading, interrupt handling, or multiple processors, rather than sequentially.

[0241] EXAMPLES—The following examples may demonstrate one or more features or aspects consistent with the present disclosure.

[0242] Example 1 - A method comprising coding a slice-level syntax element indicating whether a decoder-side motion refinement mode is on or off for a slice of video data, and coding a video data block in the slice of video data based on the slice-level syntax element.

[0243] Example 2 - A device comprising a memory and one or more processors in communication with the memory, the one or more processors configured to decode a slice-level syntax element to indicate whether a decoder-side motion refinement mode is on or off for a video data slice, and decode a video data block in the video data slice based on the slice-level syntax element.

[0244] Example 3 - An apparatus comprising means for coding a slice-level syntax element indicating whether a decoder-side motion refinement mode is on or off for a slice of video data, and means for coding a block of video data in a slice of the video data based on the slice-level syntax element.

[0245] Example 4 - A computer-readable storage medium encoded with instructions that, when executed, cause a programmable processor to decode a slice-level syntax element indicating whether a decoder-side motion refinement mode is on or off for a video data slice, and decode a video data block in the video data slice based on the slice-level syntax element.

[0246] Example 5 - A method of decoding video data, comprising: decoding a slice-level syntax element indicating whether a decoder-side motion refinement mode is on or off for a slice of the video data; and decoding a video data block in a slice of the video data based on the slice-level syntax element.

[0247] Example 6 - The method of Example 5, wherein the decoder-side motion refinement mode is one of decoder-side motion vector refinement or bidirectional optical flow.

[0248] Example 7 - The method of Example 5 or 6, wherein decoding a slice-level syntax element indicating whether a decoder-side motion refinement mode is on or off for a slice of video data comprises: decoding a first slice-level syntax element indicating whether a decoder-side motion vector refinement mode is on or off for a slice of video data; and decoding a second slice-level syntax element indicating whether a bidirectional optical flow mode is on or off for a slice of video data.

[0249] Example 8 - A method of coding video data, comprising: coding a block-level syntax element indicating whether a decoder-side motion refinement mode is on or off for a block of video data; and coding the block of video data based on the block-level syntax element.

[0250] Example 9 - The method of Example 8, wherein the decoder-side motion refinement mode is one of decoder-side motion vector refinement or bidirectional optical flow.

[0251] Example 10 - The method of Example 8, wherein the decoder side motion refinement mode is decoder side motion vector refinement and bidirectional optical flow.

[0252] Example 11 - The method of Example 8, wherein the block of video data is a merge mode coding unit.

[0253] Example 12 - The method of Example 8, wherein decoding a block-level syntax element indicating whether a decoder-side motion refinement mode is on or off for a block of video data comprises: decoding a block-level syntax element indicating whether a decoder motion refinement mode is on or off for a block of video data within a predefined range.

[0254] Example 13 - The method of Example 8, wherein decoding a block-level syntax element indicating whether a decoder-side motion refinement mode is on or off for a video data block comprises reusing a neighboring block-level syntax element indicating whether a decoder-side motion refinement mode is on or off for a neighboring video data block of the video data block.

[0255] Example 14 - A method of coding video data, comprising: disabling a decoder-side motion refinement mode by applying a zero motion vector difference to a block of video data; and coding the block of video data using the zero motion vector.

[0256] Example 15 - The method of Example 14, wherein the block of video data is coded using merge mode with motion vector difference (MMVD).

[0257] Example 16 - The method of Example 14, wherein the decoder-side motion refinement mode is one of decoder-side motion vector refinement or bidirectional optical flow.

[0258] Example 17 - The method of Example 14, wherein disabling the decoder side motion refinement mode by applying zero motion vector difference to the video data block comprises: disabling the decoder side motion refinement mode by applying zero motion vector difference to the video data block based on one or more of block size or slice type.

[0259] Example 18 - The method of Example 14, further comprising: removing redundant candidates in a merge mode with motion vector difference (MMVD) candidate list.

[0260] Example 19 - The method of any of Examples 5-18, wherein decoding comprises decoding.

[0261] Example 20 - The method of any of Examples 5-18, wherein decoding includes encoding.

[0262] Example 21 - An apparatus for decoding video data, the apparatus comprising one or more components for performing the method of any of Examples 5-18.

[0263] Example 22 - The device of Example 21, wherein the one or more components include one or more processors implemented in the circuit.

[0264] Example 23 - The apparatus of Example 21 or 22, further comprising a memory for storing video data.

[0265] Example 24 —The apparatus of any of Examples 21-23, further comprising a display configured to display the decoded video data.

[0266] Example 25 - The device of any of Examples 21-24, wherein the device comprises one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

[0267] Example 26 - The apparatus of any of Examples 21-25, wherein the apparatus comprises a video decoder.

[0268] Example 27 - The apparatus of any of Examples 21-25, wherein the apparatus comprises a video encoder.

[0269] Example 28 - A computer-readable storage medium having instructions stored thereon that, when executed, cause one or more processors to perform the method of any of Examples 5-18.

[0270] Example 29 - Any combination of the techniques of Examples 5-18.

[0271] Example 30 - A method of decoding a plurality of pictures of a video data sequence, the method comprising: decoding a first syntax element to determine whether to enable a first decoder-side refinement tool for a first portion of a first picture in a plurality of pictures of the video data sequence, the first decoder-side refinement tool having been enabled for decoding the plurality of pictures of the video data sequence; determining based on a value of the first syntax element that the first decoder-side refinement tool is enabled for the first portion of the first picture; decoding a second syntax element to determine whether to enable a second decoder-side refinement tool for a first portion of the first picture in a plurality of pictures of the video data sequence, the second decoder-side refinement tool having been enabled for decoding the plurality of pictures of the video data sequence; determining based on a value of a first instance of the second syntax element that the second decoder-side refinement tool is disabled for the first portion of the first picture; and decoding the first portion of the first picture using the first decoder-side refinement tool without using the second decoder-side refinement tool.

[0272] Example 31 - A method for decoding a video data sequence comprising a plurality of pictures, comprising: decoding a first syntax element, the first syntax element indicating whether a first decoder-side refinement tool is enabled or disabled for a first subset of video data within the video data sequence; determining whether the first decoder-side refinement tool is enabled or disabled for the first subset of the video data based on a value of the first syntax element; decoding a second syntax element, the second syntax element indicating whether a second decoder-side refinement tool is enabled or disabled for the first subset of video data within the video data sequence; determining whether the second decoder-side refinement tool is enabled or disabled for the first subset of the video data based on a value of the first syntax element; in response to enabling the first decoder-side refinement tool for the first subset, decoding the first subset of the video data using the first decoder-side refinement tool; in response to disabling the first decoder-side refinement tool for the first subset, decoding the first subset of the video data without using the first decoder-side refinement tool; in response to enabling the second decoder-side refinement tool for the first subset, decoding the first subset of the video data using the second decoder-side refinement tool; and in response to disabling the second decoder-side refinement tool for the first subset, decoding the first subset of the video data without using the second decoder-side refinement tool.

[0273] Example 32 - The method of Example 31, wherein the first decoder-side refinement tool comprises a DMVR tool and wherein the second decoder-side refinement tool comprises a BDOF tool.

[0274] Example 33 - A method of any combination of Examples 30 and 31, wherein decoding a first syntax element comprises decoding a first instance of the first syntax element and wherein decoding a second syntax element comprises decoding a first instance of the second syntax element, the method further comprising: decoding a second instance of the first syntax element, the second instance indicating whether the first decoder-side refinement tool is enabled or disabled for a second subset of video data within a video data sequence, wherein the second subset is different from the first subset; determining whether the first decoder-side refinement tool is enabled or disabled for the second subset of the video based on a value of the second instance of the first syntax element; decoding a second instance of the second syntax element, the second instance indicating whether the second decoder-side refinement tool is enabled or disabled for the second subset of the video data within the video data sequence The method further comprises: enabling a decoder-side refinement tool for decoding the second subset of the video data using the first decoder-side refinement tool; determining whether to enable or disable a second decoder-side refinement tool for a second subset of the video data based on a value of a second instance of a second syntax element; in response to enabling the first decoder-side refinement tool for the second subset, decoding the second subset of the video data using the first decoder-side refinement tool; in response to disabling the first decoder-side refinement tool for the second subset, decoding the second subset of the video data without using the first decoder-side refinement tool; in response to enabling the second decoder-side refinement tool for the second subset, decoding the second subset of the video data using the second decoder-side refinement tool; and in response to disabling the second decoder-side refinement tool for the second subset, decoding the second subset of the video data without using the second decoder-side refinement tool.

[0275] Example 34 - The method of any combination of Examples 31-33, further comprising: decoding a third instance of a first syntax element indicating whether a first decoder-side refinement tool is enabled or disabled for a third subset of video data within the video data sequence, wherein the third subset is different from the first subset and the third subset is different from the second subset; determining whether the first decoder-side refinement tool is enabled or disabled for the third subset of video data based on a value of the third instance of the first syntax element; decoding a third instance of a second syntax element indicating whether a second decoder-side refinement tool is enabled or disabled for the third subset of video data within the video data sequence; determining based on a value of the third instance of the second syntax element Whether to enable or disable the second decoder-side refinement tool for a third subset of the video data; in response to enabling the first decoder-side refinement tool for the third subset, decoding the third subset of the video data using the first decoder-side refinement tool; in response to disabling the first decoder-side refinement tool for the third subset, decoding the third subset of the video data without using the first decoder-side refinement tool; in response to enabling the second decoder-side refinement tool for the third subset, decoding the third subset of the video data using the second decoder-side refinement tool; in response to disabling the second decoder-side refinement tool for the third subset, decoding the third subset of the video data without using the second decoder-side refinement tool.

[0276] Example 35 - the method of any combination of Examples 31-34, further comprising: determining, based on a value of a first instance of a first syntax element, that a first decoder-side refinement tool is enabled for a first subset of video data; determining, based on a value of a first instance of a second syntax element, that a second decoder-side refinement tool is disabled for the first subset of video data; decoding the first subset of video data using the first decoder-side refinement tool without using the second decoder-side refinement tool; determining, based on a value of a second instance of the first syntax element, that the first decoder-side refinement tool is disabled for a second subset of video data; determining, based on a value of a second instance of the second syntax element, that the second decoder-side refinement tool is enabled for the second subset of video data; and decoding the second subset of video data using the second decoder-side refinement tool without using the first decoder-side refinement tool.

[0277] Example 36 - A method of any combination of Examples 31-35, wherein the first and second decoder-side refinement tools can be used to decode any of a plurality of pictures of a video data sequence, wherein one or both of the first and second decoder-side refinement tools are enabled for some subsets of the video data within the video data sequence, and wherein one or both of the first and second decoder-side refinement tools are disabled for other subsets of the video data within the video data sequence.

[0278] The method of any combination of Example 37-Examples 31-36 also includes: decoding one or more syntax elements associated with the video data sequence; and determining, based on the one or more syntax elements associated with the video data sequence, that first and second decoder-side refinement tools are enabled so that they can be used to decode multiple pictures of the video data sequence.

[0279] Example 38 - The method of any combination of Examples 31-37, wherein the first subset includes at least a portion of a first picture of a plurality of pictures of the sequence of video data.

[0280] Example 39 - a method of any combination of Examples 31-38, wherein the first subset of video data within the video data sequence comprises one or more of: a video data slice; a video data frame; a picture of a plurality of pictures of the video data sequence; a sub-picture and a video data block.

[0281] Example 40 – A method of encoding a video data sequence comprising a plurality of pictures, the method comprising: encoding a first instance of a first syntax element to identify whether a first decoder-side refinement tool is enabled or disabled for a first subset of video data within the video data sequence; encoding a second instance of the first syntax element to identify whether the first decoder-side refinement tool is enabled or disabled for a second subset of video data within the video data sequence, wherein the second subset is different from the first subset; encoding a first instance of a second syntax element to identify whether a second decoder-side refinement tool is enabled or disabled for the first subset of video data within the video data sequence; and encoding a second instance of the second syntax element to identify whether the second decoder-side refinement tool is enabled or disabled for the second subset of video data within the video data sequence.

[0282] Example 41 - The method of Example 40, wherein the first decoder-side refinement tool comprises a DMVR tool and wherein the second decoder-side refinement tool comprises a BDOF tool.

[0283] Example 42 - the method of any combination of Examples 40-41, further comprising: encoding a third instance of the first syntax element to identify whether to enable or disable a first decoder-side refinement tool for a third subset of video data within the video data sequence, wherein the third subset is different from the first subset and the third subset is different from the second subset; and encoding a third instance of the second syntax element to identify whether to enable or disable a second decoder-side refinement tool for the third subset of video data within the video data sequence.

[0284] Example 43 - A method of any combination of Examples 40-42, wherein one or both of the first and second decoder-side refinement tools are enabled for some subsets of video data within the video data sequence, and wherein one or both of the first and second decoder-side refinement tools are disabled for other subsets of video data within the video data sequence.

[0285] Example 44 - The method of any combination of Examples 40-43, further comprising: encoding one or more syntax elements associated with the video data sequence to indicate that first and second decoder-side refinement tools can be used to decode multiple pictures of the video data sequence, wherein one or both of the first and second decoder-side refinement tools are enabled for some subsets of the video data within the video data sequence, and wherein one or both of the first and second decoder-side refinement tools are disabled for other subsets of the video data in the video data sequence.

[0286] Example 45 - the method of any combination of Examples 40-44, wherein the first subset includes at least a portion of a first picture of a plurality of pictures of the video data sequence.

[0287] Example 46 - the method of any combination of Examples 40-45, wherein the first subset of video data within the video data sequence comprises one or more of: a slice; a frame; a picture; a sub-picture, and a block.

[0288] Example 47 - A video decoding device comprising a memory and a processing circuit, the memory being configured to store a video data sequence comprising a plurality of pictures; the processing circuit being configured to: decode a first syntax element indicating whether a first decoder-side refinement tool is enabled or disabled for a first subset of video data within the video data sequence; determine whether the first decoder-side refinement tool is enabled or disabled for the first subset of video data based on a value of the first syntax element; decode a second syntax element indicating whether a second decoder-side refinement tool is enabled or disabled for the first subset of video data within the video data sequence; determine whether the first decoder-side refinement tool is enabled or disabled for the first subset of video data based on a value of the first syntax element In one embodiment, the present invention relates to a method for decoding a first subset of the video data, wherein the first decoder-side refinement tool is enabled or disabled for a first subset of the video data; in response to enabling the first decoder-side refinement tool for the first subset, decoding the first subset of the video data using the first decoder-side refinement tool; in response to disabling the first decoder-side refinement tool for the first subset, decoding the first subset of the video data without using the first decoder-side refinement tool; in response to enabling the second decoder-side refinement tool for the first subset, decoding the first subset of the video data using the second decoder-side refinement tool; and in response to disabling the second decoder-side refinement tool for the first subset, decoding the first subset of the video data without using the second decoder-side refinement tool.

[0289] Example 48 - The video decoding device of Example 47, wherein the first decoder-side refinement tool comprises a DMVR tool and wherein the second decoder-side refinement tool comprises a BDOF tool.

[0290] Example 49 - A video decoding device of Example 47 or 48, wherein the processing circuit is configured to decode the first syntax element by decoding a first instance of the first syntax element and to decode the second syntax element by decoding a first instance of the second syntax element, and the processing circuit is further configured to: decode a second instance of the first syntax element, the second instance indicating whether a first decoder-side refinement tool is enabled or disabled for a second subset of video data within a video data sequence, wherein the second subset is different from the first subset; determine whether the first decoder-side refinement tool is enabled or disabled for the second subset of video data based on a value of the second instance of the first syntax element; decode a second instance of the second syntax element, the second instance indicating whether a first decoder-side refinement tool is enabled or disabled for the second subset of video data within the video data sequence The method comprises: disabling a second decoder-side refinement tool for decoding the second subset of the video data; determining whether to enable or disable the second decoder-side refinement tool for a second subset of the video data based on the value of the second instance of the second syntax element; in response to enabling the first decoder-side refinement tool for the second subset, decoding the second subset of the video data using the first decoder-side refinement tool; in response to disabling the first decoder-side refinement tool for the second subset, decoding the second subset of the video data without using the first decoder-side refinement tool; in response to enabling the second decoder-side refinement tool for the second subset, decoding the second subset of the video data using the second decoder-side refinement tool; and in response to disabling the second decoder-side refinement tool for the second subset, decoding the second subset of the video data without using the second decoder-side refinement tool.

[0291] Example 50 - A video encoding device of any combination of Examples 47-49, wherein the processing circuitry is further configured to: decode a third instance of a first syntax element indicating whether a first decoder-side refinement tool is enabled or disabled for a third subset of video data within a video data sequence, wherein the third subset is different from the first subset and the third subset is different from the second subset; determine whether the first decoder-side refinement tool is enabled or disabled for the third subset of video data based on a value of the third instance of the first syntax element; decode a third instance of a second syntax element indicating whether a second decoder-side refinement tool is enabled or disabled for the third subset of video data within the video data sequence; and determine whether the first decoder-side refinement tool is enabled or disabled for the third subset of video data based on a value of the third instance of the second syntax element. The value of the third instance determines whether the second decoder-side refinement tool is enabled or disabled for a third subset of the video data; in response to enabling the first decoder-side refinement tool for the third subset, decoding the third subset of the video data using the first decoder-side refinement tool; in response to disabling the first decoder-side refinement tool for the third subset, decoding the third subset of the video data without using the first decoder-side refinement tool; in response to enabling the second decoder-side refinement tool for the third subset, decoding the third subset of the video data using the second decoder-side refinement tool; in response to disabling the second decoder-side refinement tool for the third subset, decoding the third subset of the video data without using the second decoder-side refinement tool.

[0292] Example 51 - A video encoding device of any combination of Examples 47-50, wherein the processing circuitry is configured to: determine, based on a value of a first instance of a first syntax element, to enable a first decoder-side refinement tool for a first subset of video data; determine, based on a value of a first instance of a second syntax element, to disable a second decoder-side refinement tool for the first subset of video data; decode the first subset of video data using the first decoder-side refinement tool without using the second decoder-side refinement tool; determine, based on a value of a second instance of the first syntax element, to disable the first decoder-side refinement tool for a second subset of video data; determine, based on a value of a second instance of a second syntax element, to enable the second decoder-side refinement tool for the second subset of video data; and decode the second subset of video data using the second decoder-side refinement tool without using the first decoder-side refinement tool.

[0293] Example 52 - A video encoding device of any combination of Examples 47-51, wherein the first and second decoder-side refinement tools are usable for decoding any of a plurality of pictures of a video data sequence, wherein one or both of the first and second decoder-side refinement tools are enabled for some subsets of the video data within the video data sequence, and wherein one or both of the first and second decoder-side refinement tools are disabled for other subsets of the video data within the video data sequence.

[0294] Example 53 - A video decoding device of any combination of Examples 47-52, wherein the processing circuit is further configured to: decode one or more syntax elements associated with the video data sequence; and determine, based on the one or more syntax elements associated with the video data sequence, that first and second decoder-side refinement tools are enabled so as to be usable for decoding multiple pictures of the video data sequence.

[0295] Example 54 - A video encoding device of any combination of Examples 47-53, wherein the first subset includes at least a portion of a first picture of a plurality of pictures of the video data sequence.

[0296] Example 55 - A video decoding device of any combination of Examples 47-54, wherein the first subset of video data within the video data sequence comprises one or more of: a slice of video data; a frame of video data; a picture of a plurality of pictures of the video data sequence; a sub-picture and a block of video data

[0297] Example 56 - A video encoding device comprising a memory and processing circuitry, the memory being configured to store a video data sequence comprising a plurality of pictures; the processing circuitry being configured to encode a first instance of a first syntax element to identify whether a first decoder-side refinement tool is enabled or disabled for a first subset of video data within the video data sequence; to encode a second instance of the first syntax element to identify whether the first decoder-side refinement tool is enabled or disabled for a second subset of video data within the video data sequence, wherein the second subset is different from the first subset; to encode a first instance of a second syntax element to identify whether a second decoder-side refinement tool is enabled or disabled for the first subset of video data within the video data sequence; and to encode a second instance of the second syntax element to identify whether the second decoder-side refinement tool is enabled or disabled for the second subset of video data within the video data sequence.

[0298] Example 57 - The video encoding device of Example 56, wherein the first decoder-side refinement tool comprises a DMVR tool and wherein the second decoder-side refinement tool comprises a BDOF tool.

[0299] Example 58 - The video encoding device of Example 56 or 57, wherein the processing circuit is further configured to encode a third instance of the first syntax element to identify whether to enable or disable the first decoder-side refinement tool for a third subset of video data within the video data sequence, wherein the third subset is different from the first subset and the third subset is different from the second subset; and encode a third instance of the second syntax element to identify whether to enable or disable the second decoder-side refinement tool for the third subset of video data within the video data sequence.

[0300] Example 59 - A video encoding device of any combination of Examples 56-58, wherein one or both of the first and second decoder-side refinement tools are enabled for some subsets of video data within a video data sequence, and wherein one or both of the first and second decoder-side refinement tools are disabled for other subsets of video data within the video data sequence.

[0301] Example 60 - A video encoding device of any combination of Examples 56-59, wherein the processing circuitry is further configured to encode one or more syntax elements associated with the video data sequence to indicate that first and second decoder-side refinement tools are available for decoding a plurality of pictures of the video data sequence, wherein one or both of the first and second decoder-side refinement tools are enabled for some subsets of the video data within the video data sequence, and wherein one or both of the first and second decoder-side refinement tools are disabled for other subsets of the video data within the video data sequence.

[0302] Example 61 - A video encoding device of any combination of Examples 56-60, wherein the first subset includes at least a portion of a first picture of a plurality of pictures of the video data sequence.

[0303] Example 62 - A video encoding device of any combination of Examples 56-61, wherein the first subset of video data within the sequence of video data comprises one or more of: a slice; a frame; a picture; a sub-picture; and a block.

[0304] Example 63 – A video decoding device configured to decode a video data sequence comprising a plurality of pictures, the video decoding device comprising: means for decoding a first syntax element indicating whether a first decoder-side refinement tool is enabled or disabled for a first subset of video data within the video data sequence; means for determining whether the first decoder-side refinement tool is enabled or disabled for the first subset of video data based on a value of the first syntax element; means for decoding a second syntax element indicating whether a second decoder-side refinement tool is enabled or disabled for the first subset of video data within the video data sequence; means for determining whether the first decoder-side refinement tool is enabled or disabled for the first subset of video data based on a value of the first syntax element means for decoding the first subset of video data using the first decoder-side refinement tool in response to the first decoder-side refinement tool being enabled for the first subset; means for decoding the first subset of video data without using the first decoder-side refinement tool in response to the first decoder-side refinement tool being disabled for the first subset; means for decoding the first subset of video data using the second decoder-side refinement tool in response to the second decoder-side refinement tool being enabled for the first subset; and means for decoding the subset of video data without using the second decoder-side refinement tool in response to the second decoder-side refinement tool being disabled for the first subset.

[0305] Example 64 – A video encoding device configured to encode a video data sequence comprising a plurality of pictures, the video encoding device comprising: means for encoding a first instance of a first syntax element to identify whether a first decoder-side refinement tool is enabled or disabled for a first subset of video data within the video data sequence; means for encoding a second instance of the first syntax element to identify whether the first decoder-side refinement tool is enabled or disabled for a second subset of video data within the video data sequence, wherein the second subset is different from the first subset; means for encoding a first instance of a second syntax element to identify whether a second decoder-side refinement tool is enabled or disabled for the first subset of video data within the video data sequence; and means for encoding a second instance of the second syntax element to identify whether the second decoder-side refinement tool is enabled or disabled for the second subset of video data within the video data sequence.

[0306] Example 65 – A computer-readable storage medium storing instructions that, when executed, cause one or more processors of a video decoding device to: decode a first syntax element indicating whether to enable or disable a first decoder-side refinement tool for a first subset of video data within a video data sequence, wherein the video data sequence includes a plurality of pictures; determine whether to enable or disable the first decoder-side refinement tool for the first subset of the video data based on a value of the first syntax element; decode a second syntax element indicating whether to enable or disable a second decoder-side refinement tool for the first subset of video data having the video data sequence; determine whether to enable or disable a second decoder-side refinement tool for the first subset of the video data based on a value of the first syntax element In response to enabling the first decoder-side refinement tool for the first subset, decoding the first subset of the video data using the first decoder-side refinement tool; in response to disabling the first decoder-side refinement tool for the first subset, decoding the first subset of the video data without using the first decoder-side refinement tool; in response to enabling the second decoder-side refinement tool for the first subset, decoding the first subset of the video data using the second decoder-side refinement tool; in response to disabling the second decoder-side refinement tool for the first subset, decoding the subset of the video data without using the second decoder-side refinement tool.

[0307] Example 66 - A computer-readable storage medium storing instructions that, when executed, cause one or more processors of a video encoding device to: encode a first instance of a first syntax element to identify whether to enable or disable a first decoder-side refinement tool for a first subset of video data within a video data sequence, wherein the video data sequence includes a plurality of pictures; encode a second instance of the first syntax element to identify whether to enable or disable the first decoder-side refinement tool for a second subset of video data within the video data sequence, wherein the second subset is different from the first subset; encode a first instance of a second syntax element to identify whether to enable or disable a second decoder-side refinement tool for the first subset of video data within the video data sequence; and encode a second instance of the second syntax element to identify whether to enable or disable the second decoder-side refinement tool for the second subset of video data within the video data sequence.

[0308] In one or more examples, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored or transmitted as one or more instructions or codes on a computer-readable medium and executed by a hardware-based processing unit. Computer-readable media may include computer-readable storage media, which corresponds to tangible media such as data storage media, or communication media, including any media that facilitates the transfer of a computer program from one place to another, for example, according to a communication protocol. In this manner, computer-readable media may generally correspond to (1) non-transitory tangible computer-readable storage media or (2) communication media such as signals or carrier waves. Data storage media may be any available media that can be accessed by one or more computers or one or more processors to retrieve instructions, codes, and / or data structures for implementing the techniques described in the present disclosure. A computer program product may include a computer-readable medium.

[0309] As an example and not limitation, such computer-readable storage media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, disk storage or other magnetic storage devices, flash memory or any other medium that can be used to store the required program code in the form of instructions or data structures and can be accessed by a computer. In addition, any connection is properly referred to as a computer-readable medium. For example, if a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL) or wireless technology (such as infrared, radio and microwave) is used to transmit instructions from a website, server or other remote source, then the coaxial cable, fiber optic cable, twisted pair, DSL or wireless technology (such as infrared, radio and microwave) are included in the definition of the medium. However, it should be understood that computer-readable storage media and data storage media do not include connections, carriers, signals or other transient media, but for non-transient, tangible storage media. Disks and optical disks used herein include compact disks (CDs), laser disks, optical disks, digital versatile disks (DVDs), floppy disks and blue-ray disks, where disks usually reproduce data magnetically, while disks use lasers to reproduce data optically. The above combination should also be included in the scope of computer-readable media.

[0310] Instructions may be executed by one or more processors such as one or more DSPs, general-purpose microprocessors, ASICs, FPGAs, or other equivalent integrated or discrete logic circuits. Therefore, the terms "processor" and "processing circuitry" as used herein may refer to any of the foregoing structures or any other structure suitable for implementing the techniques described herein. In addition, in some aspects, the functionality described herein may be provided within dedicated hardware and / or software modules configured for encoding and decoding, or incorporated into a combined codec. In addition, these techniques may be fully implemented in one or more circuits or logic elements.

[0311] The techniques of the present disclosure may be implemented in a variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC), or a set of ICs (e.g., a chipset). Various components, modules, or units are described in this disclosure to emphasize functional aspects of a device configured to perform the disclosed techniques, but do not necessarily need to be implemented by different hardware units. Instead, as described above, the various units may be combined in a codec hardware unit or provided by a set of interoperating hardware units including one or more processors as described above in combination with appropriate software and / or firmware.

[0312] Various examples have been described. These and other examples are within the scope of the following claims.

Claims

1. A method for decoding a video data sequence comprising a plurality of pictures, the method comprising: decoding a first syntax element indicating whether a first decoder-side refinement tool is enabled or disabled for a first portion of a first picture of the plurality of pictures within the sequence of video data; Based on a value of the first syntax element, determining to enable the first decoder-side refinement tool for a first portion of the first picture; decoding a second syntax element indicating whether a second decoder-side refinement tool is enabled or disabled for a first portion of the first picture, wherein the first decoder-side refinement tool and the second decoder-side refinement tool are enabled to refine motion information associated with the plurality of pictures; determining, based on a value of the second syntax element, to disable the second decoder-side refinement tool for a first portion of the first picture; as well as In response to determining that the first decoder-side refinement tool is enabled for a first portion of the first picture, and in response to determining that the second decoder-side refinement tool is disabled for the first portion of the first picture, decoding the first portion of the first picture using the first decoder-side refinement tool.

2. The method according to claim 1, wherein: The first decoder-side refinement tool comprises a decoder-side motion vector refinement DMVR tool, and wherein the second decoder-side refinement tool comprises a bidirectional optical flow BDOF tool.

3. The method according to claim 1, wherein: wherein decoding the first syntax element comprises decoding a first instance of the first syntax element, and wherein decoding the second syntax element comprises decoding a first instance of the second syntax element, the method further comprising: decoding a second instance of the first syntax element, the second instance indicating whether the first decoder-side refinement tool is enabled or disabled for a first portion of a second picture of the plurality of pictures within the sequence of video data, wherein the second picture of the plurality of pictures is different from the first picture of the plurality of pictures; determining, based on a value of the second instance of the first syntax element, to disable the first decoder-side refinement tool for a first portion of the second picture; decoding a second instance of the second syntax element, the second instance indicating whether the second decoder-side refinement tool is enabled or disabled for a first portion of the second picture of the plurality of pictures within the sequence of video data; Based on the value of the second instance of the second syntax element, determining to enable the second decoder-side refinement tool for a first portion of the second picture; and In response to determining that the first decoder-side refinement tool is disabled and the second decoder-side refinement tool is enabled for a first portion of the second picture of the plurality of pictures, the first portion of the second picture is decoded using the second decoder-side refinement tool.

4. The method according to claim 3, further comprising: decoding a third instance of the first syntax element, the third instance indicating whether the first decoder-side refinement tool is enabled or disabled for a first portion of a third picture of the plurality of pictures within the sequence of video data, wherein the third picture is different from the first picture and the third picture is different from the second picture; determining, based on a value of the third instance of the first syntax element, to enable the first decoder-side refinement tool for a first portion of the third picture; decoding a third instance of the second syntax element, the third instance indicating whether the second decoder-side refinement tool is enabled or disabled for a first portion of the third picture of the plurality of pictures within the sequence of video data; Based on the value of the third instance of the second syntax element, determining to enable the second decoder-side refinement tool for a first portion of the third picture; and In response to determining that the first decoder-side refinement tool is enabled for a first portion of the third picture and the second decoder-side refinement tool is enabled for the first portion of the third picture, decoding the first portion of the third picture using the first decoder-side refinement tool and the second decoder-side refinement tool.

5. The method according to claim 1, further comprising: determining, based on a value of a first instance of the first syntax element, to enable the first decoder-side refinement tool for a first portion of the first picture of the plurality of pictures; as well as Based on a value of a first instance of the second syntax element, it is determined that the second decoder-side refinement tool is disabled for a first portion of the first picture of the plurality of pictures.

6. The method according to claim 1, wherein: The first decoder-side refinement tool and the second decoder-side refinement tool are capable of being used to decode any of the plurality of pictures of the video data sequence, wherein one or both of the first decoder-side refinement tool and the second decoder-side refinement tool are enabled for some portions of pictures of the plurality of pictures within the video data sequence, and wherein one or both of the first decoder-side refinement tool and the second decoder-side refinement tool are disabled for other portions of pictures of the plurality of pictures within the video data sequence.

7. The method according to claim 1, further comprising: decoding one or more syntax elements associated with the video data sequence; as well as Based on the one or more syntax elements associated with the video data sequence, it is determined that the first decoder-side refinement tool and the second decoder-side refinement tool are enabled for the video data sequence so as to be usable for decoding the plurality of pictures of the video data sequence.

8. The method according to claim 1, wherein: The first part of the first picture includes one of the following: Video data slicing; Video data frame; a picture of the plurality of pictures of the video data sequence; Video data sub-picture; as well as Video data chunk.

9. A method for encoding a video data sequence comprising a plurality of pictures, the method comprising: encoding a first instance of a first syntax element to identify enabling of a first decoder-side refinement tool for a first portion of a first picture of the plurality of pictures within the sequence of video data; encoding a second instance of the first syntax element to identify that the first decoder-side refinement tool is disabled for a first portion of a second picture of the plurality of pictures within the sequence of video data, wherein the second picture is different from the first picture, and wherein the first decoder-side refinement tool and the second decoder-side refinement tool are enabled to refine motion information associated with the plurality of pictures; encoding a first instance of a second syntax element to identify disabling of a second decoder-side refinement tool for a first portion of the first picture of the plurality of pictures within the sequence of video data; and A second instance of the second syntax element is encoded to identify that the second decoder-side refinement tool is enabled for a first portion of the second picture of the plurality of pictures within the sequence of video data.

10. The method according to claim 9, wherein: The first decoder-side refinement tool comprises a decoder-side motion vector refinement DMVR tool, and wherein the second decoder-side refinement tool comprises a bidirectional optical flow BDOF tool.

11. The method according to claim 9, further comprising: encoding a third instance of the first syntax element to identify that the first decoder-side refinement tool is enabled for a first portion of a third picture of the plurality of pictures within the sequence of video data, wherein the third picture is different from the first subset of pictures and the third picture is different from the second picture; and A third instance of the second syntax element is encoded to identify that the second decoder-side refinement tool is enabled for a first portion of the third picture of the plurality of pictures within the sequence of video data.

12. The method according to claim 9, wherein: One or both of the first decoder-side refinement tool and the second decoder-side refinement tool are enabled for portions of pictures of the plurality of pictures within the sequence of video data, and wherein one or both of the first decoder-side refinement tool and the second decoder-side refinement tool are disabled for other portions of pictures of the plurality of pictures within the sequence of video data.

13. The method according to claim 9, further comprising: encoding one or more syntax elements associated with the video data sequence to indicate that the first decoder-side refinement tool and the second decoder-side refinement tool are enabled for the video data sequence, wherein one or both of the first decoder-side refinement tool and the second decoder-side refinement tool are enabled for portions of pictures of the plurality of pictures within the sequence of video data, and wherein one or both of the first decoder-side refinement tool and the second decoder-side refinement tool are disabled for other portions of pictures of the plurality of pictures within the sequence of video data.

14. The method of claim 9, wherein the first portion of the first picture of the plurality of pictures comprises one or more of: slice; frame; picture; sub-pictures; and piece.

15. A video decoding device, comprising: A memory configured to store a video data sequence including a plurality of pictures; as well as The processing circuit is configured to: decoding a first syntax element indicating whether a first decoder-side refinement tool is enabled or disabled for a first portion of a first picture of the plurality of pictures within the sequence of video data; Based on a value of the first syntax element, determining to enable the first decoder-side refinement tool for a first portion of the first picture; decoding a second syntax element indicating whether a second decoder-side refinement tool is enabled or disabled for a first portion of the first picture of the plurality of pictures within the sequence of video data, wherein the first decoder-side refinement tool and the second decoder-side refinement tool are enabled to refine motion information associated with the plurality of pictures; determining, based on a value of the second syntax element, to disable the second decoder-side refinement tool for a first portion of the first picture; as well as In response to determining that the first decoder-side refinement tool is enabled for the portion of the first picture, and in response to determining that the second decoder-side refinement tool is disabled for the portion of the first picture, a first portion of the first picture is decoded using the first decoder-side refinement tool.

16. The video decoding device according to claim 15, wherein: The first decoder-side refinement tool comprises a decoder-side motion vector refinement DMVR tool, and wherein the second decoder-side refinement tool comprises a bidirectional optical flow BDOF tool.

17. The video decoding device according to claim 15, wherein the processing circuit is configured to decode the first syntax element by decoding a first instance of the first syntax element, and decode the second syntax element by decoding a first instance of the second syntax element, the processing circuit is further configured to: decoding a second instance of the first syntax element, the second instance indicating whether the first decoder-side refinement tool is enabled or disabled for a first portion of a second picture of the plurality of pictures within the sequence of video data, wherein the second picture is different from the first picture; determining, based on a value of the second instance of the first syntax element, to disable the first decoder-side refinement tool for a first portion of the second picture; decoding a second instance of the second syntax element, the second instance indicating whether the second decoder-side refinement tool is enabled or disabled for a first portion of the second picture of the plurality of pictures within the sequence of video data; determining, based on a value of the second instance of the second syntax element, to enable the second decoder-side refinement tool for a first portion of the second picture; as well as In response to determining that the first decoder-side refinement tool is disabled and the second decoder-side refinement tool is enabled for a first portion of the second picture, the first portion of the second picture is decoded using the second decoder-side refinement tool.

18. The video encoding device according to claim 17, wherein the processing circuit is further configured to: decoding a third instance of the first syntax element, the third instance indicating whether the first decoder-side refinement tool is enabled or disabled for a first portion of a third picture of the plurality of pictures within the sequence of video data, wherein the third picture is different from the first picture and the third picture is different from the second picture; determining, based on a value of the third instance of the first syntax element, to enable the first decoder-side refinement tool for a first portion of the third picture; decoding a third instance of the second syntax element, the third instance indicating whether the second decoder-side refinement tool is enabled or disabled for a first portion of the third picture of the plurality of pictures within the sequence of video data; determining, based on a value of the third instance of the second syntax element, to enable the second decoder-side refinement tool for a first portion of the third picture; as well as In response to determining that the first decoder-side refinement tool is enabled for a first portion of the third picture, and in response to determining that the second decoder-side refinement tool is enabled for the first portion of the third picture, decoding the first portion of the third picture using the first decoder-side refinement tool and the second decoder-side refinement tool.

19. The video decoding device according to claim 15, wherein the processing circuit is configured to: Based on a value of a first instance of the first syntax element, determining to enable the first decoder-side refinement tool for a first portion of the first picture of the plurality of pictures; and Based on a value of a first instance of the second syntax element, it is determined that the second decoder-side refinement tool is disabled for a first portion of the first picture of the plurality of pictures.

20. The video decoding device according to claim 15, wherein: The first decoder-side refinement tool and the second decoder-side refinement tool are capable of being used to decode any of the plurality of pictures of the video data sequence, wherein one or both of the first decoder-side refinement tool and the second decoder-side refinement tool are enabled for some portions of pictures of the plurality of pictures within the video data sequence, and wherein one or both of the first decoder-side refinement tool and the second decoder-side refinement tool are disabled for other portions of pictures of the plurality of pictures within the video data sequence.

21. The video decoding device according to claim 15, wherein: The processing circuit is further configured to: decoding one or more syntax elements associated with the video data sequence; and Based on the one or more syntax elements associated with the video data sequence, it is determined that the first decoder-side refinement tool and the second decoder-side refinement tool are enabled for the video data sequence so as to be usable for decoding the plurality of pictures of the video data sequence.

22. The video decoding apparatus of claim 17, wherein the first portion of the first picture comprises one of: Video data slicing; Video data frame; a picture of the plurality of pictures of the video data sequence; Video data sub-picture; and Video data chunk.

23. A video encoding device, comprising: a memory configured to store a sequence of video data comprising a plurality of pictures; as well as The processing circuit is configured to: encoding a first instance of a first syntax element to identify enabling of a first decoder-side refinement tool for a first portion of a first picture of the plurality of pictures within the sequence of video data; encoding a second instance of the first syntax element to identify that the first decoder-side refinement tool is disabled for a first portion of a second picture of the plurality of pictures within the sequence of video data, wherein the second picture is different from the first picture, and wherein the first decoder-side refinement tool and the second decoder-side refinement tool are enabled to refine motion information associated with the plurality of pictures; encoding a first instance of a second syntax element to identify disabling of a second decoder-side refinement tool for a first portion of the first picture of the plurality of pictures within the sequence of video data; and A second instance of the second syntax element is encoded to identify that the second decoder-side refinement tool is enabled for a first portion of a second picture of the plurality of pictures within the sequence of video data.

24. The video encoding device according to claim 23, wherein: The first decoder-side refinement tool comprises a decoder-side motion vector refinement DMVR tool, and wherein the second decoder-side refinement tool comprises a bidirectional optical flow BDOF tool.

25. The video encoding device according to claim 23, wherein the processing circuit is further configured to: encoding a third instance of the first syntax element to identify that the first decoder-side refinement tool is enabled for a first portion of a third picture of the plurality of pictures within the sequence of video data, wherein the third picture is different from the first picture, and the third picture is different from the second picture; and A third instance of the second syntax element is encoded to identify that the second decoder-side refinement tool is enabled for a first portion of the third picture of the plurality of pictures within the sequence of video data.

26. The video encoding device according to claim 23, wherein: One or both of the first decoder-side refinement tool and the second decoder-side refinement tool are enabled for some portions of pictures of the plurality of pictures within the sequence of video data, and wherein one or both of the first decoder-side refinement tool and the second decoder-side refinement tool are disabled for other portions of pictures of the plurality of pictures within the sequence of video data.

27. The video encoding device according to claim 23, wherein the processing circuit is further configured to: encoding one or more syntax elements associated with the video data sequence to indicate that the first decoder-side refinement tool and the second decoder-side refinement tool are enabled for the video data sequence, in, One or both of the first decoder-side refinement tool and the second decoder-side refinement tool are enabled for some portions of pictures of the plurality of pictures within the sequence of video data, and wherein one or both of the first decoder-side refinement tool and the second decoder-side refinement tool are disabled for other portions of pictures of the plurality of pictures within the sequence of video data.

28. The video encoding device according to claim 23, wherein: The first part of the first picture includes one of the following: slice; frame; picture; sub-pictures; and piece.

29. A video decoding device, configured to decode a video data sequence comprising a plurality of pictures, the video decoding device comprising: means for decoding a first syntax element indicating whether a first decoder-side refinement tool is enabled or disabled for a first portion of a first picture of the plurality of pictures within the sequence of video data; means for determining, based on a value of the first syntax element, to enable the first decoder-side refinement tool for a first portion of the first picture; means for decoding a second syntax element indicating whether a second decoder-side refinement tool is enabled or disabled for a first portion of the first picture of the plurality of pictures within the sequence of video data, wherein the first decoder-side refinement tool and the second decoder-side refinement tool are enabled to refine motion information associated with the plurality of pictures; means for determining to disable the second decoder-side refinement tool for a first portion of the first picture based on a value of the second syntax element; as well as Means for decoding a first portion of the first picture using the first decoder side refinement tool in response to determining that the first decoder side refinement tool is enabled for the first portion of the first picture of the plurality of pictures, and in response to determining that the second decoder side refinement tool is disabled for the first portion of the first picture of the plurality of pictures.

30. A video encoding device, configured to encode a video data sequence including a plurality of pictures, the video encoding device comprising: means for encoding a first instance of a first syntax element to identify means for enabling a first decoder-side refinement tool for a first portion of a first picture of the plurality of pictures within the sequence of video data; means for encoding a second instance of the first syntax element to identify means for disabling the first decoder-side refinement tool for a first portion of a second picture of the plurality of pictures within the sequence of video data, wherein the second picture is different from the first picture, and wherein the first decoder-side refinement tool and the second decoder-side refinement tool are enabled to refine motion information associated with the plurality of pictures; means for encoding a first instance of a second syntax element to identify means for disabling a second decoder-side refinement tool for a first portion of a second picture of the plurality of pictures within the sequence of video data; and A second instance of the second syntax element is used to encode to identify means for enabling the second decoder-side refinement tool for a first portion of the second picture of the plurality of pictures within the sequence of video data.

31. A non-transitory computer-readable storage medium storing instructions that, when executed, cause one or more processors of a video decoding device to: decoding a first syntax element indicating whether a first decoder-side refinement tool is enabled or disabled for a first portion of a first picture of the plurality of pictures within the sequence of video data; determining, based on a value of the first syntax element, to enable the first decoder-side refinement tool for a first portion of the first picture; decoding a second syntax element indicating whether a second decoder-side refinement tool is enabled or disabled for a first portion of the first picture of the plurality of pictures within the sequence of video data, wherein the first decoder-side refinement tool and the second decoder-side refinement tool are enabled to refine motion information associated with the plurality of pictures; Based on the value of the second syntax element, determining to disable the second decoder-side refinement tool for a first portion of the first picture; and In response to determining that the first decoder-side refinement tool is enabled for a first portion of the first picture of the plurality of pictures, and in response to determining that the second decoder-side refinement tool is disabled for the first portion of the first picture of the plurality of pictures, decoding the first portion of the first picture using the first decoder-side refinement tool.

32. A non-transitory computer-readable storage medium storing instructions that, when executed, cause one or more processors of a video encoding device to: encoding a first instance of a first syntax element to identify enabling of a first decoder-side refinement tool for a first portion of a first picture of the plurality of pictures within the sequence of video data; encoding a second instance of the first syntax element to identify disabling of the first decoder-side refinement tool for a first portion of a second picture of the plurality of pictures within the sequence of video data, wherein the second picture is different from the first picture, and wherein the first decoder-side refinement tool and the second decoder-side refinement tool are enabled to refine motion information associated with the plurality of pictures; encoding a first instance of a second syntax element to identify disabling of a second decoder-side refinement tool for a first portion of the first picture of the plurality of pictures within the sequence of video data; as well as A second instance of the second syntax element is encoded to identify that the second decoder-side refinement tool is enabled for a first portion of the second picture of the plurality of pictures within the sequence of video data.

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