Display panel and display device

Abstract

The invention discloses a display panel and a display device, and the display panel comprises a plurality of pixel driving circuits; the pixel driving circuit comprises a driving transistor, a light-emitting element and at least one switching transistor. The driving transistor is used for selectively providing a driving signal to the light-emitting element; the switching transistor is used for selectively providing electric signals for the driving transistor and / or the light-emitting element; a driving active structure of the driving transistor and a switching active structure of the switching transistor are arranged on the same layer; in the direction perpendicular to the plane where the display panel is located, the distance between the driving control gate of the driving transistor and the driving active structure is a first control distance d1, and the distance between the switching control gate of the switching transistor and the switching active structure is a second control distance d2; wherein d1 is greater than d2. By the adoption of the technical scheme, the problems that an LTPO display panel is multiple in preparation process and high in preparation cost can be solved, meanwhile, the performance requirements of different transistors can be met, and the display effect is improved.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] Low Temperature Polycrystalline Oxide (LTPO) display technology combines two thin film transistors (TFT), Low Temperature Poly-Silicon (LTPS) and Indium Gallium Zinc Oxide (IGZO), to enable the display panel to have both strong driving capability and low leakage current.

[0003] However, the preparation process of LTPO display panels is more complicated and the preparation cost is also higher. Summary of the invention

[0004] The present invention provides a display panel and a display device to solve the problem that the LTPO display panel has many preparation steps and high preparation cost.

[0005] According to one aspect of the present invention, there is provided a display panel, comprising: a plurality of pixel driving circuits arranged in an array;

[0006] The pixel driving circuit includes a driving transistor, a light emitting element and at least one switching transistor;

[0007] The driving transistor is used to selectively provide a driving signal to the light emitting element;

[0008] The switch transistor is used to selectively provide an electrical signal to the drive transistor and / or the light emitting element;

[0009] The driving active structure of the driving transistor and the switching active structure of the switching transistor are arranged in the same layer;

[0010] Along the direction perpendicular to the plane where the display panel is located, the distance between the driving control gate of the driving transistor and the driving active structure is a first control distance d1, and the distance between the switch control gate of the switch transistor and the switch active structure is a second control distance d2; wherein d1>d2.

[0011] According to yet another aspect of the present invention, a display device is provided, comprising the above-mentioned display panel.

[0012] The technical solution of the present invention can reduce the preparation process and reduce the preparation cost by setting the active structure of the driving transistor and the switch transistor in the same layer. Moreover, the driving active structure and the active structure of the switch transistor can include the same material, and there is no need to consider the device performance when different active structures include materials, which can reduce the preparation requirements and thus reduce the preparation difficulty. In addition, the first control distance between the driving control gate of the driving transistor and the driving active structure is set to be larger, which can increase the subthreshold swing of the driving transistor and reduce the sensitivity of the driving current growth in the driving transistor to the driving control gate potential, which is conducive to accurately controlling the driving current and realizing accurate control of the display grayscale, especially accurate control of low grayscale. The second control distance between the switch control gate of the switch transistor and the switch active structure is set to be smaller, which can reduce the subthreshold swing of the switch transistor and increase the sensitivity of the conduction current growth in the switch transistor to the switch control gate potential, which is conducive to quickly switching the on and off states, realizing full conduction and full shutdown, and is conducive to reducing leakage current and low power consumption. The technical solution of the present invention can solve the problem of many preparation processes and high preparation cost of LTPO display panels.

[0013] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0015] Figure 1 It is a circuit structure schematic diagram of a pixel driving circuit in the prior art;

[0016] Figure 2 It is a schematic diagram of a film layer structure of a display panel in the prior art;

[0017] Figure 3 is a schematic diagram of a top view structure of a display panel provided by an embodiment of the present invention;

[0018] Figure 4 is a circuit structure schematic diagram of a pixel driving circuit provided by an embodiment of the present invention;

[0019] Figure 5 is a schematic diagram of a film layer structure of a display panel provided by an embodiment of the present invention;

[0020] Figure 6is a schematic diagram of a film layer structure of another display panel provided by an embodiment of the present invention;

[0021] Figure 7 is a circuit structure schematic diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0022] Figure 8 is a schematic diagram of a top view structure of a pixel driving circuit provided by an embodiment of the present invention;

[0023] Fig. 9 is a schematic diagram of a film layer structure of another display panel provided by an embodiment of the present invention;

[0024] Fig.10 is a schematic diagram of a film layer structure of another display panel provided by an embodiment of the present invention;

[0025] Fig.11 is a schematic diagram of a partial top view structure of a display panel provided by an embodiment of the present invention;

[0026] Fig.12 It is a structural schematic diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0027] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0028] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0029] Figure 1 is a circuit structure diagram of a pixel driving circuit in the prior art, referring to Figure 1, the pixel driving circuit 100' may include a first light emission control transistor M1, a write transistor M2, a drive transistor M3, a compensation transistor M4, an initialization transistor M5, a second light emission control transistor M6, a reset transistor M7 and a storage capacitor Cst. The first electrode of the first light emission control transistor M1 receives the first power signal PVDD, the second electrode of the first light emission control transistor M1 and the first electrode of the drive transistor M3 are electrically connected to the second node N2, the second electrode of the drive transistor M3 and the first electrode of the second light emission control transistor M6 are electrically connected to the third node N3, the second electrode of the second light emission control transistor M6 and the anode of the light emitting element LED are electrically connected to the fourth node N4, and the cathode of the light emitting element LED receives the second power signal PVEE; under the control of the light emission control signal Emit and the potential of the first node N1, the first light emission control transistor M1, the drive transistor M3 and the second light emission control transistor M6 can be turned on at the same time, so that a current is formed in the light emitting element LED, and the light emitting element LED performs display light emission.

[0030] The first electrode of the write transistor M2 receives the data signal Data, the second electrode of the write transistor M2 is electrically connected to the second node N2, the first electrode of the compensation transistor M4 is electrically connected to the third node N3, and the second electrode of the compensation transistor is electrically connected to the first node N1; under the control of the write control signal S2 and the compensation control signal S2N, the write transistor M2 and the compensation transistor M4 can be turned on at the same time before the light-emitting element LED displays light, and the data signal Data and the threshold voltage of the drive transistor M3 are written to the first node N1, so that the drive current provided to the light-emitting element LED can be controlled to achieve the regulation of the display grayscale. The storage capacitor Cst can store the data signal Data and the threshold voltage of the first node N1.

[0031] The first electrode of the initialization transistor M5 receives the initialization signal VREF1, and the second electrode of the initialization transistor M5 is electrically connected to the first node N1; under the control of the initialization control signal S1N, the initialization transistor M5 can initialize the first node N1 before writing the data signal Data and the threshold voltage to the first node N1. The first electrode of the reset transistor M7 receives the reset signal VREF2, and the second electrode of the reset transistor M7 is electrically connected to the fourth node N4; under the control of the reset control signal S1, the reset transistor M7 can reset the anode of the light emitting element LED before the light emitting element LED starts to emit light.

[0032] When the pixel driving circuit 100' is applied to the LTPO display panel, the first light-emitting control transistor M1, the writing transistor M2, the driving transistor M3, the second light-emitting control transistor M6 and the reset transistor M7 may be LTPS-TFTs, and the compensation transistor M4 and the initialization transistor M5 may be IGZO-TFTs. The mobility of LTPS-TFTs is relatively large, the driving capability is relatively strong, but the leakage current is relatively large. By introducing IGZO-TFTs as the compensation transistors M4 and the initialization transistors M5, the leakage current of the first node N1 can be reduced, and the stability of the first node N1 in the low-frequency refresh stage can be improved, thereby improving the stability of the driving current in the low-frequency refresh stage and the stability of the light-emitting brightness, which is conducive to improving the problem of low-frequency flicker.

[0033] Although the LTPO display panel can improve the display effect, it is necessary to introduce the IGZO preparation process into the original LTPS preparation process. Figure 2 Schematic diagram of a film structure of a display panel in the prior art, where display panel 01' is an LTPO display panel. Figure 2 The display panel 01' includes LTPS-TFT and IGZO-TFT, wherein the active layer AL1' of the LTPS-TFT and the active layer AL2' of the IGZO-TFT are made of different materials and need to be formed in different processes. On the one hand, the preparation process and the masks required in the preparation process will be increased, thereby increasing the preparation cost. On the other hand, in the preparation process, the device performance of the LTPS-TFT and the IGZO-TFT needs to be taken into account, which places high requirements on the preparation process and increases the difficulty of preparation.

[0034] If the LTPS-TFT is simply replaced by the IGZO-TFT in order to reduce the manufacturing cost, it is impossible to take into account the performance requirements of the driving transistor (M3) and the switching transistor (M4, M5) in the pixel driving circuit 100' at the same time, which will reduce the driving capability, which is not conducive to the precise control of the driving current and the display grayscale, and affects the display effect; or, if the IGZO-TFT is replaced by the LTP-TFT, the size of the LTPS-TFT needs to be set larger, and the parasitic capacitance will also increase, which is also not conducive to the precise control of the driving current and the display grayscale, and affects the display effect. At the same time, the increase in the size of the LTPS-TFT will limit the size reduction of the pixel driving circuit 100', which is not conducive to the high resolution of the display panel 01'.

[0035] To solve the above technical problems, an embodiment of the present invention provides a display panel, comprising: a plurality of pixel driving circuits arranged in an array; the pixel driving circuit comprises a driving transistor, a light-emitting element and at least one switching transistor; the driving transistor is used to selectively provide a driving signal to the light-emitting element; the switching transistor is used to selectively provide an electrical signal to the driving transistor and / or the light-emitting element; the driving active structure of the driving transistor and the switching active structure of the switching transistor are arranged in the same layer; along a direction perpendicular to the plane where the display panel is located, the distance between the driving control gate of the driving transistor and the driving active structure is a first control distance d1, and the distance between the switching control gate of the switching transistor and the switching active structure is a second control distance d2; wherein, d1>d2.

[0036] By adopting the above technical solution, by setting the active structures of the driving transistor and the switch transistor in the same layer, the preparation process can be reduced and the preparation cost can be reduced. Moreover, the driving active structure and the active structure of the switch transistor can include the same material, and there is no need to consider the device performance when different active structures include materials, which can reduce the preparation requirements and thus reduce the difficulty of preparation. In addition, the first control distance between the driving control gate of the driving transistor and the driving active structure is set to be larger, which can increase the subthreshold swing of the driving transistor and reduce the sensitivity of the driving current growth in the driving transistor to the driving control gate potential, which is conducive to accurately controlling the driving current and realizing accurate control of the display grayscale, especially accurate control of the low grayscale. The second control distance between the switch control gate of the switch transistor and the switch active structure is set to be smaller, which can reduce the subthreshold swing of the switch transistor and increase the sensitivity of the conduction current growth in the switch transistor to the switch control gate potential, which is conducive to quickly switching the on and off states, realizing full conduction and full shutdown, and is conducive to reducing leakage current and low power consumption. The technical solution of the present invention can solve the problems of many preparation processes and high preparation cost of LTPO display panels, and can also take into account the performance requirements of different transistors and improve the display effect.

[0037] The above is the core idea of ​​the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention.

[0038] Figure 3 is a schematic diagram of a top view structure of a display panel provided by an embodiment of the present invention, Figure 4 Schematic diagram of a circuit structure of a pixel driving circuit provided by an embodiment of the present invention. Figure 3 and Figure 4The display panel 01 includes a plurality of pixel driving circuits 100 arranged in an array in the display area AA; the pixel driving circuit 100 includes a driving transistor M3, a light-emitting element LED and at least one switching transistor STFT; the driving transistor M3 is used to selectively provide a driving signal to the light-emitting element LED; the switching transistor STFT is used to selectively provide an electrical signal to the driving transistor M3 and / or the light-emitting element LED.

[0039] The pixel driving circuit 100 includes but is not limited to 2T1C, 6T2C, 7T1C, 8T1C and other pixel driving circuits. When the pixel driving circuit 100 includes a 7T1C pixel driving circuit, the pixel driving circuit 100 may be configured as follows: Figure 4 As shown, it includes a first light emission control transistor M1, a write transistor M2, a drive transistor M3, a compensation transistor M4, an initialization transistor M5, a second light emission control transistor M6, a reset transistor M7 and a storage capacitor Cst. In an optional embodiment, the switch transistor STFT may include all transistors in the pixel drive circuit 100 except the drive transistor M3; in another optional embodiment, the switch transistor STFT at least includes a transistor electrically connected to the gate of the drive transistor M3, for example, when the pixel drive circuit 100 includes a 7T1C pixel drive circuit, the switch transistor STFT at least includes a compensation transistor M4 and an initialization transistor M5.

[0040] Figure 5 is a schematic diagram of a film structure of a display panel provided by an embodiment of the present invention, with reference to Figure 5 , the driving active structure 111 of the driving transistor M3 and the switch active structure 121 of the switch transistor STFT are arranged in the same layer; along the direction perpendicular to the plane where the display panel is located, the distance between the driving control gate 112 of the driving transistor M3 and the driving active structure 111 is a first control distance d1, and the distance between the switch control gate 122 of the switch transistor STFT and the switch active structure 121 is a second control distance d2; wherein, d1>d2.

[0041] Among them, the driving transistor M3 includes a driving active structure 111 and a driving control gate 112, and the potential of the driving control gate 112 can control the on / off state of the driving transistor M3; the switching transistor STFT includes a switching active structure 121 and a switching control gate 122, and the potential of the switching control gate 122 can control the on / off state of the switching transistor STFT.

[0042] Specifically, the active structures of all transistors in the pixel driving circuit 100 can be arranged in the same layer, that is, the active structures of all transistors in the pixel driving circuit 100 can include the same material and be prepared in the same process, which can reduce the preparation process and reduce the preparation cost. An insulating layer is provided between the driving active structure 111 and the driving control gate 112, and between the switch active structure 121 and the switch control gate 122; the thickness of the insulating layer between the driving active structure 111 and the driving control gate 112 is greater than the thickness of the insulating layer between the switch active structure 121 and the switch control gate 122, so that the subthreshold swing of the driving transistor M3 is greater than the subthreshold swing of the switch transistor STFT, and the device performance of the driving transistor M3 and the switch transistor STFT can be taken into account.

[0043] Among them, the subthreshold swing is a performance indicator that measures the conversion rate between the on and off states of the transistor, and represents the change in gate voltage required for a tenfold change in the source-drain current. The larger the subthreshold swing, the larger the gate voltage change required for the source-drain current change of the transistor, and the more advantageous it is for regulating the source-drain current by gate voltage, which is beneficial for precise control of the source-drain current. The smaller the subthreshold swing, the smaller the gate voltage change required for the source-drain current change of the transistor, and the more advantageous it is for quickly turning on and off the transistor.

[0044] Exemplary, reference Figure 4 and Figure 5 The display panel 01 includes a substrate 200 and a circuit layer 300 located on one side of the substrate 200, including a driving transistor M3, a switching transistor STFT, a storage capacitor Cst, and a signal wiring (not shown in the figure), a lap electrode (not shown in the figure), etc. The light-emitting element LED can be located on the side of the circuit layer 300 away from the substrate 200, and the driving transistor M3 and the switching transistor STFT in the pixel driving circuit 100 are both located on the backlight side of the light-emitting element LED. In the circuit layer 300 of the display panel 01, the active structures of all transistors can be arranged in the same layer, and a control gate can be formed before and / or after the active structure. It can be understood that the display panel 01 can also include an encapsulation layer, a touch layer, an optical functional layer, a cover plate and other structures located on the side of the light-emitting element LED away from the substrate 200, and the embodiments of the present invention will not be described one by one.

[0045] Along a direction perpendicular to the plane where the substrate 200 is located, the projection of the driving active structure 111 on the plane where the substrate 200 is located overlaps with the projection of the driving control gate 112 on the plane where the substrate 200 is located; the driving control gate 112 can receive a driving control signal (a signal of the first node N1), and when the driving control signal is at a valid level, the driving control gate 112 can control the formation of a carrier channel in the driving active structure 111, so that the driving transistor M3 is turned on.

[0046] Along the direction perpendicular to the plane where the substrate 200 is located, the projection of the switch active structure 121 on the plane where the substrate 200 is located overlaps with the projection of the switch control gate 122 on the plane where the substrate 200 is located; the switch control gate 122 can receive the switch control signal (Emit, S1, S2, S1N, S2N), and when the switch control signal is at a valid level, the switch control gate 122 can control the formation of a carrier channel in the switch active structure 121, so that the switch transistor STFT is turned on.

[0047] Among them, the first control distance d1 between the driving control gate 112 of the driving transistor M3 and the driving active structure 111 is relatively large, which can weaken the control ability of the driving control gate 112 on the driving active structure 111 and increase the subthreshold swing of the driving transistor M3, thereby reducing the sensitivity of the driving current growth in the driving transistor M3 to the potential of the driving control gate 112 (first node N1), so that the change in the potential of the driving control gate 112 (first node N1) required for the driving current change is relatively large, which is conducive to precise control of the driving current and realizing precise control of the display grayscale, especially precise control of the low grayscale.

[0048] The second control distance d2 between the switch control gate 122 of the switch transistor STFT and the switch active structure 121 is small, which can enhance the control ability of the switch control gate 122 over the switch active structure 121 and reduce the subthreshold swing of the switch transistor STFT, thereby increasing the sensitivity of the on-current growth in the switch transistor STFT to the potential of the switch control gate 122 (Emit, S1, S2, S1N, S2N), so that the change in the potential of the switch control gate 122 (Emit, S1, S2, S1N, S2N) required for the on-current change is small, which is conducive to quickly switching between on and off states, achieving full conduction and full shutdown, and is conducive to reducing leakage current and low power consumption.

[0049] It should be noted that the figure only shows by way of example that the drive control gate 112 and the switch control gate 122 are both located on the side of the film layer where the drive active structure 111 and the switch active structure 121 are located, which is close to the light-emitting element LED. In other embodiments, the drive control gate 112 and the switch control gate 122 may also be located on the side of the film layer where the drive active structure 111 and the switch active structure 121 are located, which is away from the light-emitting element LED, or the drive control gate 112 and the switch control gate 122 may also be located on different sides of the film layer where the drive active structure 111 and the switch active structure 121 are located. The embodiments of the present invention do not limit the positions of the drive control gate 112 and the switch control gate 122.

[0050] In the embodiment of the present invention, by setting the active structures of the driving transistor and the switch transistor in the same layer, the preparation process can be reduced and the preparation cost can be reduced. Moreover, the driving active structure and the active structure of the switch transistor can include the same material, and there is no need to consider the device performance when different active structures include materials, which can reduce the preparation requirements and thus reduce the difficulty of preparation. In addition, the first control distance between the driving control gate of the driving transistor and the driving active structure is set to be larger, which can increase the subthreshold swing of the driving transistor and reduce the sensitivity of the driving current growth in the driving transistor to the driving control gate potential, which is conducive to accurately controlling the driving current and realizing accurate control of the display grayscale, especially accurate control of the low grayscale. The second control distance between the switch control gate of the switch transistor and the switch active structure is set to be smaller, which can reduce the subthreshold swing of the switch transistor and increase the sensitivity of the conduction current growth in the switch transistor to the switch control gate potential, which is conducive to fast switching of the on and off states, realizing full conduction and full shutdown, and is conducive to reducing leakage current and low power consumption. The technical solution of the embodiment of the present invention can solve the problem of many preparation processes and high preparation cost of LTPO display panels, and can also take into account the performance requirements of different transistors and improve the display effect.

[0051] Optional, continue to refer to Figure 5 , the driving active structure 111 and the switching active structure 121 both include metal oxide materials.

[0052] Among them, the metal oxide material includes but is not limited to IGZO, for example, it may include one or more oxide materials of indium (In), gallium (Ga), tin (Sn), zirconium (Zr), hafnium (Hf), titanium (Ti) and zinc (Zn).

[0053] Exemplarily, the metal oxide material can be prepared by physical vapor deposition (PVD) technology, such as magnetron sputtering, without the need for crystallization to form a crystal structure, so that the metal oxide material has better uniformity, which is beneficial to increasing the consistency of the performance of each pixel driving circuit 100; in addition, the preparation difficulty and preparation cost of the metal oxide material are relatively low, and the use of the metal oxide material as the active structure can reduce leakage current through its wide bandgap and interface state density and other material properties. At the same time, by setting the first control distance d1 between the driving control gate 112 of the driving transistor M3 and the driving active structure 11 to be greater than the second control distance d2 between the switch control gate 122 of the switching transistor STFT and the switch active structure 121, the performance requirements of the driving transistor M3 and the switching transistor STFT can also be taken into account.

[0054] In an optional embodiment, Figure 6 is a schematic diagram of a film layer structure of another display panel provided by an embodiment of the present invention, referring to Figure 6 The display panel 01 includes a base substrate 200 and a circuit layer 300 located on one side of the base substrate 200; the circuit layer 300 includes an active layer 310, and the active layer 310 includes a driving active structure 111 and a switch active structure 121; the active layer 300 also includes a first oxide layer 311 and a second oxide layer 312; wherein the carrier mobility of the second oxide layer 312 is greater than the carrier mobility of the first oxide layer 311.

[0055] Among them, carrier mobility refers to the ability of electrons to move in the active layer 310, and is usually used to measure the conductivity of the active layer 310. The greater the carrier mobility, the faster the carrier moves in the electric field, which is beneficial to improving the performance of the driving transistor M3 and the switching transistor STFT. However, a higher carrier mobility may cause the carriers to be more susceptible to external factors (such as oxidation, interface defects, etc.), thereby affecting the long-term stability of the performance of the driving transistor M3 and the switching transistor STFT.

[0056] Specifically, by providing a first oxide layer 311 with a lower carrier mobility and a second oxide layer 312 with a higher mobility in the active layer 310, a "gradient structure" can be formed, and the characteristics of materials with different carrier mobilities can be utilized to achieve performance optimization. Among them, the first oxide layer 311 with a lower carrier mobility helps to reduce the carrier migration caused by the electric field and reduce the influence of the interface trap state on the carrier, thereby maintaining the long-term stability of the performance of the driving transistor M3 and the switching transistor STFT; the second oxide layer 312 with a higher carrier mobility helps the carrier to respond quickly under the action of the electric field, improves the working speed, and can be quickly turned on and off at a lower gate voltage, reducing dynamic power consumption. By providing a first oxide layer 311 with a lower carrier mobility and a second oxide layer 312 with a higher mobility in the active layer 310, both carrier mobility and stability can be taken into account.

[0057] In an optional embodiment, the ratio of the carrier mobility of the first oxide layer 311 and the second oxide layer 312 is less than 1:2. For example, the first oxide layer 311 may be a conventional IGZO active layer, and the second oxide layer 312 may be made by increasing the proportion of elements such as gallium (Ga), tin (Sn), lanthanum (La), and hafnium (Hf) in the conventional IGZO active layer. The carrier mobility of the second oxide layer 312 may be twice or more than the carrier mobility of the first oxide layer 311.

[0058] In yet another optional embodiment, a ratio of the thickness of the first oxide layer 311 to the thickness of the second oxide layer 312 is 1.1 to 1.3.

[0059] Based on the above embodiments, continue to refer to Figure 6The driving control gate 112 and the switching control gate 122 are respectively located on opposite sides of the active layer 310; wherein the first oxide layer 311 is located on a side of the active layer 310 close to the driving control gate 112; and the second oxide layer 312 is located on a side of the active layer 310 close to the switching control gate 122.

[0060] Specifically, the driving transistor M3 requires a larger subthreshold swing, and a larger mobility will increase the mobility of carriers and increase the source-drain current, which is not conducive to a larger subthreshold swing. Therefore, the driving active structure 111 of the driving transistor M3 requires a lower carrier mobility; the driving control gate 112 is located on the side of the first oxide layer 311 with lower carrier mobility away from the second oxide layer 312 with higher carrier mobility. The first oxide layer 311 with lower carrier mobility is closer to the driving control gate 112. When the driving transistor M3 is working, the first oxide layer 311 with lower carrier mobility can play a leading role, which is beneficial to increase the subthreshold swing of the driving transistor M3, thereby realizing precise control of the driving current, which is beneficial to accurate display of low grayscale.

[0061] The switching transistor STFT requires a smaller subthreshold swing. The higher the carrier mobility, the smaller the subthreshold swing, so the switching transistor STFT requires a higher carrier mobility; the switch control gate 122 is located on the side of the second oxide layer 312 with higher carrier mobility away from the first oxide layer 311 with lower carrier mobility, and the second oxide layer 312 with higher carrier mobility is closer to the switch control gate 122. When the switching transistor STFT is working, the second oxide layer 312 with higher carrier mobility can play a leading role, which is beneficial to reduce the subthreshold swing of the switching transistor STFT, thereby achieving smaller leakage current and faster on and off response.

[0062] It should be noted that the figure only exemplarily shows that the first oxide layer 311 is located on the side of the second oxide layer 312 close to the base substrate 200. In this case, the drive control gate 112 is located on the side of the active layer 310 close to the base substrate 200, and the switch control gate 122 is located on the side of the active layer 310 away from the base substrate 200. In other optional embodiments, the first oxide layer 311 may also be located on the side of the second oxide layer 312 away from the base substrate 200. In this case, the drive control gate 112 is located on the side of the active layer 310 away from the base substrate 200, and the switch control gate 122 is located on the side of the active layer 310 close to the base substrate 200 (not shown in the figure).

[0063] Optional, Figure 7 is a circuit structure diagram of another pixel driving circuit provided by an embodiment of the present invention, with reference to Figure 7 , the driving transistor M3 is a P-channel transistor; the switching transistor STFT is an N-channel transistor.

[0064] Specifically, the carriers in the driving transistor M3 are holes, and the mobility of holes is relatively small, which is conducive to increasing the subthreshold swing of the driving transistor M3 and realizing accurate control of the display grayscale; the carriers in the switching transistor STFT are electrons, and the mobility of electrons is relatively large, which is conducive to reducing the subthreshold swing of the switching transistor STFT and realizing smaller leakage current and faster on / off response. In addition, when the carriers in the driving transistor M3 are holes, the subthreshold swing can be further increased by extending the channel length.

[0065] As can be seen from the above content, the subthreshold swing of the driving transistor M3 can be increased by setting the first control distance d1 between the driving control gate 112 and the driving active structure 111 to be larger, and the subthreshold swing of the driving transistor M3 can also be increased by setting the driving transistor M3 to be a P-channel transistor. In this case, it is no longer necessary to increase the subthreshold swing of the driving transistor M3 by increasing the channel length of the driving transistor M3; in addition, when the driving transistor M3 is an N-channel transistor, increasing the channel length of the driving transistor M3 has a limited effect on the increase of the subthreshold swing, and the channel length of the driving transistor M3 may not be increased. The switching transistor STFT requires a smaller subthreshold swing, so the channel length of the switching transistor STFT can be set shorter.

[0066] In this way, the channel lengths of the driving transistor M3 and / or the switching transistor STFT can be set shorter. For example, the driving active structure 111 and / or the switching active structure 121 can be set as a straight-line structure, which is beneficial to reducing the space occupied by the driving active structure 111 and / or the switching active structure 121, thereby reducing the area of ​​the pixel driving circuit 100 and achieving high resolution of the display panel 01.

[0067] For example, Figure 8 is a schematic diagram of a top view of a pixel driving circuit provided by an embodiment of the present invention, with reference to Figure 6-Figure 8, along the direction from the base substrate 200 to the light emitting element LED, the display panel 01 includes a first conductive layer 410, an active layer 310, a second conductive layer 420 and a third conductive layer 430 arranged in sequence. The first conductive layer 410 includes a driving control gate 112 of the driving transistor M3; the active layer 310 includes a driving active structure 111 and a switch active structure 121; the second conductive layer 420 includes a switch control gate 122 of the switch transistor STFT; the third conductive layer 430 includes a first lapped electrode N1_B lapped with the driving control gate 112 of the driving transistor M3, the second electrode of the compensation transistor M4, and the second electrode of the initialization transistor M5. In addition, in the active layer 310, the connection position of the second electrode of the first light emitting control transistor M1, the second electrode of the write transistor M2, and the first electrode of the driving transistor M3 can be reused as the second lap electrode N2_B; the connection position of the second electrode of the driving transistor M3, the first electrode of the second light emitting control transistor M6, and the first electrode of the compensation transistor M4 can be reused as the third lap electrode N3_B; the connection position of the second electrode of the second light emitting control transistor M6 and the second electrode of the reset transistor M7 can be reused as the fourth lap electrode N4_B.

[0068] Among them, the initialization transistor M5 can be electrically connected to the first scan line SL1, and the first scan line SL1 is used to transmit the initialization control signal S1N; the write transistor M2 and the compensation transistor M4 can be electrically connected to the second scan line SL2, and the second scan line SL2 is used to transmit the write control signal S2 and the compensation control signal S2N, and the write control signal S2 and the compensation control signal S2N are multiplexed; the first light-emitting control transistor M1 and the second light-emitting control transistor can be electrically connected to the third scan line SL3, and the third scan line SL3 is used to transmit the light-emitting control signal Emit; the reset transistor M7 can be electrically connected to the fourth scan line SL4, and the fourth scan line SL4 is used to transmit the reset control signal S1.

[0069] Optional, Fig. 9 is a schematic diagram of a film layer structure of another display panel provided by an embodiment of the present invention, referring to Fig. 9 , the driving transistor M3 further includes a driving auxiliary gate 113 ; and / or the switching transistor STFT further includes a switching auxiliary gate 123 .

[0070] Specifically, the driving auxiliary gate 113 is used to adjust the threshold voltage of the driving transistor M3. For example, the threshold voltage of the driving transistor M3 can be adjusted to an appropriate range, which can avoid the threshold voltage of the driving transistor M3 being too small, resulting in mis-conduction, and can also avoid the threshold voltage of the driving transistor M3 being too large, thereby increasing the driving power consumption; the switch auxiliary gate 123 is used to improve the stability of the threshold voltage of the switching transistor STFT, and avoid the threshold voltage drift of the switching transistor STFT, resulting in mis-conduction of the switching transistor STFT, thereby affecting the display effect.

[0071] In order to take into account the performance requirements of the driving transistor M3 and the switching transistor STFT, the carrier mobility of the film layer where the driving active structure 111 and the switching active structure 121 are located cannot be too high (too high will cause the subthreshold swing of the driving transistor M3 to be too small), nor too low (too low will cause the subthreshold swing of the switching transistor STFT to be too large). A more compromise range needs to be taken, which may affect the stability of the threshold voltage. By setting the driving auxiliary gate 113 and / or the switching auxiliary gate 123, it is beneficial to improve the stability of the driving transistor M3 and / or the switching transistor STFT, reduce the impact of the environment (high temperature, high voltage), thereby improving device performance and enhancing display effects.

[0072] It should be noted that the figure only exemplarily shows that the driving auxiliary gate 113 and the driving control gate 112 are respectively located on opposite sides of the driving active structure 111, and the switch auxiliary gate 123 and the switch control gate 122 are respectively located on opposite sides of the switch active structure 121, but it is not limited thereto. In other feasible implementations, the driving auxiliary gate 113 and the driving control gate 112 may be located on the same side of the driving active structure 111, and the switch auxiliary gate 123 and the switch control gate 122 are respectively located on the same side of the switch active structure 121; preferably, the driving auxiliary gate 113 is located on the side of the driving control gate 112 away from the driving active structure 111, and the switch auxiliary gate 123 is located on the side of the switch control gate 122 away from the switch active structure 121.

[0073] In an optional embodiment, continue to refer to Fig. 9 The display panel 01 includes a base substrate 200 and a circuit layer 300 located on one side of the base substrate; the circuit layer 300 includes a first conductive layer 410, an active layer 310, a second conductive layer 420 and a third conductive layer 430; the first conductive layer 410 is located on the side of the active layer 310 close to the base substrate 200; the second conductive layer 420 is located on the side of the active layer 310 away from the base substrate 200; the third conductive layer 430 is located on the side of the second conductive layer 420 away from the base substrate 200; the first conductive layer 410 includes a driving auxiliary gate 113 and / or a switching auxiliary gate 123; the active layer 310 includes a driving active structure 111 and a switching active structure 121; the second conductive layer 420 includes a switching control gate 122; the third conductive layer 430 includes a driving control gate 112.

[0074] Specifically, when the driving transistor M3 includes a dynamic auxiliary gate 113 and the switching transistor STFT includes a switching auxiliary gate 123, the driving auxiliary gate 113 and the switching auxiliary gate 123 can be located on the same side of the active layer 410, and the driving auxiliary gate 113 and the switching auxiliary gate 123 can be prepared on the same layer, which is beneficial to reducing the film layer structure and the mask, simplifying the process, and reducing the preparation cost.

[0075] Exemplarily, the driving control gate 112 and the switch control gate 122 may both be located on the side of the active layer 300 away from the base substrate 200, and the driving auxiliary gate 113 and the switch auxiliary gate 123 may both be located on the side of the active layer 410 close to the base substrate 200. The driving auxiliary gate 113 and the switch auxiliary gate 123 may be reused as a bottom light shielding structure to shield the light emitted from the base substrate 200 to the driving active structure 111 and the switch active structure 121, thereby improving the channel stability of the driving transistor M3 and the switch transistor STFT; the driving auxiliary gate 113 and the switch auxiliary gate 123 may also be an integrated structure to better shield the light emitted from the base substrate 200 to the driving active structure 111 and the switch active structure 121, thereby improving the channel stability.

[0076] It is understandable that the display panel further includes insulating layers between the conductive layers and the active layers, which will not be described one by one in the embodiment of the present invention.

[0077] In yet another optional embodiment, Fig.10 is a schematic diagram of a film layer structure of another display panel provided by an embodiment of the present invention, referring to Fig.10 The first conductive layer 410 includes a driving control gate 112; the active layer 310 includes a driving active structure 111 and a switching active structure 121; the second conductive layer 420 includes a switching control gate 122; in addition, the first conductive layer 410 also includes a switching auxiliary gate 123, and / or the second conductive layer 420 also includes a driving auxiliary gate 113.

[0078] Exemplarily, when the driving transistor M3 includes the driving auxiliary gate 113, the driving auxiliary gate 113 may be disposed in the same layer as the switch control gate 122, and both are disposed in the second conductive layer 420; when the switch transistor STFT includes the switch auxiliary gate 123, the switch auxiliary gate 123 may be disposed in the same layer as the driving control gate 112, and both are disposed in the first conductive layer 410. The insulating thickness between the first conductive layer 410 and the active layer 310 is greater than the insulating thickness between the second conductive layer 420 and the active layer 310, so that the first control distance d1 between the driving control gate 112 of the driving transistor M3 and the driving active structure 111 is larger, and the second control distance d2 between the driving control gate 112 of the driving transistor M3 and the driving active structure 111 is smaller.

[0079] In this way, by arranging the driving control gate 112 and the switch auxiliary gate 123 in the same layer below the active layer 310, and arranging the driving auxiliary gate 113 and the switch control gate 122 in the same layer above the active layer 310, the film layer structure and the mask can be reduced, which is beneficial to simplifying the process and reducing the preparation cost; in addition, the driving control gate 112 with a thicker insulating layer between the active layer 310 is located below the driving active structure 111, and the switch control gate 122 with a thinner insulating layer between the active layer 310 is located above the switch active structure 121, so that the insulating layer above the active layer 310 is thinner, which can reduce the difficulty of preparing the source and drain conductive regions with active structures, thereby reducing equipment requirements and helping to reduce production costs; the preparation of the source and drain conductive regions requires doping through the oxide layer after the gate oxide layer is prepared. If the gate oxide layer is thick, it may not be prepared, or the requirements for doping equipment or doping process are high, and it is not easy to prepare.

[0080] In yet another optional embodiment, when the switch transistor STFT includes the switch auxiliary gate 123 , in the same switch transistor STFT, the switch auxiliary gate 123 is electrically connected to the switch control gate 122 .

[0081] Specifically, the switch auxiliary gate 123 is electrically connected to the switch control gate 122, and the switch transistor STFT forms a three-dimensional dual-gate structure, which can enable the switch transistor STFT to have better channel charge control capability. On the one hand, it can accelerate the charge movement rate in the switch active structure 121, reduce the subthreshold swing, and improve the response speed of the switch transistor STFT; on the other hand, it can better control the channel shutdown in the switch active structure 121 and reduce leakage current.

[0082] In another optional embodiment, when the driving transistor M3 includes the driving auxiliary gate 113, the driving auxiliary gate 113 receives the first constant voltage signal; and / or when the switching transistor STFT includes the switching auxiliary gate 123, the switching auxiliary gate 123 receives the second constant voltage signal.

[0083] Specifically, the driving auxiliary gate 113 receives the first constant voltage signal, which can better control and stabilize the threshold voltage of the driving transistor M3; the switch auxiliary gate 123 receives the second constant voltage signal, which can better stabilize the device performance of the switch transistor STFT and reduce the threshold voltage offset.

[0084] Among them, the first constant voltage signal and the second constant voltage signal may be the same or different, and the embodiment of the present invention does not specifically limit the first constant voltage signal and the second constant voltage signal. In an optional implementation, when the driving transistor M3 and the switching transistor STFT are both N-channel transistors, the voltage of the first constant voltage signal may be -0.5V to -1V, and the voltage of the second constant voltage signal may be -3V. If the driving transistor M3 and / or the switching transistor STFT are both P-channel transistors, the voltage of the first constant voltage signal and / or the second constant voltage signal may be greater than zero.

[0085] Based on the above embodiments, Fig.11 is a partial top view of a display panel provided by an embodiment of the present invention, with reference to Figure 4 , Fig.10 and Fig.11 , the display panel 01 includes a plurality of scan lines SL (SL1, SL2, SL3 or SL4); at least part of the pixel driving circuits 100 located in the same row are electrically connected to the same scan line SL (SL1, SL2, SL3 or SL4); the scan line SL (SL1, SL2, SL3 or SL4) is used to transmit a switch control signal (Emit, S1, S2, S1N or S2N) to the switch control gate 122; when the switch transistor STFT includes a switch auxiliary gate 123, the display panel 01 also includes a plurality of auxiliary lines AS-L; at least part of the pixel driving circuits 100 located in the same row are electrically connected to the same auxiliary line AS-L; the auxiliary line AS-L is used to transmit a second constant voltage signal to the switch auxiliary gate 123; wherein, the scan line SL and the auxiliary line AS-L both extend along the row direction, and in a direction perpendicular to the plane where the display panel 01 is located, the projection of the scan line SL on the plane where the display panel 01 is located and the projection of the auxiliary line AS-L on the plane where the display panel 01 is located at least partially overlap.

[0086] Exemplarily, along the direction from the base substrate 200 to the light emitting element LED, the display panel 01 includes a first conductive layer 410, an active layer 310, a second conductive layer 420 and a third conductive layer 430 arranged in sequence. The first conductive layer 410 includes an auxiliary line AS-L, a switch auxiliary gate 123 and a drive control gate 112, the auxiliary line AS-L and the switch auxiliary gate 123 are electrically connected, and the drive control gate 112 is electrically connected to the first lap electrode N1_B; the active layer 310 includes a drive active structure 111 and a switch active structure 121; the second conductive layer 420 includes a scan line SL, a switch control gate 122 and a drive auxiliary gate 113, and the scan line SL and the switch control gate 122 are electrically connected; the third conductive layer 430 includes a first lap electrode N1_B.

[0087] When the pixel driving circuit 100 includes a plurality of switch transistors STFT, the same pixel driving circuit 100 can be electrically connected to a plurality of scan lines SL and a plurality of auxiliary lines AS-L at the same time, and the auxiliary lines AS-L can be arranged corresponding to the scan lines, so that in a direction perpendicular to the plane where the display panel 01 is located, the projection of each scan line SL on the plane where the display panel 01 is located can overlap with the projection of an auxiliary line AS-L on the plane where the display panel 01 is located. In this way, the layout space can be saved, the signal fluctuation of the switch control signals (Emit, S1, S2, S1N, S2N) on the scan lines SL (SL1, SL2, SL3, SL4) can be reduced, the signal stability can be improved, thereby improving the light emission stability and enhancing the display effect.

[0088] In an optional embodiment, a plurality of auxiliary lines AS-L connected to pixel driving circuits 100 in different rows are electrically connected, so that the pixel driving circuits 100 in each row can receive the same second constant signal, which is beneficial to improving uniformity; the impedance of the auxiliary line AS-L can also be reduced, and the voltage drop can be reduced, so that the switch auxiliary gate 123 of the pixel driving circuit 100 close to the chip setting area (not shown in the figure) and far away from the chip setting area can receive the second fixed signal with the same potential, thereby ensuring the consistency of the threshold voltage of the switching transistor of each pixel driving circuit 100, which is beneficial to improving uniformity and enhancing the display effect.

[0089] It can be understood that when the same pixel driving circuit 100 is electrically connected to a plurality of auxiliary lines AS-L, the plurality of auxiliary lines AS-L connected to the same pixel driving circuit 100 can also be electrically connected to each other, such as Fig.11 shown.

[0090] In yet another optional embodiment, reference Figure 4 and Fig.11 , the channel types of the driving transistor M3 and the switching transistor STFT in the pixel driving circuit 100 are the same; when the driving transistor M3 includes a driving auxiliary gate 113 and the switching transistor STFT includes a switching auxiliary gate 123, the driving auxiliary gate 113 and the switching auxiliary gate 123 are electrically connected.

[0091] Exemplarily, the third conductive layer 430 further includes an auxiliary bridging electrode AS_B, and the driving auxiliary gate 113 can be electrically connected to the switch auxiliary gate 123 via the auxiliary bridging electrode AS_B. In this way, the potential of the driving auxiliary gate 113 and the switch auxiliary gate 123 can be the same, and both can receive the same signal, which is beneficial to reducing the electrical signals required by the pixel driving circuit 100, thereby simplifying the timing design and reducing the development cost.

[0092] In another optional embodiment, the switch transistor STFT in the pixel driving circuit 100 may include a write transistor M2 and a reset transistor M7; the write transistor M2 is used to provide a data signal Data to the driving transistor, so that the driving transistor M3 can provide a corresponding driving current to the light-emitting element LED according to the data signal Data; the reset transistor M7 is used to provide a reset signal VREF2 to the driving transistor M3 and / or the light-emitting element LED to reset the driving transistor M3 and / or the light-emitting element LED; the first constant voltage signal and / or the second constant voltage signal multiplex the reset signal. In this way, it is beneficial to reduce the signal lines of the display panel 01 and simplify the layout.

[0093] In other optional implementations, the first constant voltage signal and / or the second constant voltage signal may also multiplex the initialization signal VREF1, the first power signal PVDD, the second power signal PVEE, etc., which is not specifically limited in the embodiment of the present invention.

[0094] Based on the same inventive concept, an embodiment of the present invention further provides a display device, Fig.12 is a schematic diagram of the structure of a display device provided by an embodiment of the present invention, such as Fig.12 The display device 02 includes a display panel 01 provided by any embodiment of the present invention. The display device 02 provided by the embodiment of the present invention can be Fig.12 The mobile phone shown can also be any electronic product with a display function, including but not limited to the following categories: televisions, laptops, desktop displays, tablet computers, digital cameras, smart bracelets, smart glasses, car displays, medical equipment, industrial control equipment, touch interactive terminals, etc. The embodiments of the present invention do not specifically limit this.

[0095] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A display panel, characterized in that: include: A plurality of pixel driving circuits arranged in an array; The pixel driving circuit includes a driving transistor, a light emitting element and at least one switching transistor; The driving transistor is used to selectively provide a driving signal to the light emitting element; The switch transistor is used to selectively provide an electrical signal to the drive transistor and / or the light emitting element; The driving active structure of the driving transistor and the switching active structure of the switching transistor are arranged in the same layer; Along a direction perpendicular to the plane where the display panel is located, the distance between the driving control gate of the driving transistor and the driving active structure is a first control distance d1, and the distance between the switch control gate of the switch transistor and the switch active structure is a second control distance d2; wherein d1>d2.

2. The display panel according to claim 1, characterized in that: The driving active structure and the switching active structure both include metal oxide materials.

3. The display panel according to claim 2, characterized in that: The display panel further comprises a base substrate and a circuit layer located on one side of the base substrate; the circuit layer comprises an active layer, and the active layer comprises the driving active structure and the switch active structure; The active layer further includes a first oxide layer and a second oxide layer; wherein the carrier mobility of the second oxide layer is greater than the carrier mobility of the first oxide layer.

4. The display panel according to claim 3, characterized in that: The driving control gate and the switch control gate are respectively located at two opposite sides of the active layer; The first oxide layer is located on a side of the active layer close to the driving control gate; the second oxide layer is located on a side of the active layer close to the switching control gate.

5. The display panel according to claim 1, characterized in that: The driving active structure is a straight-line structure; And / or, the switch active structure is a straight-line structure.

6. The display panel according to claim 1, characterized in that: The driving transistor further includes a driving auxiliary gate; And / or, the switch transistor further includes a switch auxiliary gate.

7. The display panel according to claim 6, characterized in that: The display panel further includes a base substrate and a circuit layer located on one side of the base substrate; The circuit layer includes a first conductive layer, an active layer, a second conductive layer and a third conductive layer; the first conductive layer is located on a side of the active layer close to the substrate; the second conductive layer is located on a side of the active layer away from the substrate; the third conductive layer is located on a side of the second conductive layer away from the substrate; The first conductive layer includes the driving auxiliary gate and / or the switching auxiliary gate; the active layer includes the driving active structure and the switching active structure; the second conductive layer includes the switching control gate; and the third conductive layer includes the driving control gate.

8. The display panel according to claim 6, characterized in that: The display panel further comprises a base substrate and a circuit layer located on one side of the base substrate; the circuit layer comprises a first conductive layer, an active layer and a second conductive layer; the first conductive layer is located on a side of the active layer close to the base substrate; the second conductive layer is located on a side of the active layer away from the base substrate; The first conductive layer includes the driving control gate; the active layer includes the driving active structure and the switch active structure; the second conductive layer includes the switch control gate; The first conductive layer further includes the switch auxiliary gate, and / or the second conductive layer further includes a drive auxiliary gate.

9. The display panel according to claim 6, characterized in that: When the switch transistor includes the switch auxiliary gate, in the same switch transistor, the switch auxiliary gate is electrically connected to the switch control gate.

10. The display panel according to claim 6, characterized in that: When the driving transistor includes the driving auxiliary gate, the driving auxiliary gate receives a first constant voltage signal; And / or, when the switch transistor includes the switch auxiliary gate, the switch auxiliary gate receives a second constant voltage signal.

11. The display panel according to claim 10, characterized in that: The display panel further comprises a plurality of scan lines; at least part of the pixel driving circuits in the same row are electrically connected to the same scan line; the scan line is used to transmit a switch control signal to the switch control gate; When the switch transistor includes the switch auxiliary gate, the display panel further includes a plurality of auxiliary lines; at least part of the pixel driving circuits in the same row are electrically connected to the same auxiliary line; the auxiliary line is used to transmit the second constant voltage signal to the switch auxiliary gate; The scan lines and the auxiliary lines both extend in the row direction, and in a direction perpendicular to the plane where the display panel is located, the projection of the scan lines on the plane where the display panel is located at least partially overlaps with the projection of the auxiliary lines on the plane where the display panel is located.

12. The display panel according to claim 11, characterized in that: The plurality of auxiliary lines connected to the pixel driving circuits in different rows are electrically connected to each other.

13. The display panel according to claim 10, characterized in that: The driving transistor and the switching transistor in the pixel driving circuit have the same channel type; When the driving transistor includes the driving auxiliary gate, and the switching transistor includes the switching auxiliary gate, the driving auxiliary gate and the switching auxiliary gate are electrically connected.

14. The display panel according to claim 10, characterized in that: The switch transistor in the pixel driving circuit includes a write transistor and a reset transistor; The write transistor is used to provide a data signal to the drive transistor, so that the drive transistor can provide a corresponding drive current to the light emitting element according to the data signal; The reset transistor is used to provide a reset signal to the driving transistor and / or the light emitting element to reset the driving transistor and / or the light emitting element; The first constant voltage signal and / or the second constant voltage signal multiplexes the reset signal.

15. The display panel according to claim 1, characterized in that: The driving transistor is a P-channel transistor; the switching transistor is an N-channel transistor.

16. A display device, characterized in that: A display panel comprising any one of claims 1-15.

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