Light-emitting unit driving circuit, pixel circuit and display device

Abstract

The invention provides a light-emitting unit driving circuit, a pixel circuit and a display device.The light-emitting unit driving circuit comprises a light-emitting driving unit, a switching circuit, a data switch and an overturning circuit, the light-emitting driving unit comprises a driving tube and a light emitting switch which are connected in series, and the switching circuit comprises a first switch, a second switch, a third switch, a fourth switch and a fourth switch; the first switch, the light-emitting driving unit and the fourth switch form a first output circuit, the second switch, the light-emitting driving unit and the third switch form a second output circuit, and the flip circuit switches the output level polarity after receiving a second scanning signal and a third scanning signal once in each frame. The first output circuit and the second output circuit are controlled to be switched on alternately, so that the voltage direction and the current direction of the driving tube are switched, abnormal accumulation of carriers caused by polarization of the driving tube is avoided, the working performance of the driving tube is improved, and the display effect of the pixel unit and the display device is guaranteed.

Description

Technical Field

[0001] The present invention belongs to the field of display technology, and in particular relates to a light-emitting unit driving circuit, a pixel circuit and a display device. Background Art

[0002] Light-emitting units such as active-matrix organic light-emitting diodes (AMOLED), active-matrix mini light-emitting diodes (AM MiniLED), and micron light-emitting diodes (Micro LED) have the characteristics of fast response, wide color gamut, large viewing angle, and high brightness, and have gradually become the mainstream display technology for displays such as mobile phones, televisions, and computers.

[0003] Each light-emitting unit constitutes a pixel unit or a light-emitting point. Each light-emitting unit can emit light by itself when powered, and can be addressed and driven to light up individually.

[0004] Usually, the light-emitting unit is driven by a driving tube. When the driving tube is working, a level signal is applied to its control end and an external electric field is formed in the channel area, as well as a conduction band connected to the driving tube. However, long-term unidirectional opening will cause abnormal accumulation of carriers in the channel, causing positive and negative bias of the threshold voltage, thereby causing degradation of the driving tube and affecting the light-emitting effect of the light-emitting unit. When the light-emitting unit is used in a display device, it will also cause an afterimage problem in the display device, affecting the display effect. Summary of the invention

[0005] The object of the present invention is to provide a light-emitting unit driving circuit, aiming to solve the problem that a driving tube in a traditional light-emitting unit driving circuit is unidirectionally turned on for a long time, resulting in performance degradation.

[0006] A first aspect of an embodiment of the present invention provides a light-emitting unit driving circuit, comprising: A light-emitting driving unit, comprising a driving tube and a light-emitting switch connected in series, wherein the driving tube is used to convert an input data signal into a current signal during a data writing period, and the light-emitting switch is used to be triggered to conduct during a light-emitting period to output the current signal by the light-emitting signal; A switch circuit, comprising a first switch group and a second switch group connected in parallel between a positive power supply terminal and a light-emitting unit, wherein the first switch group comprises a first switch and a second switch connected in series, and the second switch group comprises a third switch and a fourth switch connected in series, wherein a connection node between the first switch and the second switch is connected to a first end of the light-emitting driving unit, and a connection node between the third switch and the fourth switch is connected to a second end of the light-emitting driving unit; the first switch and the fourth switch are turned on by a first level signal and turned off by a second level signal; the second switch and the third switch are turned off by the first level signal and turned on by the second level signal, and the polarity of the first level signal and the second level signal are opposite; A data switch connected to the driving tube and configured to be turned on by the first scanning signal during the data writing period to transmit the data signal; A flip circuit is connected to each switch of the switching circuit, and the flip circuit is used to output the first level signal or the second level signal, and switch the level polarity of the output signal each time a second scanning signal and a third scanning signal are received. The second scanning signal, the first scanning signal and the third scanning signal are output sequentially with a unit phase difference in each frame scanning cycle.

[0007] Optionally, the optical emission switch comprises a first transistor and a second transistor; The first end of the first transistor constitutes the first end of the light-emitting driving unit, the second end of the first transistor is connected to the first end of the driving tube, the first end of the second transistor is connected to the second end of the driving tube, and the second end of the second transistor constitutes the second end of the light-emitting driving unit.

[0008] Optionally, the first switch includes a third transistor, a first end of the third transistor is connected to the positive power supply end, a second end of the third transistor is connected to the first end of the first transistor, and a control end of the third transistor is connected to the output end of the flip circuit; The second switch includes a fourth transistor, a first end of the fourth transistor is connected to the first end of the first transistor, a second end of the fourth transistor is connected to the light emitting unit, and a control end of the fourth transistor is connected to the output end of the flip circuit; The third switch comprises a fifth transistor, a first end of the fifth transistor is connected to the positive power supply end, a second end of the fifth transistor is connected to the second end of the second transistor, and a control end of the fifth transistor is connected to the output end of the flip circuit; The fourth switch includes a sixth transistor, a first end of the sixth transistor is connected to the second end of the second transistor, a second end of the sixth transistor is connected to the light emitting unit, and a control end of the sixth transistor is connected to the output end of the flip circuit.

[0009] Optionally, the light emitting unit driving circuit further includes: The storage capacitor is connected between the positive power supply terminal and the control terminal of the driving tube.

[0010] Optionally, the data switch includes a seventh transistor and an eighth transistor; The first end of the seventh transistor is connected to the control end of the driving tube, the second end of the seventh transistor is connected to the second end of the driving tube, the first end of the eighth transistor is used to input the data signal, the second end of the eighth transistor is connected to the first end of the driving tube, and the control end of the seventh transistor and the control end of the eighth transistor are used to input the first scanning signal.

[0011] Optionally, the light-emitting unit driving circuit also includes a first reset transistor, a first end of the first reset transistor is used to input a first reset signal, a second end of the first reset transistor is connected to a control end of the driving tube, and the control end of the first reset transistor is used to input the second scanning signal during a reset period.

[0012] Optionally, the light-emitting unit driving circuit also includes a second reset transistor, a first end of the second reset transistor is used to input a second reset signal, a second end of the second reset transistor is connected to the light-emitting unit, and a control end of the second reset transistor is used to input the first scanning signal during the data writing period.

[0013] Optionally, the flip circuit includes a first resistor, a second resistor, a third resistor, a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, a seventeenth transistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first diode, and a second diode; The first end of the first resistor and the first end of the second resistor are connected in common and are used to input a first row start signal during a reset period. The second end of the first resistor, the cathode of the first diode and the first end of the ninth transistor are connected. The control end of the ninth transistor is used to input the second scan signal. The second end of the second resistor, the anode of the first diode, the anode of the second diode and the first end of the tenth transistor are connected. The cathode of the second diode, the first end of the first capacitor, the first end of the third resistor and the first end of the eleventh transistor are connected. The second end of the ninth transistor, the second end of the first capacitor and the second end of the third resistor are grounded. The second end of the tenth transistor, the control end of the twelfth transistor and the control end of the thirteenth transistor are connected. The first end of the twelfth transistor is used to input a second row start signal. The first end of the thirteenth transistor is used to input a row close signal. The second end of the thirteenth transistor, the first end of the fourteenth transistor, the second end of the fifteenth transistor and the first end of the third capacitor are connected, the control end of the tenth transistor, the control end of the eleventh transistor, the control end of the fourteenth transistor and the control end of the fifteenth transistor are connected and used to input the third scanning signal, the second end of the fourteenth transistor is connected to the first end of the second capacitor, the second end of the fifteenth transistor, the control end of the sixteenth transistor and the control end of the seventeenth transistor are connected, the first end of the sixteenth transistor is used to input the row closing signal, the first end of the seventeenth transistor is used to input the second row opening signal, the second end of the sixteenth transistor, the second end of the seventeenth transistor and the first end of the fourth capacitor are connected together to form the output end of the flipping circuit, and the second end of the second capacitor, the second end of the third capacitor and the second end of the fourth capacitor are grounded.

[0014] A second aspect of the embodiments of the present invention provides a pixel circuit, including a light-emitting unit and the light-emitting unit driving circuit as described above, wherein the light-emitting unit driving circuit is connected to the light-emitting unit.

[0015] A third aspect of an embodiment of the present invention provides a display device, comprising a driving circuit and the pixel circuit as described above, wherein the driving circuit is connected to the pixel circuit.

[0016] Compared with the prior art, the embodiments of the present invention have the following beneficial effects: the above-mentioned light-emitting unit driving circuit includes a light-emitting driving unit, a switching circuit, a data switch and a flipping circuit; the light-emitting driving unit includes a driving tube and a light-emitting switch connected in series; the switching circuit includes a first switch to a fourth switch; the first switch, the light-emitting driving unit and the fourth switch constitute a first output circuit; the second switch, the light-emitting driving unit and the third switch constitute a second output circuit; the flipping circuit switches the output level polarity after receiving the second scanning signal and the third scanning signal once in each frame, and controls the first output circuit and the second output circuit to be alternately turned on, thereby switching the voltage direction and the current direction of the driving tube, avoiding abnormal accumulation of carriers caused by polarization of the driving tube, improving the working performance of the driving tube and ensuring the display effect of the pixel unit and the display device. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 A schematic diagram of the structure of a light-emitting unit driving circuit provided in Embodiment 1 of the present invention; Figure 2 A signal timing diagram of the light-emitting unit driving circuit provided in Embodiment 1 and Embodiment 2 of the present invention; Figure 3 A circuit diagram of a light-emitting unit driving circuit provided in Embodiment 2 of the present invention; Figure 4 A circuit diagram of a flip circuit provided in Embodiment 3 of the present invention; Figure 5 A schematic diagram of the signal timing of the flip circuit provided in the third embodiment of the present invention; Figure 6 A schematic diagram of the structure of a pixel circuit provided in Embodiment 4 of the present invention; Figure 7 This is a schematic diagram of the structure of a display device provided in Embodiment 5 of the present invention.

[0018] Among them, the reference numerals in the figures are: 101, pixel circuit; 102, driving circuit; 10, light emitting unit driving circuit; 20, light emitting unit; 110, light emitting driving unit; 120, switch circuit; 130, data switch; 140, flip circuit; 111, light emitting switch; 121, first switch; 122, second switch; 123, third switch; 124, fourth switch; SD1, driving tube; T1, first transistor; T2, second transistor; T3, third transistor; T4, fourth transistor; T5, fifth transistor; T6, sixth transistor; T7, seventh transistor; T8, eighth transistor; T9, ninth transistor; T10, tenth transistor; T11, eleventh transistor; T12, twelfth transistor; T13, thirteenth transistor; T14, fourteenth transistor; T15, fifteenth transistor; T16, sixteenth transistor; T17, seventeenth transistor; Trst1, first reset transistor; Trst2, second reset transistor; Cst, storage capacitor; OLED, light emitting diode; C1, first capacitor; C2, second capacitor; C3, third capacitor; C4, fourth capacitor; R1, first resistor; R2, second resistor; R3, third resistor; D1, first diode; D2, second diode; VDD, positive voltage terminal; Vdata, data signal; Vint, first reset signal; VI, second reset signal; EM, light emission signal; Scan1, first scan signal; Scan2, second scan signal; Scan3, third scan signal; SW, output signal of flip circuit; VGH1, first row start signal; VGH2, second row start signal; VGL, row close signal; Q, first node; A, second node; H1, reset period; H2, data writing period; H3, light emitting period. DETAILED DESCRIPTION

[0019] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0020] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0021] Embodiment 1 A first aspect of an embodiment of the present invention provides a light emitting unit driving circuit 10, such as Figure 6 and Figure 7As shown, the light-emitting unit driving circuit 10 and the light-emitting unit 20 form a pixel circuit 101, and the pixel circuit 101 is arranged in an array on an array substrate. A plurality of data lines and scan lines are also provided on the array substrate. Each light-emitting unit driving circuit 10 is connected to a corresponding data line and a scan line, and the data line and the scan line are connected to a driving circuit 102. The driving circuit 102 is used to output a scan signal row by row through a plurality of rows of scan lines and output a data signal Data to each light-emitting unit driving circuit 10 in the pixel circuit 101 through a plurality of columns of data lines when each row is driven. The light-emitting unit driving circuit 10 triggers the operation according to the received scan signal and data signal Data and generates a current signal to the light-emitting unit 20, wherein, as Figure 1 As shown, the light emitting unit 20 is a light emitting diode OLED.

[0022] The light emitting unit driving circuit 10 comprises: The light-emitting driving unit 110 includes a driving tube SD1 and a light-emitting switch 111 connected in series. The driving tube SD1 is used to convert the input data signal Vdata into a current signal during the data writing period H2. The light-emitting switch 111 is used to be triggered by the light-emitting signal to conduct in the light-emitting period H3 to output the current signal. The switch circuit 120 includes a first switch group and a second switch group connected in parallel between the positive power supply terminal VDD and the light-emitting unit 20, the first switch group includes a first switch 121 and a second switch 122 connected in series, the second switch group includes a third switch 123 and a fourth switch 124 connected in series, the connection node of the first switch 121 and the second switch 122 is connected to the first end of the light-emitting driving unit 110, and the connection node of the third switch 123 and the fourth switch 124 is connected to the second end of the light-emitting driving unit 110; the first switch 121 and the fourth switch 124 are turned on by a first level signal and turned off by a second level signal; the second switch 122 and the third switch 123 are turned off by a first level signal and turned on by a second level signal, and the polarities of the first level signal and the second level signal are opposite; The data switch 130 is connected to the driving tube SD1 and is used to be turned on by the first scanning signal Scan1 during the data writing period H2 to transmit the data signal Vdata; The flipping circuit 140 is connected to each switch of the switching circuit 120. The flipping circuit 140 is used to output a first level signal or a second level signal, and switch the level polarity of the output signal SW each time a second scanning signal Scan2 and a third scanning signal Scan3 are received. The second scanning signal Scan2, the first scanning signal Scan1 and the third scanning signal Scan3 are output sequentially with a unit phase difference in each frame scanning cycle.

[0023] In this embodiment, for each pixel circuit, when it is selected to work in each frame, Figure 2 As shown, the light-emitting unit driving circuit 10 can work in the reset period H1, the data writing period H2 and the light-emitting period H3 in sequence, wherein the second scanning signal Scan2, the first scanning signal Scan1 and the third scanning signal Scan3 are respectively input in the reset period H1, the data writing period H2 and the light-emitting period H3, and each scanning signal differs by a unit phase in sequence. In the reset period H1 of the i-th frame, after the light-emitting unit driving circuit 10 receives the second scanning signal Scan2, it triggers reset and resets and clears the charge of the corresponding internal nodes and circuits to avoid the residual charge of the circuit in the previous frame affecting the display effect of the current frame.

[0024] In the data writing period H2 of the i-th frame, the data signal Vdata is written to the data switch 130. At the same time, the data switch 130 of the light-emitting unit driving circuit 10 of the current row receives the first scanning signal Scan1 corresponding to the input of the current row. The first scanning signal Scan1 triggers the data switch 130 to turn on and write into the driving tube SD1. The driving tube SD1 generates a current signal based on the data signal Vdata.

[0025] In the light-emitting period H3 of the i-th frame, the flip circuit 140 receives a second scanning signal Scan2 and a third scanning signal Scan3. The flip circuit 140 can output a first level signal or a second level signal. In the light-emitting period H3 of the next frame, the flip circuit 140 switches the polarity of the level signal after receiving another second scanning signal Scan2 and another third scanning signal Scan3. Assuming that in the light-emitting period H3 of the current frame, the output signal SW of the flip circuit 140 is a first level signal, at this time, the first switch 121 and the fourth switch 124 are triggered to turn on, and the second switch 122 and the third switch 123 are triggered to turn off. At the same time, the light emission switch 111 receives the light emission signal, the light emission switch 111 is turned on, the positive power supply terminal VDD, the first switch 121, the driving tube SD1, the light emission switch 111 and the fourth switch 124 constitute a first output circuit in the first direction, and the current signal is output to the light-emitting unit 20 via the first switch 121, the driving tube SD1, the light emission switch 111 and the fourth switch 124. The light-emitting unit 20 generates a light signal of corresponding magnitude based on the current signal.

[0026] In the reset period H1 of the i+1th frame, the light emitting unit driving circuit 10 triggers reset after receiving the second scan signal Scan2 in the i-th frame and resets and clears the charges of the internal corresponding nodes and circuits to prevent the residual charge of the circuit in the previous frame from affecting the display effect of the current frame.

[0027] In the data writing period H2 of the i+1th frame, the data signal Vdata of the i+1th frame is refreshed and written into the data switch 130. At the same time, the data switch 130 of the light-emitting unit driving circuit 10 of the current row receives the first scanning signal Scan1 corresponding to the input of the current row. The first scanning signal Scan1 triggers the data switch 130 to turn on and write into the driving tube SD1. The driving tube SD1 generates a current signal based on the data signal Vdata.

[0028] In the light-emitting period H3 of the i+1th frame, the flip circuit 140 receives another second scanning signal Scan2 and another third scanning signal Scan3, and the flip circuit 140 switches to output a second level signal. At this time, the second switch 122 and the third switch 123 are triggered to turn on, and the first switch 121 and the fourth switch 124 are triggered to turn off. At the same time, the light emission switch 111 receives the light emission signal, and the light emission switch 111 is turned on. The positive power supply terminal VDD, the third switch 123, the light emission switch 111, the driving tube SD1 and the second switch 122 constitute a second output circuit in the second direction. The second direction is opposite to the first direction. The current signal is output to the light-emitting unit 20 via the third switch 123, the light emission switch 111, the driving tube SD1 and the second switch 122. The light-emitting unit 20 generates a light signal of corresponding size based on the current signal.

[0029] By analogy, in the light-emitting period H3 of the i+2th frame, the flip circuit 140 will switch to output the first level signal again, and the first output circuit of the first direction will be generated in the light-emitting unit driving circuit 10, and the voltage direction and the current direction applied to the two ends of the driving tube SD1 will be switched again. In the light-emitting period H3 of the i+3th frame, the flip circuit 140 will switch to output the second level signal again, and the second output circuit of the second direction will be generated in the light-emitting unit driving circuit 10, and the voltage direction and the current direction applied to the two ends of the driving tube SD1 will be switched again. When each frame is scanned, the light-emitting unit driving circuit 10 will generate a voltage and current opposite to that of the previous frame and apply them to the driving tube SD1, thereby avoiding polarization and abnormal accumulation of carriers caused by the driving tube SD1 receiving a voltage and current in a single direction, improving the working performance of the driving tube SD1 and ensuring the display effect of the pixel unit and the display device.

[0030] The first level signal may be a high level signal, and the second level signal may be a low level signal, or the first level signal may be a low level signal, and the second level signal may be a high level signal, which may be selected according to the types of switches in the switch circuit 120 .

[0031] The first scan signal Scan1, the second scan signal Scan2 and the third scan signal Scan3 can be effective in a high level state or a low level state, wherein effective means that the corresponding switch can be controlled to be turned on in a high level state or a low level state, and the corresponding switch can be controlled to be turned off in another level state, for example Figure 2 As shown, each scan signal is valid in a low level state. In the reset period H1, the second scan signal Scan2 is in a low level state, and the other two scan signals are in a high level. The second scan signal Scan2 can control the corresponding switch in the light-emitting unit driving circuit 10 to turn on and reset the corresponding node in the light-emitting unit driving circuit 10. In the data writing period H2, the first scan signal Scan1 is in a low level state, and the second scan signal Scan2 can control the data switch 130 to turn on and write the data signal Vdata to the driving tube SD1. In the light-emitting period H3, the third scan signal Scan3 is in a low level state, and the third scan signal Scan3 and the second scan signal Scan2 can control the flip circuit 140 to switch the level state of its own output signal SW.

[0032] Corresponding to the level effective state of each scanning signal, each switch can adopt a corresponding type of transistor, switching device, etc.

[0033] Furthermore, in order to ensure the stability of the data signal Vdata during the data writing period H2, in an optional embodiment, Figure 3 As shown, the light-emitting unit driving circuit 10 also includes a storage capacitor Cst, which is connected between the positive power supply terminal VDD and the control terminal of the driving tube SD1. In the data writing period H2, the data switch 130 is turned on and the data signal Vdata is written into the driving tube SD1. At the same time, the data signal Vdata charges the storage capacitor Cst, and the storage capacitor Cst maintains the voltage of the data signal Vdata.

[0034] And in order to achieve charge reset of the light emitting unit driving circuit 10, in an optional embodiment, as Figure 3 As shown, the light-emitting unit driving circuit 10 also includes a first reset transistor Trst1, a first end of the first reset transistor Trst1 is used to input a first reset signal Vint, a second end of the first reset transistor Trst1 is connected to the control end of the driving tube SD1, and the control end of the first reset transistor Trst1 is used to input a second scan signal Scan2 in the reset period H1.

[0035] The light-emitting unit driving circuit 10 also includes a second reset transistor Trst2, a first end of the second reset transistor Trst2 is used to input a second reset signal VI, a second end of the second reset transistor Trst2 is connected to the light-emitting unit 20, and a control end of the second reset transistor Trst2 is used to input a first scan signal Scan1 during a data writing period H2.

[0036] In this embodiment, the first reset transistor Trst1 receives the second scan signal Scan2 during the reset period H1, and the second scan signal Scan2 triggers the first reset transistor Trst1 to turn on. The reset signal is written to the control end of the driving tube SD1, and the control end of the driving tube SD1 is initialized and reset. At the same time, the storage capacitor Cst is charged to ensure that the driving tube SD1 is turned on and completes sampling in the subsequent data writing stage.

[0037] The second reset transistor Trst2 receives the first scan signal Scan1 during the data writing period H2, and the first scan signal Scan1 triggers the second reset transistor Trst2 to turn on, and the second reset signal VI is written into the light emitting unit 20 to reset the light emitting unit 20.

[0038] Embodiment 2 like Figure 3 As shown, in an optional embodiment, the optical emission switch 111 includes a first transistor T1 and a second transistor T2; The first end of the first transistor T1 constitutes the first end of the light-emitting driving unit 110 , the second end of the first transistor T1 is connected to the first end of the driving tube SD1 , the first end of the second transistor T2 is connected to the second end of the driving tube SD1 , and the second end of the second transistor T2 constitutes the second end of the light-emitting driving unit 110 .

[0039] The first switch 121 includes a third transistor T3, a first end of the third transistor T3 is connected to the positive power supply terminal VDD, a second end of the third transistor T3 is connected to the first end of the first transistor T1, and a control end of the third transistor T3 is connected to the output end of the flip circuit 140; The second switch 122 includes a fourth transistor T4, a first end of the fourth transistor T4 is connected to the first end of the first transistor T1, a second end of the fourth transistor T4 is connected to the light emitting unit 20, and a control end of the fourth transistor T4 is connected to the output end of the flip circuit 140; The third switch 123 includes a fifth transistor T5, a first end of the fifth transistor T5 is connected to the positive power supply terminal VDD, a second end of the fifth transistor T5 is connected to the second end of the second transistor T2, and a control end of the fifth transistor T5 is connected to the output end of the flip circuit 140; The fourth switch 124 includes a sixth transistor T6 , a first end of the sixth transistor T6 is connected to the second end of the second transistor T2 , a second end of the sixth transistor T6 is connected to the light emitting unit 20 , and a control end of the sixth transistor T6 is connected to the output end of the flip circuit 140 .

[0040] The data switch 130 includes a seventh transistor T7 and an eighth transistor T8; A first end of the seventh transistor T7 is connected to the control end of the driving tube SD1, a second end of the seventh transistor T7 is connected to the second end of the driving tube SD1, a first end of the eighth transistor T8 is used to input the data signal Vdata, a second end of the eighth transistor T8 is connected to the first end of the driving tube SD1, and a control end of the seventh transistor T7 and a control end of the eighth transistor T8 are used to input the first scan signal Scan1.

[0041] In this embodiment, the first scan signal Scan1, the second scan signal Scan2, the third scan signal Scan3 and the light emission signal EM can be low-level valid, and correspondingly, the third transistor T3 and the sixth transistor T6 can be N-channel transistors, and the remaining transistors can correspond to P-channel thin film transistors, or the first scan signal Scan1, the second scan signal Scan2, the third scan signal Scan3 and the light emission signal EM can be high-level valid, and correspondingly, the third transistor T3 and the sixth transistor T6 can be P-channel transistors, and the remaining transistors can correspond to N-channel thin film transistors.

[0042] like Figure 2 and Figure 3 As shown, taking the first scanning signal Scan1, the second scanning signal Scan2, the third scanning signal Scan3 and the light emission signal EM as being valid at a low level as an example, in the reset period H1 of the i-th frame, the second scanning signal Scan2 triggers the first reset transistor Trst1 to turn on, the reset signal is written into the driving tube SD1, and the charge of the driving tube SD1 is reset and cleared to zero, so as to avoid the residual charge of the circuit in the previous frame affecting the display effect of the current frame.

[0043] In the data writing period H2 of the i-th frame, the data signal Vdata is written to the data switch 130. At the same time, the data switch 130 of the light-emitting unit driving circuit 10 of the current row receives the first scanning signal Scan1 corresponding to the input of the current row, and the seventh transistor T7 and the eighth transistor T8 are triggered to turn on. The data signal Vdata is stored in the storage capacitor Cst through the driving tube SD1, and the threshold voltage of the driving tube SD1 is sampled. The driving tube SD1 generates a current signal based on the data signal Vdata. At the same time, the second reset transistor Trst2 is triggered to turn on after receiving the first scanning signal Scan1 and resets the light-emitting unit 20.

[0044] In the light-emitting period H3 of the i-th frame, the flip circuit 140 receives a second scanning signal Scan2 and a third scanning signal Scan3, and the flip circuit 140 can output a first level signal or a second level signal. Assuming that in the light-emitting period H3 of the current frame, the flip circuit 140 outputs a first level signal, at this time, the third transistor T3 and the sixth transistor T6 are triggered to turn on, and the fourth transistor T4 and the fifth transistor T5 are triggered to turn off. At the same time, the first transistor T1 and the second transistor T2 receive the light emission signal, and the first transistor T1 and the second transistor T2 are turned on. The positive power supply terminal VDD, the third transistor T3, the first transistor T1, the driving tube SD1, the second transistor T2 and the sixth transistor T6 constitute a first output circuit in a first direction. The current signal is output to the light-emitting unit 20 via the third transistor T3, the first transistor T1, the driving tube SD1, the second transistor T2 and the sixth transistor T6, and the light-emitting unit 20 generates a light signal of corresponding size based on the current signal.

[0045] In the reset period H1 of the i+1th frame, the first reset transistor Trst1 triggers reset after receiving the second scan signal Scan2 in the i-th frame and resets the charge of the driving transistor SD1 to zero, so as to prevent the residual charge of the circuit in the previous frame from affecting the display effect of the current frame.

[0046] In the data writing period H2 of the i+1th frame, the data signal Vdata of the i+1th frame is refreshed and written to the data switch 130. At the same time, the data switch 130 of the light-emitting unit driving circuit 10 of the current row receives the first scanning signal Scan1 corresponding to the input of the current row, and the seventh transistor T7 and the eighth transistor T8 are triggered to turn on. The data signal Vdata is stored in the storage capacitor Cst through the driving tube SD1, and the threshold voltage of the driving tube SD1 is sampled. The driving tube SD1 generates a current signal based on the data signal Vdata. At the same time, the second reset transistor Trst2 is triggered to turn on after receiving the first scanning signal Scan1 and resets the light-emitting unit 20.

[0047] In the light-emitting period H3 of the i+1th frame, the flip circuit 140 receives another second scanning signal Scan2 and another third scanning signal Scan3, and the flip circuit 140 can switch to output a second level signal. At this time, the fourth transistor T4 and the fifth transistor T5 are triggered to turn on, and the third transistor T3 and the sixth transistor T6 are triggered to turn off. At the same time, the light emission switch 111 receives the light emission signal, the light emission switch 111 is turned on, the positive power supply terminal VDD, the fifth transistor T5, the second transistor T2, the driving tube SD1, the first transistor T1 and the fourth transistor T4 constitute a second output circuit in the second direction, and the second direction is opposite to the first direction. The current signal is output to the light-emitting unit 20 through the fifth transistor T5, the second transistor T2, the driving tube SD1, the first transistor T1 and the fourth transistor T4, and the light-emitting unit 20 generates a light signal of corresponding size based on the current signal.

[0048] By analogy, during each frame scan, the light-emitting unit driving circuit 10 will generate a voltage and current opposite to that of the previous frame and apply them to the driving tube SD1, thereby preventing the driving tube SD1 from receiving a voltage and current in a single direction, causing polarization and abnormal accumulation of carriers, thereby improving the working performance of the driving tube SD1 and ensuring the display effect of the pixel unit and the display device.

[0049] Embodiment 3 like Figure 4 As shown, in an optional embodiment, the flip circuit 140 includes a first resistor R1, a second resistor R2, a third resistor R3, a ninth transistor T9, a tenth transistor T10, an eleventh transistor T11, a twelfth transistor T12, a thirteenth transistor T13, a fourteenth transistor T14, a fifteenth transistor T15, a sixteenth transistor T16, a seventeenth transistor T17, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a first diode D1 and a second diode D2; A first end of the first resistor R1 and a first end of the second resistor R2 are connected in common and are used to input a first row start signal VGH1 during a reset period H1. A second end of the first resistor R1, a cathode of the first diode D1 and a first end of a ninth transistor T9 are connected. A control end of the ninth transistor T9 is used to input a second scan signal Scan2. A second end of the second resistor R2, an anode of the first diode D1, an anode of the second diode D2 and a first end of the tenth transistor T10 are connected. A cathode of the second diode D2, a first end of the first capacitor C1, a first end of the third resistor R3 and a first end of the eleventh transistor T11 are connected. A second end of the ninth transistor T9, a second end of the first capacitor C1 and a second end of the third resistor R3 are grounded. A second end of the tenth transistor T10, a control end of the twelfth transistor T12 and a control end of the thirteenth transistor T13 are connected. A first end of the twelfth transistor T12 is used to input a second row start signal VGH2. A first end of the thirteenth transistor T13 is used to input a row close signal VGL. 2, the second end of the thirteenth transistor T13, the first end of the fourteenth transistor T14, the second end of the fifteenth transistor T15 and the first end of the third capacitor C3 are connected, the control end of the tenth transistor T10, the control end of the eleventh transistor T11, the control end of the fourteenth transistor T14 and the control end of the fifteenth transistor T15 are connected and used to input the third scan signal Scan3, the second end of the fourteenth transistor T14 is connected to the first end of the second capacitor C2, the second end of the fifteenth transistor T15, the control end of the sixteenth transistor T16 and the control end of the seventeenth transistor T17 are connected, the first end of the sixteenth transistor T16 is used to input the row-off signal VGL, the first end of the seventeenth transistor T17 is used to input the second row-on signal VGH2, the second end of the sixteenth transistor T16, the second end of the seventeenth transistor T17 and the first end of the fourth capacitor C4 are connected together to form the output end of the flip circuit 140, and the second end of the second capacitor C2, the second end of the third capacitor C3 and the second end of the fourth capacitor C4 are grounded.

[0050] In this embodiment, the first end of the first capacitor C1 is defined as the first node Q, the first end of the fifteenth transistor T15 is defined as the second node A, the first row start signal VGH1 and the second row start signal VGH2 are high level, and the row close signal VGL is low level.

[0051] The first row start signal outputs a high level during the reset period and is suspended during the remaining periods.

[0052] The ninth transistor T9, the tenth transistor T10, the thirteenth transistor T13, the fourteenth transistor T14, and the seventeenth transistor T17 are transistors of the same type, and the remaining transistors in the flip circuit 140 are transistors of opposite types. For example, assuming that each scan signal is valid at a low level, the ninth transistor T9, the tenth transistor T10, the thirteenth transistor T13, the fourteenth transistor T14, and the seventeenth transistor T17 are N-channel transistors, and the remaining transistors in the flip circuit 140 are P-channel transistors. When each scan signal is valid at a high level, the ninth transistor T9, the tenth transistor T10, the thirteenth transistor T13, the fourteenth transistor T14, and the seventeenth transistor T17 are P-channel transistors, and the remaining transistors in the flip circuit 140 are N-channel transistors.

[0053] Take the low level of each scanning signal as an example. Figure 5 As shown in the waveform on the left, in the reset period H1 of the i-th frame, the first node Q is initially at a low potential. At this time, the second scan signal Scan2 is at a low level, the third scan signal Scan3 is at a high level, the ninth transistor T9 is turned off, the tenth transistor T10 is triggered to turn on, the second diode D2 is turned on, the control ends of the twelfth transistor T12 and the thirteenth transistor T13 receive a low level, the twelfth transistor T12 is triggered to turn on and transmit a high level to the second node A, the fourteenth transistor T14 and the fifteenth transistor T15 receive a high level of the third scan signal Scan3, the fourteenth transistor T14 is triggered to turn on, the fifteenth transistor T15 is triggered to turn off, the second node A is pulled up by the second row start signal VGH2, the second capacitor C2 and the third capacitor C3 are charged to store a high potential, the eleventh transistor T11 is turned off, and the first node Q continues to be maintained at a low potential.

[0054] In the light-emitting period H3 of the i-th frame, the second scan signal Scan2 is at a high potential, and the third scan signal Scan3 is at a low potential. At this time, the tenth transistor T10 and the fourteenth transistor T14 are turned off, the fifteenth transistor T15 and the eleventh transistor T11 are triggered to turn on, the second capacitor C2 charges the first capacitor C1, the potential of the first node Q starts to rise, and the potential of the second node A starts to drop. The third capacitor C3 applies a high potential to the sixteenth transistor T16 and the seventeenth transistor T17, and the seventeenth transistor T17 is turned on. The second row start signal VGH2 charges the fourth capacitor C4 and maintains the output high level to the corresponding switch in the switching circuit 120, thereby switching the voltage and current direction of the driving tube SD1 and driving the light-emitting unit 20 to emit light.

[0055] like Figure 5As shown in the waveform on the right, in the reset period H1 of the i+1 frame, the initial potential of the first node Q is a high potential, in the reset period H1, the second scan signal Scan2 is a low potential, the third scan signal Scan3 is a high potential, the ninth transistor T9 is turned off, the potential of the tenth transistor T10 is pulled low, the tenth transistor T10 is turned on, the twelfth transistor T12 is pulled high by the first row start signal VGH1, the twelfth transistor T12 is turned off, the thirteenth transistor T13 is turned on, the second node A is pulled low by the row close signal VGL, at the same time, the fourteenth transistor T14 is turned on, the fifteenth transistor T15 is turned off, the second capacitor C2 and the third fixed capacitor store a low potential, the eleventh transistor T11 is turned off, and the first node Q maintains a high potential.

[0056] In the light-emitting period H3 of the i+1th frame, the second scanning signal Scan2 is at a high potential, and the third scanning signal Scan3 is at a low potential. At this time, the tenth transistor T10 and the fourteenth transistor T14 are turned off, the fifteenth transistor T15 and the eleventh transistor T11 are triggered to turn on, the second capacitor C2 charges the first capacitor C1, the potential of the first node Q begins to decrease, and the potential of the second node A begins to rise. The third capacitor C3 applies a low potential to the sixteenth transistor T16 and the seventeenth transistor T17, and the sixteenth transistor T16 is turned on. The row close signal VGL charges the fourth capacitor C4, and maintains the output low level to the corresponding switch in the switching circuit 120, and switches the voltage and current direction of the driving tube SD1, and drives the light-emitting unit 20 to emit light.

[0057] The flip circuit 140 takes two frames as a cycle, and switches to output level signals of opposite levels in each cycle. By setting the switch circuit 120 and the flip circuit 140, the voltage direction and current direction of the driving tube SD1 can be switched in sequence with the frame as a cycle, so as to avoid abnormal accumulation of carriers caused by polarization of the driving tube SD1, improve the working performance of the driving tube SD1, and ensure the display effect of the pixel unit and the display device.

[0058] Compared with the prior art, the embodiments of the present invention have the following beneficial effects: the light-emitting unit driving circuit 10 includes a light-emitting driving unit 110, a switch circuit 120, a data switch 130 and a flip circuit 140; the light-emitting driving unit 110 includes a driving tube SD1 and a light-emitting switch 111 connected in series; the switch circuit 120 includes a first switch 121 to a fourth switch 124; the first switch 121, the light-emitting driving unit 110 and the fourth switch 124 constitute a first output circuit; the second switch 122, the light-emitting driving unit 110 and the third switch 123 constitute a second output circuit; the flip circuit 140 switches the output level polarity after receiving the second scanning signal Scan2 and the third scanning signal Scan3 once in each frame, and controls the first output circuit and the second output circuit to be alternately turned on, thereby switching the voltage direction and the current direction of the driving tube SD1, avoiding abnormal accumulation of carriers caused by polarization of the driving tube SD1, improving the working performance of the driving tube SD1 and ensuring the display effect of the pixel unit and the display device.

[0059] Embodiment 4 like Figure 6 As shown, the present invention further proposes a pixel circuit 101, which includes a light-emitting unit 20 and a light-emitting unit driving circuit 10. The specific structure of the light-emitting unit driving circuit 10 refers to the above embodiment. Since the pixel circuit 101 adopts all the technical solutions of all the above embodiments, it at least has all the beneficial effects brought by the technical solutions of the above embodiments, which will not be described one by one here. Among them, the light-emitting unit driving circuit 10 is connected to the light-emitting unit 20.

[0060] The light-emitting unit 20 and the light-emitting unit driving circuit 10 form a single pixel circuit 101, and the pixel circuit 101 is arranged in an array to form a display module. The display module is connected to the data line, the scan line, the corresponding control signal terminal and the power terminal, and displays the corresponding image information under the drive of the data signal Data, the scan signal, multiple control signals and the voltage signal of the power terminal.

[0061] Embodiment 5 like Figure 7 As shown, the present invention further provides a display device, which includes a driving circuit 102 and a pixel circuit 101. The specific structure of the pixel circuit 101 refers to the above embodiment. Since the present display device adopts all the technical solutions of all the above embodiments, it at least has all the beneficial effects brought by the technical solutions of the above embodiments, which will not be described one by one here. Among them, the driving circuit 102 is connected to the pixel circuit 101.

[0062] The display device further includes an array substrate, on which a pixel circuit 101 is arrayed, and a plurality of data lines and scan lines are also provided on the array substrate. Each light-emitting unit driving circuit 10 is connected to a data line and a scan line, and the data line and the scan line are connected to the driving circuit 102. The driving circuit 102 is used to output scanning signals row by row through a plurality of rows of scanning lines and to output data signals Data to each light-emitting unit driving circuit 10 in the pixel circuit 101 through a plurality of columns of data lines when each row is driven. The light-emitting unit driving circuit 10 triggers operation and generates a current signal to the light-emitting unit 20 according to the received scanning signal and data signal Data, and displays corresponding image information.

[0063] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.

Claims

1. A light-emitting unit driving circuit, characterized in that: include: A light-emitting driving unit, comprising a driving tube and a light-emitting switch connected in series, wherein the driving tube is used to convert an input data signal into a current signal during a data writing period, and the light-emitting switch is used to be triggered by the light-emitting signal to conduct during a light-emitting period to output the current signal; A switch circuit, comprising a first switch group and a second switch group connected in parallel between a positive power supply terminal and a light-emitting unit, wherein the first switch group comprises a first switch and a second switch connected in series, and the second switch group comprises a third switch and a fourth switch connected in series, wherein a connection node between the first switch and the second switch is connected to a first end of the light-emitting driving unit, and a connection node between the third switch and the fourth switch is connected to a second end of the light-emitting driving unit; the first switch and the fourth switch are triggered to turn on by a first level signal and to turn off by a second level signal; The second switch and the third switch are turned off by the first level signal and turned on by the second level signal, and the polarities of the first level signal and the second level signal are opposite; A data switch connected to the driving tube and configured to be turned on by the first scanning signal during the data writing period to transmit the data signal; A flip circuit is connected to each switch of the switching circuit, and the flip circuit is used to output the first level signal or the second level signal, and switch the level polarity of the output signal each time a second scanning signal and a third scanning signal are received. The second scanning signal, the first scanning signal and the third scanning signal are output sequentially with a unit phase difference in each frame scanning cycle.

2. The light emitting unit driving circuit according to claim 1, characterized in that: The optical emission switch includes a first transistor and a second transistor; The first end of the first transistor constitutes the first end of the light-emitting driving unit, the second end of the first transistor is connected to the first end of the driving tube, the first end of the second transistor is connected to the second end of the driving tube, and the second end of the second transistor constitutes the second end of the light-emitting driving unit.

3. The light emitting unit driving circuit according to claim 2, characterized in that: The first switch comprises a third transistor, a first end of the third transistor is connected to the positive power supply end, a second end of the third transistor is connected to the first end of the first transistor, and a control end of the third transistor is connected to the output end of the flip circuit; The second switch includes a fourth transistor, a first end of the fourth transistor is connected to the first end of the first transistor, a second end of the fourth transistor is connected to the light emitting unit, and a control end of the fourth transistor is connected to the output end of the flip circuit; The third switch comprises a fifth transistor, a first end of the fifth transistor is connected to the positive power supply end, a second end of the fifth transistor is connected to the second end of the second transistor, and a control end of the fifth transistor is connected to the output end of the flip circuit; The fourth switch includes a sixth transistor, a first end of the sixth transistor is connected to the second end of the second transistor, a second end of the sixth transistor is connected to the light emitting unit, and a control end of the sixth transistor is connected to the output end of the flip circuit.

4. The light emitting unit driving circuit according to claim 2, characterized in that: The light emitting unit driving circuit further includes: The storage capacitor is connected between the positive power supply terminal and the control terminal of the driving tube.

5. The light emitting unit driving circuit according to claim 4, characterized in that: The data switch includes a seventh transistor and an eighth transistor; The first end of the seventh transistor is connected to the control end of the driving tube, the second end of the seventh transistor is connected to the second end of the driving tube, the first end of the eighth transistor is used to input the data signal, the second end of the eighth transistor is connected to the first end of the driving tube, and the control end of the seventh transistor and the control end of the eighth transistor are used to input the first scanning signal.

6. The light emitting unit driving circuit according to any one of claims 2 to 5, characterized in that: The light-emitting unit driving circuit also includes a first reset transistor, a first end of the first reset transistor is used to input a first reset signal, a second end of the first reset transistor is connected to the control end of the driving tube, and the control end of the first reset transistor is used to input the second scanning signal during the reset period.

7. The light emitting unit driving circuit according to claim 6, characterized in that: The light-emitting unit driving circuit also includes a second reset transistor, a first end of the second reset transistor is used to input a second reset signal, a second end of the second reset transistor is connected to the light-emitting unit, and a control end of the second reset transistor is used to input the first scanning signal during the data writing period.

8. The light emitting unit driving circuit according to claim 1, characterized in that: The flip circuit includes a first resistor, a second resistor, a third resistor, a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, a seventeenth transistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first diode and a second diode; The first end of the first resistor and the first end of the second resistor are connected in common and are used to input a first row start signal during a reset period. The second end of the first resistor, the cathode of the first diode and the first end of the ninth transistor are connected. The control end of the ninth transistor is used to input the second scan signal. The second end of the second resistor, the anode of the first diode, the anode of the second diode and the first end of the tenth transistor are connected. The cathode of the second diode, the first end of the first capacitor, the first end of the third resistor and the first end of the eleventh transistor are connected. The second end of the ninth transistor, the second end of the first capacitor and the second end of the third resistor are grounded. The second end of the tenth transistor, the control end of the twelfth transistor and the control end of the thirteenth transistor are connected. The first end of the twelfth transistor is used to input a second row start signal. The first end of the thirteenth transistor is used to input a row close signal. The second end of the thirteenth transistor, the first end of the fourteenth transistor, the second end of the fifteenth transistor and the first end of the third capacitor are connected, the control end of the tenth transistor, the control end of the eleventh transistor, the control end of the fourteenth transistor and the control end of the fifteenth transistor are connected and used to input the third scanning signal, the second end of the fourteenth transistor is connected to the first end of the second capacitor, the second end of the fifteenth transistor, the control end of the sixteenth transistor and the control end of the seventeenth transistor are connected, the first end of the sixteenth transistor is used to input the row closing signal, the first end of the seventeenth transistor is used to input the second row opening signal, the second end of the sixteenth transistor, the second end of the seventeenth transistor and the first end of the fourth capacitor are connected together to form the output end of the flipping circuit, and the second end of the second capacitor, the second end of the third capacitor and the second end of the fourth capacitor are grounded.

9. A pixel circuit, characterized in that: It comprises a light-emitting unit and a light-emitting unit driving circuit as claimed in any one of claims 1 to 8, wherein the light-emitting unit driving circuit is connected to the light-emitting unit.

10. A display device, characterized in that: The invention comprises a driving circuit and the pixel circuit as claimed in claim 9, wherein the driving circuit is connected to the pixel circuit.

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