Solar cell, preparation method thereof and photovoltaic module

Abstract

The invention discloses a solar cell, a preparation method thereof and a photovoltaic module, and relates to the field of photovoltaic technology. The solar cell comprises a silicon substrate and a film layer structure arranged on the surface of the silicon substrate, at least part of the surface, covered by the film layer structure, of the silicon substrate is provided with a plurality of microstructure units, and at least part of each microstructure unit comprises at least two substructures. The plurality of microstructure units can form a surface with a certain fluctuation, so that the combination area of the film layer structure and the silicon substrate is increased, and the contact resistivity of the film layer structure is reduced. Due to the existence of the substructures, the surface of a single microstructure unit has higher roughness, so that the contact area with the film layer structure can be further increased, the contact resistivity is reduced, and meanwhile, the passivation performance of the film layer can also be improved. The preparation method of the solar cell provided by the invention is used for preparing the solar cell.

Description

Technical Field

[0001] The present application relates to the field of photovoltaic technology, and in particular to a solar cell and a preparation method thereof, and a photovoltaic module. Background Art

[0002] Generally, a solar cell includes a silicon substrate and a film structure disposed on the silicon substrate. The film structure is used to realize carrier transmission. The bonding quality of the film structure with the surface of the silicon substrate and the quality of the film will affect the performance of the solar cell. For example, the p-type doped layer and the n-type doped layer are connected to the back of the silicon substrate through a dielectric layer (such as an oxide dielectric layer). The contact resistivity between the dielectric layer and the silicon substrate will affect the photoelectric conversion efficiency of the cell. The passivation layer is directly attached to the surface of the silicon substrate or covers the outside of the doped layer. The quality of the passivation layer will affect the passivation performance, thereby affecting the efficiency of the cell. Summary of the invention

[0003] The present application provides a solar cell and a preparation method thereof, and a photovoltaic module. The solar cell and the solar cell prepared by the preparation method have better photoelectric conversion efficiency.

[0004] The embodiments of the present application can be implemented as follows: In a first aspect, the present application provides a solar cell comprising a silicon substrate and a film layer structure disposed on a surface of the silicon substrate, wherein at least a portion of the surface of the silicon substrate covered by the film layer structure has a plurality of microstructure units, and at least a portion of the microstructure units comprises at least two substructures, and a junction of at least two substructures is presented on a top surface of the microstructure unit.

[0005] In an optional embodiment, the projection figure of the microstructure unit on the preset plane is a polygon or a quasi-polygon, and the maximum side size of the projection figure of the microstructure unit on the preset plane is 10-100 μm, wherein the preset plane is parallel to the silicon substrate.

[0006] In an optional implementation, the projection figure of the substructure on the preset plane is a polygon or a quasi-polygon, and the maximum side size of the projection figure of the substructure on the preset plane is 1-100 μm.

[0007] In an optional embodiment, the microstructure unit includes 2 to 30 substructures.

[0008] In an optional embodiment, in a microstructure unit, a plurality of substructures are arranged along a straight line, or a plurality of substructures are arranged randomly, or a plurality of substructures are arranged circumferentially to form a cluster.

[0009] In an optional embodiment, at least some of the microstructure units are adjacent to each other on a preset plane, and / or at least some of the microstructure units partially overlap in a thickness direction of the substrate; wherein the preset plane is parallel to the silicon substrate.

[0010] In an alternative embodiment, the silicon substrate is single crystal silicon.

[0011] In an optional embodiment, the solar cell is a back contact cell or a TOPCon cell, the film layer structure includes a p-type doped layer and an n-type doped layer, and the solar cell includes a first electrode connected to the p-type doped layer and a second electrode connected to the n-type doped layer.

[0012] In an optional embodiment, the solar cell is a back-contact cell, the silicon substrate has a light-facing side and a back side opposite to each other in the thickness direction thereof, the surface of the back side includes a first surface and a second surface, and the first surface and the second surface are separated by a groove; The film layer structure also includes a p-type doped layer, an n-type doped layer, a first dielectric layer and a second dielectric layer. The first dielectric layer and the p-type doped layer are sequentially stacked on the first surface, and the second dielectric layer and the n-type doped layer are sequentially stacked on the second surface. A microstructure unit including a substructure is formed on the second surface.

[0013] In an optional embodiment, a first passivation layer is disposed on the light-facing side of the silicon substrate, and a second passivation layer is disposed on the bottom of the trench, the side of the p-type doped layer facing away from the silicon substrate, and the side of the n-type doped layer facing away from the silicon substrate.

[0014] In an optional embodiment, the material of the first passivation layer and the second passivation layer is selected from AlO x 、SiO x 、SiN x 、SiO x N y At least one of .

[0015] In an optional embodiment, the solar cell is a TOPCon cell, the silicon substrate has a light-facing side and a back side opposite to each other in the thickness direction, the film layer structure includes a p-type doped layer, an n-type doped layer and a dielectric layer, the p-type doped layer is arranged on the light-facing side, the surface of the back side includes a metallized area and a non-metallized area, and the dielectric layer and the n-type doped layer are sequentially stacked on the metallized area on the back side.

[0016] In an optional embodiment, a first passivation layer is provided on the side of the p-type doped layer facing away from the silicon substrate, and a second passivation layer is provided on the non-metallized area on the back side and on the side of the n-type doped layer facing away from the silicon substrate.

[0017] In an optional embodiment, the material of the first passivation layer and the second passivation layer is selected from AlO x 、SiOx 、SiN x 、SiO x N y At least one of .

[0018] In an optional embodiment, the n-type doped layer and the p-type doped layer are polysilicon.

[0019] In a second aspect, the present application provides a method for preparing a solar cell, comprising: Polishing the surface of the silicon substrate by wet etching to form a microstructure unit; A film layer structure is deposited on a silicon substrate. Before or during the deposition of the film layer structure, a laser is used to irradiate at least a portion of the surface of the silicon substrate so as to form at least two substructures in at least a portion of the microstructure unit. After the film layer structure is completed, the microstructure unit including the substructure is covered.

[0020] In an optional embodiment, the silicon substrate has a light-facing side and a back side opposite to each other in the thickness direction thereof, and a film layer structure is deposited on the silicon substrate. Before or during the deposition of the film layer structure, a step of irradiating at least a portion of the surface of the silicon substrate with a laser to form at least two substructures in at least a portion of the microstructure unit includes: Depositing a first dielectric layer and a p-type doping layer in sequence on the back side of the silicon substrate; Using a first laser to remove a portion of the first dielectric layer and the p-type doping layer to expose the silicon substrate; irradiating the exposed surface of the back side of the silicon substrate with a second laser so as to form at least two substructures in the microstructure unit on the exposed surface of the silicon substrate; Depositing a second dielectric layer and an n-type doping layer in sequence on the exposed surface of the silicon substrate; Using a third laser to etch and form a trench to separate the p-type doped layer from the n-type doped layer, wherein the bottom of the trench extends to the silicon substrate; A first passivation layer is deposited on the light-facing side of the silicon substrate, and a second passivation layer is deposited on the n-type doped layer, the p-type doped layer and the bottom of the trench.

[0021] In an optional embodiment, the silicon substrate has a light-facing side and a back side opposite to each other in the thickness direction thereof, and a film layer structure is deposited on the silicon substrate. Before or during the deposition of the film layer structure, a step of irradiating at least a portion of the surface of the silicon substrate with a laser to form at least two substructures in at least a portion of the microstructure unit includes: Depositing a p-type doped layer on the light-facing side of the silicon substrate; Depositing a dielectric layer and an n-type doping layer in sequence on the back side of the silicon substrate; Using a first laser to remove a portion of the dielectric layer and the n-type doping layer to expose a non-metallized area of ​​the silicon substrate; irradiating the surface of the non-metallized region with a second laser so as to form at least two substructures in the microstructure unit on the surface of the non-metallized region; A first passivation layer is deposited on the side of the p-type doped layer facing away from the silicon substrate, and a second passivation layer is deposited on the non-metallized region and the side of the n-type doped layer facing away from the silicon substrate.

[0022] In an optional embodiment, the first laser is a nanosecond, picosecond or femtosecond laser with a wavelength of 200 to 1300 nm, and the energy density of the first laser is 100 to 600 mJ / cm 2 ; The second laser is an ultraviolet picosecond or femtosecond laser, and the energy density of the second laser is 20~100 mJ / cm 2 .

[0023] In an optional embodiment, the method for preparing a solar cell further includes: A first electrode connected to the p-type doped layer and a second electrode connected to the n-type doped layer are manufactured.

[0024] In an optional embodiment, the method for preparing a solar cell further includes: A textured surface is formed on the light-facing side of the silicon substrate.

[0025] The solar cell and the method for preparing the same provided by the embodiments of the present application have the following beneficial effects: The solar cell provided by the embodiment of the present application includes a silicon substrate and a film layer structure arranged on the surface of the silicon substrate, and at least part of the surface of the silicon substrate covered by the film layer structure has a plurality of microstructure units, and at least part of the single microstructure unit includes at least two substructures. Several microstructure units can form a surface with certain undulations, increase the bonding area between the film layer structure and the silicon substrate, and reduce the contact resistivity of the film layer structure. Further, the microstructure unit includes at least two substructures, so that the surface of a single microstructure unit has a greater roughness, so that the contact area with the film layer structure can be further increased, the contact resistivity can be reduced, and the passivation performance of the film layer can also be improved. The presence of the substructure further increases the surface area of ​​the silicon substrate, and can also increase the effective reflectivity of the incident light, so that the light is effectively scattered and absorbed inside the battery, and the probability of collecting photogenerated carriers is increased, thereby increasing the short-circuit current density. Therefore, it can be seen that the embodiment of the present application optimizes multiple aspects of the solar cell by improving the surface morphology of the silicon substrate, thereby improving the photoelectric conversion efficiency.

[0026] The method for preparing a solar cell provided in an embodiment of the present application includes using a laser to form a substructure in a microstructure unit, thereby improving the photoelectric conversion efficiency of the solar cell.

[0027] The photovoltaic module provided in the embodiment of the present application includes the above-mentioned solar cell or the solar cell manufactured by the above-mentioned manufacturing method, and the photovoltaic module has a high photoelectric conversion efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0029] Figure 1 A schematic diagram of a solar cell in the first embodiment of the present application; Figure 2 A microscopic image of the surface of a silicon substrate in an embodiment of the present application; Figure 3 It is a microscopic image of a microstructure unit in an embodiment of the present application; Figure 4 Schematic diagram of a microstructure unit and its substructures in an embodiment of the present application; Figure 5 A schematic diagram of a first test structure provided in this application; Figure 6 is a graph comparing the i-Voc performance when a silicon substrate containing a substructure and a silicon substrate without a substructure are applied to a first test structure; Figure 7 A schematic diagram of a second test structure provided in the present application; Figure 8 is a performance comparison diagram of a silicon substrate containing a substructure and a silicon substrate without a substructure when applied to a second test structure; Fig. 9 A schematic diagram of a third test structure provided for this application; Fig.10 is a performance comparison diagram of a silicon substrate containing a substructure and a silicon substrate without a substructure when applied to a third test structure; Fig.11 A schematic diagram of a solar cell in a second embodiment of the present application; Fig.12 This is a flow chart of a method for preparing a solar cell in one embodiment of the present application; Fig.13 This is a schematic diagram of a first dielectric layer and a p-type doping layer formed on a silicon substrate in one embodiment of the present application; Fig.14 This is a schematic diagram of an embodiment of the present application after a portion of the first dielectric layer and the p-type doping layer are removed; Fig.15This is a schematic diagram after manufacturing the second dielectric layer and the n-type doping layer in one embodiment of the present application; Fig.16 This is a schematic diagram of a groove formed by using a third laser etching in an embodiment of the present application; Fig.17 This is a schematic diagram of preparing a first passivation layer and a second passivation layer in an embodiment of the present application.

[0030] Icon: 100 - silicon substrate; 101 - first surface; 102 - second surface; 103 - groove; 200 - dielectric layer; 210 - first dielectric layer; 220 - second dielectric layer; 300 - p-type doped layer; 400 - n-type doped layer; 500 - passivation layer; 510 - first passivation layer; 520 - second passivation layer; 600 - electrode; 610 - first electrode; 620 - second electrode. DETAILED DESCRIPTION

[0031] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0032] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for protection, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present application.

[0033] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0034] In the description of the present application, it should be noted that if the terms "upper", "lower", "inside", "outside", etc. appear to indicate an orientation or position relationship, it is based on the orientation or position relationship shown in the drawings, or is the orientation or position relationship in which the product of the invention is usually placed when used. It is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0035] In addition, the terms “first”, “second”, etc., if used, are merely used to distinguish between the descriptions and should not be understood as indicating or implying relative importance.

[0036] It should be noted that, in the absence of conflict, the features in the embodiments of the present application may be combined with each other.

[0037] As mentioned above, the solar cells in the related art still have problems such as high contact resistivity between the film layer structure and the silicon substrate 100 and poor passivation performance. The generation of these problems is related to the surface morphology of the silicon substrate 100. To this end, the embodiment of the present application provides a solar cell and a preparation method thereof, which optimizes the performance of the film layer structure in contact with the silicon substrate 100 by forming a microstructure unit containing a substructure on the silicon substrate 100, thereby improving the photoelectric conversion efficiency of the solar cell.

[0038] Figure 1 FIG. 1 is a schematic diagram of a solar cell in the first embodiment of the present application. Figure 1 As shown, the solar cell provided in this embodiment is a back contact solar cell, namely a BC cell. The solar cell comprises a silicon substrate 100, a film structure disposed on the surface of the silicon substrate 100, and an electrode 600 connected to the film structure. In this embodiment, the silicon substrate 100 has a light-facing side and a back side opposite to each other in its thickness direction. Figure 1 In the embodiment, the light-facing side is the side of the silicon substrate 100 facing upward, and the back side is the side of the silicon substrate 100 facing downward. The film layer structure includes a p-type doping layer 300, an n-type doping layer 400, a first dielectric layer 210, a second dielectric layer 220, a first passivation layer 510, and a second passivation layer 520. The first passivation layer 510 is disposed on the light-facing side of the silicon substrate 100. The first dielectric layer 210 and the p-type doping layer 300 are sequentially stacked on the first surface 101, and the first dielectric layer 210 is located between the first surface 101 and the p-type doping layer 300; the second dielectric layer 220 and the n-type doping layer 400 are sequentially stacked on the second surface 102, and the second dielectric layer 220 is located between the second surface 102 and the n-type doping layer 400. The second passivation layer 520 is disposed on the side of the p-type doping layer 300 facing away from the silicon substrate 100 and the side of the n-type doping layer 400 facing away from the silicon substrate 100.

[0039] Furthermore, the electrode 600 includes a first electrode 610 and a second electrode 620, wherein the first electrode 610 is connected to the p-type doping layer 300, and the second electrode 620 is connected to the n-type doping layer 400. In this embodiment, the light-facing side of the silicon substrate 100 corresponds to the light-facing side, and the back side corresponds to the back side. The characteristic of the back contact cell is that the electrode 600 is not arranged on the light-facing side, and the electrode 600 is all arranged on the back side, so the entire area of ​​the light-facing side of the solar cell can receive sunlight, which makes it have a higher photoelectric conversion efficiency.

[0040] In the present application, at least part of the surface of the silicon substrate 100 covered by the film structure has a plurality of microstructure units, and at least part of the microstructure units include at least two substructures. In the present application, the back side of the silicon substrate 100 includes an n-type doped region and a p-type doped region, the p-type doped layer 300 covers the p-type doped region, and the n-type doped layer 400 covers the n-type doped region. Among them, the n-type doped region has a microstructure unit including a substructure.

[0041] Further, the junction of at least two substructures is presented on the top surface of the microstructure unit. It should be understood that when the film layer structure contacts the top surface of the microstructure unit containing the substructure along the thickness direction of the silicon substrate 100, it can contact at least two substructures in the same microstructure unit and the junction between them. The junction of two adjacent substructures can form a depression located on the top surface of the microstructure unit. Therefore, due to the presence of the substructure, the side of the microstructure unit in contact with the film layer structure is rougher and has a larger surface area, which is conducive to reducing the contact resistivity of the film layer structure and improving its passivation effect. Optionally, at least part of the single microstructure unit includes 2 to 30 substructures, and further, includes 5 to 15 substructures.

[0042] In this embodiment, the material of the silicon substrate 100 is single crystal silicon; in other embodiments, the material of the silicon substrate 100 may also be polycrystalline silicon, microcrystalline silicon, silicon carbide, etc. Figure 2 A microscopic image of the surface of the silicon substrate 100 in the embodiment of the present application; Figure 3 It is a microscopic image of a microstructure unit in an embodiment of the present application; Figure 4 Schematic diagram of the microstructure unit and the substructures contained therein in the embodiment of the present application. Figures 2 to 4 As shown, the microstructure unit is in the shape of a boss, and its top forms a top surface, which is a plane or a nearly plane (if there are substructures, it has some depressions). The top surface of the microstructure unit is used to contact the membrane layer structure. In the present application, a preset plane is defined for a single microstructure unit, and the preset plane is parallel to the silicon substrate 100 (that is, perpendicular to the thickness direction of the silicon substrate 100), and the microstructure unit is on the preset plane (that is, the preset plane passes through the microstructure unit). The projection figure of the microstructure unit on the preset plane is a polygon or a quasi-polygon, that is, the microstructure unit appears as a polygon or a quasi-polygon at a viewing angle perpendicular to the silicon substrate 100. As Figure 2 As shown in , the microstructure unit is a quadrilateral, specifically a diamond structure; in other embodiments, the microstructure unit may be a triangle, a trapezoid, a pentagon, a hexagon, etc. Optionally, the perimeter of the projection pattern of the microstructure unit on the preset plane is 10-500 μm.

[0043] In this embodiment, at least some of the microstructure units are adjacent to each other on a preset plane, and / or at least some of the microstructure units partially overlap in the thickness direction of the substrate. It should be understood that the microstructure units partially overlap in the thickness direction of the substrate, which means that the upper microstructure unit covers a portion of the top surface of the lower microstructure unit, while another portion of the top surface of the lower microstructure unit is exposed. Figure 2 , wherein some of the microstructure units are partially overlapped. When the microstructure units are partially overlapped, it means that the microstructure units can have a greater distribution density, and the surface of the silicon substrate 100 can have a greater roughness and a larger surface area, thereby improving the bonding effect with the film layer structure.

[0044] In this embodiment, a plurality of microstructure units may be arranged in columns along a preset direction, and the plurality of columns of microstructure units are parallel to each other. Figure 2 The direction of the middle arrow is a preset direction, which is parallel to the silicon substrate 100 .

[0045] In the microstructure unit including the substructure, the projection figure of the substructure on the preset plane is a polygon or a quasi-polygon, and the perimeter of the projection figure of the substructure on the preset plane is 1 to 100 μm. Further, the perimeter of the projection figure of the substructure on the preset plane is 15 to 40 μm. In this embodiment, at least some of the substructures are adjacent to each other on the preset plane, and the junction between the substructures can be presented on the top surface of the microstructure unit. In a microstructure unit, multiple substructures can be arranged along a straight line direction, such as Figure 3 Alternatively, multiple substructures are randomly arranged, such as Figure 4 Alternatively, a plurality of substructures are arranged in a circumferential direction to form a cluster. Alternatively, a portion of the substructures of the microstructure unit may also be arranged in a thickness direction of the silicon substrate 100 .

[0046] The existence of substructures can optimize the performance of solar cells in many aspects, such as improving passivation performance, reducing contact resistivity, and increasing the effective reflectivity of incident light. Figure 5 A schematic diagram of a first test structure provided in this application; Figure 6 1 is a graph comparing the i-Voc performance of a silicon substrate 100 with a substructure and a silicon substrate 100 without a substructure when applied to a first test structure. Figure 5As shown, the first test structure includes a silicon substrate 100 and a dielectric layer 200 and an n-type doping layer 400 disposed on both sides of the silicon substrate 100, and a dielectric layer 200 is disposed between the n-type doping layer 400 and the silicon substrate 100. The silicon substrate 100 is n-type single crystal silicon, the n-type doping layer 400 is polycrystalline silicon, and the dielectric layer 200 is silicon oxide. The surface of the silicon substrate 100 of the embodiment and the comparative example has microstructure units, the difference is that the microstructure unit of the embodiment contains a substructure, while the microstructure unit of the comparative example does not contain a substructure. Figure 6 It can be seen that the substructure is beneficial to the growth of the high-quality oxide dielectric layer 200, which is further beneficial to the passivation effect of the surface of the silicon substrate 100, improves the passivation performance of the solar cell, and improves the open circuit voltage i-Voc of the solar cell.

[0047] Figure 7 A schematic diagram of a second test structure provided in the present application; Figure 8 1 is a performance comparison diagram of a silicon substrate 100 containing a substructure and a silicon substrate 100 without a substructure when applied to a second test structure. Figure 7 As shown, the second test structure includes a silicon substrate 100 and two electrodes 600 arranged on the same side of the silicon substrate 100, and the two electrodes 600 are spaced apart from each other. The two electrodes 600 are connected to the silicon substrate 100 through an n-type doped layer 400 and a dielectric layer 200, respectively. The n-type doped layer 400 is polycrystalline silicon, the dielectric layer 200 is silicon oxide, the silicon substrate 100 is n-type single crystal silicon, and the material of the electrode 600 is silver. The dielectric layer 200 and the n-type doped layer 400 are grown on one side, and the Ag electrode 600 is printed on the top of the n-type doped layer 400, and the contact resistivity of the dielectric layer 200 is tested using the transmission line model (TLM) method. Figure 8 The silicon substrate 100 in the embodiment has a microstructure unit including a substructure, while the microstructure unit on the silicon substrate 100 in the comparative example does not include a substructure. Figure 8 The experimental results show that the contact resistivity of the solar cell of the embodiment is low, which is ultimately manifested as a high fill factor. In particular, the microstructure of the polysilicon layer is optimized, and a low contact resistivity is achieved by designing the microstructure unit and its internal substructure.

[0048] Fig. 9 A schematic diagram of a third test structure provided for this application; Fig.10 1 is a performance comparison diagram of a silicon substrate 100 with a substructure and a silicon substrate 100 without a substructure when applied to a third test structure. Fig. 9As shown, the third test structure includes a silicon substrate 100, a dielectric layer 200 and an n-type doped layer 400 stacked in sequence, and a passivation layer 500 and a plurality of mutually spaced electrodes 600 are disposed on the side of the n-type doped layer 400 away from the silicon substrate 100. Among them, the n-type doped layer 400 is polycrystalline silicon, the dielectric layer 200 is silicon oxide, the silicon substrate 100 is n-type single crystal silicon, and the material of the electrode 600 is silver. The third test structure can be used to test the contact resistivity between the electrode 600 and the n-type doped layer 400. Fig.10 The test results of the contact resistivity between the electrode 600 and the n-type doped layer 400 under different silicon substrate 100 conditions are shown. The microstructure unit on the surface of the silicon substrate 100 in the embodiment includes a substructure, while the microstructure unit of the silicon substrate 100 in the comparative example does not include a substructure. The surface of the silicon substrate 100 with the substructure is rougher. It can be seen that the roughness of the silicon substrate 100 will affect the roughness of the surface of the n-type doped layer 400, and then affect the metal-semiconductor contact resistivity between the n-type doped layer 400 and the electrode 600. The reason is that the larger roughness leads to a larger specific surface area, a higher relative doping amount, and the contact resistivity of the grown n-type doped layer 400 will be lower.

[0049] In addition, the silicon substrate 100 with the substructure can also improve the effective reflectivity of the incident light. Because of the larger relative specific surface area, the light can be effectively scattered and absorbed inside the battery, which increases the probability of collecting photogenerated carriers, thereby increasing the short-circuit current density.

[0050] Please refer again Figure 1 In this embodiment, the microstructure units may be distributed on a portion of the surface of the silicon substrate 100 covered by the film layer structure, or may be distributed on all surfaces of the silicon substrate 100 covered by the film layer. Figure 1 In the illustrated embodiment, the microstructure units are distributed on the first surface 101 and the second surface 102 on the back side of the entire silicon substrate 100. The surface of the light-facing side of the silicon substrate 100 is a velvet surface. Further, the microstructure units on the second surface 102 include a plurality of sub-structures. The sub-structures on the second surface 102 can effectively improve the roughness of the second surface 102, improve the passivation effect of the second dielectric layer 220, and reduce the contact resistivity between the silicon substrate 100 and the n-type doped layer 400 and the second electrode 620, while reducing the contact resistivity.

[0051] exist Figure 1 In the illustrated embodiment, optionally, the material of the first passivation layer 510 and the second passivation layer 520 is selected from at least one of aluminum oxide, silicon oxide, silicon nitride, and silicon oxynitride.

[0052] Figure 1The embodiments are introduced by taking a solar cell as a back-contact cell as an example. In the present application, the solar cell may also be other types of cells, such as a tunnel oxide passivating contact (TOPCon) cell, a silicon heterojunction cell, etc. Fig.11 FIG. 1 is a schematic diagram of a solar cell in the second embodiment of the present application. Fig.11 As shown, the solar cell provided in this embodiment is a TOPCon cell. The solar cell includes a silicon substrate 100, a film structure disposed on the surface of the silicon substrate 100, and an electrode 600 connected to the film structure. In this embodiment, the silicon substrate 100 has a light-facing side and a back side opposite to each other in its thickness direction. Fig.11 In the figure, the light-facing side is the light-facing side of the silicon substrate 100, and the back side is the back side of the silicon substrate 100. The film layer structure includes a p-type doping layer 300, an n-type doping layer 400, a dielectric layer 200, a first passivation layer 510, and a second passivation layer 520. The p-type doping layer 300 is arranged on the light-facing side of the silicon substrate 100, and the first passivation layer 510 is arranged on the side of the p-type doping layer 300 away from the silicon substrate 100. The surface of the back side of the silicon substrate 100 includes a metallized area and a non-metallized area, the dielectric layer 200 and the n-type doping layer 400 are sequentially stacked and arranged on the metallized area of ​​the back side, and the second passivation layer 520 is arranged on the non-metallized area and the side of the n-type doping layer 400 away from the silicon substrate 100. It should be understood that the metallized area on the back side of the silicon substrate 100 in the embodiment of the present application is the area covered by the n-type doping layer 400, and the non-metallized area is the area on the back side of the silicon substrate 100 not covered by the n-type doping layer 400.

[0053] exist Fig.11 In the illustrated embodiment, a plurality of microstructure units are provided on the surface of the back side of the silicon substrate 100 , wherein the microstructure unit including the substructure is located in the non-metallized region.

[0054] exist Fig.11 In the illustrated embodiment, the silicon substrate 100 is n-type single crystal silicon, and the material of the first passivation layer 510 and the second passivation layer 520 is selected from at least one of aluminum oxide, silicon oxide, silicon nitride, and silicon oxynitride.

[0055] Fig.12 Flow chart of a method for preparing a solar cell in one embodiment of the present application. Fig.12 As shown, the method for preparing a solar cell provided in an embodiment of the present application can be used to prepare the solar cell provided in the above embodiment. The preparation method comprises the following steps: Step S100 , polishing the surface of the silicon substrate 100 by wet etching to form a microstructure unit.

[0056] Step S200, preparing a film layer structure on the silicon substrate 100. During the preparation of the film layer structure, a laser is used to irradiate at least a portion of the surface of the silicon substrate 100 so that at least two substructures are formed in at least a portion of a single microstructure unit. After the film layer structure is completed, the microstructure unit containing the substructure is covered.

[0057] Figures 13 to 17 Schematic diagram of different stages of the preparation process of a solar cell in one embodiment of the present application. Figure 1 Taking the back contact battery provided in the embodiment as an example, step S200 may specifically include the following steps: Step S201 : preparing a first dielectric layer 210 and a p-type doping layer 300 in sequence on the back side of the silicon substrate 100 .

[0058] After obtaining the silicon substrate 100 having the microstructure unit, the first dielectric layer 210 and the p-type doping layer 300 can be fabricated on the back side of the silicon substrate 100 to obtain the following: Fig.13 The structure shown. It should be noted that Fig.13 The light-facing side of the silicon substrate 100 is at the bottom, and the back side is at the top. Specifically, step S201 can be implemented using a low pressure chemical vapor deposition (LPCVD) process. First, the silicon substrate 100 is placed in a low pressure chemical vapor deposition device, and high purity oxygen is introduced to grow the first dielectric layer 210 at 400-650°C, and then high purity SiH4 is introduced to grow the intrinsic polysilicon layer at 450-700°C, and then the above structure is placed in a boron diffusion furnace tube and BCl3 is introduced at 750-1050°C for boron diffusion, so as to transform the intrinsic polysilicon layer into a p-type polysilicon layer, that is, to obtain a p-type doped layer 300.

[0059] Step S202 : using a first laser to remove a portion of the first dielectric layer 210 and the p-type doping layer 300 to expose the silicon substrate 100 .

[0060] Step S202 obtains Fig.14 Optionally, the first laser is a nanosecond, picosecond or femtosecond laser with a wavelength of 200 to 1300 nm, and the energy density of the first laser is 100 to 600 mJ / cm 2 .

[0061] Step S203 , using a second laser to irradiate the exposed surface of the back side of the silicon substrate 100 , so as to form at least two substructures in at least a portion of the microstructure units on the exposed surface of the silicon substrate 100 .

[0062] In the embodiment of the present application, the second laser is used to irradiate the exposed surface on the back side of the silicon substrate 100, so that multiple substructures can be formed in at least part of the microstructure units on this part of the surface, and at least part of the adjacent junctions of the substructures are presented on the top surface of the microstructure unit, thereby increasing the roughness and surface area of ​​the top surface of the microstructure unit. Optionally, the second laser is an ultraviolet picosecond or femtosecond laser, and the energy density of the second laser is 20-100 mJ / cm 2 The action depth of the second laser is 10-100 nm below the surface of the silicon substrate 100. The single crystal silicon within the action depth range is subjected to laser heat treatment, thereby forming a plurality of substructures distributed at least on the top surface of the microstructure unit, further increasing the roughness of the top surface of the microstructure unit and even the surface of the silicon substrate 100.

[0063] Step S204 , sequentially preparing a second dielectric layer 220 and an n-type doping layer 400 on the exposed surface of the silicon substrate 100 .

[0064] Optionally, before performing step S204, the structure obtained in step S203 can be cleaned using an alkali solution with a volume concentration of 0.5-5% and a hydrogen peroxide solution with a volume concentration of 2-15%, and then pickled (the pickling solution is hydrochloric acid with a volume concentration of 4-10% or hydrofluoric acid with a volume concentration of 1-10%, or a mixed solution of the two).

[0065] In this embodiment, step S204 may specifically include: placing the previously prepared structure in an LPCVD device, introducing high-purity oxygen to grow the second dielectric layer 220 at 400-650°C, then introducing high-purity SiH4 to grow an intrinsic polysilicon layer at 450-700°C, then placing the above structure in a phosphorus diffusion furnace, introducing POCl3 at 850-950°C for phosphorus diffusion, so as to transform the intrinsic polysilicon layer into an n-type polysilicon layer, that is, to obtain an n-type doped layer 400. Step S204 obtains Fig.15 The structure shown.

[0066] Step S205 , using a third laser to etch to form a trench 103 to separate the p-type doped layer 300 from the n-type doped layer 400 , with the bottom of the trench 103 extending to the silicon substrate 100 .

[0067] The type and parameters of the third laser used in step S205 can refer to the first laser, and will not be described in detail here. Fig.16It should be understood that the third laser may only etch away a portion of the n-type doped layer 400 and the second dielectric layer 220 to form the groove 103; it may also etch away a portion of the p-type doped layer 300, the first dielectric layer 210, the n-type doped layer 400, and the second dielectric layer 220 to form the groove 103; it may also only etch away a portion of the p-type doped layer 300 and the first dielectric layer 210 to form the groove 103.

[0068] Step S206 , forming a first passivation layer 510 on the light-facing side of the silicon substrate 100 , and forming a second passivation layer 520 on the n-type doping layer 400 , the p-type doping layer 300 and the bottom of the trench 103 .

[0069] Step S206 produces Fig.17 The structure shown. In this embodiment, the first passivation layer 510 can be a single-layer structure or a composite layer structure, so step S206 can be implemented by one or more devices and processes. In a specific embodiment, an aluminum oxide layer is deposited on the light-facing side of the silicon substrate 100, the n-type doping layer 400, the p-type doping layer 300 and the bottom of the groove 103 using an atomic layer deposition process. Then, a silicon oxynitride layer is deposited on the aluminum oxide layer at the n-type doping layer 400, the p-type doping layer 300 and the bottom of the groove 103 using an enhanced plasma vapor deposition (PECVD) process, and the aluminum oxide layer, the aluminum oxide layer and the silicon oxynitride layer constitute a second passivation layer 520; a silicon oxide layer, a silicon oxynitride layer and a silicon nitride layer are sequentially prepared on the aluminum oxide layer on the light-facing side of the silicon substrate 100 using a PECVD process, and the aluminum oxide layer, the silicon oxide layer, the silicon oxynitride layer and the silicon nitride layer on the light-facing side of the silicon substrate 100 together constitute a second passivation layer 520.

[0070] In an embodiment of the present application, the method for preparing a solar cell further includes forming a velvet surface on the light-facing side of the silicon substrate 100. The step of velveting the light-facing side can be performed between step S205 and step S206. For example, a chain HF device is used to remove the borophosphosilicate glass wound on the silicon substrate 100. In a trough device, sodium hydroxide with a volume ratio of 7:1 and an additive of model TS40 are used, the temperature is maintained at 80°C, the time is 7 minutes, and the silicon substrate 100 is quickly velveted, and the thinning amount is controlled at 5μm.

[0071] In the above embodiment, the step of forming the substructure by using the second laser is interspersed with the step of making the film structure. In other embodiments, after step S100 is completed and before making the film structure, the second laser may be used to irradiate the surface of the back side of the silicon substrate 100 to form the substructure in the microstructure unit. In this way, the microstructure unit on the second surface 102 corresponding to the p-type doped layer 300 also includes the substructure.

[0072] In the embodiment of the present application, the method for manufacturing a solar cell further includes: In step S300 , a first electrode 610 connected to the p-type doping layer 300 and a second electrode 620 connected to the n-type doping layer 400 are manufactured.

[0073] Optionally, the second electrode 620 is printed on the second passivation layer 520 in the region corresponding to the n-type doping layer 400, and dried in a drying furnace at a temperature of 100-300°C; thereafter, the first electrode 610 is printed on the second passivation layer 520 in the region corresponding to the p-type doping layer 300; finally, the first electrode 610 and the second electrode 620 are sintered at a peak sintering temperature of 700-900°C. Finally, the following can be obtained: Figure 1 The solar cell shown.

[0074] After the fabrication is complete, light injection can be performed, which includes the following steps: 1) heating the electrodes (including the first electrode 610 and the second electrode 620) once, the peak temperature of the heating once is 180-620°C; 2) Secondary heating of the electrode and irradiation, the peak temperature of the secondary heating is 80~320℃, and the energy density of the irradiation is 12~120 kW / m 2 The wavelength of light is a continuous spectral band of 500 ~ 1100 nm.

[0075] The above steps S201 to S206 are for Figure 1 The method for preparing the back contact cell of the embodiment. For other types of solar cells, adaptive adjustments can be made according to actual conditions. For example, for Fig.11 For the TOPCon battery shown, step S200 may specifically include the following steps: Step S211 , preparing a p-type doped layer 300 on the light-facing side of the silicon substrate 100 .

[0076] The specific implementation method of step S211 may refer to the method of preparing the p-type doping layer 300 in step S201 .

[0077] Step S212 , sequentially preparing a dielectric layer 200 and an n-type doping layer 400 on the back side of the silicon substrate 100 .

[0078] The specific implementation of step S212 can refer to the method of preparing the second dielectric layer 220 and the n-type doped layer 400 in step S204. In a specific embodiment, N2O gas with a gas purity of 4.2 can be introduced into the reaction chamber first. The dielectric layer 200 is prepared at a pressure of 1200-2400 mTorr and a temperature of 400-450°C. SiH4, PH3 and H2 are introduced with a gas purity of 4.2, and the n-type doped layer 400 is prepared at a pressure of 2800-3500 mTorr and a temperature of 400-450°C. Annealing is performed at a temperature of 800-950°C to convert the n-type doped amorphous silicon into n-type doped polysilicon.

[0079] Step S213 : using a first laser to remove a portion of the dielectric layer 200 and the n-type doping layer 400 to expose a non-metallized region of the silicon substrate 100 .

[0080] The specific implementation of step S213 may refer to the step of using the first laser to remove a portion of the first dielectric layer 210 and the p-type doping layer 300 to expose the silicon substrate 100 in step S202 .

[0081] Step S214: Use a second laser to irradiate the surface of the non-metallized area, so as to form at least two substructures in at least a portion of the single microstructure units on the surface of the non-metallized area.

[0082] The specific implementation of step S214 may refer to the step of irradiating the silicon substrate 100 with the second laser in step S203 .

[0083] Step S215 , forming a first passivation layer 510 on the side of the p-type doped layer 300 facing away from the silicon substrate 100 , and forming a second passivation layer 520 on the non-metallized region and the side of the n-type doped layer 400 facing away from the silicon substrate 100 .

[0084] The specific implementation method of step S215 can refer to the preparation method of the first passivation layer 510 and the second passivation layer 520 in step S206. Specifically, an aluminum oxide layer with a thickness of 3 nm to 10 nm can be deposited on the p-type doped layer 300 by atomic layer deposition or PECVD, and a silicon nitride layer with a thickness of 75 nm to 120 nm can be deposited on the aluminum oxide layer on the light-facing side of the silicon substrate 100 and on the n-type doped layer 400 and the non-metallized area on the back side by PECVD.

[0085] Then, a first electrode 610 connected to the p-type doping layer 300 and a second electrode 620 connected to the n-type doping layer 400 are fabricated to obtain Fig.11 After the solar cell is manufactured, light injection can be performed according to the light injection method described above.

[0086] The embodiments of the present application also provide a photovoltaic module (not shown in the figure), including the solar cell provided by the above embodiments of the present application or the solar cell manufactured by the preparation method of the above embodiments.

[0087] In summary, the embodiment of the present application provides a solar cell, which includes a silicon substrate 100 and a film layer structure arranged on the surface of the silicon substrate 100, and at least part of the surface of the silicon substrate 100 covered by the film layer structure has a plurality of microstructure units, and at least part of the microstructure units are included in at least two substructures. The plurality of microstructure units can form a surface with certain undulations, increase the bonding area between the film layer structure and the silicon substrate 100, and reduce the contact resistivity of the film layer structure. Further, the microstructure unit includes at least two substructures, so that the side of the single microstructure unit facing the film layer structure has a greater roughness, thereby further increasing the contact area, reducing the contact resistivity, and also improving the passivation performance of the film layer. The presence of the substructure further increases the surface area of ​​the silicon substrate 100, and can also increase the effective reflectivity of the incident light, so that the light is effectively scattered and absorbed inside the battery, and the probability of collecting photogenerated carriers is increased, thereby increasing the short-circuit current density. Therefore, it can be seen that the embodiment of the present application optimizes multiple aspects of the solar cell by improving the surface morphology of the silicon substrate 100, thereby improving the photoelectric conversion efficiency.

[0088] The method for preparing a solar cell provided in an embodiment of the present application includes using a laser to form a substructure in a microstructure unit, thereby improving the photoelectric conversion efficiency of the solar cell.

[0089] The photovoltaic module provided in the embodiments of the present application includes the above-mentioned solar cell or the solar cell manufactured by the above-mentioned manufacturing method.

[0090] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by any technician familiar with the technical field within the technical scope disclosed in the present application should be included in the protection scope of the present application.

Claims

1. A solar cell, characterized in that: The solar cell is a back contact cell or a TOPCon cell, and comprises a silicon substrate and a film layer structure arranged on the surface of the silicon substrate, and at least a portion of the back side of the silicon substrate covered by the film layer structure comprises a plurality of microstructure units, and at least a portion of a single microstructure unit comprises at least two substructures; When the solar cell is a back-contact cell, the back side of the silicon substrate comprises an n-type doped region and a p-type doped region, and the microstructure unit including the substructure is located in the n-type doped region; When the solar cell is a TOPCon cell, the back side of the silicon substrate includes a metallized region and a non-metallized region, and the microstructure unit including the substructure is located in the non-metallized region.

2. The solar cell according to claim 1, characterized in that In a single microstructure unit including the substructures, the interface between at least two of the substructures is present on the top surface of the microstructure unit facing the film layer structure.

3. The solar cell according to claim 1, characterized in that The projection figure of the microstructure unit on the preset plane is a polygon or a quasi-polygon, and the perimeter of the projection figure of the microstructure unit on the preset plane is 10-500 μm.

4. The solar cell according to claim 3, characterized in that: The projection figure of the substructure on the preset plane is a polygon or a quasi-polygon, and the perimeter of the projection figure of the substructure on the preset plane is 1-100 μm.

5. The solar cell according to claim 1, characterized in that: At least some of the individual microstructure units include 2 to 30 substructures.

6. The solar cell according to claim 1, characterized in that In one of the microstructure units, a plurality of the substructures are arranged along a straight line, or a plurality of the substructures are arranged along a circumferential direction to form a cluster.

7. The solar cell according to claim 1, characterized in that In one of the microstructure units, a plurality of the substructures are randomly arranged.

8. The solar cell according to claim 1, characterized in that At least some of the microstructure units are adjacent to each other on a preset plane, and / or at least some of the microstructure units are partially overlapped in the thickness direction of the substrate; wherein the preset plane is parallel to the silicon substrate.

9. The solar cell according to any one of claims 1 to 8, characterized in that: The solar cell is a back-contact cell, the silicon substrate has a light-facing side and a back side opposite to each other in the thickness direction, the surface of the back side includes a first surface and a second surface, and the first surface and the second surface are separated by a groove; The film layer structure includes a p-type doped layer, an n-type doped layer, a first dielectric layer and a second dielectric layer, wherein the first dielectric layer and the p-type doped layer are sequentially stacked on the first surface, and the second dielectric layer and the n-type doped layer are sequentially stacked on the second surface, wherein the microstructure unit including the substructure is formed on the second surface.

10. The solar cell according to claim 9, characterized in that: A first passivation layer is disposed on the light-facing side of the silicon substrate, and a second passivation layer is disposed on the bottom of the trench, the side of the p-type doping layer away from the silicon substrate, and the side of the n-type doping layer away from the silicon substrate.

11. The solar cell according to claim 10, characterized in that The material of the first passivation layer and the second passivation layer is selected from at least one of aluminum oxide, silicon oxide, silicon nitride, and silicon oxynitride.

12. The solar cell according to any one of claims 1 to 8, characterized in that: The solar cell is a TOPCon cell, the silicon substrate has a light-facing side and a back side opposite to each other in the thickness direction, the film layer structure includes a p-type doped layer, an n-type doped layer and a dielectric layer, the p-type doped layer is arranged on the light-facing side, the surface of the back side includes the metallized area and the non-metallized area, and the dielectric layer and the n-type doped layer are sequentially stacked on the metallized area on the back side.

13. The solar cell according to claim 12, characterized in that: A first passivation layer is disposed on a side of the p-type doped layer facing away from the silicon substrate, and a second passivation layer is disposed on a side of the non-metallized region on the back side and a side of the n-type doped layer facing away from the silicon substrate.

14. The solar cell according to claim 13, characterized in that: The material of the first passivation layer and the second passivation layer is selected from at least one of aluminum oxide, silicon oxide, silicon nitride, and silicon oxynitride.

15. A method for preparing a solar cell, characterized in that: include: Polishing the surface of the silicon substrate by wet etching to form a microstructure unit; A film layer structure is prepared on the silicon substrate. During the preparation of the film layer structure, a laser is used to irradiate at least a portion of the surface of the silicon substrate so as to form at least two substructures in at least a portion of the single microstructure unit. After the film layer structure is prepared, the microstructure unit including the substructure is covered.

16. The method for preparing a solar cell according to claim 15, characterized in that: The silicon substrate has a light-facing side and a back side opposite to each other in the thickness direction thereof, and a film layer structure is prepared on the silicon substrate. Before or during the preparation of the film layer structure, a step of irradiating at least a portion of the surface of the silicon substrate with a laser so as to form at least two substructures in at least a portion of the microstructure unit comprises: Sequentially preparing a first dielectric layer and a p-type doping layer on the back side of the silicon substrate; Using a first laser to remove a portion of the first dielectric layer and the p-type doping layer to expose the silicon substrate; Using a second laser to irradiate the exposed surface of the back side of the silicon substrate, so that at least two substructures are formed in at least a portion of the microstructure unit on the exposed surface of the silicon substrate; sequentially preparing a second dielectric layer and an n-type doping layer on the exposed surface of the silicon substrate; Using a third laser to etch to form a trench to separate the p-type doped layer from the n-type doped layer, wherein the bottom of the trench extends to the silicon substrate; A first passivation layer is prepared on the light-facing side of the silicon substrate, and a second passivation layer is prepared on the n-type doping layer, the p-type doping layer and the bottom of the trench.

17. The method for preparing a solar cell according to claim 15, characterized in that: The silicon substrate has a light-facing side and a back side opposite to each other in the thickness direction thereof, and a film layer structure is prepared on the silicon substrate. Before or during the preparation of the film layer structure, a laser is used to irradiate at least a portion of the surface of the silicon substrate so as to form at least two substructures in at least a portion of the single microstructure unit, comprising: Prepare a p-type doped layer on the light-facing side of the silicon substrate; Sequentially preparing a dielectric layer and an n-type doping layer on the back side of the silicon substrate; Using a first laser to remove a portion of the dielectric layer and the n-type doping layer to expose a non-metallized area of ​​the silicon substrate; Using a second laser to irradiate the surface of the non-metallized area, so as to form at least two substructures in at least a portion of the single microstructure unit on the surface of the non-metallized area; A first passivation layer is formed on a side of the p-type doped layer facing away from the silicon substrate, and a second passivation layer is formed on the non-metallized region and a side of the n-type doped layer facing away from the silicon substrate.

18. The method for preparing a solar cell according to claim 16 or 17, characterized in that: The first laser is a nanosecond, picosecond or femtosecond laser with a wavelength of 200-1300 nm, and the energy density of the first laser is 100-600 mJ / cm 2 ; The second laser is an ultraviolet picosecond or femtosecond laser, and the energy density of the second laser is 20-100 mJ / cm 2 .

19. A photovoltaic module, characterized in that: A solar cell comprising the solar cell according to any one of claims 1 to 14, or a solar cell prepared by the method for preparing a solar cell according to any one of claims 15 to 18.

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