Voltage acquisition circuit, method, device and equipment of battery pack and storage medium

By introducing a first power supply power supply and a first controllable switch into the battery pack voltage acquisition circuit, replacing some single batteries to power the battery management chip, solving the voltage acquisition error problem caused by the power supply current of the battery management chip, and significantly improving the accuracy of the battery pack voltage acquisition.

CN119716179AActive Publication Date: 2025-03-28CRRC ZHUZHOU ELECTRIC LOCOMOTIVE RESEARCH INSTITUTE CO LTD

Patent Information

Application Number
CN202311276888.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-09-28
Publication Date
2025-03-28
Estimated Expiration
2043-09-28

AI Technical Summary

Technical Problem

In large ground energy storage systems, the voltage acquisition error caused by the power supply current of the battery management chip affects the accuracy of the battery pack voltage acquisition.

Method used

A voltage acquisition circuit of a battery pack is adopted, including a battery management chip, a first power supply power supply and a first controllable switch. By closing the first controllable switch, the battery management chip is powered by replacing the first single cell or the n-th single cell to prevent the power supply current from passing through the voltage acquisition point, thereby improving the accuracy of voltage acquisition.

Benefits of technology

The voltage acquisition error caused by the power supply current is effectively avoided, and the accuracy of battery pack voltage acquisition is improved, and the error is optimized from ±10mV to ±3mV.

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Abstract

The invention discloses a voltage acquisition circuit, method, device and equipment of a battery pack and a storage medium, and relates to the technical field of energy storage, and the voltage acquisition circuit comprises a battery management chip, a first power supply and a first controllable switch; wherein two ends of the first controllable switch are respectively connected with a negative electrode power supply input end and a first voltage acquisition end of the battery management chip, or are respectively connected with a positive electrode power supply input end and an (n + 1) th voltage acquisition end of the battery management chip; through the arrangement of the first power supply and the first controllable switch, when the first controllable switch is switched off, the first power supply can replace the first single battery or the nth single battery to supply power to the battery management chip, so that the battery management chip can acquire accurate battery voltage of the first single battery or the nth single battery, and the battery management chip can be used for supplying power to the battery management chip. Therefore, the collected voltage correction of the first single battery and the nth single battery is realized, the voltage collection error caused by the power supply current is avoided, and the accuracy of the voltage collection of the battery pack is improved.
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Description

Technical Field

[0001] The present invention relates to the field of energy storage technology, and in particular to a voltage acquisition circuit, method, device, equipment and computer-readable storage medium for a battery pack. Background Art

[0002] At present, energy storage technologies include electrochemical energy storage and pumped storage. Electrochemical energy storage mainly uses lithium battery technology. For electrochemical energy storage, safety is of paramount importance. Battery fires are mainly caused by thermal runaway of batteries. The Battery Management System (BMS) is a system that aims to manage and maintain batteries while maximizing battery life and preventing overcharging and overdischarging. Through BMS, the battery status is obtained in real time, including single cell voltage, single cell temperature, battery pack total voltage, charge and discharge current, battery health status and other information.

[0003] In large-scale ground energy storage systems, BMS is generally divided into three levels, including master control, main control and slave control. The slave control is directly connected to the single battery and can collect the voltage and temperature of the single battery and balance the single battery. The slave control is installed in the battery pack and connected to the single battery through a wiring harness. Figure 1 As shown, taking an air-cooled battery pack consisting of 16 series-connected cells as an example, a total of 17 wires will be drawn from the cells (such as Figure 1 In the figure, B0-B16), namely the negative electrode of the first single battery and the positive electrode of each single battery; from the control, a 16-channel AFE (Analog Front End) chip is used to collect the voltage of 16 single batteries, namely the 17 battery voltage collection points of the AFE chip (such as Figure 1 In the figure, C0-C16) are connected to the 17 wires led out of the battery pack respectively. At the same time, the ground point (V-) of the AFE chip is connected to the negative electrode of the first single battery, and the power point (V+) is connected to the positive electrode of the last single battery. In this case, since the power supply of the AFE chip is provided by the battery pack, the power supply current will flow through the 1st and 17th wires. Due to the impedance of the connecting harness, connectors (connectors 1 and 2), plugs, etc., a voltage drop will be generated when the current flows, which will cause errors in voltage collection.

[0004] Therefore, how to avoid the voltage acquisition error caused by the power supply current of the battery management chip (such as the AFE chip) and improve the accuracy of the battery pack voltage acquisition is a problem that needs to be solved urgently. Summary of the invention

[0005] The purpose of the present invention is to provide a voltage acquisition circuit, method, device, equipment and computer-readable storage medium for a battery pack to avoid voltage acquisition errors caused by power supply current of a battery management chip and improve the accuracy of battery pack voltage acquisition.

[0006] In order to solve the above technical problems, the present invention provides a voltage acquisition circuit for a battery pack, comprising: a battery management chip, a first power supply and a first controllable switch;

[0007] The first to nth voltage collection terminals of the battery management chip are respectively used to connect to the negative electrodes of the first to nth single cells of the battery pack, and the n+1th voltage collection terminal of the battery management chip is used to connect to the positive electrode of the nth single cell. The battery pack includes n single cells connected in series, where n is a positive integer greater than 2.

[0008] The two ends of the first controllable switch are respectively connected to the negative power supply input terminal of the battery management chip and the first voltage collection terminal, or are respectively connected to the positive power supply input terminal of the battery management chip and the n+1th voltage collection terminal; if the two ends of the first controllable switch are respectively connected to the negative power supply input terminal and the first voltage collection terminal, then the common terminal connected to the first controllable switch and the negative power supply input terminal is connected to the negative output terminal of the first power supply, and the positive output terminal of the first power supply is connected to the i-th voltage collection terminal of the battery management chip, where i is a positive integer greater than or equal to 3 and less than or equal to n;

[0009] If the two ends of the first controllable switch are respectively connected to the positive power supply input end and the n+1th voltage collection end, then the common end connected to the first controllable switch and the positive power supply input end is connected to the positive output end of the first power supply, and the negative output end of the first power supply is connected to the jth voltage collection end of the battery management chip, where j is a positive integer greater than or equal to 2 and less than or equal to n-1.

[0010] In some embodiments, i is 3 and j is n-1.

[0011] In some embodiments, the first power supply is specifically an isolated power supply.

[0012] In some embodiments, the control end of the first controllable switch is connected to the control output end of the battery management chip.

[0013] In some embodiments, the first controllable switch is specifically a MOS tube.

[0014] In some embodiments, the battery management chip is specifically an analog front-end chip.

[0015] In some embodiments, the voltage acquisition circuit further includes: a second power supply and a second controllable switch;

[0016] Among them, the two ends of the first controllable switch are respectively connected to the negative power supply input terminal and the first voltage collection terminal, and the two ends of the second controllable switch are respectively connected to the positive power supply input terminal and the n+1th voltage collection terminal; the common end connected to the second controllable switch and the positive power supply input terminal is connected to the positive output terminal of the second power supply, and the negative output terminal of the second power supply is connected to the jth voltage collection terminal.

[0017] In some embodiments, the values ​​of i and j are different.

[0018] The present invention also provides a method for collecting voltage of a battery pack, which is applied to the voltage collection circuit of the battery pack as described above, comprising:

[0019] When the first controllable switch in the voltage acquisition circuit is closed, the single cell voltage acquired by the battery management chip in the voltage acquisition circuit is acquired; wherein the battery single cell voltage includes the voltage of n single cells in the battery pack in the voltage acquisition circuit;

[0020] Control the first controllable switch to be disconnected, and obtain the target single cell voltage collected by the battery management chip; wherein the target single cell voltage is the voltage of the target single cell among the single cells; if the two ends of the first controllable switch are respectively connected to the negative power supply input terminal and the first voltage collection terminal of the battery management chip, the target single cell includes the first single cell in the battery pack; if the two ends of the first controllable switch are respectively connected to the positive power supply input terminal and the n+1th voltage collection terminal of the battery management chip, the target single cell includes the nth single cell in the battery pack;

[0021] The voltages of the first cell and the nth cell among the cell voltages are corrected according to the target cell voltage, so as to obtain the corrected voltages of the first cell and the nth cell.

[0022] In some embodiments, two ends of the first controllable switch are respectively connected to the negative power supply input terminal and the first voltage acquisition terminal of the battery management chip, and the voltages of the first single cell and the nth single cell in the single cell voltage are corrected according to the target single cell voltage to obtain the corrected voltages of the first single cell and the nth single cell, including:

[0023] determining the voltage of the first single cell in the target single cell voltage as the correction voltage of the first single cell;

[0024] Calculating an error voltage according to the single cell voltage and the voltage of the first single cell in the target single cell voltage;

[0025] The correction voltage of the nth single cell is calculated according to the voltage of the nth single cell in the single cell voltage and the error voltage.

[0026] In some embodiments, the first power supply of the voltage acquisition circuit is an isolated power supply, and before the controlling the first controllable switch to be disconnected, the method further includes:

[0027] Control the first power supply to start working.

[0028] In some embodiments, the voltage acquisition circuit further includes a second controllable switch and a second power supply, and the controlling the first controllable switch to be disconnected to obtain the target single cell voltage acquired by the battery management chip includes:

[0029] Controlling the first controllable switch to be turned off and the second controllable switch to be turned off to obtain the target single cell voltage; wherein the target single cell voltage includes the voltage of the first single cell and the nth single cell;

[0030] The step of correcting the voltages of the first single cell and the nth single cell in the single cell voltages according to the target single cell voltage to obtain the corrected voltages of the first single cell and the nth single cell includes:

[0031] The voltages of the first cell and the nth cell in the target cell voltages are determined as correction voltages of the first cell and the nth cell, respectively.

[0032] The present invention further provides a voltage acquisition device for a battery pack, which is applied to the voltage acquisition circuit of the battery pack as described above, and comprises:

[0033] A normal acquisition module, used for acquiring the single cell voltage acquired by the battery management chip in the voltage acquisition circuit when the first controllable switch in the voltage acquisition circuit is closed; wherein the battery single cell voltage includes the voltage of n single cells in the battery pack in the voltage acquisition circuit;

[0034] A correction acquisition module, used for controlling the first controllable switch to be disconnected, and acquiring the target single cell voltage acquired by the battery management chip; wherein the target single cell voltage is the voltage of the target single cell among the single cells; if the two ends of the first controllable switch are respectively connected to the negative power supply input end and the first voltage acquisition end of the battery management chip, then the target single cell includes the first single cell in the battery pack; if the two ends of the first controllable switch are respectively connected to the positive power supply input end and the n+1th voltage acquisition end of the battery management chip, then the target single cell includes the nth single cell in the battery pack;

[0035] The voltage correction module is used to correct the voltages of the first single cell and the nth single cell in the single cell voltages according to the target single cell voltage, and obtain the corrected voltages of the first single cell and the nth single cell.

[0036] The present invention also provides a battery pack voltage acquisition device, comprising:

[0037] Memory for storing computer programs;

[0038] A processor is used to implement the steps of the battery pack voltage acquisition method as described above when executing the computer program.

[0039] The present invention also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the battery pack voltage acquisition method as described above are implemented.

[0040] A voltage acquisition circuit for a battery pack provided by the present invention comprises: a battery management chip, a first power supply and a first controllable switch; wherein the first to nth voltage acquisition terminals of the battery management chip are respectively used to connect to the negative poles of the first to nth single cells of the battery pack, and the n+1th voltage acquisition terminal of the battery management chip is used to connect to the positive pole of the nth single cell, and the battery pack comprises n single cells connected in series, where n is a positive integer greater than 2; the two ends of the first controllable switch are respectively connected to the negative power supply input terminal and the first voltage acquisition terminal of the battery management chip, or respectively connected to the positive power supply input terminal and the n+1th voltage acquisition terminal of the battery management chip; if the first controllable switch The two ends of the first controllable switch are respectively connected to the negative power supply input end and the first voltage collection end, then the common end connected to the negative power supply input end of the first controllable switch is connected to the negative output end of the first power supply, and the positive output end of the first power supply is connected to the i-th voltage collection end of the battery management chip, where i is a positive integer greater than or equal to 3 and less than or equal to n; if the two ends of the first controllable switch are respectively connected to the positive power supply input end and the n+1-th voltage collection end, then the common end connected to the first controllable switch and the positive power supply input end is connected to the positive output end of the first power supply, and the negative output end of the first power supply is connected to the j-th voltage collection end of the battery management chip, where j is a positive integer greater than or equal to 2 and less than or equal to n-1;

[0041] It can be seen that the present invention sets the first power supply and the first controllable switch so that when the first controllable switch is disconnected, the first power supply can replace the first single cell or the nth single cell to power the battery management chip, so that the power supply current does not pass through the battery voltage collection point of the first single cell or the nth single cell, so that the battery management chip can collect the accurate battery voltage of the first single cell or the nth single cell, thereby realizing the voltage correction of the collected first single cell and the nth single cell, avoiding the voltage collection error caused by the power supply current, and improving the accuracy of the battery pack voltage collection. In addition, the present invention also provides a battery pack voltage collection method, device, equipment and computer-readable storage medium, which also have the above-mentioned beneficial effects. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0043] Figure 1 A circuit diagram of a typical 16-cell battery pack and a BMS slave controller in the prior art;

[0044] Figure 2 A circuit structure diagram of a voltage acquisition circuit of a battery pack provided by an embodiment of the present invention;

[0045] Figure 3 A circuit diagram of another voltage acquisition circuit of a battery pack provided by an embodiment of the present invention;

[0046] Figure 4 for Figure 3 A schematic flow chart of a voltage correction process of a voltage acquisition circuit of a battery pack shown;

[0047] Figure 5 A circuit diagram of another voltage acquisition circuit of a battery pack provided by an embodiment of the present invention;

[0048] Figure 6 A flow chart of a method for collecting voltage of a battery pack provided in an embodiment of the present invention;

[0049] Figure 7 A structural block diagram of a voltage acquisition device for a battery pack provided by an embodiment of the present invention;

[0050] Figure 8 A schematic diagram of the structure of a voltage acquisition device for a battery pack provided by an embodiment of the present invention;

[0051] Fig. 9 A schematic diagram of the structure of a computer-readable storage medium provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0052] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0053] Please refer to Figure 2 , Figure 2 A circuit diagram of a voltage acquisition circuit of a battery pack provided by an embodiment of the present invention. The circuit may include: a battery management chip 10, a first power supply 20 and a first controllable switch 30;

[0054] The first voltage collection terminal (C0) to the nth voltage collection terminal (Cn-1) of the battery management chip 10 are respectively used to connect to the negative electrodes of the first to nth single cells of the battery pack, and the n+1th voltage collection terminal (Cn) of the battery management chip 10 is used to connect to the positive electrode of the nth single cell. The battery pack includes n single cells connected in series, where n is a positive integer greater than 2.

[0055] The two ends of the first controllable switch 30 are respectively connected to the negative power supply input terminal (V-) and the first voltage collection terminal of the battery management chip 10, or respectively connected to the positive power supply input terminal (V+) and the n+1th voltage collection terminal of the battery management chip 10; if the two ends of the first controllable switch 30 are respectively connected to the negative power supply input terminal and the first voltage collection terminal, then the common terminal connected to the first controllable switch 30 and the negative power supply input terminal is connected to the negative output terminal of the first power supply 20, and the positive output terminal of the first power supply 20 is connected to the i-th voltage collection terminal of the battery management chip 10, where i is a positive integer greater than or equal to 3 and less than or equal to n;

[0056] If the two ends of the first controllable switch 30 are respectively connected to the positive power supply input terminal and the n+1th voltage collection terminal, then the common terminal connected to the first controllable switch 30 and the positive power supply input terminal is connected to the positive output terminal of the first power supply 20, and the negative output terminal of the first power supply 20 is connected to the jth voltage collection terminal of the battery management chip 10, where j is a positive integer greater than or equal to 2 and less than or equal to n-1.

[0057] It is understandable that in some cases, such as Figure 2 As shown, the first controllable switch 30 can be arranged between the negative power supply input terminal (i.e., the ground position) and the first voltage collection terminal of the battery management chip 10, and the first power supply source 20 can be connected in parallel between the first voltage collection terminal and the i-th voltage collection terminal of the battery management chip 10 through the first controllable switch 30, so that when the first controllable switch 30 is disconnected, the first power supply source 20 can replace the 1st single cell to the i-1th single cell of the battery pack to supply power to the battery management chip 10; thereby, the power supply current of the battery management chip 10 is connected from the i-th connection line (i.e., the i-th connection line) connected to the battery pack. Figure 2 In B2), it flows into the ith connection line without passing through the 1st connection line, so that the voltage collected by the 1st voltage collection terminal and the 2nd voltage collection terminal can be the voltage of the 1st single battery without line voltage drop. In addition, since the length of the wiring harness connecting the battery pack is basically the same, the connector is also the same, that is, the line impedance is basically the same, the error of the voltage of the nth single battery collected by the nth voltage collection terminal and the n+1th voltage collection terminal can be corrected by software.

[0058] Correspondingly, in some other examples, the first controllable switch 30 can be arranged between the positive power supply input terminal (i.e., the power supply point) and the n+1th voltage collection terminal of the battery management chip 10, and the first power supply source 20 can be connected in parallel between the jth voltage collection terminal and the nth voltage collection terminal of the battery management chip 10 through the first controllable switch 30, so that when the first controllable switch 30 is disconnected, the first power supply source 20 can replace the jth single battery to the nth single battery of the battery pack to power the battery management chip 10; thereby, the power supply current of the battery management chip 10 is connected from the jth connection line (e.g., Figure 4 In B14), it flows into the n+1th connecting line without passing through the j+1th connecting line, so that the voltage collected by the nth voltage collection terminal and the n+1th voltage collection terminal can be the voltage of the nth single battery without line voltage drop. In addition, since the length of the wiring harness connecting the battery pack is basically the same, the connector is also the same, that is, the line impedance is basically the same, the error of the voltage of the first single battery collected by the first voltage collection terminal and the second voltage collection terminal can be corrected by software.

[0059] Furthermore, in order to reduce the power supply demand of the first power supply source 20, i in this embodiment can be 3, so that when the two ends of the first controllable switch 30 are respectively connected to the negative power supply input terminal and the first voltage collection terminal of the battery management chip 10, when the first controllable switch 30 is disconnected, the first power supply source 20 can replace the first single cell and the second single cell of the battery pack to power the battery management chip 10; j in this embodiment can be n-1, so that when the two ends of the first controllable switch 30 are respectively connected to the positive power supply input terminal and the n+1th voltage collection terminal of the battery management chip 10, when the first controllable switch 30 is disconnected, the first power supply source 20 can replace the n-1th single cell and the nth single cell of the battery pack to power the battery management chip 10.

[0060] Among them, Figure 3As shown, when n is 16 and i is 3, a switch 1 (i.e., a first controllable switch 30) is added between the negative power supply input (V-) of the AFE chip (i.e., the battery management chip 10) and the first voltage collection terminal (C0). The switch 1 can be controlled by the AFE chip or an MCU (Microcontroller Unit, micro control unit) is controlled by other processors, and an isolated power supply 1 (i.e., the first power supply 20) is connected in parallel between the first voltage collection terminal (C0) and the third voltage collection terminal (C2). The first and second single cells of the battery pack are replaced by the isolated power supply 1, so that the power current of the AFE chip flows into the connecting line B2 connected to the battery pack without passing through the connecting line B0 and the connecting line B1. In this way, the first voltage collection terminal (C0) and the second voltage collection terminal (C1) collect the voltage of the first single cell (i.e., the first single cell) without line voltage drop; and since the length of the wiring harness connecting the battery pack is basically the same, the connector is also the same, that is, the line impedance is basically the same, the error of the voltage of the 16th single cell collected by the 16th voltage collection terminal (C15) and the 17th voltage collection terminal (C16) can be eliminated by software correction.

[0061] Correspondingly, such as Figure 3 and Figure 4 As shown, when the system is working normally, switch 1 is closed, and the AFE chip normally collects the voltages of each point C0-C16 to obtain the voltages of 16 single cells; when performing voltage correction, first the AFE chip (i.e., battery management chip 10) or other processors such as MCU can enable the isolated power supply 1 to make the isolated power supply 1 work; then switch 1 is disconnected, and the isolated power supply 1 replaces the 1st and 2nd single cells to power the AFE chip; the AFE chip reads the voltages of C0-C16 again, and the voltage of the 1st single cell read at this time is the error-free voltage after eliminating the error generated by the power supply current of the AFE chip on the line, and the difference between the two voltage collections of the 1st battery is the error caused by the power supply current of the AFE chip on the voltage collection; after obtaining this error value, due to the same connection conditions, the voltage of the 16th single cell can be corrected, such as subtracting the error value from the voltage of the 16th single cell collected when the switch 1 is closed or disconnected.

[0062] Correspondingly, such as Figure 5 As shown, when n is 16 and j is 3, the isolated power supply 1 (first power supply 20) can be placed on the high side. Figure 3The circuit shown in FIG. 1 is similar to that shown in FIG. 1 , and a switch 1 (i.e., the first controllable switch 30) is added between the positive power supply input (V+) of the AFE chip (i.e., the battery management chip 10) and the 17th voltage collection terminal (C16). The switch 1 can be controlled by the AFE chip or an MCU (Microcontroller Unit, micro control unit) is controlled by other processors, and an isolated power supply 1 (i.e., the first power supply 20) is connected in parallel between the 15th voltage collection terminal (C14) and the 17th voltage collection terminal (C16). The 15th and 16th single cells of the battery pack are replaced by the isolated power supply 1, so that the power current of the AFE chip flows from the connecting line B14 connected to the battery pack without passing through the connecting line B15 and the connecting line B16. In this way, the 17th voltage collection terminal (C16) and the 16th voltage collection terminal (C15) collect the voltage of the 16th single cell (i.e., the 16th single cell) without line voltage drop; and since the length of the wiring harness connecting the battery pack is basically the same, the connector is also the same, that is, the line impedance is basically the same, the error of the voltage of the 1st single cell collected by the 1st voltage collection terminal (C0) and the 2nd voltage collection terminal (C1) can be eliminated by software correction.

[0063] Specifically, Figure 3 and Figure 5 As shown, the voltage collection circuit of the battery pack provided in this embodiment may also include a connector (connector 2); the 1st voltage collection terminal to the n-1th voltage collection terminal of the battery management chip 10 are connected to n single cells in the battery pack through the connector.

[0064] Furthermore, the voltage collection circuit of the battery pack provided in this embodiment may also include a second power supply and a second controllable switch; wherein, the two ends of the first controllable switch 30 are respectively connected to the negative power supply input terminal and the first voltage collection terminal, that is, the common end connected to the first controllable switch 30 and the negative power supply input terminal is connected to the negative output terminal of the first power supply 20, and the positive output terminal of the first power supply 20 is connected to the i-th voltage collection terminal of the battery management chip 10; the two ends of the second controllable switch are respectively connected to the positive power supply input terminal and the n+1-th voltage collection terminal, the common end connected to the second controllable switch and the positive power supply input terminal is connected to the positive output terminal of the second power supply, and the negative output terminal of the second power supply is connected to the j-th voltage collection terminal.

[0065] Correspondingly, in this embodiment, the first controllable switch 30 and the second controllable switch can be disconnected separately to detect the voltages of the first single cell and the 16th single cell without line voltage drop. In this embodiment, the first controllable switch 30 and the second controllable switch can also be disconnected at the same time to detect the voltages of the first single cell and the 16th single cell without line voltage drop; accordingly, in order to avoid the influence of the power supply of the first power supply 20 and the second power supply on the voltage collection of the first single cell and the 16th single cell when the first controllable switch 30 and the second controllable switch are disconnected at the same time, the values ​​of i and j in this embodiment can be different.

[0066] It should be noted that the specific types of each circuit element in the voltage acquisition circuit of the battery pack provided in this embodiment can be set by the designer according to practical scenarios and user needs. For example, the battery management chip 10 in this embodiment can be an AFE chip or other voltage acquisition chip for collecting single cells in the battery pack. The first power supply 20 and the second power supply can be isolated power supplies or batteries (such as button batteries) respectively; accordingly, when the first power supply 20 and the second power supply adopt isolated power supplies, the power supply of the isolated power supply can also be used to avoid the influence of the power supply current of the battery management chip 10 on the self-discharge rate of the battery pack and avoid the influence on the long-term storage of the battery.

[0067] Correspondingly, the first controllable switch 30 and the second controllable switch can be MOS tubes, transistors or relays respectively. The control ends of the first controllable switch 30 and the second controllable switch can be connected to the battery management chip 10 or other processors such as MCU to control the opening and closing of the first controllable switch 30 and the second controllable switch; for example, the control end of the first controllable switch 30 is connected to the control output end of the battery management chip 10.

[0068] In this embodiment, the present invention sets the first power supply 20 and the first controllable switch 30 so that when the first controllable switch 30 is disconnected, the first power supply 20 can replace the first single cell or the nth single cell to supply power to the battery management chip 10, so that the power supply current does not pass through the battery voltage collection point of the first single cell or the nth single cell, so that the battery management chip 10 can collect the accurate battery voltage of the first single cell or the nth single cell, thereby realizing the collected voltage correction of the first single cell and the nth single cell, avoiding the voltage collection error caused by the power supply current, improving the accuracy of the battery pack voltage collection, and being able to optimize the error from ±10mV to ±3mV; and the circuit provided in this embodiment does not need to change the wiring of the existing battery pack, and can achieve board-level replacement and upgrade for the slave control board of the battery pack that does not reserve additional power and location.

[0069] Corresponding to the above circuit embodiment, an embodiment of the present invention further provides a voltage acquisition method for a battery pack. The voltage acquisition method for a battery pack described below and the voltage acquisition circuit for a battery pack described above can refer to each other.

[0070] Please refer to Figure 6 , Figure 6 This is a flow chart of a method for collecting voltage of a battery pack provided by an embodiment of the present invention. The method may include:

[0071] Step 101: when a first controllable switch in a voltage acquisition circuit is closed, a single cell voltage acquired by a battery management chip in the voltage acquisition circuit is acquired.

[0072] The battery cell voltage includes the voltage of n single cells in the battery pack in the voltage acquisition circuit.

[0073] It can be understood that the voltage acquisition method provided in this embodiment can be applied to the battery management chip in the voltage acquisition circuit, that is, by controlling the first controllable switch to close and open, the voltage of the first single cell and the nth single cell in the battery pack acquired by itself is corrected. The method provided in this embodiment can also be applied to other processors connected to the battery management chip (such as the MCU of the BMS), such as the MCU of the BMS can control the first controllable switch to close and open, and correct the voltage of the first single cell and the nth single cell in the battery pack acquired by the battery management chip.

[0074] Correspondingly, in this embodiment, when the first controllable switch in the voltage acquisition circuit is closed, the specific method of obtaining the single cell voltage collected by the battery management chip in the voltage acquisition circuit can be set by the designer, such as the battery management chip can control the first controllable switch in the voltage acquisition circuit to be closed, and normally collect the voltages of n single cells in the battery pack. Correspondingly, when the voltage acquisition circuit also includes a second controllable switch and a second power supply, the battery management chip can control the first controllable switch and the second controllable switch in the voltage acquisition circuit to be closed, and normally collect the voltages of n single cells in the battery pack (i.e., single cell voltages).

[0075] Step 102: Control the first controllable switch to be turned off to obtain the target single cell voltage collected by the battery management chip.

[0076] Among them, the target single cell voltage is the voltage of the target single cell in the single cell; if the two ends of the first controllable switch are respectively connected to the negative power supply input terminal and the first voltage collection terminal of the battery management chip, the target single cell includes the first single cell in the battery pack; if the two ends of the first controllable switch are respectively connected to the positive power supply input terminal and the n+1th voltage collection terminal of the battery management chip, the target single cell includes the nth single cell in the battery pack.

[0077] It can be understood that in this step, the first controllable switch can be controlled to be disconnected, and the power supply of the first power supply can be utilized to enable the battery management chip to collect the voltage of the first single cell or the nth single cell corresponding to the first controllable switch without line voltage drop (i.e., the target single cell voltage), so as to use the target single cell voltage to correct the voltages of the first single cell and the nth single cell collected by the battery management chip when the first controllable switch is disconnected.

[0078] Correspondingly, the specific method of controlling the first controllable switch to be disconnected in this step and obtaining the target single cell voltage collected by the battery management chip can be set by the designer according to practical scenarios and user needs. For example, when the voltage acquisition circuit does not include the second controllable switch and the second power supply, the battery management chip can control the first controllable switch in the voltage acquisition circuit to be disconnected, and collect the target single cell voltage including the voltage of the first single cell or the nth single cell corresponding to the first controllable switch; correspondingly, when the first power supply in the voltage acquisition circuit is an isolated power supply, the battery management chip can first control the first power supply to start working, and then control the first controllable switch to be disconnected, so as to ensure that the first power supply can work and supply power normally.

[0079] Correspondingly, when the voltage acquisition circuit also includes a second controllable switch and a second power supply, in this step, the battery management chip can control the first controllable switch to be disconnected and the second controllable switch to be disconnected successively or simultaneously, and obtain the target single cell voltage including the voltage of the first single cell acquired when the first controllable switch is disconnected and the voltage of the nth single cell acquired when the second controllable switch is disconnected; for example, the battery management chip can control the first controllable switch to be disconnected and the second controllable switch to be disconnected, and obtain the target single cell voltage acquired by the battery management chip; wherein the target single cell voltage includes the voltage of the first single cell and the nth single cell.

[0080] Step 103: Correcting the voltages of the first single cell and the nth single cell in the single cell voltages according to the target single cell voltages, and obtaining the corrected voltages of the first single cell and the nth single cell.

[0081] Among them, in this embodiment, the voltages of the first single cell and the nth single cell in the single cell voltage collected when the first controllable switch is closed can be corrected according to the target single cell voltage collected when the first controllable switch is disconnected, so as to obtain the voltages of the first single cell and the nth single cell without line voltage drop.

[0082] Correspondingly, in this embodiment, according to the target single cell voltage, the voltages of the first single cell and the nth single cell in the single cell voltage are corrected, and the specific method of obtaining the corrected voltages of the first single cell and the nth single cell can be set by the designer. For example, when the voltage acquisition circuit does not include the second controllable switch and the second power supply, and the two ends of the first controllable switch are respectively connected to the negative power supply input terminal and the first voltage acquisition terminal of the battery management chip, the battery management chip can determine the voltage of the first single cell in the target single cell voltage as the corrected voltage of the first single cell; calculate the error voltage according to the single cell voltage and the voltage of the first single cell in the target single cell voltage; calculate the corrected voltage of the nth single cell according to the voltage of the nth single cell in the single cell voltage and the error voltage; for example, when the error voltage is the difference between the voltage of the first single cell in the single cell voltage and the voltage of the first single cell in the target single cell voltage, the difference between the voltage of the nth single cell in the single cell voltage and the error voltage can be determined as the corrected voltage of the nth single cell. Correspondingly, the battery management chip can also use the error voltage to correct the voltages of the first single cell and the nth single cell collected by the battery management chip when the first controllable switch is subsequently closed.

[0083] Correspondingly, when the voltage acquisition circuit further includes a second controllable switch and a second power supply, in this step, the battery management chip can directly determine the voltage of the first single cell collected when the first controllable switch is disconnected and the voltage of the nth single cell collected when the second controllable switch is disconnected in the target single cell voltage as the correction voltages of the first single cell and the nth single cell, respectively. Correspondingly, the battery management chip can also calculate the difference between the voltage of the first single cell in the single cell voltage and the voltage of the first single cell collected when the first controllable switch is disconnected as the first error voltage, calculate the difference between the voltage of the nth single cell in the single cell voltage and the voltage of the nth single cell collected when the second controllable switch is disconnected as the second error voltage, and use the first error voltage and the second error voltage to correct the voltages of the first single cell and the nth single cell collected by the battery management chip when the first controllable switch is closed and the second controllable switch is closed.

[0084] Furthermore, in the present embodiment, when the first power supply and the second power supply are specifically isolated power supplies, in this step, when the voltage acquisition circuit of the battery management chip does not include the second controllable switch and the second power supply, the voltage of the first single cell or the nth single cell in the target single cell voltage can be corrected according to the target single cell voltage and the single cell voltage to obtain the corrected voltage of the first single cell or the nth single cell; accordingly, the battery management chip can also use the error voltage obtained during the correction to correct the voltage of the first single cell or the nth single cell acquired by the battery management chip when the first controllable switch is disconnected, that is, the battery management chip can acquire the normal voltage of the battery pack in the state of being powered by the first power supply when the first controllable switch is disconnected, so as to reduce the self-discharge rate of the battery.

[0085] In this embodiment, the embodiment of the present invention sets the first power supply and the first controllable switch in the voltage acquisition circuit so that when the first controllable switch is disconnected, the first power supply can replace the first single cell or the nth single cell to power the battery management chip, so that the power supply current does not pass through the battery voltage acquisition point of the first single cell or the nth single cell, so that the battery management chip can accurately acquire the battery voltage of the first single cell or the nth single cell, thereby realizing the voltage correction of the acquired first single cell and the nth single cell, avoiding the voltage acquisition error caused by the power supply current, improving the accuracy of the battery pack voltage acquisition, and being able to optimize the error from ±10mV to ±3mV; and the circuit provided in this embodiment does not need to change the wiring of the existing battery pack, and can achieve board-level replacement and upgrade for the slave control board of the battery pack that does not reserve additional power and location.

[0086] Corresponding to the above method embodiment, an embodiment of the present invention further provides a voltage acquisition device for a battery pack. The voltage acquisition device for a battery pack described below and the voltage acquisition method for a battery pack described above can refer to each other.

[0087] Please refer to Figure 7 , Figure 7 This is a structural block diagram of a battery pack voltage acquisition device provided by an embodiment of the present invention. The device may include:

[0088] The normal acquisition module 100 is used to obtain the single cell voltage collected by the battery management chip in the voltage acquisition circuit when the first controllable switch in the voltage acquisition circuit is closed; wherein the battery single cell voltage includes the voltage of n single cells in the battery pack in the voltage acquisition circuit;

[0089] The calibration acquisition module 200 is used to control the first controllable switch to be disconnected, and obtain the target single cell voltage collected by the battery management chip; wherein the target single cell voltage is the voltage of the target single cell in the single cell; if the two ends of the first controllable switch are respectively connected to the negative power supply input end and the first voltage acquisition end of the battery management chip, then the target single cell includes the first single cell in the battery pack; if the two ends of the first controllable switch are respectively connected to the positive power supply input end and the n+1th voltage acquisition end of the battery management chip, then the target single cell includes the nth single cell in the battery pack;

[0090] The voltage correction module 300 is used to correct the voltages of the first single cell and the nth single cell in the single cell voltage according to the target single cell voltage, and obtain the corrected voltages of the first single cell and the nth single cell.

[0091] In some embodiments, two ends of the first controllable switch are respectively connected to the negative power supply input terminal and the first voltage collection terminal of the battery management chip, and the voltage correction module 300 may include:

[0092] A determination submodule, used to determine the voltage of the first single cell in the target single cell voltage as the correction voltage of the first single cell;

[0093] The error calculation submodule is used to calculate the error voltage according to the single cell voltage and the voltage of the first single cell in the target single cell voltage;

[0094] The correction calculation submodule is used to calculate the correction voltage of the nth single cell according to the voltage of the nth single cell and the error voltage in the single cell voltage.

[0095] In some embodiments, the first power supply of the voltage acquisition circuit is an isolated power supply, and the correction acquisition module 200 is further used to control the first power supply to start working before controlling the first controllable switch to be disconnected.

[0096] In some embodiments, the voltage acquisition circuit further includes a second controllable switch and a second power supply, and the normal acquisition module 100 can be specifically used to control the first controllable switch to be disconnected and the second controllable switch to be disconnected to obtain the target single cell voltage; wherein the target single cell voltage includes the voltage of the first single cell and the nth single cell;

[0097] The voltage correction module 300 may be specifically configured to determine the voltages of the first single cell and the nth single cell in the target single cell voltage as the correction voltages of the first single cell and the nth single cell, respectively.

[0098] In this embodiment, the embodiment of the present invention sets the first power supply and the first controllable switch in the voltage acquisition circuit so that when the first controllable switch is disconnected, the first power supply can replace the first single cell or the nth single cell to power the battery management chip, so that the power supply current does not pass through the battery voltage acquisition point of the first single cell or the nth single cell, so that the battery management chip can accurately acquire the battery voltage of the first single cell or the nth single cell, thereby realizing the voltage correction of the acquired first single cell and the nth single cell, avoiding the voltage acquisition error caused by the power supply current, improving the accuracy of the battery pack voltage acquisition, and being able to optimize the error from ±10mV to ±3mV; and the circuit provided in this embodiment does not need to change the wiring of the existing battery pack, and can achieve board-level replacement and upgrade for the slave control board of the battery pack that does not reserve additional power and location.

[0099] Corresponding to the above method embodiment, an embodiment of the present invention further provides a voltage acquisition device for a battery pack. The voltage acquisition device for a battery pack described below and the voltage acquisition method for a battery pack described above can refer to each other.

[0100] Please refer to Figure 8 , Figure 8 A schematic diagram of the structure of a voltage acquisition device for a battery pack provided by an embodiment of the present invention. The voltage acquisition device for the battery pack may include:

[0101] A memory D1, for storing computer programs;

[0102] The processor D2 is used to implement the steps of the battery pack voltage acquisition method provided in the above method embodiment when executing the computer program.

[0103] Corresponding to the above method embodiment, an embodiment of the present invention further provides a computer-readable storage medium. The computer-readable storage medium described below and the battery pack voltage acquisition method described above can be referred to each other.

[0104] Please refer to Fig. 9 , Fig. 9 The computer readable storage medium 40 stores a computer program 41, which, when executed by a processor, implements the steps of the battery pack voltage acquisition method provided in the above method embodiment.

[0105] The computer-readable storage medium 40 may be a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc., which may store program codes.

[0106] The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other. For the devices, equipment, and computer-readable storage media disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple, and the relevant parts can be referred to the method part description.

[0107] The above is a detailed introduction to the voltage acquisition circuit, method, device, equipment and computer-readable storage medium of a battery pack provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A voltage acquisition circuit for a battery pack, characterized in that: include: A battery management chip, a first power supply and a first controllable switch; The first to nth voltage collection terminals of the battery management chip are respectively used to connect to the negative electrodes of the first to nth single cells of the battery pack, and the n+1th voltage collection terminal of the battery management chip is used to connect to the positive electrode of the nth single cell. The battery pack includes n single cells connected in series, where n is a positive integer greater than 2. The two ends of the first controllable switch are respectively connected to the negative power supply input terminal of the battery management chip and the first voltage collection terminal, or are respectively connected to the positive power supply input terminal of the battery management chip and the n+1th voltage collection terminal; if the two ends of the first controllable switch are respectively connected to the negative power supply input terminal and the first voltage collection terminal, then the common terminal connected to the first controllable switch and the negative power supply input terminal is connected to the negative output terminal of the first power supply, and the positive output terminal of the first power supply is connected to the i-th voltage collection terminal of the battery management chip, where i is a positive integer greater than or equal to 3 and less than or equal to n; If the two ends of the first controllable switch are respectively connected to the positive power supply input end and the n+1th voltage collection end, then the common end connected to the first controllable switch and the positive power supply input end is connected to the positive output end of the first power supply, and the negative output end of the first power supply is connected to the jth voltage collection end of the battery management chip, where j is a positive integer greater than or equal to 2 and less than or equal to n-1.

2. The voltage acquisition circuit of the battery pack according to claim 1, characterized in that: i is 3 and j is n-1.

3. The voltage acquisition circuit of the battery pack according to claim 1, characterized in that: The first power supply is specifically an isolated power supply.

4. The voltage acquisition circuit of the battery pack according to claim 1, characterized in that: The control end of the first controllable switch is connected to the control output end of the battery management chip.

5. The voltage acquisition circuit of the battery pack according to claim 1, characterized in that: The first controllable switch is specifically a MOS tube.

6. The voltage acquisition circuit of the battery pack according to claim 1, characterized in that: The battery management chip is specifically an analog front-end chip.

7. The voltage acquisition circuit of the battery pack according to any one of claims 1 to 6, characterized in that: Also includes: a second power supply and a second controllable switch; Among them, the two ends of the first controllable switch are respectively connected to the negative power supply input terminal and the first voltage collection terminal, and the two ends of the second controllable switch are respectively connected to the positive power supply input terminal and the n+1th voltage collection terminal; the common end connected to the second controllable switch and the positive power supply input terminal is connected to the positive output terminal of the second power supply, and the negative output terminal of the second power supply is connected to the jth voltage collection terminal.

8. The voltage acquisition circuit of the battery pack according to claim 7, characterized in that: The values ​​of i and j are different.

9. A method for collecting voltage of a battery pack, characterized in that: A voltage acquisition circuit applied to a battery pack according to any one of claims 1 to 7, comprising: When the first controllable switch in the voltage acquisition circuit is closed, the single cell voltage acquired by the battery management chip in the voltage acquisition circuit is acquired; wherein the battery single cell voltage includes the voltage of n single cells in the battery pack in the voltage acquisition circuit; Control the first controllable switch to be disconnected, and obtain the target single cell voltage collected by the battery management chip; wherein the target single cell voltage is the voltage of the target single cell among the single cells; if the two ends of the first controllable switch are respectively connected to the negative power supply input terminal and the first voltage collection terminal of the battery management chip, the target single cell includes the first single cell in the battery pack; if the two ends of the first controllable switch are respectively connected to the positive power supply input terminal and the n+1th voltage collection terminal of the battery management chip, the target single cell includes the nth single cell in the battery pack; The voltages of the first cell and the nth cell among the cell voltages are corrected according to the target cell voltage, so as to obtain the corrected voltages of the first cell and the nth cell.

10. The method for collecting voltage of a battery pack according to claim 9, characterized in that: The two ends of the first controllable switch are respectively connected to the negative power supply input end and the first voltage acquisition end of the battery management chip, and the voltages of the first single cell and the nth single cell in the single cell voltage are corrected according to the target single cell voltage to obtain the corrected voltages of the first single cell and the nth single cell, including: determining the voltage of the first single cell in the target single cell voltage as the correction voltage of the first single cell; Calculating an error voltage according to the single cell voltage and the voltage of the first single cell in the target single cell voltage; The correction voltage of the nth single cell is calculated according to the voltage of the nth single cell in the single cell voltages and the error voltage.

11. The method for collecting voltage of a battery pack according to claim 9, characterized in that: The first power supply of the voltage acquisition circuit is an isolated power supply, and before the controlling the first controllable switch to be disconnected, the method further includes: Control the first power supply to start working.

12. The method for collecting voltage of a battery pack according to claim 9, characterized in that: The voltage acquisition circuit further includes a second controllable switch and a second power supply, and the control of disconnecting the first controllable switch to obtain the target single cell voltage acquired by the battery management chip includes: Controlling the first controllable switch to be turned off and the second controllable switch to be turned off to obtain the target single cell voltage; wherein the target single cell voltage includes the voltage of the first single cell and the nth single cell; The step of correcting the voltages of the first single cell and the nth single cell in the single cell voltages according to the target single cell voltage to obtain the corrected voltages of the first single cell and the nth single cell includes: The voltages of the first cell and the nth cell in the target cell voltages are determined as correction voltages of the first cell and the nth cell, respectively.

13. A voltage acquisition device for a battery pack, characterized in that: A voltage acquisition circuit applied to a battery pack according to any one of claims 1 to 7, comprising: A normal acquisition module, used for acquiring the single cell voltage acquired by the battery management chip in the voltage acquisition circuit when the first controllable switch in the voltage acquisition circuit is closed; wherein the battery single cell voltage includes the voltage of n single cells in the battery pack in the voltage acquisition circuit; A correction acquisition module, used for controlling the first controllable switch to be disconnected, and acquiring the target single cell voltage acquired by the battery management chip; wherein the target single cell voltage is the voltage of the target single cell among the single cells; if the two ends of the first controllable switch are respectively connected to the negative power supply input end and the first voltage acquisition end of the battery management chip, then the target single cell includes the first single cell in the battery pack; if the two ends of the first controllable switch are respectively connected to the positive power supply input end and the n+1th voltage acquisition end of the battery management chip, then the target single cell includes the nth single cell in the battery pack; The voltage correction module is used to correct the voltages of the first single cell and the nth single cell in the single cell voltages according to the target single cell voltage, and obtain the corrected voltages of the first single cell and the nth single cell.

14. A voltage acquisition device for a battery pack, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the method for collecting voltage of a battery pack as claimed in any one of claims 9 to 12 when executing the computer program.

15. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the method for collecting voltage of a battery pack as described in any one of claims 9 to 12 are implemented.

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