A circuit, method and related device for collecting the peak voltage of a dot-screen AC signal

Abstract

The present application discloses a collection circuit, method and related device for the peak voltage of a point screen AC signal, which is used to improve the collection accuracy of the AC peak voltage. The signal to be collected is obtained; the signal to be collected is followed and isolated; the signal to be collected after following and isolating is input into the peak voltage storage unit; the switch MOS tube in the positive pressure discharge MOS tube module and the negative pressure discharge MOS tube module is controlled to be disconnected; the target signal is stored through the first RC circuit and the second RC circuit; the leakage current of the switch MOS tube is compensated by the compensation MOS tube; the peak voltage is collected through the positive / negative voltage isolation amplifier module and the ADC; the switch MOS tube in the positive pressure discharge MOS tube module and the negative pressure discharge MOS tube module is controlled to be closed; when the voltage discharge is completed, the switch MOS tube in the positive pressure discharge MOS tube module and the negative pressure discharge MOS tube module is controlled to be disconnected, and a new signal to be collected is obtained again.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of dot screen peak detection, and in particular, to a circuit, method and related device for collecting the peak voltage of the dot screen alternating current signal. Background Art

[0002] With the continuous development of information display technology, the display panel OLED has basically gradually replaced the traditional display panel LCD by virtue of its advantages such as self-luminescence, bendability, wide viewing angle, fast response speed, and simple manufacturing process, and has been rapidly and deeply applied to various fields of modern society.

[0003] However, as the market's requirements for the display quality of the display panel OLED are getting higher and higher, and the requirements for the appearance design are also becoming more and more diverse, the shipment volume and appearance design requirements of electronic products such as mobile phones, tablets, and computers are also getting higher and higher. For example: notch screens, water drop screens, curved screens, etc. However, due to the limitations of the process level of the display panel OLED and objective environmental factors, various mura defects will occur in the display panel OLED. Therefore, during the production process of the display screen, it is necessary to light and age test the screen body cell to ensure the production quality.

[0004] The lighting of the cell requires a dedicated signal generator to generate a dedicated waveform to drive the relevant pins. Among the signals supplied to the screen end by the existing devices, there are alternating current signals and direct current signals. The direct current signal can obtain the magnitude of the power supply voltage value of this path through low-speed ADC acquisition. Due to the level conversion of the alternating current signal, the highest switching frequency used in current dot screen reaches 1.25 MHZ, and it is very difficult to use low-speed ADC for acquisition, which will increase the complexity of the acquisition circuit. In order to accurately obtain the peak voltage of the high-speed switching alternating current signal, in the prior art, an ADC with a conversion rate 10 times that of the alternating current switching frequency is usually used to collect the peak voltage (positive peak voltage and negative peak voltage). This will cause many problems. The high-speed conversion ADC is costly. For a collection device with a small number of screen signal paths, a high-speed conversion ADC can be added to each screen signal path. However, currently, large collection devices usually have up to 160 screen signal paths. If high-speed conversion ADCs are used for all of them, the cost will be greatly increased. In the prior art, most of the screen signals in large collection devices can only be collected using ADCs with relatively low costs, which will make the acquisition circuit structure complex, and then leakage current will occur, resulting in a decrease in the acquisition accuracy of the alternating current peak voltage during the lighting and aging test of the screen body cell. Summary of the Invention

[0005] The present application discloses a circuit, method and related device for collecting the peak voltage of the dot screen alternating current signal, which are used to improve the acquisition accuracy of the alternating current peak voltage.

[0006] A circuit for collecting the peak voltage of a dot screen AC signal proposed in the first aspect of the present application includes:

[0007] A multiplexer, a voltage follower isolation operational amplifier, a peak voltage storage unit, a positive / negative voltage isolation operational amplifier module, and an ADC;

[0008] The peak voltage storage unit includes a positive voltage peak selection module U2, a negative voltage peak selection module U1, a first RC circuit, a second RC circuit, a positive voltage discharge MOS transistor module, a negative voltage discharge MOS transistor module, a first switch module, a second switch module, and several resistors. Strobe diodes for strobe electric signals are provided in the positive voltage peak selection module U2 and the negative voltage peak selection module U1. Both the positive voltage discharge MOS transistor module and the negative voltage discharge MOS transistor module include switch MOS transistors for controlling discharge and compensation MOS transistors for compensating the leakage current of the switch MOS transistors;

[0009] The multiplexer is connected to the voltage follower isolation operational amplifier. The multiplexer is used to collect multiple signals to be measured, and the voltage follower isolation operational amplifier is used to prevent the acquisition circuit from interfering with the output signal;

[0010] The voltage follower isolation operational amplifier is respectively connected to the positive voltage peak selection module U2 and the negative voltage peak selection module U1;

[0011] The positive voltage peak selection module U2 and the negative voltage peak selection module U1 are respectively connected to the first RC circuit and the second RC circuit;

[0012] The first RC circuit and the second RC circuit are respectively connected to the input terminal of the positive isolation operational amplifier and the input terminal of the negative isolation operational amplifier on the positive / negative voltage isolation operational amplifier module;

[0013] The positive voltage discharge MOS transistor module is connected to the input terminal of the positive isolation operational amplifier, and the first switch module is connected to the switch MOS transistor of the positive voltage discharge MOS transistor module;

[0014] The negative voltage discharge MOS transistor module is connected to the input terminal of the negative isolation operational amplifier, and the second switch module is connected to the switch MOS transistor of the negative voltage discharge MOS transistor module;

[0015] The output terminal of the positive / negative voltage isolation operational amplifier module is connected to the ADC.

[0016] Optionally, the positive voltage discharge MOS transistor module includes a switch MOS transistor Q1 and a compensation MOS transistor Q5, and the negative voltage discharge MOS transistor module includes a switch MOS transistor Q2 and a compensation MOS transistor Q6;

[0017] The D1 pole of the switching MOS transistor Q1 is connected to the input terminal of the positive isolation operational amplifier through the resistor R2, and the input terminal of the positive isolation operational amplifier is connected to the G2 pole and S2 pole of the compensation MOS transistor Q5 through the resistor R3; the S1 pole of the switching MOS transistor Q1 is connected to an external voltage, the G1 pole of the switching MOS transistor Q1 is connected to the first switching module, and the first switching module is used to control the closing and opening of the switching MOS transistor Q1; the D2 pole of the supplementary MOS transistor Q5 is connected to the external voltage;

[0018] The D1 pole of the switching MOS transistor Q2 is connected to the input terminal of the negative isolation operational amplifier through the resistor R9, and the input terminal of the negative isolation operational amplifier is connected to the G2 pole and S2 pole of the compensation MOS transistor Q6 through the resistor R10; the S1 pole of the switching MOS transistor Q2 is connected to the external voltage, the G1 pole of the switching MOS transistor Q1 is connected to the second switching module, and the second switching module is used to control the closing and opening of the switching MOS transistor Q2; the D2 pole of the supplementary MOS transistor Q6 is connected to the external voltage.

[0019] The voltage follower isolation operational amplifier is connected to the K1 interface of the negative voltage peak selection module U1, and the negative voltage peak selection module U1 is used to select the negative voltage;

[0020] The A1 interface of the negative voltage peak selection module U1 is connected to the second RC circuit, and the second RC circuit is used to store the accessed peak voltage signal;

[0021] The second RC circuit is connected to the D1 pole of the switching MOS transistor Q2 through the resistor R9, the second RC circuit is connected to the G2 pole and S2 pole of the compensation MOS transistor Q6 through the resistor R10, and the second RC circuit is connected to the positive input port of the negative voltage isolation operational amplifier;

[0022] The voltage follower isolation operational amplifier is also connected to the A1 interface of the positive voltage peak selection module U2, and the positive voltage peak selection module U2 is used to select the positive voltage;

[0023] The K1 interface of the positive voltage peak selection module U2 is connected to the first RC circuit, and the first RC circuit is used to store the accessed peak voltage signal;

[0024] The first RC circuit is connected to the D1 pole of the switching MOS transistor Q2 through the resistor R2, the first RC circuit is connected to the G2 pole and S2 pole of the compensation MOS transistor Q5 through the resistor R3, and the first RC circuit is connected to the positive input port of the positive voltage isolation operational amplifier;

[0025] The negative input port and output port of the positive voltage isolation operational amplifier are connected to the ADC;

[0026] The negative input port and output port of the negative voltage isolation operational amplifier are connected to the ADC.

[0027] Optionally, a gating diode and a compensation diode are provided in both the positive pressure peak gating module U2 and the negative pressure peak gating module U1;

[0028] The positive and negative electrodes of the first gating diode are connected to the A1 terminal and the K1 terminal in the positive pressure peak gating module U2 respectively;

[0029] The positive electrode of the first compensation diode is connected to the A3 terminal in the positive pressure peak gating module U2, and the negative electrode of the first compensation diode is connected to an external power supply;

[0030] The first gating diode and the first compensation diode are in opposite directions;

[0031] After the A3 terminal in the positive pressure peak gating module U2 is connected to the resistor R4, it is then connected to the input terminal of the positive isolation operational amplifier;

[0032] The positive and negative electrodes of the second gating diode are connected to the K1 terminal and the A1 terminal in the negative pressure peak gating module U1 respectively;

[0033] The positive electrode of the second compensation diode is connected to the A3 terminal in the positive pressure peak gating module U1, and the negative electrode of the second compensation diode is connected to an external power supply;

[0034] The second gating diode and the second compensation diode are in opposite directions;

[0035] After the K3 terminal in the negative pressure peak gating module U1 is connected to the resistor R11, it is then connected to the input terminal of the negative isolation operational amplifier.

[0036] Optionally, the first switch module includes a triode Q3, a resistor R5, a resistor R6, and a resistor R7;

[0037] The G1 pole of the switching MOS transistor Q1 is connected to the collector of the triode Q3 through the resistor R7;

[0038] The external voltage is connected to the collector of the triode Q3 through the resistor R6;

[0039] The first IO port is connected to the emitter of the triode Q3 through the resistor R5;

[0040] The base of the triode Q3 is grounded;

[0041] The second switch module includes a triode Q4, a resistor R12, a resistor R13, and a resistor R14;

[0042] The G1 pole of the switching MOS transistor Q2 is connected to the collector of the triode Q4 through the resistor R13;

[0043] The external voltage is connected to the collector of the triode Q4 through the resistor R12;

[0044] The second IO port is connected to the emitter of the triode Q4 through the resistor R14;

[0045] The base of the triode Q4 is connected to an external voltage.

[0046] The second aspect of the present application proposes a method of using the acquisition circuit as in the first aspect, including:

[0047] Obtain the signal to be acquired through a multiplexer, and the signal to be acquired is a dot screen AC signal;

[0048] Follow and isolate the signal to be acquired through a voltage follower isolation operational amplifier to prevent the entire acquisition circuit from interfering with the signal to be acquired;

[0049] Input the signal to be acquired after following and isolation into the peak voltage storage unit;

[0050] Control the switching MOS transistors in the positive voltage discharge MOS transistor module and the negative voltage discharge MOS transistor module to disconnect through the first switch module and the second switch module, so that the selection diode selects the target signal in the signal to be acquired, and the target signal is a positive voltage signal or a negative voltage signal;

[0051] Store the target signal through the first RC circuit and the second RC circuit;

[0052] Compensate for the leakage current of the switching MOS transistor through a compensation MOS transistor;

[0053] Collect the peak voltage through the positive / negative voltage isolation operational amplifier module and the ADC;

[0054] Control the switching MOS transistors in the positive voltage discharge MOS transistor module and the negative voltage discharge MOS transistor module to close through the first switch module and the second switch module, so that the charge and discharge terminals of the storage capacitor in the first RC circuit and the second RC circuit are grounded through the switching MOS transistor and enter the voltage discharge process;

[0055] When the voltage discharge is completed, control the switching MOS transistors in the positive voltage discharge MOS transistor module and the negative voltage discharge MOS transistor module to disconnect through the first switch module and the second switch module, and re-obtain a new signal to be acquired.

[0056] Optionally, after storing the target signal through the RC circuit and before collecting the peak voltage through the positive / negative voltage isolation operational amplifier module and the ADC, the method further includes:

[0057] Compensate for the leakage current of the selection diode through a compensation diode.

[0058] Optionally, before obtaining the signal to be acquired through the multiplexer, the method further includes:

[0059] Isolate the strobe diode on the peak voltage storage unit and connect the strobe diode to the first detection circuit;

[0060] Input a detection voltage signal to the positive electrode of the strobe diode in the first detection circuit, and detect the reverse current and diode temperature of the strobe diode in real time to obtain first detection data. The first detection data is a fitting curve of the operating temperature and reverse current of the strobe diode. The detection voltage signal is of the same type as the signal to be collected;

[0061] Isolate the compensation diode on the peak voltage storage unit and connect it to the second detection circuit;

[0062] Input a detection voltage signal to the negative electrode of the compensation diode in the second detection circuit, and detect the reverse current and diode temperature of the compensation diode in real time to obtain second detection data. The second detection data is a fitting curve of the operating temperature and reverse current of the compensation diode.

[0063] Optionally, before controlling the output of the third external voltage interface to enable the compensation diode to compensate for the leakage current of the strobe diode and before collecting the peak voltage through the positive and negative voltage isolation operational amplifier and ADC, the acquisition method further includes:

[0064] Detect the first temperature of the strobe diode and the second temperature of the compensation diode in real time;

[0065] Determine the real-time reverse current value based on the first temperature and the first detection data;

[0066] Determine the real-time compensation current value based on the second temperature and the second detection data;

[0067] When the real-time reverse current value and the real-time compensation current value do not meet the preset conditions, adjust the temperatures of the strobe diode and the compensation diode and re-measure until the difference between the real-time reverse current value and the real-time compensation current value meets the preset conditions.

[0068] The third aspect of this application proposes a device using the acquisition circuit as in the first aspect, including:

[0069] An acquisition unit for acquiring the signal to be collected through a multiplexer. The signal to be collected is a dot screen AC signal;

[0070] An isolation unit for following and isolating the signal to be collected through a voltage follower isolation operational amplifier to prevent interference to the signal to be collected by the entire acquisition circuit;

[0071] An input unit for inputting the signal to be collected after following and isolation into the peak voltage storage unit;

[0072] The first control unit is used to control the switching MOS transistors in the positive-pressure discharge MOS transistor module and the negative-pressure discharge MOS transistor module to turn off through the first switch module and the second switch module, so that the selection diode selects the target signal in the signal to be collected, and the target signal is a positive-pressure signal or a negative-pressure signal;

[0073] The storage unit is used to store the target signal through the first RC circuit and the second RC circuit;

[0074] The first compensation unit is used to compensate the leakage current of the switching MOS transistor through the compensation MOS transistor;

[0075] The acquisition unit is used to acquire the peak voltage through the positive / negative voltage isolation operational amplifier module and the ADC;

[0076] The second control unit is used to control the switching MOS transistors in the positive-pressure discharge MOS transistor module and the negative-pressure discharge MOS transistor module to turn on through the first switch module and the second switch module, so that the charging and discharging ends of the storage capacitor in the first RC circuit and the second RC circuit are grounded through the switching MOS transistor and enter the voltage discharge process;

[0077] The third control unit is used to control the switching MOS transistors in the positive-pressure discharge MOS transistor module and the negative-pressure discharge MOS transistor module to turn off through the first switch module and the second switch module after the voltage discharge is completed, and re-acquire a new signal to be collected.

[0078] Optionally, after the storage unit and before the acquisition unit, the device further includes:

[0079] The second compensation unit is used to compensate the leakage current of the selection diode through the compensation diode.

[0080] Optionally, before the acquisition unit, the device further includes:

[0081] The first isolation unit is used to isolate the selection diode on the peak voltage storage unit and connect the selection diode to the first detection circuit;

[0082] The second input unit is used to input a detection voltage signal to the positive electrode of the selection diode in the first detection circuit, detect the reverse current and diode temperature of the selection diode in real time, and obtain the first detection data. The first detection data is the fitting curve of the operating temperature and reverse current of the selection diode, and the detection voltage signal is of the same type as the signal to be collected;

[0083] The second isolation unit is used to isolate the compensation diode on the peak voltage storage unit and connect it to the second detection circuit;

[0084] A third input unit, configured to input a detection voltage signal to the negative electrode of a compensation diode in a second detection circuit, detect the reverse current and diode temperature of the compensation diode in real time, and obtain second detection data, where the second detection data is a fitting curve of the operating temperature and reverse current of the compensation diode.

[0085] Optionally, after the second compensation unit and before the acquisition unit, the acquisition device further includes:

[0086] A detection unit, configured to detect the first temperature of the gating diode and the second temperature of the compensation diode in real time;

[0087] A first determination unit, configured to determine a real-time reverse current value based on the first temperature and the first detection data;

[0088] A second determination unit, configured to determine a real-time compensation current value based on the second temperature and the second detection data;

[0089] An adjustment unit, configured to adjust the temperatures of the gating diode and the compensation diode and re-measure when the real-time reverse current value and the real-time compensation current value do not meet a preset condition until the difference between the real-time reverse current value and the real-time compensation current value meets the preset condition.

[0090] A fourth aspect of the present application provides a device using the acquisition circuit as in the first aspect, including:

[0091] A processor, a memory, an input / output unit, and a bus;

[0092] The processor is connected to the memory, the input / output unit, and the bus;

[0093] The memory stores a program, and the processor calls the program to execute the method as in the first aspect and any optional method of the first aspect.

[0094] A fourth aspect of the present application provides a computer-readable storage medium, on which a program is stored, and when the program is executed on a computer, it executes the method as in the first aspect and any optional method of the first aspect.

[0095] From the above technical solutions, it can be seen that the embodiments of the present application have the following advantages:

[0096] In this application, first, an input signal to be collected is accessed. The signal to be collected is a dot screen AC signal. The voltage follower isolation operational amplifier is used to follow and isolate the signal to be collected to prevent the entire acquisition circuit from interfering with the signal to be collected. Next, the signal to be collected after following and isolation is input into the peak voltage storage unit. The peak voltage storage unit includes a strobe diode for selecting positive or negative voltage, an RC holding circuit for storing the signal, a pair of MOS transistors serving as a switching discharge circuit, and an IO port and a triode for controlling the MOS transistors. The pair of MOS transistors serving as a switching discharge circuit includes a switching MOS transistor and a compensation MOS transistor. The positive electrode of the strobe diode is connected to the output terminal of the voltage follower isolation operational amplifier, that is, the signal to be collected will first enter the strobe diode. The negative electrode of the strobe diode is connected to the charge and discharge terminal of the storage capacitor in the RC holding circuit. An access voltage for positive and negative voltage gating is set on the strobe diode. The D pole of the switching MOS transistor is respectively connected to the charge and discharge terminal and the input terminal of the positive and negative voltage isolation operational amplifier. The first external voltage interface is respectively connected to the S pole and the G pole of the switching MOS transistor. The C pole of the triode is connected to the IO port. The B pole of the triode is grounded. The E pole of the triode is connected to the G pole of the switching MOS transistor. The S pole and the G pole of the compensation MOS transistor are connected to the charge and discharge terminal. The D pole of the compensation MOS transistor is connected to the second external voltage interface. The switching MOS transistor is controlled to be turned off through the IO port so that the strobe diode gates the target signal in the signal to be collected. The target signal is a positive voltage signal or a negative voltage signal. The target signal is stored through the RC holding circuit. The output of the second external voltage interface is controlled so that the compensation MOS transistor compensates for the leakage current of the switching MOS transistor. The peak voltage is collected through the positive and negative voltage isolation operational amplifier and the ADC.

[0097] When it is necessary to collect the peak voltage signal, the switching MOS transistor is controlled to be turned off through the IO port and the triode. Utilizing the unidirectional conduction effect of the strobe diode and in conjunction with the access voltage set on the strobe diode, the peak voltage storage unit can select to access the positive peak voltage or the negative peak voltage. Next, the peak voltage is stored through the RC holding circuit. Since the D pole of the switching MOS transistor is connected to the charge and discharge terminal of the storage capacitor of the RC holding circuit, resulting in a leakage current from the D pole to the S pole, the output of the second external voltage interface is controlled to be set to the upper limit of the voltage to be collected, so that the S pole of the compensation MOS transistor compensates the charge and discharge terminal. Finally, the peak voltage is collected through the positive and negative voltage isolation operational amplifier and the ADC. In this solution, the circuit structure is simple, and by compensating the leakage current of the switching MOS transistor through the compensation MOS transistor and the second external voltage, the acquisition accuracy of the AC peak voltage is greatly improved during the lighting and aging test of the screen cell. Description of the Drawings

[0098] To more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0099] Figure 1 It is a schematic diagram of an embodiment of the method for collecting the peak voltage of the dot-screen AC signal of the present application;

[0100] Figure 2 It is a schematic diagram of an embodiment of the method for leakage current compensation of the present application;

[0101] Figure 3 It is a schematic diagram of an embodiment of the method for generating a fitting curve of the operating temperature and reverse current of the present application;

[0102] Figure 4 It is a schematic diagram of an embodiment of the method for adjusting the temperatures of the strobe diode and the compensation diode of the present application;

[0103] Figure 5 It is a schematic diagram of an embodiment of the device using the acquisition circuit of the present application;

[0104] Figure 6 It is a schematic diagram of an embodiment of the device using the acquisition circuit of the present application;

[0105] Figure 7 It is a schematic structural diagram of the acquisition circuit of the peak voltage of the dot-screen AC signal of the present application. Detailed implementation manners

[0106] In the following description, specific details such as specific system structures and technologies are presented for the purpose of illustration rather than limitation, so as to thoroughly understand the embodiments of the present application. However, those skilled in the art should clearly understand that the present application can also be implemented in other embodiments without these specific details. In other cases, the detailed descriptions of well-known systems, devices, circuits, and methods are omitted to avoid unnecessary details from interfering with the description of the present application.

[0107] It should be understood that when used in the specification and appended claims of the present application, the term "comprising" indicates the presence of the described features, wholes, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or their combinations.

[0108] It should also be understood that the term "and / or" as used in the specification and appended claims of this application refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0109] As used in the specification and appended claims of this application, the term "if" can be interpreted as "when", "once", "in response to determining", or "in response to detecting" depending on the context. Similarly, the phrases "if determined" or "if [the described condition or event] is detected" can be interpreted as meaning "once determined", "in response to determining", "once [the described condition or event] is detected", or "in response to detecting [the described condition or event]" depending on the context.

[0110] In addition, in the description of the specification and appended claims of this application, the terms "first", "second", "third", etc. are only used for distinguishing descriptions and cannot be understood as indicating or implying relative importance.

[0111] Reference to "one embodiment" or "some embodiments" or the like described in the specification of this application means that a specific feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of this application. Thus, statements such as "in one embodiment", "in some embodiments", "in other some embodiments", "in still other embodiments", etc. that appear in different places in this specification do not necessarily all refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in another way. The terms "comprise", "include", "have" and their variants all mean "including but not limited to", unless otherwise specifically emphasized in another way.

[0112] In the prior art, in order to accurately obtain the peak voltage of an AC signal with high-speed flipping, an ADC with a conversion rate 10 times the AC flipping frequency is usually used in the prior art to collect this peak voltage (positive peak voltage and negative peak voltage). This will cause many problems. The high-speed conversion ADC is costly. For a collection device with a small number of signal paths for the screen body, a high-speed conversion ADC can be added for each signal path of the screen body. However, in current large-scale collection devices, there are usually up to 160 signal paths for the screen body. If high-speed conversion ADCs are used for all of them, the cost will be greatly increased. In the prior art, for most channels of the screen body signals in large-scale collection devices, only ADCs with relatively low cost can be used for collection. This will make the collection circuit structure complex, and then the situation of leakage current will occur, which will lead to the reduction of the collection accuracy of the AC peak voltage in the lighting and aging tests of the screen cells.

[0113] Based on this, the present application discloses a circuit, method and related device for collecting the peak voltage of the dot screen AC signal, which is used to improve the collection accuracy of the AC peak voltage.

[0114] Next, the technical solutions in the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0115] The method of the present application can be applied to a server, device, terminal or other device with logical processing capabilities. The present application does not limit this. For convenience of description, the following will be described by taking the execution entity as a terminal as an example.

[0116] Please refer to Figure 7 , the present application provides a circuit for collecting the peak voltage of the dot screen AC signal, including:

[0117] A multiplexer TMUX, a voltage follower isolation operational amplifier, a peak voltage storage unit, a positive / negative voltage isolation operational amplifier module, and an ADC;

[0118] The peak voltage storage unit includes a positive voltage peak selection module U2, a negative voltage peak selection module U1, a first RC circuit, a second RC circuit, a positive voltage discharge MOS transistor module, a negative voltage discharge MOS transistor module, a first switch module, a second switch module, and several resistors. Strobe diodes for selecting electrical signals are provided in the positive voltage peak selection module U2 and the negative voltage peak selection module U1. Both the positive voltage discharge MOS transistor module and the negative voltage discharge MOS transistor module include switch MOS transistors for controlling discharge and compensation MOS transistors for supplementing the leakage current of the switch MOS transistors;

[0119] The multiplexer is connected to the voltage follower isolation operational amplifier. The multiplexer is used to collect multiple signals to be measured, and the voltage follower isolation operational amplifier is used to avoid interference of the acquisition circuit on the output signal;

[0120] The voltage follower isolation operational amplifier is respectively connected to the positive voltage peak selection module U2 and the negative voltage peak selection module U1;

[0121] The positive voltage peak selection module U2 and the negative voltage peak selection module U1 are respectively connected to the first RC circuit and the second RC circuit;

[0122] The first RC circuit and the second RC circuit are respectively connected to the input terminal of the positive isolation operational amplifier and the input terminal of the negative isolation operational amplifier on the positive / negative voltage isolation operational amplifier module;

[0123] The positive-pressure discharge MOS transistor module is connected to the input terminal of the positive isolation operational amplifier, and the first switch module is connected to the switching MOS transistor of the positive-pressure discharge MOS transistor module;

[0124] The negative-pressure discharge MOS transistor module is connected to the input terminal of the negative isolation operational amplifier, and the second switch module is connected to the switching MOS transistor of the negative-pressure discharge MOS transistor module;

[0125] The output terminal of the positive / negative isolation operational amplifier module is connected to the ADC.

[0126] Specifically, a pair of MOS transistors (positive-pressure discharge MOS transistor module or negative-pressure discharge MOS transistor module) used as a switching discharge circuit includes a switching MOS transistor and a compensation MOS transistor. The positive electrode of the selection diode is connected to the output terminal of the voltage-follower isolation operational amplifier. The multiplexer is used to collect multiple signals to be measured. After the multiplexer selects the corresponding signal, it is input into the voltage-follower isolation operational amplifier, and the voltage-follower isolation operational amplifier is used to prevent the acquisition circuit from interfering with the output signal. The positive-pressure peak selection module U2 and the negative-pressure peak selection module U1 are respectively used to select the positive-pressure signal and the negative-pressure signal.

[0127] The first RC circuit and the second RC circuit are used to store the positive-pressure signal and the negative-pressure signal screened from the positive-pressure peak selection module U2 and the negative-pressure peak selection module U1.

[0128] Since the first switch module is connected to the switching MOS transistor of the positive-pressure discharge MOS transistor module, and the second switch module is connected to the switching MOS transistor of the negative-pressure discharge MOS transistor module, by controlling the switching of the switching MOS transistor through the first switch module and the second switch module, the voltage stored in the first RC circuit and the second RC circuit can be collected by the ADC after passing through the positive / negative isolation operational amplifier module, and discharged after the acquisition is completed.

[0129] The compensation MOS transistor is connected to the positive / negative isolation operational amplifier module in a completely opposite manner (completely opposite to the switching MOS transistor), and compensates for the leakage of the switching MOS transistor by connecting to a preset external voltage.

[0130] In this embodiment, the first RC circuit includes a resistor R1 and a capacitor C1, and the second RC circuit includes a resistor R8 and a capacitor C2. The connection method is as Figure 7 .

[0131] In this embodiment, the voltage-follower isolation operational amplifier includes voltage-follower isolation operational amplifiers U2B, U1B, and U2A. The connection method is as Figure 7 .

[0132] Optionally, the positive-pressure discharge MOS transistor module includes a switching MOS transistor Q1 and a compensating MOS transistor Q5, and the negative-pressure discharge MOS transistor module includes a switching MOS transistor Q2 and a compensating MOS transistor Q6;

[0133] The D1 pole of the switching MOS transistor Q1 is connected to the input terminal of the positive isolation operational amplifier through the resistor R2, and the input terminal of the positive isolation operational amplifier is connected to the G2 pole and S2 pole of the compensating MOS transistor Q5 through the resistor R3; the S1 pole of the switching MOS transistor Q1 is connected to an external voltage, the G1 pole of the switching MOS transistor Q1 is connected to the first switching module, and the first switching module is used to control the closing and opening of the switching MOS transistor Q1; the D2 pole of the supplementary MOS transistor Q5 is connected to an external voltage;

[0134] The D1 pole of the switching MOS transistor Q2 is connected to the input terminal of the negative isolation operational amplifier through the resistor R9, and the input terminal of the negative isolation operational amplifier is connected to the G2 pole and S2 pole of the compensating MOS transistor Q6 through the resistor R10; the S1 pole of the switching MOS transistor Q2 is connected to an external voltage, the G1 pole of the switching MOS transistor Q1 is connected to the second switching module, and the second switching module is used to control the closing and opening of the switching MOS transistor Q2; the D2 pole of the supplementary MOS transistor Q6 is connected to an external voltage.

[0135] The voltage-following isolation operational amplifier is connected to the K1 interface of the negative-voltage peak selection module U1, and the negative-voltage peak selection module U1 is used to select a negative voltage;

[0136] The A1 interface of the negative-voltage peak selection module U1 is connected to the second RC circuit, and the second RC circuit is used to store the accessed peak voltage signal;

[0137] The second RC circuit is connected to the D1 pole of the switching MOS transistor Q2 through the resistor R9, the second RC circuit is connected to the G2 pole and S2 pole of the compensating MOS transistor Q6 through the resistor R10, and the second RC circuit is connected to the positive input port of the negative-voltage isolation operational amplifier;

[0138] The voltage-following isolation operational amplifier is also connected to the A1 interface of the positive-voltage peak selection module U2, and the positive-voltage peak selection module U2 is used to select a positive voltage;

[0139] The K1 interface of the negative-voltage peak selection module U2 is connected to the first RC circuit, and the first RC circuit is used to store the accessed peak voltage signal;

[0140] The first RC circuit is connected to the D1 pole of the switching MOS transistor Q2 through the resistor R2, the first RC circuit is connected to the G2 pole and S2 pole of the compensating MOS transistor Q5 through the resistor R3, and the first RC circuit is connected to the positive input port of the positive-voltage isolation operational amplifier;

[0141] The negative input port and output port of the positive-voltage isolation operational amplifier are connected to the ADC;

[0142] The negative input port and the output port of the negative-pressure isolation operational amplifier are connected to the ADC.

[0143] Specifically, in this embodiment, the D1 pole of the switching MOS transistor Q1 is respectively connected to the first RC circuit and the input end of the positive isolation operational amplifier. The input end of the positive isolation operational amplifier is connected to the G2 pole and the S2 pole of the compensation MOS transistor Q5 through the resistor R3. The S1 pole of the switching MOS transistor Q1 is connected to an external voltage (-6V). The G1 pole of the switching MOS transistor Q1 is connected to the first switching module, and the first switching module is used to control the closing and opening of the switching MOS transistor Q1. The D2 pole of the supplementary MOS transistor Q5 is connected to an external voltage (+10V).

[0144] Specifically, in this embodiment, the D1 pole of the switching MOS transistor Q2 is respectively connected to the 34th RC circuit and the input end of the negative isolation operational amplifier. The input end of the negative isolation operational amplifier is connected to the G2 pole and the S2 pole of the compensation MOS transistor Q5 through the resistor R3. The S1 pole of the switching MOS transistor Q1 is connected to an external voltage (-6V). The G1 pole of the switching MOS transistor Q1 is connected to the first switching module, and the first switching module is used to control the closing and opening of the switching MOS transistor Q1. The D2 pole of the supplementary MOS transistor Q5 is connected to an external voltage (+10V).

[0145] In this embodiment, U1B of the voltage-following isolation operational amplifier is connected to the A1 interface of the positive-pressure peak selection module U2, and the positive-pressure peak selection module U2 is used to select the positive voltage. The K1 interface of the positive-pressure peak selection module U2 is connected to the first RC circuit, and the first RC circuit is used to store the accessed peak voltage signal. The first RC circuit is connected to the D1 pole of the switching MOS transistor Q2 through the resistor R2, the first RC circuit is connected to the G2 pole and the S2 pole of the compensation MOS transistor Q5 through the resistor R3, and the first RC circuit is connected to the positive input port of the positive-pressure isolation operational amplifier. The negative input port and the output port of the positive-pressure isolation operational amplifier are connected to the ADC. The positive-pressure peak selection module U2 includes 6 interfaces, namely A1, A2, and A3, and K1, K2, and K3. Among them, A2 and K2 are not connected to any components.

[0146] In this embodiment, U2A of the voltage follower isolation operational amplifier is connected to the K1 interface of the negative voltage peak gating module U1, and the negative voltage peak gating module U1 is used to gate the negative voltage. The A1 interface of the negative voltage peak gating module U1 is connected to the second RC circuit, and the second RC circuit is used to store the accessed peak voltage signal. The second RC circuit is connected to the D1 pole of the switching MOS transistor Q2 through the resistor R9, and the second RC circuit is connected to the G2 pole and S2 pole of the compensation MOS transistor Q6 through the resistor R10. The second RC circuit is connected to the positive input port of the negative voltage isolation operational amplifier. The negative input port and the output port of the negative voltage isolation operational amplifier are connected to the ADC. The negative voltage peak gating module U1 includes six interfaces: A1, A2, A3, K1, K2, and K3. Among them, no components are connected to A2 and K2.

[0147] Optionally, a gating diode and a compensation diode are provided in both the positive voltage peak gating module U2 and the negative voltage peak gating module U1;

[0148] The positive and negative poles of the first gating diode are respectively connected to the A1 terminal and the K1 terminal in the positive voltage peak gating module U2;

[0149] The positive pole of the first compensation diode is connected to the A3 terminal in the positive voltage peak gating module U2, and the negative pole of the first compensation diode is connected to an external power supply (the external power supply connected to K3);

[0150] The first gating diode and the first compensation diode are in opposite directions;

[0151] After the A3 terminal (A-CH01) in the positive voltage peak gating module U2 is connected to the resistor R4, it is then connected to the (positive) input terminal of the positive isolation operational amplifier;

[0152] The positive and negative poles of the second gating diode are respectively connected to the K1 terminal and the A1 terminal in the negative voltage peak gating module U1;

[0153] The positive pole of the second compensation diode is connected to the A3 terminal in the positive voltage peak gating module U1, and the negative pole of the second compensation diode is connected to an external power supply (the external power supply connected to A3);

[0154] The second gating diode and the second compensation diode are in opposite directions;

[0155] After the K3 terminal (B-CH02) in the negative voltage peak gating module U1 is connected to the resistor R11, it is then connected to the (positive) input terminal of the negative isolation operational amplifier.

[0156] In this embodiment, the negative pole of the gating diode is connected to the charge and discharge terminal of the storage capacitor in the RC circuit (RC holding circuit). An access voltage for positive and negative voltage gating is provided on the gating diode. By controlling the access voltage, the signal entering from the gating diode will enter the RC circuit.

[0157] Optionally, the first switching module includes a triode Q3, a resistor R5, a resistor R6, and a resistor R7;

[0158] The G1 pole of the switching MOS transistor Q1 is connected to the collector of the triode Q3 through the resistor R7;

[0159] The external voltage (-6V) is connected to the collector of the triode Q3 through the resistor R6;

[0160] The first IO port (Ctrl-CH01) is connected to the emitter of the triode Q3 through the resistor R5;

[0161] The base of the triode Q3 is grounded;

[0162] The second switching module includes a triode Q4, a resistor R12, a resistor R13, and a resistor R14;

[0163] The G1 pole of the switching MOS transistor Q2 is connected to the collector of the triode Q4 through the resistor R13;

[0164] The external voltage (+6V) is connected to the collector of the triode Q4 through the resistor R12;

[0165] The second IO port (Ctrl-CH02) is connected to the emitter of the triode Q4 through the resistor R14;

[0166] The base of the triode Q4 is connected to the external voltage (VDD - 3.3V).

[0167] Please refer to Figure 1 , this application provides an embodiment of a method for collecting the peak voltage of the dot screen AC signal, including:

[0168] 101. Obtain the signal to be collected through a multiplexer, and the signal to be collected is a dot screen AC signal;

[0169] In this embodiment, the terminal first needs to obtain a screen signal (signal to be collected).

[0170] In this embodiment, by using multiple multiplexers, the signal to be collected is connected to the following operational amplifier follower circuit (voltage follower isolation operational amplifier). Using a multiplexer can achieve time-division multiplexing of an ADC to collect multiple signals to be measured. It solves the problem of needing to equip an ADC for each signal and reduces the cost.

[0171] 102. Follow and isolate the signal to be collected through a voltage follower isolation operational amplifier to prevent the entire acquisition circuit from interfering with the signal to be collected;

[0172] After the terminal acquires the signal to be collected, it is connected to a voltage follower isolation operational amplifier. The voltage follower isolation operational amplifier processes the signal to be collected for following and isolation to prevent the entire acquisition circuit from interfering with the signal to be collected.

[0173] 103. Input the signal to be collected after following and isolation into the peak voltage storage unit;

[0174] The terminal inputs the signal to be collected after following and isolation into the peak voltage storage unit. Specifically, it first selects the gating module, then accesses the RC circuit, and then inputs it into the ADC through the discharge MOS transistor. For details, see the operation analysis of the aforementioned acquisition circuit.

[0175] Specifically, a pair of MOS transistors used as a switch discharge circuit includes a switch MOS transistor and a compensation MOS transistor. The positive electrode of the gating diode is connected to the output terminal of the voltage follower isolation operational amplifier. The negative electrode of the gating diode is connected to the charge and discharge terminal of the storage capacitor in the RC circuit. An access voltage for positive and negative voltage gating is set on the gating diode. By controlling the access voltage, the signal entering from the gating diode will enter the RC circuit.

[0176] The D pole of the switch MOS transistor is respectively connected to the charge and discharge terminal and the input terminal of the positive and negative voltage isolation operational amplifier. The first external voltage interface is respectively connected to the S pole and G pole of the switch MOS transistor. The C pole of the triode is connected to the IO port. The B pole of the triode is grounded. The E pole of the triode is connected to the G pole of the switch MOS transistor. The S pole and G pole of the compensation MOS transistor are connected to the charge and discharge terminal. The D pole of the compensation MOS transistor is connected to the second external voltage interface. The IO port and the triode can control the closing and opening of the switch MOS transistor. When acquisition is in progress, the IO port and the triode control the switch MOS transistor to open. After the acquisition is completed, the IO port and the triode can control the switch MOS transistor to close and then close again, so that the RC holding circuit enters discharge. When the discharge is completed, a new round of signal detection can be restarted.

[0177] 104. Control the switch MOS transistors in the positive voltage discharge MOS transistor module and the negative voltage discharge MOS transistor module to open through the first switch module and the second switch module, so that the gating diode gates the target signal in the signal to be collected, and the target signal is a positive voltage signal or a negative voltage signal;

[0178] The terminal controls the switch MOS transistor to open through the IO port, so that the gating diode gates the target signal in the signal to be collected, and the target signal is a positive voltage signal or a negative voltage signal.

[0179] Specifically, in this embodiment, the terminal utilizes the one-way conduction effect of a diode. A voltage lower than 0V is connected to the negative electrode of the gated diode and the RC holding circuit. At this time, the forward voltage enters the gated diode, and the positive voltage peak value can be selected for access to collect the positive voltage peak value. Connecting a voltage greater than 0V to the anode of the gated diode allows the negative voltage peak value to be selected for access to collect the negative voltage peak value.

[0180] 105. Store the target signal through the first RC circuit and the second RC circuit;

[0181] After the terminal introduces a positive voltage signal or a negative voltage signal, the target signal is stored through the RC holding circuit. The RC holding circuit includes a resistor and a capacitor for storing signals.

[0182] One end of the resistor is connected to the negative electrode of the gated diode, and the other end is connected to the charge and discharge terminal of the capacitor, so that the charge and discharge terminal of the capacitor can store the signal.

[0183] 106. Compensate for the leakage current of the switching MOS transistor through the compensating MOS transistor;

[0184] The terminal controls the output of the second external voltage interface so that the compensating MOS transistor compensates for the leakage current of the switching MOS transistor. Specifically, the D-pole access point of the switching MOS transistor is the RC holding circuit, and the S-pole is a voltage value lower than the lowest voltage value of the signal to be collected. During the charging process of the RC holding circuit, the switching MOS transistor is controlled to remain in the off state. Since there is a leakage current from the D-pole to the S-pole in the MOS transistor, in this circuit, a compensating MOS transistor of the same type is used to connect the S-pole to the RC holding circuit, and the D-pole of the compensating MOS transistor is a voltage value greater than the maximum collected signal voltage value to compensate for the leakage current of the switching MOS transistor.

[0185] 107. Collect the peak voltage through the positive / negative voltage isolation operational amplifier module and the ADC;

[0186] In this embodiment, since the REF voltage used by the acquisition ADC is 4.096V and the maximum value of the signal to be collected is ±30V, it is necessary to step down the voltage through an operational amplifier circuit (positive / negative voltage isolation operational amplifier) before collection. If it is a positive peak voltage, the positive peak voltage is stepped down to 2 - 4V. If it is a negative peak voltage, the negative peak voltage is reversed and stepped down to 0 - 2V.

[0187] 108. Control the switching MOS transistors in the positive voltage discharge MOS transistor module and the negative voltage discharge MOS transistor module to close through the first switch module and the second switch module, so that the charge and discharge terminals of the storage capacitors in the first RC circuit and the second RC circuit are grounded through the switching MOS transistors, and voltage discharge processing is performed;

[0188] 109. After the voltage discharge is completed, the switching MOS transistors in the positive voltage discharge MOS transistor module and the negative voltage discharge MOS transistor module are controlled to turn off through the first switching module and the second switching module, and a new signal to be collected is acquired again.

[0189] When we select a signal to be collected and connect it to this circuit, the peak voltage can be stored in the RC holding circuit. When the ADC finishes collecting and switches to the next signal to be collected, first turn off the connected signal, and then turn on the discharge circuit (switching MOS transistor) through the IO port to discharge the voltage in the RC holding circuit to the ground terminal. Wait until the discharge is complete, and then select the next signal to be collected and connect it.

[0190] In this application, first, a signal to be collected is connected. The signal to be collected is the dot screen AC signal. The signal to be collected is followed and isolated through a voltage follower isolation operational amplifier to prevent interference to the signal to be collected by the entire acquisition circuit. Next, the signal to be collected after following and isolation is input into the peak voltage storage unit.

[0191] Among them, the peak voltage storage unit includes a strobe diode for selecting positive or negative voltage, an RC holding circuit for storing the signal, a pair of MOS transistors serving as a switching discharge circuit, and an IO port and a triode for controlling the MOS transistors. A pair of MOS transistors serving as a switching discharge circuit includes a switching MOS transistor and a compensation MOS transistor. Among them, the positive electrode of the strobe diode is connected to the output terminal of the voltage follower isolation operational amplifier, that is, the signal to be collected will first enter the strobe diode. The negative electrode of the strobe diode is connected to the charge and discharge terminal of the storage capacitor in the RC holding circuit. An access voltage for positive and negative voltage gating is set on the strobe diode. The D pole of the switching MOS transistor is respectively connected to the charge and discharge terminal and the input terminal of the positive and negative voltage isolation operational amplifier. The first external voltage interface is respectively connected to the S pole and the G pole of the switching MOS transistor. The C pole of the triode is connected to the IO port. The B pole of the triode is grounded. The E pole of the triode is connected to the G pole of the switching MOS transistor. The S pole and the G pole of the compensation MOS transistor are connected to the charge and discharge terminal. The D pole of the compensation MOS transistor is connected to the second external voltage interface. The switching MOS transistor is controlled to turn off through the IO port so that the strobe diode gates the target signal in the signal to be collected. The target signal is a positive voltage signal or a negative voltage signal. The target signal is stored through the RC holding circuit. The output of the second external voltage interface is controlled so that the compensation MOS transistor compensates for the leakage current of the switching MOS transistor. The peak voltage is collected through the positive and negative voltage isolation operational amplifier and the ADC.

[0192] When peak voltage signals need to be collected, the switching MOS transistor is controlled to disconnect through the IO port and the triode. By utilizing the one-way conduction effect of the gating diode and in conjunction with the access voltage set on the gating diode, the peak voltage storage unit can choose to access the positive peak voltage or the negative peak voltage. Next, the peak voltage is stored through the RC holding circuit. Since the D pole of the switching MOS transistor is connected to the charge and discharge terminal of the storage capacitor of the RC holding circuit, resulting in a leakage current from the D pole to the S pole, the output of the second external voltage interface is controlled to be set as the upper limit of the voltage to be collected, enabling the S pole of the compensation MOS transistor to compensate the charge and discharge terminal. Finally, the peak voltage is collected through the positive and negative voltage isolation operational amplifier and the ADC. In this solution, the circuit structure is simple, and by compensating the leakage current of the switching MOS transistor through the compensation MOS transistor and the second external voltage, the acquisition accuracy of the AC peak voltage is greatly improved during the lighting and aging tests of the screen cells.

[0193] Please refer to Figure 2 , an embodiment of a method for compensating leakage current provided by this application includes:

[0194] 201. Compensate the leakage current of the gating diode through the compensation diode.

[0195] In this embodiment, since there is a reverse current in the gating diode, resulting in a loss in the voltage actually stored in the RC holding circuit and reducing the ADC acquisition accuracy, in this embodiment, the peak voltage storage unit further includes a compensation diode. The positive pole of the compensation diode is connected to the charge and discharge terminal, and the negative pole of the compensation diode is connected to the third external voltage interface, that is, a set of diodes with opposite directions are connected in the circuit.

[0196] By controlling the output of the third external voltage interface, the compensation diode will provide a reverse current as compensation to the circuit. That is, in order to avoid the reverse leakage current of the gating diode, a reverse compensation diode is connected in the circuit, and its reverse access voltage is greater than the voltage to be collected to compensate for the reverse leakage current. The output of the third external voltage interface is usually slightly greater than the maximum value of the voltage to be collected. By corresponding compensation for the reverse current of the gating diode, losses can be reduced, and the acquisition accuracy of the AC peak voltage is further improved.

[0197] Refer to Figure 3 , an embodiment of a method for generating a fitting curve of operating temperature and reverse current provided by this application includes:

[0198] 301. Isolate the gating diode on the peak voltage storage unit and connect the gating diode to the first detection circuit;

[0199] 302. Input a detection voltage signal to the positive electrode of the strobe diode in the first detection circuit, and detect the reverse current and diode temperature of the strobe diode in real time to obtain first detection data. The first detection data is a fitting curve of the operating temperature and reverse current of the strobe diode. The detection voltage signal is of the same type as the signal to be collected.

[0200] 303. Isolate the compensation diode on the peak voltage storage unit and connect it to the second detection circuit.

[0201] 304. Input a detection voltage signal to the negative electrode of the compensation diode in the second detection circuit, and detect the reverse current and diode temperature of the compensation diode in real time to obtain second detection data. The second detection data is a fitting curve of the operating temperature and reverse current of the compensation diode.

[0202] In this embodiment, diodes of the same model are usually selected, one as the strobe diode and the other as the compensation diode. However, there are also differences between the diodes, mainly considering the operating temperature difference, which may cause the compensation of the reverse current to be not very accurate, resulting in a reduction in the acquisition accuracy.

[0203] Therefore, before acquisition, first perform an isolation detection on the two diodes. The isolation detection is beneficial for more accurate detection of the parameters of a single diode. The terminal inputs a detection voltage signal to the positive electrode of the strobe diode in the first detection circuit, and detects the reverse current and diode temperature of the strobe diode in real time to obtain first detection data. The first detection data is a fitting curve of the operating temperature and reverse current of the strobe diode. The detection voltage signal is of the same type as the signal to be collected. In the scenario of screen lighting, the strobe diode is used to pass the screen lighting signal and continuously operates, causing the diode to heat up. At this time, continuously detect the reverse current and diode temperature, and detect both the strobe diode and the compensation diode to obtain a fitting curve of the operating temperature and reverse current. It should be noted that even if the signals of the two diodes are the same, different amounts of heat, that is, different temperature differences, may be generated during operation, resulting in differences between the compensation current and the reverse current. Through the first detection data and the second detection data, the present application can accurately analyze whether the difference between the reverse current and the compensation current is too large during the acquisition of the level signal and then make an adaptive adjustment.

[0204] Refer to Figure 4 , an embodiment of a method for adjusting the temperature of a strobe diode and a compensation diode provided by the present application includes:

[0205] 401. Detect the first temperature of the strobe diode and the second temperature of the compensation diode in real time.

[0206] 402. Determine the real-time reverse current value based on the first temperature and the first detection data.

[0207] 403. Determine the real-time compensation current value based on the second temperature and the second detection data;

[0208] 404. When the real-time reverse current value and the real-time compensation current value do not meet the preset conditions, adjust the temperatures of the gated diode and the compensation diode, and re-measure until the difference between the real-time reverse current value and the real-time compensation current value meets the preset conditions.

[0209] In this embodiment, after the compensation of the primary diode is completed, the terminal detects the first temperature of the gated diode and the second temperature of the compensation diode in real time. The terminal determines the real-time reverse current value based on the first temperature and the first detection data, and the terminal determines the real-time compensation current value based on the second temperature and the second detection data. When the real-time reverse current value and the real-time compensation current value do not meet the preset conditions, it is possible to temporarily turn off the operation of the current acquisition circuit, or use physical cooling, or adjust the input of the compensation current, which is not limited herein, and re-measure the first temperature, the second temperature, the real-time reverse current value, and the real-time compensation current value until the difference between the real-time reverse current value and the real-time compensation current value meets the preset conditions.

[0210] Please refer to Figure 5 , the present application provides a device using an acquisition circuit, including:

[0211] The first isolation unit 501 is used to isolate the gated diode on the peak voltage storage unit and connect the gated diode to the first detection circuit;

[0212] The second input unit 502 is used to input a detection voltage signal to the positive electrode of the gated diode in the first detection circuit, detect the reverse current and the diode temperature of the gated diode in real time, obtain the first detection data, and the first detection data is the fitting curve of the operating temperature and the reverse current of the gated diode. The detection voltage signal is of the same type as the signal to be acquired;

[0213] The second isolation unit 503 is used to isolate the compensation diode on the peak voltage storage unit and connect it to the second detection circuit;

[0214] The third input unit 504 is used to input a detection voltage signal to the negative electrode of the compensation diode in the second detection circuit, detect the reverse current and the diode temperature of the compensation diode in real time, obtain the second detection data, and the second detection data is the fitting curve of the operating temperature and the reverse current of the compensation diode;

[0215] The acquisition unit 505 is used to obtain the signal to be acquired through the multiplexer, and the signal to be acquired is the dot screen AC signal;

[0216] An isolation unit 506 for following and isolating the signal to be collected through a voltage-following isolation operational amplifier to prevent the entire acquisition circuit from interfering with the signal to be collected;

[0217] An input unit 507 for inputting the signal to be collected after following and isolation into the peak voltage storage unit;

[0218] A first control unit 508 for controlling the switching MOS transistors in the positive voltage discharge MOS transistor module and the negative voltage discharge MOS transistor module to turn off through the first switch module and the second switch module, so that the selection diode selects the target signal in the signal to be collected, and the target signal is a positive voltage signal or a negative voltage signal;

[0219] A storage unit 509 for storing the target signal through the first RC circuit and the second RC circuit;

[0220] A second compensation unit 510 for compensating the leakage current of the selection diode through a compensation diode;

[0221] A first compensation unit 511 for compensating the leakage current of the switching MOS transistor through a compensation MOS transistor;

[0222] A detection unit 512 for detecting the first temperature of the selection diode and the second temperature of the compensation diode in real time;

[0223] A first determination unit 513 for determining the real-time reverse current value through the first temperature and the first detection data;

[0224] A second determination unit 514 for determining the real-time compensation current value through the second temperature and the second detection data;

[0225] An adjustment unit 515 for adjusting the temperatures of the selection diode and the compensation diode and re-measuring when the real-time reverse current value and the real-time compensation current value do not meet the preset conditions until the difference between the real-time reverse current value and the real-time compensation current value meets the preset conditions;

[0226] An acquisition unit 516 for acquiring the peak voltage through a positive / negative voltage isolation operational amplifier module and an ADC;

[0227] A second control unit 517 for controlling the switching MOS transistors in the positive voltage discharge MOS transistor module and the negative voltage discharge MOS transistor module to turn on through the first switch module and the second switch module, so that the charge and discharge ends of the storage capacitor in the first RC circuit and the second RC circuit are grounded through the switching MOS transistor and enter the voltage discharge process;

[0228] A third control unit 518, configured to, after the voltage discharge is completed, control the switching MOS transistors in the positive voltage discharge MOS transistor module and the negative voltage discharge MOS transistor module to turn off through the first switch module and the second switch module, and re-obtain a new signal to be collected.

[0229] Please refer to Figure 6 , this application provides a device using an acquisition circuit, including:

[0230] A processor 601, a memory 602, an input / output unit 603, and a bus 604.

[0231] The processor 601 is connected to the memory 602, the input / output unit 603, and the bus 604.

[0232] The memory 602 stores a program, and the processor 601 calls the program to execute methods such as Figure 1 , Figure 2 and Figure 3 in the.

[0233] This application provides a computer-readable storage medium, on which a program is stored, and when the program is executed on a computer, it executes methods such as Figure 1 , Figure 2 and Figure 3 in the.

[0234] Those skilled in the art can clearly understand that for the convenience and conciseness of description, the specific working processes of the above-described systems, devices, and units can refer to the corresponding processes in the foregoing method embodiments, and will not be elaborated herein.

[0235] In several embodiments provided by this application, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the units is only a logical function division, and there may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed couplings or direct couplings or communication connections to each other can be through some interfaces, and the indirect couplings or communication connections of the devices or units can be in electrical, mechanical, or other forms.

[0236] The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0237] In addition, each functional unit in various embodiments of the present application may be integrated into one processing unit, may exist physically as individual units, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of a software functional unit.

[0238] If the above-mentioned integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it may be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, may be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present application. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROM, read-only memory), random access memories (RAM, random access memory), magnetic disks, or optical discs that can store program codes.

Claims

1. A circuit for collecting the peak voltage of a dot-screen AC signal, characterized in that Including: A multiplexer, a voltage-follower isolation operational amplifier, a peak voltage storage unit, a positive / negative voltage isolation operational amplifier module, and an ADC; The peak voltage storage unit includes a positive voltage peak gating module U2, a negative voltage peak gating module U1, a first RC circuit, a second RC circuit, a positive voltage discharge MOS transistor module, a negative voltage discharge MOS transistor module, a first switch module, a second switch module, and several resistors. Strobe diodes for strobe electric signals are provided in the positive voltage peak gating module U2 and the negative voltage peak gating module U1. Both the positive voltage discharge MOS transistor module and the negative voltage discharge MOS transistor module include switch MOS transistors for controlling discharge and compensation MOS transistors for supplementing the leakage current of the switch MOS transistors; The multiplexer is connected to the voltage-follower isolation operational amplifier. The multiplexer is used to collect multiple signals to be measured, and the voltage-follower isolation operational amplifier is used to avoid interference of the acquisition circuit on the output signal; The voltage-follower isolation operational amplifier is respectively connected to the positive voltage peak gating module U2 and the negative voltage peak gating module U1; The positive voltage peak gating module U2 and the negative voltage peak gating module U1 are respectively connected to the first RC circuit and the second RC circuit; The first RC circuit and the second RC circuit are respectively connected to the input terminal of the positive isolation operational amplifier and the input terminal of the negative isolation operational amplifier on the positive / negative voltage isolation operational amplifier module; Both the compensation MOS transistor and the switch MOS transistor in the positive voltage discharge MOS transistor module are connected to the input terminal of the positive isolation operational amplifier. The first switch module is connected to the switch MOS transistor of the positive voltage discharge MOS transistor module; Both the compensation MOS transistor and the switch MOS transistor in the negative voltage discharge MOS transistor module are connected to the input terminal of the negative isolation operational amplifier. The second switch module is connected to the switch MOS transistor of the negative voltage discharge MOS transistor module; The output terminal of the positive / negative voltage isolation operational amplifier module is connected to the ADC.

2. The acquisition circuit according to claim 1, wherein The positive voltage discharge MOS transistor module includes a switch MOS transistor Q1 and a compensation MOS transistor Q5. The negative voltage discharge MOS transistor module includes a switch MOS transistor Q2 and a compensation MOS transistor Q6; The D1 pole of the switch MOS transistor Q1 is connected to the input terminal of the positive isolation operational amplifier through a resistor R2. The input terminal of the positive isolation operational amplifier is connected to the G2 pole and S2 pole of the compensation MOS transistor Q5 through a resistor R3. The S1 pole of the switch MOS transistor Q1 is connected to an external voltage. The G1 pole of the switch MOS transistor Q1 is connected to the first switch module, and the first switch module is used to control the closing and opening of the switch MOS transistor Q1. The D2 pole of the supplementary MOS transistor Q5 is connected to an external voltage; The D1 pole of the switching MOS transistor Q2 is connected to the input terminal of the negative isolation operational amplifier through a resistor R9, and the input terminal of the negative isolation operational amplifier is connected to the G2 and S2 poles of the compensation MOS transistor Q6 through a resistor R10; the S1 pole of the switching MOS transistor Q2 is connected to an external voltage, the G1 pole of the switching MOS transistor Q1 is connected to the second switching module, and the second switching module is used to control the closing and opening of the switching MOS transistor Q2; the D2 pole of the supplementary MOS transistor Q6 is connected to an external voltage; The voltage-following isolation operational amplifier is connected to the K1 interface of the negative-voltage peak selection module U1, and the negative-voltage peak selection module U1 is used to select a negative voltage; The A1 interface of the negative-voltage peak selection module U1 is connected to the second RC circuit, and the second RC circuit is used to store the accessed peak voltage signal; The second RC circuit is connected to the D1 pole of the switching MOS transistor Q2 through a resistor R9, the second RC circuit is connected to the G2 and S2 poles of the compensation MOS transistor Q6 through a resistor R10, and the second RC circuit is connected to the positive input port of the negative-voltage isolation operational amplifier; The voltage-following isolation operational amplifier is also connected to the A1 interface of the positive-voltage peak selection module U2, and the positive-voltage peak selection module U2 is used to select a positive voltage; The K1 interface of the positive-voltage peak selection module U2 is connected to the first RC circuit, and the first RC circuit is used to store the accessed peak voltage signal; The first RC circuit is connected to the D1 pole of the switching MOS transistor Q2 through a resistor R2, the first RC circuit is connected to the G2 and S2 poles of the compensation MOS transistor Q5 through a resistor R3, and the first RC circuit is connected to the positive input port of the positive-voltage isolation operational amplifier; The negative input port and the output port of the positive-voltage isolation operational amplifier are connected to the ADC; The negative input port and the output port of the negative-voltage isolation operational amplifier are connected to the ADC.

3. The acquisition circuit according to claim 2, wherein Both the positive-voltage peak selection module U2 and the negative-voltage peak selection module U1 are provided with a selection diode and a compensation diode; The positive and negative poles of the first selection diode are respectively connected to the A1 terminal and the K1 terminal in the positive-voltage peak selection module U2; The positive pole of the first compensation diode is connected to the A3 terminal in the positive-voltage peak selection module U2, and the negative pole of the first compensation diode is connected to an external power supply; The first selection diode and the first compensation diode are in opposite directions; After the A3 terminal in the positive-voltage peak selection module U2 is connected to a resistor R4, it is then connected to the input terminal of the positive isolation operational amplifier; The positive and negative poles of the second selection diode are respectively connected to the K1 terminal and the A1 terminal in the negative-voltage peak selection module U1; The positive pole of the second compensation diode is connected to the A3 terminal in the positive-voltage peak selection module U2, and the negative pole of the second compensation diode is connected to an external power supply; The second selection diode and the second compensation diode are in opposite directions; After the K3 terminal in the negative-voltage peak selection module U1 is connected to a resistor R11, it is then connected to the input terminal of the negative isolation operational amplifier.

4. The acquisition circuit according to claim 3, wherein The first switch module includes a triode Q3, a resistor R5, a resistor R6, and a resistor R7; The G1 pole of the switching MOS transistor Q1 is connected to the collector of the triode Q3 through the resistor R7; The external voltage is connected to the collector of the triode Q3 through the resistor R6; The first IO port is connected to the emitter of the triode Q3 through the resistor R5; The base of the triode Q3 is grounded; The second switch module includes a triode Q4, a resistor R12, a resistor R13, and a resistor R14; The G1 pole of the switching MOS transistor Q2 is connected to the collector of the triode Q4 through the resistor R13; The external voltage is connected to the collector of the triode Q4 through the resistor R12; The second IO port is connected to the emitter of the triode Q4 through the resistor R14; The base of the triode Q4 is connected to an external voltage.

5. A method of using the acquisition circuit as claimed in claim 4, characterized in that, Including: Obtain the signal to be collected through a multiplexer, and the signal to be collected is a dot screen AC signal; Follow and isolate the signal to be collected through a voltage follower isolation operational amplifier to prevent the entire acquisition circuit from interfering with the signal to be collected; Input the signal to be collected after following and isolation into a peak voltage storage unit; Control the switching MOS transistors in the positive voltage discharge MOS transistor module and the negative voltage discharge MOS transistor module to disconnect through the first switch module and the second switch module, so that the selection diode selects the target signal in the signal to be collected, and the target signal is a positive voltage signal or a negative voltage signal; Store the target signal through a first RC circuit and a second RC circuit; Compensate for the leakage current of the switching MOS transistor through a compensation MOS transistor; Collect the peak voltage through a positive / negative voltage isolation operational amplifier module and an ADC; Control the switching MOS transistors in the positive voltage discharge MOS transistor module and the negative voltage discharge MOS transistor module to close through the first switch module and the second switch module, so that the charge and discharge ends of the storage capacitor in the first RC circuit and the second RC circuit are grounded after passing through the switching MOS transistor, and enter the voltage discharge process; After the voltage discharge is completed, control the switching MOS transistors in the positive voltage discharge MOS transistor module and the negative voltage discharge MOS transistor module to disconnect through the first switch module and the second switch module, and re-obtain a new signal to be collected.

6. The method according to claim 5, wherein Before collecting the peak voltage through the positive / negative voltage isolation operational amplifier module and the ADC after storing the target signal through the RC circuit, the method further includes: Compensate for the leakage current of the selection diode through a compensation diode.

7. The method according to claim 6, wherein Before obtaining the signal to be collected through the multiplexer, the method further includes: Isolate the selection diode on the peak voltage storage unit and connect the selection diode to a first detection circuit; Input a detection voltage signal to the positive electrode of the selection diode in the first detection circuit, and detect the reverse current and diode temperature of the selection diode in real time to obtain first detection data, where the first detection data is a fitting curve of the operating temperature and reverse current of the selection diode, and the detection voltage signal is of the same type as the signal to be collected; Isolate the compensation diode on the peak voltage storage unit and connect it to the second detection circuit; Input a detection voltage signal to the negative electrode of the compensation diode in the second detection circuit, and detect the reverse current and diode temperature of the compensation diode in real time to obtain second detection data, where the second detection data is a fitting curve of the operating temperature and reverse current of the compensation diode.

8. The method according to claim 7, characterized in that, After compensating for the leakage current of the strobe diode through the compensation diode and before collecting the peak voltage through the positive and negative voltage isolation operational amplifier and ADC, the collection method further includes: Detect the first temperature of the strobe diode and the second temperature of the compensation diode in real time; Determine the real-time reverse current value through the first temperature and the first detection data; Determine the real-time compensation current value through the second temperature and the second detection data; When the real-time reverse current value and the real-time compensation current value do not meet the preset conditions, adjust the temperatures of the strobe diode and the compensation diode and re-measure until the difference between the real-time reverse current value and the real-time compensation current value meets the preset conditions.

9. A device using the acquisition circuit as claimed in claim 4, characterized in that, Includes: An acquisition unit for acquiring a signal to be acquired through a multiplexer, where the signal to be acquired is a dot screen AC signal; An isolation unit for following and isolating the signal to be acquired through a voltage follower isolation operational amplifier to prevent interference to the signal to be acquired by the entire acquisition circuit; An input unit for inputting the signal to be acquired after following and isolation into the peak voltage storage unit; A first control unit for controlling the switching MOS transistors in the positive voltage discharge MOS transistor module and the negative voltage discharge MOS transistor module to be turned off through the first switch module and the second switch module, so that the strobe diode selects the target signal in the signal to be acquired, and the target signal is a positive voltage signal or a negative voltage signal; A storage unit for storing the target signal through a first RC circuit and a second RC circuit; A first compensation unit for compensating for the leakage current of the switching MOS transistor through a compensation MOS transistor; An acquisition unit for acquiring the peak voltage through a positive / negative voltage isolation operational amplifier module and an ADC; A second control unit for controlling the switching MOS transistors in the positive voltage discharge MOS transistor module and the negative voltage discharge MOS transistor module to be turned on through the first switch module and the second switch module, so that the charge and discharge ends of the storage capacitor in the first RC circuit and the second RC circuit are grounded through the switching MOS transistor and enter the voltage discharge process; A third control unit for, after the voltage discharge is completed, controlling the switching MOS transistors in the positive voltage discharge MOS transistor module and the negative voltage discharge MOS transistor module to be turned off through the first switch module and the second switch module and re-acquiring a new signal to be acquired.

10. A device using the acquisition circuit as claimed in claim 4, characterized in that, Includes a processor, a memory, an input / output unit, and a bus; The processor is connected to the memory, the input / output unit, and the bus; The memory stores a program, and the processor calls the program to execute the method according to any one of claims 5 to 8.

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