Dust collector circuit board test method and system

Through dust testing and fast Fourier transform technology, stability and fault evaluation models are built, which solves the problems of difficulty in safety circuit board stability and fault positioning of the vacuum cleaner circuit board, and achieves accurate positioning and effective maintenance of circuit board fault areas.

CN119716489AActive Publication Date: 2025-03-28SUZHOU HANWA ELECTRONIC TECH CO LTD
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Patent Information

Application Number
CN202411994991.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-31
Publication Date
2025-03-28
Estimated Expiration
2044-12-31

AI Technical Summary

Technical Problem

Existing circuit board fault detection technology is difficult to accurately judge the operating stability and fault positioning of the vacuum cleaner circuit board, which affects the maintenance and maintenance work.

Method used

Through dust test, simulate the normal operation of the circuit board, collect current, voltage and other signal data, use fast Fourier transform to extract frequency domain characteristics, combine power information and signal information to build a stable evaluation model, and judge whether the circuit board generates unstable signals. If an unstable signal is detected, divide multiple areas and set up test points, collect environmental and electrical information, build an area fault assessment model, and narrow the fault area.

Benefits of technology

It realizes an accurate assessment of the stability and failure risk of the vacuum cleaner circuit board in a dusty environment, accurately locates the fault area, and improves the efficiency of maintenance and maintenance.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The invention discloses a dust collector circuit board testing method and system, and particularly relates to the technical field of circuit testing, and the method specifically comprises the steps: simulating the normal operation process of a dust collector circuit board after the dust collector circuit board passes a dust test, and obtaining the power information of the dust collector circuit board according to the current and voltage of the dust collector circuit board; signal information of the dust collector circuit board is determined by using fast Fourier transform, a stability evaluation model is constructed, whether the circuit board generates unstable signals or not is judged, when the unstable signals are generated, the dust collector circuit board is divided into a plurality of areas, and a test point is arranged in each area; according to the method, the environment information and the electrical information of the test points in the area are determined, the area fault assessment model is constructed, the possible fault range of the circuit board is narrowed, the stability and the fault risk of the circuit board can be simulated and assessed under the condition that the dust collector circuit board is interfered by dust, and the fault source can be found accurately.
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Description

Technical Field

[0001] The present invention relates to the technical field of circuit testing, and more specifically, to a vacuum cleaner circuit board testing method and system. Background Art

[0002] During the normal operation of the vacuum cleaner, the circuit board is subject to various environmental factors, including temperature, humidity, dust, etc. During long-term use, the circuit board may malfunction due to dust accumulation, thus affecting the performance and stability of the device; In the prior art, the circuit board power supply parameter testing system and method of the invention patent CN111142008A solves the problem that the traditional testing method uses multiple instruments such as oscilloscopes and multimeters to test, and can realize automatic testing of the power supply parameters of the circuit board to be tested; In order to ensure the normal operation of the vacuum cleaner and extend its service life, it is necessary to carry out dust testing on the vacuum cleaner circuit board before it leaves the factory to detect potential faults. The existing circuit board fault detection technology is not easy to judge the stability of the circuit board operation, and the location of the circuit board fault is relatively vague, and the specific area of ​​the fault cannot be accurately identified, thus affecting subsequent repair and maintenance work.

[0003] In order to solve the above defects, a technical solution is now provided. Summary of the invention

[0004] In order to overcome the above-mentioned defects of the prior art, an embodiment of the present invention provides a vacuum cleaner circuit board testing method and system to solve the problems raised in the above-mentioned background technology.

[0005] To achieve the above object, the present invention provides the following technical solutions: A vacuum cleaner circuit board testing method specifically comprises the following steps: S1: After the vacuum cleaner circuit board passes the dust test, simulate the normal operation process of the vacuum cleaner circuit board, obtain the power information of the vacuum cleaner circuit board according to the current and voltage of the vacuum cleaner circuit board, and use fast Fourier transform to determine the signal information of the vacuum cleaner circuit board; S2: Analyze the power information and signal information of the vacuum cleaner circuit board together, build a stability evaluation model, and determine whether the circuit board generates an unstable signal; S3: when an unstable signal is generated, the vacuum cleaner circuit board is divided into a plurality of regions, and a test point is set in each region to determine environmental information and electrical information at the test point in the region; S4: Comprehensively analyze the environmental information and electrical information of the test points in the area, build a regional fault assessment model, and narrow the scope of possible circuit board failures.

[0006] In a preferred embodiment, the power information of the vacuum cleaner circuit board includes: The power information of the vacuum cleaner circuit board is represented by a power loss abnormality coefficient; The logic for obtaining the power loss abnormality coefficient is as follows: simulating the normal operation process of the vacuum cleaner circuit board, setting a monitoring interval, determining the input power of the vacuum cleaner circuit board according to the input current and input voltage of the vacuum cleaner circuit board in the monitoring interval, and determining the output power of the vacuum cleaner circuit board according to the output current and output voltage of the vacuum cleaner circuit board in the monitoring interval; The input power of the vacuum cleaner circuit board and the output power of the vacuum cleaner circuit board in the monitoring interval are marked as: and , where i=1, 2, 3, ..., I, I is a positive integer, and i is the number of the current and voltage collected in the monitoring interval; Calculate the power loss abnormality coefficient using the following formula: in, In a preferred embodiment, the signal information of the vacuum cleaner circuit board includes: The signal information of the vacuum cleaner circuit board is represented by the operating frequency fluctuation coefficient; The logic for obtaining the operating frequency fluctuation coefficient is as follows: simulate the normal operation process of the vacuum cleaner circuit board, use fast Fourier transform to convert the time domain signal of the circuit board into the frequency domain signal, determine the number of samples N of the signal in the monitoring interval, and determine the frequency resolution. ,in, , is the sampling frequency; Determine the frequency value of the circuit board within the monitoring interval, and mark the frequency value of the circuit board within the monitoring interval as: Where, k=0, 1, 2, ..., N-1, k is the index of the fast Fourier transform; Calculate the amplitude of the circuit board frequency value within the monitoring interval. The calculation formula is: ;in, is the frequency domain signal after fast Fourier transform, is the real part of the frequency value for each board, is the imaginary part of the frequency value of each circuit board; Set an amplitude threshold, compare the amplitude of the circuit board frequency value in the monitoring interval with the amplitude threshold, determine the amplitude of the frequency value greater than the amplitude threshold, take the amplitude of the frequency value greater than the amplitude threshold as the main frequency value of the circuit board in the monitoring interval, and mark the main frequency value of the circuit board in the monitoring interval as: , where n=1, 2, 3, ..., m, m is a positive integer, and n is the number of the main frequency in the monitoring interval; Sum the main frequency values ​​and divide them by the total number of data points to get the average main frequency value of the vacuum cleaner circuit board. The calculation formula is: ;in, is the average main frequency value of the vacuum cleaner circuit board; Calculate the standard deviation of the main frequency of the vacuum cleaner circuit board using the formula: ;in, is the standard deviation of the main frequency of the vacuum cleaner circuit board; Calculate the coefficient of variation of the vacuum cleaner circuit board using the formula: ;in, is the coefficient of variation of the vacuum cleaner circuit board; Calculate the operating frequency fluctuation coefficient using the following formula: ;in, is the operating frequency fluctuation coefficient.

[0007] In a preferred embodiment, determining whether the circuit board generates an unstable signal includes: The power loss abnormality coefficient and the operating frequency fluctuation coefficient are weighted and calculated to construct a stable assessment model and generate an unstable assessment coefficient. The calculation formula is: ;in, is the instability assessment coefficient, and is the proportional coefficient of power loss abnormality coefficient and operating frequency fluctuation coefficient, and They are both greater than 0; An unstable assessment coefficient threshold is set, and the unstable assessment coefficient is compared with the unstable assessment coefficient threshold. If the unstable assessment coefficient is greater than the unstable assessment coefficient threshold, an unstable signal is generated; if the unstable assessment coefficient is less than the unstable assessment coefficient threshold, no signal is generated.

[0008] In a preferred embodiment, the environmental information at the test point in the area includes: The environmental information at the test points in the area is represented by the hotspot position deviation coefficient; The logic for obtaining the hotspot position deviation coefficient is: determine the specific coordinates of the test point position on the circuit board, and mark the specific coordinates of the test point position on the circuit board as: , where j=1, 2, 3, ..., J, J is a positive integer, and j is the number of the test point on the circuit board; Cluster the test points on the circuit board using the DBSCAN clustering algorithm and set the field radius , the area radius As the maximum distance between test points, set the minimum number of points minPts, and use the minimum number of points minPts as the field radius Minimum number of test points within ; Traverse each test point in the circuit board and check whether it has been visited; For each unvisited test point, calculate the radius of each unvisited test point in the field If the number of neighboring points is greater than or equal to minPts, the unvisited test points are taken as core points and a new cluster is created. If the number of neighboring points is less than minPts, the unvisited test points are taken as boundary points or noise points. All points in the neighborhood of the core point are marked as part of the cluster, and the neighborhood of the new core point is repeatedly checked. The cluster is continued to expand until there are no new core points to expand. All test points on the circuit board are classified by using the DBSCAN clustering algorithm to determine the core points, boundary points and noise points of the vacuum cleaner circuit board, and to determine the cluster where the test points on the vacuum cleaner circuit board are located; Set the temperature threshold, subtract the hotspot temperature at the test point from the temperature threshold, obtain the temperature deviation of each test point in the cluster, and mark the temperature deviation of each test point in the cluster as: , where q=1, 2, 3, ..., Q, Q is a positive integer, q is the number of the vacuum cleaner circuit board cluster, c=1, 2, 3, ..., C, C is a positive integer, c is the number of the test point in the qth cluster; The average temperature deviation and the standard deviation of the temperature deviation of each test point in the cluster are obtained, and the average temperature deviation and the standard deviation of the temperature deviation of each test point in the cluster are marked as: and ;in, , If the test point of the vacuum cleaner circuit board is not a noise point, the calculation formula of the hot spot position deviation coefficient of the test point is: , if the test point of the vacuum cleaner circuit board is a noise point, the calculation formula of the hot spot position deviation coefficient of the test point is: ;in, is the hotspot position deviation coefficient of the test point, is the temperature deviation of the noise point, e=1, 2, 3, ..., E, E is a positive integer, e is the number of the noise point on the vacuum cleaner circuit board, is the standard deviation of the temperature deviation of the non-noise point on the vacuum cleaner circuit board.

[0009] In a preferred embodiment, the electrical information at the test points within the region includes: The electrical information at the test point in the area is represented by the current deviation stability coefficient and the impedance anomaly coefficient; the acquisition logic of the current deviation stability coefficient is: set a unit time period, determine the current value of the test point in the set unit time period, and mark the current value of the test point in the set unit time period as: , where p=1, 2, 3, ..., P, P is a positive integer, and p is the number of the test point; Set the range current value threshold of the test point and mark the range current value threshold of the test point as: , compare the current value of the test point in the set unit time period with the range current value threshold of the test point, and re-mark the current value of the test point in the set unit time period that exceeds the range current value threshold as: , where r=1, 2, 3, ..., R, R is a positive integer, and r is the number of the current value of the range current value threshold; Calculate the current deviation stability coefficient, the calculation formula is: in, is the current deviation stability factor; The logic for obtaining the impedance anomaly coefficient is as follows: by applying a known excitation signal to the test point to make the circuit react, using an impedance detection device to analyze the impedance characteristics of the circuit, obtaining the impedance value at the test point, and marking the real part of the impedance value at the test point as: , mark the imaginary part of the impedance value at the test point as: ; Calculate the phase angle of the impedance at the test point using the formula: ;in, is the phase angle of the impedance at the test point;

[0010] Set the standard impedance angle and mark it as: ; Calculate the impedance anomaly coefficient using the following formula: ;in, is the impedance anomaly coefficient.

[0011] In a preferred embodiment, reducing the range of possible circuit board failures includes: The hotspot position deviation coefficient, current deviation stability coefficient and impedance anomaly coefficient are weighted and calculated to construct a regional fault assessment model and generate a regional fault assessment coefficient. The calculation formula of the regional fault assessment coefficient is: ;in , is the regional fault assessment coefficient of the pth test point, , , is the proportional coefficient of the hotspot position deviation coefficient, the current deviation stability coefficient, and the impedance anomaly coefficient, , , They are both greater than 0; Set a regional fault assessment coefficient threshold, compare the regional fault assessment coefficient of each test point on the vacuum cleaner circuit board with the regional fault assessment coefficient threshold, if the regional fault assessment coefficient is greater than the regional fault assessment coefficient threshold, mark the test point as a fault point, if the regional fault assessment coefficient is less than the regional fault assessment coefficient threshold, do not mark it.

[0012] In a preferred embodiment, a vacuum cleaner circuit board testing system includes a dust testing module, a data acquisition module, a stability assessment module, a test point division module, and a regional fault assessment module, and the modules are signal-connected; Dust test module, used to simulate the running state of the vacuum cleaner circuit board after the dust test; A data acquisition module is used to collect power information and signal information of the vacuum cleaner circuit board, and collect environmental information and electrical information at the test points in the area; The stability evaluation module is used to combine the power information and signal information of the vacuum cleaner circuit board to build a stability evaluation model, generate an instability evaluation coefficient, and compare it with a threshold value to determine whether the circuit board generates an unstable signal; A test point division module is used to divide the circuit board into multiple areas when an unstable signal is detected, set test points in each area, and use a clustering algorithm and increase stimulus signals according to the locations of the test points; The regional fault assessment module is used to combine the environmental information and electrical information at the test points in the area, build a regional fault assessment model, generate a regional fault assessment coefficient, and compare it with the threshold, and mark the test points that are less than the threshold as fault points.

[0013] Technical effects and advantages of the present invention: The present invention simulates the running state of the circuit board in a dusty environment through a dust test, collects signal data such as current and voltage, extracts frequency domain features through fast Fourier transform, combines the power information of the circuit board with the frequency domain signal information, and constructs a stability evaluation model to determine whether the circuit board has unstable signals or potential faults; According to the detection result of unstable signals on the circuit board, the circuit board is divided into multiple areas, and a test point is set in each area, and the environmental information and electrical information of each test point are collected. By comprehensively analyzing the data of each test point in the area, a fault assessment model is constructed to further narrow the area where the circuit board may fail and accurately locate the problem. The present invention helps to simulate and evaluate the stability and failure risk of the circuit board of the vacuum cleaner under dust interference, and helps to accurately find the source of the fault. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to facilitate understanding by those skilled in the art, the present invention is further described below in conjunction with the accompanying drawings; Figure 1 It is a schematic diagram of a flow chart of a vacuum cleaner circuit board testing method of the present invention; Figure 2 The present invention is a schematic structural diagram of a vacuum cleaner circuit board testing system. DETAILED DESCRIPTION

[0015] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. Example

[0016] like Figure 1 A flow chart of a vacuum cleaner circuit board testing method of the present invention is provided, which specifically includes the following steps: S1: After the vacuum cleaner circuit board passes the dust test, simulate the normal operation process of the vacuum cleaner circuit board, obtain the power information of the vacuum cleaner circuit board according to the current and voltage of the vacuum cleaner circuit board, and use fast Fourier transform to determine the signal information of the vacuum cleaner circuit board; S2: Analyze the power information and signal information of the vacuum cleaner circuit board together, build a stability evaluation model, and determine whether the circuit board generates an unstable signal; S3: when an unstable signal is generated, the vacuum cleaner circuit board is divided into a plurality of regions, and a test point is set in each region to determine environmental information and electrical information at the test point in the region; S4: Comprehensively analyze the environmental information and electrical information of the test points in the area, build a regional fault assessment model, and narrow the scope of possible circuit board failures.

[0017] After the circuit board has passed the dust test through a vacuum cleaner, observe the actual use of the circuit board in different dust environments. By collecting the electrical characteristics of the circuit board during use, evaluate the stability of the circuit board. When the stability of the circuit board is poor, divide the circuit board into multiple test points to determine the area where the fault occurs.

[0018] Among them, the impact of dust on vacuum cleaner circuit boards is mainly reflected in electrical performance, heat dissipation performance, signal interference and long-term reliability, including: Short circuit risk: Dust particles may contain conductive components (such as metal dust), which can cause short circuits between different circuits when attached to the surface of the circuit board, causing abnormal current, component damage, or equipment failure to work properly; Increased impedance: Dust adheres to the circuit board and may form an insulating layer, resulting in increased impedance. Especially at the contact points and solder joints, the adhered dust will affect the conduction performance and cause poor electrical connection; Reduced heat dissipation effect: Dust adheres to the circuit board, especially the surface of heat dissipation components (such as heat sinks, heat dissipation holes and inductors), forming a thermal insulation layer that hinders the dissipation of heat and causes the temperature of the components to rise.

[0019] By testing the vacuum cleaner circuit board under actual use, the power information and signal information of the vacuum cleaner circuit board are collected. After collection, the power information of the vacuum cleaner circuit board is represented by the power loss abnormality coefficient, and the signal information of the vacuum cleaner circuit board is represented by the operating frequency fluctuation coefficient. The power information and signal information of the vacuum cleaner circuit board are combined for analysis to construct a stability evaluation model to determine the stability of the vacuum cleaner circuit board after the dust test.

[0020] The logic for obtaining the power loss abnormality coefficient is as follows: simulating the normal operation process of the vacuum cleaner circuit board, setting a monitoring interval, determining the input power of the vacuum cleaner circuit board according to the input current and input voltage of the vacuum cleaner circuit board in the monitoring interval, and determining the output power of the vacuum cleaner circuit board according to the output current and output voltage of the vacuum cleaner circuit board in the monitoring interval; The input power of the vacuum cleaner circuit board and the output power of the vacuum cleaner circuit board in the monitoring interval are marked as: and , where i=1, 2, 3, ..., I, I is a positive integer, and i is the number of the current and voltage collected in the monitoring interval; It should be noted that the monitoring interval is a specific length of time. The monitoring interval represents a fixed time period that simulates the normal operation of the vacuum cleaner circuit board. The instantaneous power at the sampling point is determined by sampling the instantaneous current and instantaneous voltage within the monitoring interval.

[0021] Calculate the power loss abnormality coefficient using the following formula: ;in, is the power loss anomaly coefficient.

[0022] It can be seen from the formula that the larger the power loss abnormality coefficient is, the more it indicates that the vacuum cleaner circuit board has abnormal power consumption within the monitoring interval, and there may be a decrease in efficiency.

[0023] The logic for obtaining the operating frequency fluctuation coefficient is as follows: simulate the normal operation process of the vacuum cleaner circuit board, use fast Fourier transform to convert the time domain signal of the circuit board into the frequency domain signal, determine the number of samples N of the signal in the monitoring interval, and determine the frequency resolution. ,in, , is the sampling frequency; Determine the frequency value of the circuit board within the monitoring interval, and mark the frequency value of the circuit board within the monitoring interval as: , where k = 0, 1, 2, ..., N-1, and k is the index of the fast Fourier transform; Calculate the amplitude of the circuit board frequency value within the monitoring interval. The calculation formula is: ;in, is the frequency domain signal after fast Fourier transform, is the real part of the frequency value for each board, is the imaginary part of the frequency value of each circuit board; Set an amplitude threshold, compare the amplitude of the circuit board frequency value in the monitoring interval with the amplitude threshold, determine the amplitude of the frequency value greater than the amplitude threshold, take the amplitude of the frequency value greater than the amplitude threshold as the main frequency value of the circuit board in the monitoring interval, and mark the main frequency value of the circuit board in the monitoring interval as: , where n=1, 2, 3, ..., m, m is a positive integer, and n is the number of the main frequency in the monitoring interval; Sum the main frequency values ​​and divide them by the total number of data points to get the average main frequency value of the vacuum cleaner circuit board. The calculation formula is: ;in, is the average main frequency value of the vacuum cleaner circuit board; Calculate the standard deviation of the main frequency of the vacuum cleaner circuit board using the formula: ;in, is the standard deviation of the main frequency of the vacuum cleaner circuit board; Calculate the coefficient of variation of the vacuum cleaner circuit board using the formula: ;in, is the coefficient of variation of the vacuum cleaner circuit board; Calculate the operating frequency fluctuation coefficient using the following formula: ;in, is the operating frequency fluctuation coefficient.

[0024] It can be seen from the formula that the larger the operating frequency fluctuation coefficient, the greater the frequency fluctuation of the circuit board, which means that the circuit board may have performance degradation, and dust or other environmental factors may affect the stability of the circuit board.

[0025] The power loss abnormality coefficient and the operating frequency fluctuation coefficient are weighted and calculated to construct a stable assessment model and generate an unstable assessment coefficient. The calculation formula is: ;in, is the instability assessment coefficient, and is the proportional coefficient of power loss abnormality coefficient and operating frequency fluctuation coefficient, and Both are greater than 0.

[0026] It can be seen from the formula that the larger the power loss abnormality coefficient and the operating frequency fluctuation coefficient, the larger the instability assessment coefficient, which means that dust or other environmental factors may affect the stability of the circuit board. It is necessary to test the vacuum cleaner circuit board to determine the cause of the fault. Conversely, the smaller the power loss abnormality coefficient and the operating frequency fluctuation coefficient, the smaller the instability assessment coefficient, which means that the vacuum cleaner operates normally after passing the dust test.

[0027] Set the instability assessment coefficient threshold, and compare the instability assessment coefficient with the instability assessment coefficient threshold. If the instability assessment coefficient is greater than the instability assessment coefficient threshold, an unstable signal is generated, indicating that the vacuum cleaner circuit board cannot operate normally and stably, and the dust on the circuit board may have a certain impact on the circuit. If the instability assessment coefficient is less than the instability assessment coefficient threshold, no signal is generated, indicating that the vacuum cleaner circuit board has passed the stability test in the dust test.

[0028] According to the unstable signal, the vacuum cleaner circuit board is divided into multiple areas, and a test point is set in each area. The fault area of ​​the circuit board is judged by analyzing the test points. The environmental information and electrical information of the test points in the area are collected, and the environmental information is represented by the hot spot position deviation coefficient. The electrical information is determined by the current deviation stability coefficient and the impedance anomaly coefficient. The environmental information and electrical information of the test points in the area are comprehensively analyzed to construct a regional fault assessment model to determine the possibility of faults in various areas of the vacuum cleaner circuit board.

[0029] It should be noted that the purpose of setting test points on the circuit board is to obtain the operating status of the circuit, fault warning or performance analysis by monitoring key parameters such as current, temperature and impedance. By setting multiple test points, especially in key circuit parts, it can help locate the fault.

[0030] The logic for obtaining the hotspot position deviation coefficient is: determine the specific coordinates of the test point position on the circuit board, and mark the specific coordinates of the test point position on the circuit board as: , where j=1, 2, 3, ..., J, J is a positive integer, and j is the number of the test point on the circuit board; Cluster the test points on the circuit board using the DBSCAN clustering algorithm and set the field radius , the area radius As the maximum distance between test points, set the minimum number of points minPts, and use the minimum number of points minPts as the field radius Minimum number of test points within ; Traverse each test point in the circuit board and check whether it has been visited; For each unvisited test point, calculate the radius of each unvisited test point in the field If the number of neighboring points is greater than or equal to minPts, the unvisited test points are taken as core points and a new cluster is created. If the number of neighboring points is less than minPts, the unvisited test points are taken as boundary points or noise points. All points in the neighborhood of the core point are marked as part of the cluster, and the neighborhood is repeatedly checked for new core points, continuing to expand the cluster until there are no new core points to expand; All test points on the circuit board are classified by using the DBSCAN clustering algorithm to determine the core points, boundary points and noise points of the vacuum cleaner circuit board, and to determine the cluster where the test points on the vacuum cleaner circuit board are located; Set the temperature threshold, subtract the hotspot temperature at the test point from the temperature threshold, obtain the temperature deviation of each test point in the cluster, and mark the temperature deviation of each test point in the cluster as , where q=1, 2, 3, ..., Q, Q is a positive integer, q is the number of the vacuum cleaner circuit board cluster, c=1, 2, 3, ..., C, C is a positive integer, c is the number of the test point in the qth cluster; It should be noted that the temperature threshold is usually determined by the staff based on the actual situation. The temperature threshold represents a standard temperature range. Temperature deviations beyond this range may indicate some abnormality or failure risk. The staff may determine the temperature threshold at the location of the circuit board cluster based on previous experience and understanding of the operating characteristics of the equipment. The average temperature deviation and the standard deviation of the temperature deviation of each test point in the cluster are obtained, and the average temperature deviation and the standard deviation of the temperature deviation of each test point in the cluster are marked as: and ;in, , ; If the test point of the vacuum cleaner circuit board is not a noise point, the calculation formula of the hot spot position deviation coefficient of the test point is: , if the test point of the vacuum cleaner circuit board is a noise point, the calculation formula of the hot spot position deviation coefficient of the test point is: ;in, is the hotspot position deviation coefficient of the test point, is the temperature deviation of the noise point, e=1, 2, 3, ..., E, E is a positive integer, e is the number of the noise point on the vacuum cleaner circuit board, is the standard deviation of the temperature deviation of the non-noise point on the vacuum cleaner circuit board.

[0031] It can be seen from the formula that the larger the hot spot position deviation coefficient of the test point, the greater the degree to which the temperature of the test point deviates from the normal operating range. The possible presence of dust adhesion may cause poor heat dissipation of equipment components and lead to temperature increase.

[0032] It should be noted that the DBSCAN clustering algorithm can determine which points belong to the same cluster based on the spatial density between the test points and determine the spatial similarity of the test points. Because the test points in some areas may have more similar temperature distributions due to physical layout, DBSCAN can effectively cluster these test points and identify which points belong to the same hot zone (i.e., areas with similar temperatures). Secondly, the fault point is not necessarily the location of each test point on the vacuum cleaner circuit board. The test points are usually predetermined locations for monitoring and recording conditions such as temperature, and are used to detect the working status and operating temperature on the circuit board. These points do not necessarily coincide directly with the fault point. The fault point usually causes the temperature of the surrounding test points to rise, and the temperature changes of these test points can serve as an important basis for fault diagnosis. For example, the abnormal temperature in a certain area may be due to the failure of a nearby component, resulting in heat accumulation; When the test points on the circuit board are close to each other, the temperature will diffuse through heat conduction. The temperature increase of a component may affect the temperature of the surrounding test points. Therefore, it is more appropriate to quantify the temperature deviation of the test points through the DBSCAN clustering algorithm to identify abnormal conditions. Since the position deviation between the noise point and other test points is large, the mutual influence is small, and it is more likely to be caused by an independent fault or abnormal heat source.

[0033] The acquisition logic of the current deviation stability coefficient is: set a unit time period, determine the current value of the test point in the set unit time period, and mark the current value of the test point in the set unit time period as: , where p=1, 2, 3, ..., P, P is a positive integer, and p is the number of the test point; It should be noted that the unit time period is a specific length of time set by professional staff to reflect the change of the current at the test point, which will not be elaborated here.

[0034] Set the range current value threshold of the test point and mark the range current value threshold of the test point as: , compare the current value of the test point in the set unit time period with the range current value threshold of the test point, and re-mark the current value of the test point in the set unit time period that exceeds the range current value threshold as: , where r=1, 2, 3, ..., R, R is a positive integer, and r is the number of the current value exceeding the range current value threshold; Calculate the current deviation stability coefficient, the calculation formula is: ;in, is the current deviation stability factor; It can be seen from the formula that the greater the current deviation from the stability coefficient, the greater the deviation compared with the normal stable working state, which means that the partial load of the circuit corresponding to the test point may have experienced drastic fluctuations or poor contact, and may also be affected by external electromagnetic interference or noise.

[0035] The logic for obtaining the impedance anomaly coefficient is as follows: by applying a known excitation signal to the test point to make the circuit react, using an impedance detection device to analyze the impedance characteristics of the circuit, obtaining the impedance value at the test point, and marking the real part of the impedance value at the test point as: , mark the imaginary part of the impedance value at the test point as: ; It should be noted that the known excitation signal is usually an AC power supply with a constant frequency (such as a sine wave), which is used to analyze the impedance characteristics of the circuit. It will not be described in detail here. The impedance detection equipment includes an LCR meter, an impedance analyzer, etc.

[0036] Calculate the phase angle of the impedance at the test point using the formula: ;in, is the phase angle of the impedance at the test point;

[0037] Set the standard impedance angle and mark the standard impedance angle as: It should be noted that the standard impedance angle is determined through design and experiments and is used to evaluate the normal operating status of the equipment, which will not be elaborated here.

[0038] Calculate the impedance anomaly coefficient using the following formula: ; Among them, ; Among them, is the impedance anomaly coefficient.

[0039] It can be seen from the formula that the larger the impedance anomaly coefficient is, the more the impedance characteristics of the test point deviate from the standard value, indicating that there is dust near the test point, which leads to changes in the current path and an increase in local resistance, which in turn leads to changes in impedance.

[0040] It should be noted that a circuit board with excellent performance should have uniform impedance distribution and stable phase angle, indicating that its electrical performance is good and is not affected by pollution or other adverse factors. Generally, the impedance of an excellent circuit board should be close to the normal value at all test points, and the phase angle should change little. On the contrary, a poor quality circuit board may have local impedance increase due to surface contamination (such as dust accumulation, corrosion, static electricity) or electrical faults (such as poor soldering). In these high impedance areas, the phase angle usually changes significantly, indicating that the relationship between current and voltage has changed abnormally, affecting the normal operation of the circuit.

[0041] The hotspot position deviation coefficient, current deviation stability coefficient and impedance anomaly coefficient are weighted and calculated to construct a regional fault assessment model and generate a regional fault assessment coefficient. The calculation formula of the regional fault assessment coefficient is: ;in, is the regional fault assessment coefficient of the pth test point, , , is the proportional coefficient of the hotspot position deviation coefficient, the current deviation stability coefficient, and the impedance anomaly coefficient, is the proportional coefficient of the hotspot position deviation coefficient, the current deviation stability coefficient, and the impedance anomaly coefficient, , , Both are greater than 0.

[0042] It should be noted that , , Set up by professionals in the field, usually , , The sum of is 1.

[0043] It can be seen from the formula that the larger the hotspot position deviation coefficient, the current deviation stability coefficient and the impedance anomaly coefficient, the larger the regional fault assessment coefficient, indicating that the anti-dust interference ability of the test point area may be weaker. Conversely, the smaller the hotspot position deviation coefficient, the current deviation stability coefficient and the impedance anomaly coefficient, the smaller the regional fault assessment coefficient, indicating that the anti-dust interference ability of the test point area may be stronger.

[0044] Set the regional fault assessment coefficient threshold, and compare the regional fault assessment coefficient of each test point on the vacuum cleaner circuit board with the regional fault assessment coefficient threshold. If the regional fault assessment coefficient is greater than the regional fault assessment coefficient threshold, the test point is marked as a fault point, indicating that the area where the test point is located is more likely to have a fault and has a weaker ability to resist dust interference. If the regional fault assessment coefficient is less than the regional fault assessment coefficient threshold, no marking is performed, indicating that the area where the test point is located is less likely to have a fault and has a stronger ability to resist dust interference.

[0045] The present invention simulates the running state of the circuit board in a dusty environment through a dust test, collects signal data such as current and voltage, extracts frequency domain features through fast Fourier transform, combines the power information of the circuit board with the frequency domain signal information, and constructs a stability evaluation model to determine whether the circuit board has unstable signals or potential faults; According to the detection result of unstable signals on the circuit board, the circuit board is divided into multiple areas, and a test point is set in each area, and the environmental information and electrical information of each test point are collected. By comprehensively analyzing the data of each test point in the area, a fault assessment model is constructed to further narrow the area where the circuit board may fail and accurately locate the problem. The present invention helps to simulate and evaluate the stability and failure risk of the circuit board of the vacuum cleaner under dust interference, and helps to accurately find the source of the fault. Example

[0046] like Figure 2 A schematic diagram of the structure of a vacuum cleaner circuit board test system of the present invention is given, which specifically includes a dust test module, a data acquisition module, a stability evaluation module, a test point division module and a regional fault evaluation module, and the modules are signal connected; Dust test module, used to simulate the running state of the vacuum cleaner circuit board after the dust test; A data acquisition module is used to collect power information and signal information of the vacuum cleaner circuit board, and collect environmental information and electrical information at the test points in the area; The stability evaluation module is used to combine the power information and signal information of the vacuum cleaner circuit board to build a stability evaluation model, generate an instability evaluation coefficient, and compare it with a threshold value to determine whether the circuit board generates an unstable signal; A test point division module is used to divide the circuit board into multiple areas when an unstable signal is detected, set test points in each area, and use a clustering algorithm and increase stimulus signals according to the locations of the test points; The regional fault assessment module is used to combine the environmental information and electrical information at the test points in the area, build a regional fault assessment model, generate a regional fault assessment coefficient, and compare it with the threshold, and mark the test points that are less than the threshold as fault points.

[0047] The above formulas are all dimensionless and numerical calculations. The formula is a formula for the most recent real situation obtained by collecting a large amount of data and performing software simulation. The preset parameters in the formula are set by technicians in this field according to actual conditions.

[0048] The above embodiments can be implemented in whole or in part by software, hardware, firmware or any other combination. When implemented by software, the above embodiments can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from one website site, computer, server or data center to another website site, computer, server or data center by wired or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that contains one or more available media sets. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium. The semiconductor medium can be a solid-state hard disk.

[0049] It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0050] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0051] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0052] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0053] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage media include: various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memories (ROM), random access memories (RAM), magnetic disks or optical disks.

[0054] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A vacuum cleaner circuit board testing method, characterized in that: The specific steps include: S1: After the vacuum cleaner circuit board passes the dust test, simulate the normal operation process of the vacuum cleaner circuit board, obtain the power information of the vacuum cleaner circuit board according to the current and voltage of the vacuum cleaner circuit board, and use fast Fourier transform to determine the signal information of the vacuum cleaner circuit board; S2: Analyze the power information and signal information of the vacuum cleaner circuit board together, build a stability evaluation model, and determine whether the circuit board generates an unstable signal; S3: when an unstable signal is generated, the vacuum cleaner circuit board is divided into a plurality of regions, and a test point is set in each region to determine environmental information and electrical information at the test point in the region; S4: Comprehensively analyze the environmental information and electrical information of the test points in the area, build a regional fault assessment model, and narrow the scope of possible circuit board failures.

2. A vacuum cleaner circuit board testing method according to claim 1, characterized in that: Power information of the vacuum cleaner circuit board, including: The power information of the vacuum cleaner circuit board is represented by a power loss abnormality coefficient; The logic for obtaining the power loss abnormality coefficient is as follows: simulating the normal operation process of the vacuum cleaner circuit board, setting a monitoring interval, determining the input power of the vacuum cleaner circuit board according to the input current and input voltage of the vacuum cleaner circuit board in the monitoring interval, and determining the output power of the vacuum cleaner circuit board according to the output current and output voltage of the vacuum cleaner circuit board in the monitoring interval; The input power of the vacuum cleaner circuit board and the output power of the vacuum cleaner circuit board in the monitoring interval are marked as: and , where i=1, 2, 3, ..., I, I is a positive integer, and i is the number of the current and voltage collected in the monitoring interval; Calculate the power loss abnormality coefficient using the following formula: ;in, is the power loss anomaly coefficient.

3. A vacuum cleaner circuit board testing method according to claim 2, characterized in that: Signal information of the vacuum cleaner circuit board, including: The signal information of the vacuum cleaner circuit board is represented by the operating frequency fluctuation coefficient; The logic for obtaining the operating frequency fluctuation coefficient is as follows: simulate the normal operation process of the vacuum cleaner circuit board, use fast Fourier transform to convert the time domain signal of the circuit board into the frequency domain signal, determine the number of samples N of the signal in the monitoring interval, and determine the frequency resolution. ,in, , is the sampling frequency; Determine the frequency value of the circuit board within the monitoring interval, and mark the frequency value of the circuit board within the monitoring interval as: , where k = 0, 1, 2, ..., N-1, and k is the index of the fast Fourier transform; Calculate the amplitude of the circuit board frequency value within the monitoring interval. The calculation formula is: ;in, is the frequency domain signal after fast Fourier transform, is the real part of the frequency value for each board, is the imaginary part of the frequency value of each circuit board; Set an amplitude threshold, compare the amplitude of the circuit board frequency value in the monitoring interval with the amplitude threshold, determine the amplitude of the frequency value greater than the amplitude threshold, take the amplitude of the frequency value greater than the amplitude threshold as the main frequency value of the circuit board in the monitoring interval, and mark the main frequency value of the circuit board in the monitoring interval as: , where n=1, 2, 3, ..., m, m is a positive integer, and n is the number of the main frequency in the monitoring interval; Sum the main frequency values ​​and divide them by the total number of data points to get the average main frequency value of the vacuum cleaner circuit board. The calculation formula is: ;in, is the average main frequency value of the vacuum cleaner circuit board; Calculate the standard deviation of the main frequency of the vacuum cleaner circuit board using the formula: ;in, is the standard deviation of the main frequency of the vacuum cleaner circuit board; Calculate the coefficient of variation of the vacuum cleaner circuit board using the formula: ;in, is the coefficient of variation of the vacuum cleaner circuit board; Calculate the operating frequency fluctuation coefficient using the following formula: ;in, is the operating frequency fluctuation coefficient.

4. A vacuum cleaner circuit board testing method according to claim 3, characterized in that: Determine if the board generates unstable signals, including: The power loss abnormality coefficient and the operating frequency fluctuation coefficient are weighted and calculated to construct a stable assessment model and generate an unstable assessment coefficient. The calculation formula is: ;in, is the instability assessment coefficient, and is the proportional coefficient of power loss abnormality coefficient and operating frequency fluctuation coefficient, and They are both greater than 0; An unstable assessment coefficient threshold is set, and the unstable assessment coefficient is compared with the unstable assessment coefficient threshold. If the unstable assessment coefficient is greater than the unstable assessment coefficient threshold, an unstable signal is generated; if the unstable assessment coefficient is less than the unstable assessment coefficient threshold, no signal is generated.

5. A vacuum cleaner circuit board testing method according to claim 4, characterized in that: Environmental information at the test points within the area, including: The environmental information at the test points in the area is represented by the hotspot position deviation coefficient; The logic for obtaining the hotspot position deviation coefficient is: determine the specific coordinates of the test point position on the circuit board, and mark the specific coordinates of the test point position on the circuit board as: , where j=1, 2, 3, ..., J, J is a positive integer, and j is the number of the test point on the circuit board; Cluster the test points on the circuit board using the DBSCAN clustering algorithm and set the field radius , the area radius As the maximum distance between test points, set the minimum number of points minPts, and use the minimum number of points minPts as the field radius Minimum number of test points within ; Traverse each test point in the circuit board and check whether it has been visited; For each unvisited test point, calculate the radius of each unvisited test point in the field If the number of neighboring points is greater than or equal to minPts, the unvisited test points are taken as core points and a new cluster is created. If the number of neighboring points is less than minPts, the unvisited test points are taken as boundary points or noise points. All points in the neighborhood of the core point are marked as part of the cluster, and the neighborhood is repeatedly checked for new core points, continuing to expand the cluster until there are no new core points to expand; All test points on the circuit board are classified by using the DBSCAN clustering algorithm to determine the core points, boundary points and noise points of the vacuum cleaner circuit board, and to determine the cluster where the test points on the vacuum cleaner circuit board are located; Set the temperature threshold, subtract the hotspot temperature at the test point from the temperature threshold, obtain the temperature deviation of each test point in the cluster, and mark the temperature deviation of each test point in the cluster as: , where q=1, 2, 3, ..., Q, Q is a positive integer, q is the number of the vacuum cleaner circuit board cluster, c=1, 2, 3, ..., C, C is a positive integer, c is the number of the test point in the qth cluster; The average temperature deviation and the standard deviation of the temperature deviation of each test point in the cluster are obtained, and the average temperature deviation and the standard deviation of the temperature deviation of each test point in the cluster are marked as: and ;in, , ; If the test point of the vacuum cleaner circuit board is not a noise point, the calculation formula of the hot spot position deviation coefficient of the test point is: , if the test point of the vacuum cleaner circuit board is a noise point, the calculation formula of the hot spot position deviation coefficient of the test point is: ;in, is the hotspot position deviation coefficient of the test point, is the temperature deviation of the noise point, e=1, 2, 3, ..., E, E is a positive integer, e is the number of the noise point on the vacuum cleaner circuit board, is the standard deviation of the temperature deviation of the non-noise point on the vacuum cleaner circuit board.

6. A vacuum cleaner circuit board testing method according to claim 5, characterized in that: Electrical information at test points within the area, including: The electrical information at the test points in the area is represented by the current deviation stability coefficient and the impedance anomaly coefficient; The acquisition logic of the current deviation stability coefficient is: set a unit time period, determine the current value of the test point in the set unit time period, and mark the current value of the test point in the set unit time period as: , where p=1, 2, 3, ..., P, P is a positive integer, and p is the number of the test point; Set the range current value threshold of the test point and mark the range current value threshold of the test point as: , compare the current value of the test point in the set unit time period with the range current value threshold of the test point, and re-mark the current value of the test point in the set unit time period that exceeds the range current value threshold as: , where r=1, 2, 3, ..., R, R is a positive integer, and r is the number of the current value exceeding the range current value threshold; Calculate the current deviation stability coefficient, the calculation formula is: ;in, is the current deviation stability factor; The logic for obtaining the impedance anomaly coefficient is as follows: by applying a known excitation signal to the test point to make the circuit react, using an impedance detection device to analyze the impedance characteristics of the circuit, obtaining the impedance value at the test point, and marking the real part of the impedance value at the test point as: , mark the imaginary part of the impedance value at the test point as: ; Calculate the phase angle of the impedance at the test point using the formula: ;in, is the phase angle of the impedance at the test point; Set the standard impedance angle and mark it as: ; Calculate the impedance anomaly coefficient using the following formula: ;in, is the impedance anomaly coefficient.

7. A vacuum cleaner circuit board testing method according to claim 6, characterized in that: Narrow down the possible reasons why the board may be at fault, including: The hotspot position deviation coefficient, current deviation stability coefficient and impedance anomaly coefficient are weighted and calculated to construct a regional fault assessment model and generate a regional fault assessment coefficient. The calculation formula of the regional fault assessment coefficient is: ;in, is the regional fault assessment coefficient of the pth test point, , , is the proportional coefficient of the hotspot position deviation coefficient, the current deviation stability coefficient, and the impedance anomaly coefficient, , , They are both greater than 0; Set a regional fault assessment coefficient threshold, compare the regional fault assessment coefficient of each test point on the vacuum cleaner circuit board with the regional fault assessment coefficient threshold, if the regional fault assessment coefficient is greater than the regional fault assessment coefficient threshold, mark the test point as a fault point, if the regional fault assessment coefficient is less than the regional fault assessment coefficient threshold, do not mark it.

8. A vacuum cleaner circuit board testing system, used to implement a vacuum cleaner circuit board testing method according to any one of claims 1 to 7, characterized in that: It includes dust test module, data acquisition module, stability assessment module, test point division module and regional fault assessment module, and the signal connection between the modules; Dust test module, used to simulate the running state of the vacuum cleaner circuit board after the dust test; A data acquisition module is used to collect power information and signal information of the vacuum cleaner circuit board, and collect environmental information and electrical information at the test points in the area; The stability evaluation module is used to combine the power information and signal information of the vacuum cleaner circuit board to build a stability evaluation model, generate an instability evaluation coefficient, and compare it with the threshold to determine whether the circuit board generates an unstable signal; A test point division module is used to divide the circuit board into multiple areas when an unstable signal is detected, set test points in each area, and use a clustering algorithm and increase stimulus signals according to the locations of the test points; The regional fault assessment module is used to combine the environmental information and electrical information at the test points in the area, build a regional fault assessment model, generate a regional fault assessment coefficient, and compare it with the threshold, and mark the test points that are less than the threshold as fault points.

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