Server

Abstract

The invention discloses a server, a plurality of graphics processor nodes are arranged in a first cabinet, the plurality of graphics processor nodes are vertically stacked in sequence, a plurality of switching nodes are arranged in a second cabinet, the plurality of switching nodes are horizontally stacked in sequence, and the graphics processor nodes are connected with the switching nodes. The technical problem that the reliability of the server is poor can be solved, the difficulty of installation and maintenance is reduced, the integrity of signal transmission is improved, and the reliability of the server is improved.

Description

Technical Field

[0001] The present application relates to the technical field of computing devices, and in particular to a server. Background Art

[0002] As the number of parameters in large AI models increases to tens of billions or even hundreds of billions, the memory capacity and computing power of a single GPU can no longer meet the demand. In related technologies, multiple GPUs can be integrated into one physical unit through high-bandwidth interconnection technology to form a server cluster with stronger collaborative computing capabilities. This server cluster is called a supernode server.

[0003] In order to achieve internal cross-node communication, the super-node server needs to deploy a cable tray at the rear of the cabinet. The cable tray can accommodate thousands of high-speed cables to connect the GPU and the switching node. However, the high-density wiring of the cable tray is difficult to locate and repair when a single cable fails. The entire cable needs to be replaced, which is extremely difficult to maintain. In addition, long-distance wiring will cause serious signal integrity problems, resulting in poor server reliability. Summary of the invention

[0004] The present application provides a server to at least solve the problem of poor server reliability in the related art.

[0005] The present application provides a server, comprising a first cabinet, a second cabinet, a plurality of graphics processor nodes, a plurality of switch nodes, a first power cabinet and a second power cabinet, wherein:

[0006] A first power cabinet, a second power cabinet and a plurality of graphics processor nodes are arranged in a first cabinet, and the first power cabinet, the plurality of graphics processor nodes and the second power cabinet are arranged vertically stacked in sequence;

[0007] A plurality of switching nodes are arranged in the second cabinet, and the plurality of switching nodes are arranged in a horizontal stack in sequence;

[0008] The graphics processor node is connected to the switch node.

[0009] In a possible implementation, the graphics processor node includes a plurality of connectors, and the plurality of connectors in the graphics processor node are located on a first side of the first cabinet;

[0010] The switching node includes a plurality of connectors, and the plurality of connectors in the switching node are located on the second side of the second cabinet;

[0011] The first side of the first cabinet is arranged opposite to the second side of the second cabinet, and the graphics processor node is connected to the switch node through a connector.

[0012] In a possible implementation, the graphics processor node includes N connectors, where N is the number of switch nodes and N is an integer greater than 1;

[0013] The switching node includes M connectors, where M is the number of graphics processor nodes and M is an integer greater than 1;

[0014] The N connectors in the graphics processor node are respectively connected to a connector in each switch node.

[0015] In a possible implementation manner, the first cabinet further includes a second power supply copper busbar, and the second cabinet further includes the first power supply copper busbar;

[0016] The first power supply copper bus is used to supply power to a plurality of graphics processor nodes, and the second power supply copper bus is used to supply power to a plurality of switch nodes;

[0017] The first power copper bus is located in the middle of the multiple switching nodes and close to the first side of the first cabinet, and the second power copper bus is located in the middle of the multiple graphics processor nodes and close to the second side of the second cabinet;

[0018] Among them, two ends of the first power supply copper busbar are respectively connected to the first power supply cabinet and the second power supply cabinet, and the first power supply copper busbar is connected to the second power supply copper busbar.

[0019] In a possible implementation, the graphics processor node includes a first power supply copper busbar, and the switch node includes a second power supply copper busbar;

[0020] The first power supply copper busbar in the graphics processor node is connected to the first power supply copper busbar in the second cabinet;

[0021] The second power supply copper busbar in the switching node is connected to the second power supply copper busbar in the first cabinet.

[0022] In a possible implementation manner, the first cabinet further includes a plurality of second radiators, and the second cabinet further includes a plurality of first radiators;

[0023] The first heat sink is used to dissipate heat for a plurality of graphics processor nodes, and the second heat sink is used to dissipate heat for a plurality of switch nodes;

[0024] A plurality of second heat sinks are respectively located between the first power cabinet and the plurality of graphics processor nodes, and between the plurality of graphics processor nodes and the second power cabinet;

[0025] The plurality of first heat sinks are respectively located on the left and right sides of the second cabinet.

[0026] In a possible implementation, the multiple first radiators include a first water inlet radiator and a first water outlet radiator, the first water inlet radiator is connected to the cabinet water inlet pipe, the first water outlet radiator is connected to the cabinet water outlet pipe, and the multiple graphics processor nodes are respectively connected to the first water inlet radiator and the first water outlet radiator.

[0027] In a possible implementation, the graphics processor node further includes a first water inlet interface and a first water outlet interface;

[0028] The first water inlet interface is connected to the first water inlet radiator, and the first water outlet interface is connected to the first water outlet radiator.

[0029] In a possible embodiment, the multiple second radiators include a second water inlet radiator and a second water outlet radiator, the second water inlet radiator is connected to the first water inlet radiator through a water inlet adapter, the second water outlet radiator is connected to the first water outlet radiator through a water outlet adapter, and the multiple switching nodes are respectively connected to the second water inlet radiator and the second water outlet radiator.

[0030] In a possible implementation manner, the switching node further includes a second water inlet interface and a second water outlet interface;

[0031] The second water inlet interface is connected to the second water inlet radiator, and the second water outlet interface is connected to the second water outlet radiator.

[0032] In a possible implementation, the graphics processor node includes multiple graphics processors, multiple central processing units, multiple memories, multiple hard disks, multiple network cards, integrated circuit chips, and multiple connectors;

[0033] The multiple graphics processors are connected to the multiple connectors through the integrated circuit chip, the graphics processor is connected to the central processing unit, the central processing unit is connected to the memory, and the central processing unit is respectively connected to the multiple hard disks and the multiple network cards.

[0034] In a possible implementation, the graphics processor node further includes a first power supply copper bus, a first water inlet interface, and a first water outlet interface;

[0035] The first power supply copper bus is located in the middle of the multiple connectors, and the first water inlet interface and the first water outlet interface are respectively located on both sides of the multiple connectors.

[0036] In a possible implementation, the switching node includes a plurality of switching chips, a plurality of cable connectors, a plurality of optical modules, and a plurality of connectors;

[0037] The multiple switching chips are respectively connected to the multiple cable connectors and the multiple connectors, the multiple cable connectors are respectively connected to the multiple connectors, and the multiple switching chips are connected to the multiple optical modules.

[0038] In a possible implementation manner, the switching node further includes a second power supply copper bus, a second water inlet interface, and a second water outlet interface;

[0039] The second power supply copper bar is located in the middle of the multiple connectors, and the multiple connectors are respectively divided into multiple first connectors and multiple second connectors, and the second water inlet interface and the second water outlet interface are respectively located on both sides of the multiple connectors;

[0040] The plurality of cable connectors are divided into a plurality of first cable connectors and a plurality of second cable connectors, the plurality of first cable connectors are connected to the plurality of second connectors via cables, and the plurality of second cable connectors are connected to the plurality of first connectors via cables;

[0041] The multiple switching chips include a first switching chip and a second switching chip. The first switching chip is connected to the multiple first cable connectors through a printed circuit board. The first switching chip is also connected to the multiple first connectors through a printed circuit board. The second switching chip is connected to the multiple second cable connectors through a printed circuit board. The second switching chip is also connected to the multiple second connectors through a printed circuit board.

[0042] In a possible implementation, the second water inlet interface is connected to the heat dissipation pipe of the second switching chip, the heat dissipation pipe of the second switching chip is connected to the heat dissipation pipes of multiple optical modules, the heat dissipation pipes of multiple optical modules are connected to the heat dissipation pipes of the first switching chip, and the heat dissipation pipes of the first switching chip are connected to the second water outlet interface.

[0043] Through the present application, multiple graphics processor nodes are set in a first cabinet, and the multiple graphics processor nodes are vertically stacked in sequence, and multiple switching nodes are set in a second cabinet, and the multiple switching nodes are horizontally stacked in sequence, wherein the graphics processor nodes are connected to the switching nodes. Therefore, the technical problem of poor reliability of the server can be solved, the difficulty of installation and maintenance is reduced, and the integrity of signal transmission is improved, thereby improving the reliability of the server. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0045] Figure 1 A schematic diagram of the front structure of a related server provided in an embodiment of the present application;

[0046] Figure 2 A schematic diagram of the back-side structure of a related server provided in an embodiment of the present application;

[0047] Figure 3 A schematic diagram of the structure of a server provided in an embodiment of the present application;

[0048] Figure 4 A schematic diagram of a connection relationship between a graphics processor node and a switch node provided in an embodiment of the present application;

[0049] Figure 5 A schematic diagram of the structure of a power supply copper busbar provided in an embodiment of the present application;

[0050] Figure 6 A schematic diagram of a server structure provided in an embodiment of the present application;

[0051] Figure 7 Another schematic diagram of a server structure provided in an embodiment of the present application;

[0052] Figure 8 A schematic diagram of the structure of a radiator provided in an embodiment of the present application;

[0053] Fig. 9 A schematic diagram of the structure of a graphics processor node provided in an embodiment of the present application;

[0054] Fig.10 A schematic diagram of the structure of a switching node provided in an embodiment of the present application;

[0055] Fig.11 A schematic diagram of a heat dissipation pipeline of a switching node provided in an embodiment of the present application. DETAILED DESCRIPTION

[0056] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0057] It should be noted that, in the description of this application, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. The terms "first", "second", etc. in this application are used to distinguish similar objects, and are not used to describe a specific order or sequence.

[0058] As the number of parameters in large AI models increases to tens of billions or even hundreds of billions, the memory capacity and computing power of a single GPU can no longer meet the demand. In related technologies, multiple GPUs can be integrated into one physical unit through high-bandwidth interconnection technology to form a server cluster with stronger collaborative computing capabilities. This server cluster is called a supernode server.

[0059] In order to achieve internal cross-node communication, the super-node server needs to deploy a cable tray at the rear of the cabinet. The cable tray can accommodate thousands of high-speed cables to connect the GPU and the switching node.

[0060] Next, combine Figure 1 and Figure 2 , the structure of the super node server in the related art is illustrated by example.

[0061] See also Figure 1 and Figure 2 , Figure 1 A schematic diagram of the front structure of a related server provided in an embodiment of the present application. Figure 2 A schematic diagram of the back-side structure of a related server provided in an embodiment of the present application. Figure 1 The front structure of the cabinet may be included. Figure 2 The rear structure of the cabinet may be included.

[0062] The front structure of the cabinet may include a power cabinet, a plurality of graphics processor nodes and a plurality of switching nodes. The power cabinet is located at the upper and lower ends of the cabinet.

[0063] The power cabinet can be used to supply power to the GPU node and the switch node to ensure the normal operation of each node.

[0064] Graphics processor nodes can be used to perform computing tasks.

[0065] Switching nodes can be used for data exchange and communication between nodes to build a data transmission network.

[0066] The graphics processor node can cooperate with the switch node to realize data processing and transmission.

[0067] Multiple switch nodes may be located between multiple GPU nodes.

[0068] For example, the server may include 16 GPU nodes and 8 switch nodes. The 8 switch nodes are located in the middle of the 16 GPU nodes, and the upper and lower sides of the GPU nodes also include power cabinets.

[0069] The rear structure of the cabinet may include multiple radiators, multiple cable trays, and power copper busbars. The multiple radiators are located on the left and right sides, the multiple cable trays are located in the middle of the radiators, and the power copper busbar is located in the middle of the multiple cable trays.

[0070] The radiator can be used to help heat-generating components such as graphics processor nodes and switch nodes dissipate heat and maintain the server within a suitable operating temperature range.

[0071] Cable trays can be used to connect GPU nodes and switch nodes. Thousands of cables are usually arranged in cable trays to transmit high-speed data signals required for communication between nodes.

[0072] The power copper busbar can be used for power transmission of the server.

[0073] However, the high-density wiring of cable trays makes it difficult to locate and repair a single cable failure, requiring entire cables to be replaced, making maintenance extremely difficult. In addition, long-distance wiring can cause serious signal integrity issues, resulting in poor server reliability.

[0074] In order to solve the above technical problems, the embodiment of the present application provides a server, wherein a plurality of graphics processor nodes are arranged in a first cabinet, and the plurality of graphics processor nodes are arranged vertically stacked in sequence, and a plurality of switching nodes are arranged in a second cabinet, and the plurality of switching nodes are arranged horizontally stacked in sequence, wherein the graphics processor nodes are connected to the switching nodes. In this way, no cable tray is required, the difficulty of installation and maintenance is reduced, the integrity of signal transmission is improved, and the reliability of the server is improved.

[0075] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0076] In conjunction with the specific hardware architecture upon which the execution of the server depends, the specific hardware architecture is described herein.

[0077] Next, combine Figure 3 , explain the server of this application.

[0078] The server may include a first cabinet, a second cabinet, a plurality of graphics processor nodes, a plurality of switch nodes, a first power cabinet, and a second power cabinet.

[0079] See also Figure 3 , Figure 3 A schematic diagram of the structure of a server provided in an embodiment of the present application. Figure 3 It may include a first cabinet and a second cabinet.

[0080] The first power cabinet, the second power cabinet and a plurality of graphics processor nodes are arranged in the first cabinet, and the first power cabinet, the plurality of graphics processor nodes and the second power cabinet are vertically stacked in sequence.

[0081] A plurality of switching nodes are arranged in the second cabinet, and the plurality of switching nodes are arranged in a horizontal stack in sequence;

[0082] The graphics processor node is connected to the switch node.

[0083] The first cabinet includes, from top to bottom: a first power cabinet, a plurality of graphics processor nodes and a second power cabinet.

[0084] The power cabinet can be used to supply power to the server.

[0085] Graphics processor nodes can be used to perform graphics processing, computing and other tasks. Multiple graphics processor nodes can work in parallel to improve computing efficiency and meet complex computing requirements.

[0086] The multiple switching nodes in the second cabinet are arranged in sequence in a horizontal stacking manner.

[0087] In this way, the switch nodes are arranged horizontally to form an independent heat dissipation area, avoiding thermal interference with high-power graphics processor nodes.

[0088] Switching nodes can be used to transmit data generated during the operation or data that needs to be acquired to achieve data circulation and processing of the entire system.

[0089] The graphics processor node can be connected to the switch node through a connector.

[0090] The connector may include an orthogonal connector, etc., which is not limited here.

[0091] In this way, there is no need for cable trays, which reduces the difficulty of installation and maintenance, improves the integrity of signal transmission, and improves the reliability of the server.

[0092] In a possible implementation, the graphics processor node includes a plurality of connectors, and the plurality of connectors in the graphics processor node are located on a first side of the first cabinet.

[0093] The switching node includes a plurality of connectors, and the plurality of connectors in the switching node are located on the second side of the second cabinet.

[0094] The first side of the first cabinet is arranged opposite to the second side of the second cabinet, and the graphics processor node is connected to the switch node through a connector.

[0095] Among them, the connector can be an interface component for realizing data transmission.

[0096] The first side of the first cabinet and the second side of the second cabinet are arranged face to face. This face-to-face layout is to facilitate the connection between the graphics processor node and the switch node through the connector. Through this face-to-face layout and the docking of the connector, the GPU node and the switch node can establish a stable connection channel to achieve data transmission and interaction between the two, so that the entire system can work together to complete tasks such as AI training and data processing.

[0097] In a possible implementation, the graphics processor node includes N connectors, where N is the number of switch nodes and N is an integer greater than 1;

[0098] The switching node includes M connectors, where M is the number of graphics processor nodes and M is an integer greater than 1;

[0099] The N connectors in the graphics processor node are respectively connected to a connector in each switch node.

[0100] Among them, N can be twice of M.

[0101] Next, combine Figure 4 , the connection relationship between the graphics processor node and the switch node is explained.

[0102] Figure 4 A schematic diagram of the connection relationship between a graphics processor node and a switch node provided in an embodiment of the present application. Figure 4 , Figure 4 It includes multiple graphics processor nodes and multiple switching nodes.

[0103] A mesh topology is formed between the graphics processor nodes and the switch nodes, and multiple graphics processor nodes and multiple switch nodes are connected in pairs.

[0104] In a possible implementation manner, the first cabinet further includes a second power supply copper busbar, and the second cabinet further includes a first power supply copper busbar.

[0105] Next, combine Figure 5 and Figure 6 , explain the power supply copper busbar.

[0106] Figure 5 A schematic diagram of the structure of a power supply copper busbar provided in an embodiment of the present application. Figure 6 A schematic diagram of a server structure provided in an embodiment of the present application. Figure 5 , Figure 5 It includes the first power supply copper bus, the second power supply copper bus, the first power supply cabinet and the second power supply cabinet. Figure 6 , Figure 6It includes a first cabinet and a second cabinet. The first cabinet includes a first power cabinet, a plurality of graphics processor nodes, a second power supply copper bus and a second power cabinet. The second cabinet includes a plurality of switching nodes and a first power supply copper bus.

[0107] The first power supply copper bus is used to supply power to a plurality of graphics processor nodes, and the second power supply copper bus is used to supply power to a plurality of switch nodes;

[0108] The first power copper bus is located in the middle of the multiple switching nodes and close to the first side of the first cabinet, and the second power copper bus is located in the middle of the multiple graphics processor nodes and close to the second side of the second cabinet;

[0109] Among them, two ends of the first power supply copper busbar are respectively connected to the first power supply cabinet and the second power supply cabinet, and the first power supply copper busbar is connected to the second power supply copper busbar.

[0110] The first power supply copper busbar may be connected to the second power supply copper busbar via a connector.

[0111] In this way, the first power supply copper bus is specifically used to supply power to multiple graphics processor nodes, and the second power supply copper bus is responsible for supplying power to multiple switching nodes. The power supply method with clear division of labor can ensure that nodes with different functions can obtain stable power, meet the work requirements of high-energy consumption computing of graphics processor nodes and data transmission of switching nodes, and ensure stable operation of the system.

[0112] In a possible implementation, the graphics processor node includes a first power supply copper busbar, and the switch node includes a second power supply copper busbar;

[0113] The first power supply copper busbar in the graphics processor node is connected to the first power supply copper busbar in the second cabinet;

[0114] The second power supply copper busbar in the switching node is connected to the second power supply copper busbar in the first cabinet.

[0115] In a possible implementation manner, the first cabinet further includes a plurality of second radiators, and the second cabinet further includes a plurality of first radiators.

[0116] Next, combine Figure 7 , explaining the location of the radiator in the server.

[0117] Figure 7 Another server structure diagram provided for the embodiment of the present application. Figure 7 , Figure 7 It includes a first cabinet and a second cabinet. The first cabinet includes a first power cabinet, a second radiator, a plurality of graphics processor nodes, a second power supply copper bus and a second power cabinet. The second cabinet includes a first radiator, a plurality of switching nodes and a first power supply copper bus.

[0118] The first heat sink is used to dissipate heat for a plurality of graphics processor nodes, and the second heat sink is used to dissipate heat for a plurality of switch nodes;

[0119] A plurality of second heat sinks are respectively located between the first power cabinet and the plurality of graphics processor nodes, and between the plurality of graphics processor nodes and the second power cabinet;

[0120] The plurality of first heat sinks are respectively located on the left and right sides of the second cabinet.

[0121] Next, combine Figure 8 , the structure of the radiator is explained.

[0122] Figure 8 This is a schematic diagram of the structure of a heat sink provided in an embodiment of the present application. Figure 8 , Figure 8 It includes a plurality of first heat sinks and a plurality of second heat sinks.

[0123] The multiple first radiators include a first water inlet radiator and a first water outlet radiator, the first water inlet radiator is connected to the cabinet water inlet pipe, the first water outlet radiator is connected to the cabinet water outlet pipe, and the multiple graphics processor nodes are respectively connected to the first water inlet radiator and the first water outlet radiator.

[0124] The multiple second radiators include a second water inlet radiator and a second water outlet radiator. The second water inlet radiator is connected to the first water inlet radiator via a water inlet adapter, and the second water outlet radiator is connected to the first water outlet radiator via a water outlet adapter. The multiple switching nodes are respectively connected to the second water inlet radiator and the second water outlet radiator.

[0125] In this way, the graphics processor node is connected to the first water inlet radiator and the first water outlet radiator respectively, and the switch node is connected to the second water inlet radiator and the second water outlet radiator, which can directly take away a large amount of heat generated by the node operation, ensure that the node works at a suitable temperature, and maintain system performance and stability. In addition, multiple first radiators and multiple second radiators are interconnected through adapters, integrating the cooling systems of the graphics processor node and the switch node, simplifying the structure and layout of the overall cooling system, facilitating installation, maintenance and management, and reducing the complexity and maintenance cost of the system.

[0126] In a possible implementation, the graphics processor node further includes a first water inlet interface and a first water outlet interface;

[0127] The first water inlet interface is connected to the first water inlet radiator, and the first water outlet interface is connected to the first water outlet radiator.

[0128] In a possible implementation manner, the switching node further includes a second water inlet interface and a second water outlet interface;

[0129] The second water inlet interface is connected to the second water inlet radiator, and the second water outlet interface is connected to the second water outlet radiator.

[0130] In a possible implementation, the graphics processor node includes multiple graphics processors, multiple central processing units, multiple memories, multiple hard disks, multiple network cards, integrated circuit chips, and multiple connectors.

[0131] The multiple graphics processors are connected to the multiple connectors through the integrated circuit chip, the graphics processor is connected to the central processing unit, the central processing unit is connected to the memory, and the central processing unit is respectively connected to the multiple hard disks and the multiple network cards.

[0132] In a possible implementation, the graphics processor node further includes a first power supply copper bus, a first water inlet interface, and a first water outlet interface;

[0133] The first power supply copper bus is located in the middle of the multiple connectors, and the first water inlet interface and the first water outlet interface are respectively located on both sides of the multiple connectors.

[0134] Next, combine Fig. 9 , explaining the graphics processor node.

[0135] Fig. 9 A schematic diagram of the structure of a graphics processor node provided in an embodiment of the present application. Fig. 9 , Fig. 9 Includes GPU nodes.

[0136] The graphics processor node may include multiple graphics processors, multiple central processing units, multiple memories, multiple hard disks, multiple network cards, integrated circuit chips, multiple connectors, a first power supply copper bus, a first water inlet interface and a first water outlet interface.

[0137] The first water inlet interface and the first water outlet interface can be used to connect the coolant pipeline of the radiator, and the heat generated during the operation of the node is taken away by the circulation of the coolant, so as to ensure that each component operates within a suitable temperature range.

[0138] Integrated circuit chips can be used to process and control the signals of various components within the node.

[0139] In a possible implementation, the switching node includes a plurality of switching chips, a plurality of cable connectors, a plurality of optical modules, and a plurality of connectors;

[0140] The multiple switching chips are respectively connected to the multiple cable connectors and the multiple connectors, the multiple cable connectors are respectively connected to the multiple connectors, and the multiple switching chips are connected to the multiple optical modules.

[0141] The switching node also includes a second power supply copper bus, a second water inlet interface and a second water outlet interface;

[0142] The second power supply copper bar is located in the middle of the multiple connectors, and the multiple connectors are respectively divided into multiple first connectors and multiple second connectors, and the second water inlet interface and the second water outlet interface are respectively located on both sides of the multiple connectors;

[0143] The plurality of cable connectors are divided into a plurality of first cable connectors and a plurality of second cable connectors, the plurality of first cable connectors are connected to the plurality of second connectors via cables, and the plurality of second cable connectors are connected to the plurality of first connectors via cables;

[0144] The multiple switching chips include a first switching chip and a second switching chip. The first switching chip is connected to the multiple first cable connectors through a printed circuit board. The first switching chip is also connected to the multiple first connectors through a printed circuit board. The second switching chip is connected to the multiple second cable connectors through a printed circuit board. The second switching chip is also connected to the multiple second connectors through a printed circuit board.

[0145] In this way, the number of cables required inside the switching node can be reduced through printed circuit board connection, thereby improving signal integrity.

[0146] Next, combine Fig.10 , explain the switching node.

[0147] Fig.10 A schematic diagram of the structure of a switching node provided in an embodiment of the present application. Fig.10 , Fig.10 Including switching nodes.

[0148] The switching node may include multiple switching chips, multiple cable connectors, multiple optical modules, multiple connectors, a second power supply copper bus, a second water inlet interface, and a second water outlet interface.

[0149] In a possible implementation, the plurality of switching chips include a first switching chip and a second switching chip, the first switching chip includes a first heat dissipation pipe, and the second switching chip includes a second heat dissipation pipe.

[0150] Next, combine Fig.11 , explain the heat dissipation duct.

[0151] Fig.11 A schematic diagram of a heat dissipation pipeline of a switching node provided in an embodiment of the present application. Fig.11 , Fig.11 The invention comprises a switching node, wherein the switching node comprises a heat dissipation pipeline.

[0152] The second water inlet interface is connected to the heat dissipation pipe of the second switching chip, the heat dissipation pipe of the second switching chip is connected to the heat dissipation pipes of multiple optical modules, the heat dissipation pipes of multiple optical modules are connected to the heat dissipation pipe of the first switching chip, and the heat dissipation pipe of the first switching chip is connected to the second water outlet interface.

[0153] In this application, "at least one" means one or more, and "more" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship; in the formula, the character " / " indicates that the previous and next associated objects are in a "division" relationship. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, or c can mean: a, b, c, ab, ac, bc, or abc, where a, b, c can be single or multiple.

[0154] It is to be understood that the various numerical numbers involved in the embodiments of the present application are only for the convenience of description and are not intended to limit the scope of the embodiments of the present application. In the embodiments of the present application, the size of the sequence number of each process does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0155] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A server, characterized in that: It includes a first cabinet, a second cabinet, a plurality of graphics processor nodes, a plurality of switching nodes, a first power cabinet and a second power cabinet, wherein: The first power cabinet, the second power cabinet and the plurality of graphics processor nodes are arranged in the first cabinet, and the first power cabinet, the plurality of graphics processor nodes and the second power cabinet are arranged vertically stacked in sequence; The plurality of switching nodes are arranged in the second cabinet, and the plurality of switching nodes are arranged in a horizontal stack in sequence; Wherein, the graphics processor node is connected to the switch node.

2. The server according to claim 1, characterized in that: The graphics processor node includes a plurality of connectors, and the plurality of connectors in the graphics processor node are located on a first side of the first cabinet; The switching node includes a plurality of connectors, and the plurality of connectors in the switching node are located on the second side of the second cabinet; The first side of the first cabinet is arranged opposite to the second side of the second cabinet, and the graphics processor node is connected to the switch node through a connector.

3. The server according to claim 2, characterized in that: The graphics processor node includes N connectors, where N is the number of the switching nodes and N is an integer greater than 1; The switching node includes M connectors, where M is the number of the graphics processor nodes, and M is an integer greater than 1; The N connectors in the graphics processor node are respectively connected to a connector in each switch node.

4. The server according to any one of claims 1 to 3, characterized in that: The first cabinet further includes a second power supply copper busbar, and the second cabinet further includes a first power supply copper busbar; The first power supply copper bus is used to supply power to the multiple graphics processor nodes, and the second power supply copper bus is used to supply power to the multiple switch nodes; The first power supply copper bus is located in the middle of the multiple switching nodes and close to the first side of the first cabinet, and the second power supply copper bus is located in the middle of the multiple graphics processor nodes and close to the second side of the second cabinet; Wherein, two ends of the first power supply copper busbar are respectively connected to the first power supply cabinet and the second power supply cabinet, and the first power supply copper busbar is connected to the second power supply copper busbar.

5. The server according to claim 4, characterized in that: The graphics processor node includes a first power supply copper busbar, and the switch node includes a second power supply copper busbar; The first power supply copper busbar in the graphics processor node is connected to the first power supply copper busbar in the second cabinet; The second power supply copper busbar in the switching node is connected to the second power supply copper busbar in the first cabinet.

6. The server according to any one of claims 1 to 3, characterized in that: The first cabinet further comprises a plurality of second heat sinks, and the second cabinet further comprises a plurality of first heat sinks; The first heat sink is used to dissipate heat for the multiple graphics processor nodes, and the second heat sink is used to dissipate heat for the multiple switch nodes; The plurality of second heat sinks are respectively located between the first power cabinet and the plurality of graphics processor nodes, and between the plurality of graphics processor nodes and the second power cabinet; The plurality of first heat sinks are respectively located at left and right sides of the second cabinet.

7. The server according to claim 6, characterized in that: The multiple first radiators include a first water inlet radiator and a first water outlet radiator, the first water inlet radiator is connected to the cabinet water inlet pipe, the first water outlet radiator is connected to the cabinet water outlet pipe, and the multiple graphics processor nodes are respectively connected to the first water inlet radiator and the first water outlet radiator.

8. The server according to claim 7, characterized in that: The graphics processor node also includes a first water inlet interface and a first water outlet interface; The first water inlet interface is connected to the first water inlet radiator, and the first water outlet interface is connected to the first water outlet radiator.

9. The server according to claim 6, characterized in that: The multiple second radiators include a second water inlet radiator and a second water outlet radiator, the second water inlet radiator is connected to the first water inlet radiator through a water inlet adapter, the second water outlet radiator is connected to the first water outlet radiator through a water outlet adapter, and the multiple switching nodes are respectively connected to the second water inlet radiator and the second water outlet radiator.

10. The server according to claim 9, characterized in that The switching node also includes a second water inlet interface and a second water outlet interface; The second water inlet interface is connected to the second water inlet radiator, and the second water outlet interface is connected to the second water outlet radiator.

11. The server according to any one of claims 1 to 3, characterized in that: The graphics processor node includes multiple graphics processors, multiple central processing units, multiple memories, multiple hard disks, multiple network cards, integrated circuit chips and multiple connectors; The multiple graphics processors are connected to the multiple connectors through the integrated circuit chip, the graphics processor is connected to the central processing unit, the central processing unit is connected to the memory, and the central processing unit is respectively connected to the multiple hard disks and the multiple network cards.

12. The server according to claim 11, characterized in that The graphics processor node also includes a first power supply copper bus, a first water inlet interface and a first water outlet interface; The first power supply copper bus is located in the middle of the multiple connectors, and the first water inlet interface and the first water outlet interface are respectively located on both sides of the multiple connectors.

13. The server according to any one of claims 1 to 3, characterized in that: The switching node includes a plurality of switching chips, a plurality of cable connectors, a plurality of optical modules and a plurality of connectors; The multiple switching chips are connected to multiple cable connectors and multiple connectors respectively, the multiple cable connectors are connected to multiple connectors respectively, and the multiple switching chips are connected to multiple optical modules.

14. The server according to claim 13, characterized in that: The switching node also includes a second power supply copper bus, a second water inlet interface and a second water outlet interface; The second power supply copper bus is located in the middle of the multiple connectors, and the multiple connectors are divided into multiple first connectors and multiple second connectors, and the second water inlet interface and the second water outlet interface are respectively located on both sides of the multiple connectors; The plurality of cable connectors are divided into a plurality of first cable connectors and a plurality of second cable connectors, the plurality of first cable connectors are connected to the plurality of second connectors via cables, and the plurality of second cable connectors are connected to the plurality of first connectors via cables; The multiple switching chips include a first switching chip and a second switching chip, the first switching chip is connected to the multiple first cable connectors through a printed circuit board, the first switching chip is also connected to the multiple first connectors through a printed circuit board, the second switching chip is connected to the multiple second cable connectors through a printed circuit board, and the second switching chip is also connected to the multiple second connectors through a printed circuit board.

15. The server according to claim 14, characterized in that: The second water inlet interface is connected to the heat dissipation pipe of the second switching chip, the heat dissipation pipe of the second switching chip is connected to the heat dissipation pipes of the multiple optical modules, the heat dissipation pipes of the multiple optical modules are connected to the heat dissipation pipe of the first switching chip, and the heat dissipation pipe of the first switching chip is connected to the second water outlet interface.

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