Memory isolation method, device, equipment and product

Abstract

The invention discloses a memory isolation method and device, equipment and a product, relates to the technical field of computers, and can limit a non-secure access target address in a memory space so as to prevent secure data from being illegally accessed and tampered. The memory isolation method comprises the steps that after a memory access instruction of a target process is received, when it is determined that the memory access instruction is used for non-secure access according to an access path of a target address in an access memory space indicated by the memory access instruction, the target process is allowed to access a non-secure position. Wherein the non-safe position is a memory position in the memory space except the safe position divided for the safe data.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of computer technology, and in particular to a memory isolation method, device, equipment and product. Background Art

[0002] Memory isolation is used to enable a process to run in an independent memory space without affecting the stability of other processes or the system. Software fault isolation (SFI) is a software-implemented memory isolation technology that uses compiler instrumentation to check the target address of memory access during memory access to the target code of the process to ensure that the target address is within the memory space corresponding to the process, thereby achieving the purpose of memory isolation.

[0003] The general method can only provide boundary isolation to isolate the process in the corresponding memory space. However, in the memory space corresponding to the process, the process can still illegally access or tamper with the data, and the security of the data in the memory space cannot be guaranteed. Summary of the invention

[0004] The embodiments of the present application provide a memory isolation method, apparatus, device and product, which can limit the target address of non-secure access within the memory space, thereby preventing secure data from being illegally accessed and tampered with.

[0005] To achieve the above objectives, the present application provides the following technical solutions:

[0006] In a first aspect, a memory isolation method is provided, the method comprising: after receiving a memory access instruction from a target process, according to an access path for accessing a target address in a memory space indicated by the memory access instruction, when determining that the memory access instruction is for non-secure access, allowing the target process to access a non-secure location. The non-secure location is a memory location in the memory space other than a secure location divided for secure data.

[0007] Based on this, we can further divide the secure location for secure data in the memory space, as well as the non-secure location other than the secure location, and identify the memory access instructions through the access path. On the basis of providing basic boundary isolation, we further enhance the security within the boundary and realize fine-grained memory isolation, so that the unsafe memory access instructions can access the non-safe location, thus ensuring the security of the secure data during the process operation.

[0008] In one possible implementation, when it is determined, based on the access path, that the memory access instruction is for non-secure access, the target process is not allowed to access the secure location.

[0009] Based on this, the target address of non-secure access can be further limited to ensure that it cannot access secure locations, thereby ensuring the security of secure data during process operation.

[0010] In a possible implementation, the memory isolation method further includes: when it is determined, based on the access path, that the memory access instruction is for secure access, allowing the target process to access the secure location.

[0011] Based on this, secure access to security data in the memory space can be achieved, ensuring the security of security data during process execution.

[0012] In one possible implementation, a method for determining that a memory access instruction is used for secure access based on an access path includes: when a target address of the access path is located at a secure location and an access variable in the access path is a secure variable, determining that the memory access instruction is used for secure access; the secure variable is predetermined by performing static analysis on the target process.

[0013] Based on this, static analysis is closely combined with dynamic protection. When the target address of the access path is in a secure location and the access variable in the access path is a secure variable, it can be determined that all nodes on the access path are in a secure location and the operating environment of the current target process is secure. Therefore, it can be determined that the memory access instruction is used for secure access, which can improve the accuracy of identifying instructions that illegally access or tamper with secure data.

[0014] In a possible implementation, the access variable includes a pointer pointing to a target address and an offset; the target address of the access path is located in a safe position, including: a base address defined by the pointer is located in a safe position, and the offset is a constant.

[0015] Based on this, since the pointer and the offset jointly determine the target address, the target address can be constrained to a safe location by limiting the pointer and the offset.

[0016] In one possible implementation, when a memory access instruction is used for non-secure access, a method for allowing a target process to access a non-secure location includes: performing an instrumentation check on the memory access instruction; and the instrumentation check is used to limit the memory access instruction for non-secure access to access the non-secure location.

[0017] Based on this, by identifying unsafe memory access instructions, we perform instrumentation checks to ensure that the target address of the memory access is located in a non-secure location, making it impossible to access a secure location, thereby ensuring boundary isolation within the memory space.

[0018] In a possible implementation, the memory isolation method further includes: when the access variable of the memory access instruction is a secure variable, ending the execution of the instrumentation check.

[0019] Based on this, static analysis is closely combined with dynamic protection. When the access variable is a safe variable, the result of the plug-in check must indicate that the target address is located in a limited area, so redundant plug-ins can be eliminated and the plug-in check step can be ended. Compared with traditional SFI technology, the number of plug-ins can be significantly reduced, processor resources can be saved, and the solution processing efficiency can be improved.

[0020] In one possible implementation, the memory isolation method further includes: when the access variables of the first memory access instruction and the second memory access instruction are both secure variables, and the pointer in the access variable of the first memory access instruction and the pointer in the access variable of the second memory access instruction are assigned the same value, the inspection result of the stub check performed on the first memory access instruction is determined as the inspection result corresponding to the second memory access instruction.

[0021] Based on this, multiple dereferences to the same access variable only require one insertion check at the access variable definition along the data flow. Compared with traditional SFI technology, the number of insertions can be significantly reduced, processor resources can be saved, and solution processing efficiency can be improved.

[0022] In one possible implementation, the memory isolation method further includes: performing static analysis during the code compilation process of the target process to obtain a static analysis result of the target process; when the static analysis result indicates that an access variable for target data in the target process is a secure variable, determining that the target data is secure data; and redirecting the original memory location of the secure data to a secure location within the memory space.

[0023] Based on this, secure data that can be placed in a secure location can be identified in the compiler's intermediate code expression, and its original memory location can be redirected to a secure location, so that the target address for access can be limited based on whether it is secure to access it later, to ensure that secure data is not illegally accessed or tampered with while the target process is running.

[0024] In one possible implementation, when the security data is stack memory data, a method for redirecting the original memory location of the security data to the secure location includes: allocating a secure stack memory location in the secure location for the stack memory data, and establishing a correspondence between the original memory location of the stack memory data and the secure stack memory location; based on the correspondence, updating the address pointing to the original stack memory location in the memory access instruction to an address pointing to the secure stack memory location.

[0025] Based on this, the security data in the stack memory data can be redirected to ensure that the security data is not illegally accessed and tampered with when the target process accesses the stack memory data.

[0026] In one possible implementation, when the security data is heap memory data, a method for redirecting the memory location of the security data to a secure location includes: allocating a secure heap memory location in a secure location for the heap memory data, and updating an initial calling function in a target process that returns the original memory location of the heap memory data to a target calling function that returns the secure heap memory location.

[0027] Based on this, the security data in the heap memory data can be redirected to ensure that the security data is not illegally accessed and tampered with when the target process accesses the heap memory data.

[0028] In a second aspect, a memory isolation device is provided, which includes: an instruction processing module and a memory isolation module; the instruction processing module is configured to execute a memory access instruction received from a target process; the memory access instruction is used to indicate an access path for accessing a target address in a memory space; the memory isolation module is configured to execute when it is determined that the memory access instruction is used for non-secure access based on the access path, allowing the target process to access a non-secure location; the non-secure location is a memory location in the memory space other than a secure location divided for secure data.

[0029] In one possible implementation, the memory isolation module is further configured to execute, when it is determined, based on the access path, that the memory access instruction is for secure access, allowing the target process to access the secure location.

[0030] In one possible implementation, the instruction processing module is further configured to determine that the memory access instruction is used for secure access when the target address of the access path is located at a secure location and the access variable in the access path is a secure variable; the secure variable is predetermined by static analysis of the target process.

[0031] In a possible implementation, the access variable includes a pointer pointing to a target address and an offset; the target address of the access path is located in a safe position, including: a base address defined by the pointer is located in a safe position, and the offset is a constant.

[0032] In one possible implementation, when a memory access instruction is used for non-secure access, the memory isolation module is specifically configured to perform an instrumentation check on the memory access instruction; the instrumentation check is used to limit the memory access instruction for non-secure access to access non-secure locations.

[0033] In a possible implementation, the memory isolation device further includes: a first optimization module; the first optimization module is configured to terminate the execution of the instrumentation check when the access variable of the memory access instruction is a security variable.

[0034] In one possible implementation, the memory isolation device also includes: a second optimization module; the second optimization module is configured to execute, when the access variables of the first memory access instruction and the second memory access instruction are both security variables, and the pointer in the access variable of the first memory access instruction and the pointer in the access variable of the second memory access instruction are assigned the same value, the inspection result of the plug-in check on the first memory access instruction will be determined as the inspection result corresponding to the second memory access instruction.

[0035] In one possible implementation, the memory isolation device also includes: a data identification module and a redirection module; the data identification module is configured to perform static analysis during the code compilation process of the target process to obtain a static analysis result of the target process; when the static analysis result indicates that the access variable for the target data in the target process is a secure variable, the target data is determined to be secure data; the redirection module is configured to execute in the memory space to redirect the original memory location of the secure data to a secure location.

[0036] In one possible implementation, when the security data is stack memory data, the redirection module is specifically configured to execute the allocation of a secure stack memory position in the secure position for the stack memory data, and establish a correspondence between the original memory position of the stack memory data and the secure stack memory position; based on the correspondence, the address pointing to the original stack memory position in the memory access instruction is updated to an address pointing to the secure stack memory position.

[0037] In one possible implementation, when the security data is heap memory data, the redirection module is specifically configured to execute the secure heap memory location in the secure location allocated for the heap memory data, and update the initial calling function that returns the original memory location of the heap memory data in the target process to a target calling function that returns the secure heap memory location.

[0038] In a third aspect, an electronic device is provided, comprising: a processor; the processor is connected to a memory, the memory is used to store computer-executable instructions, and the processor executes the computer-executable instructions stored in the memory so that the electronic device implements a method as described in any one of the above-mentioned first aspects.

[0039] In a fourth aspect, a computer-readable storage medium is provided, the computer-readable storage medium comprising instructions, and when the instructions are executed on a computer, the computer executes the method as described in any one of the above-mentioned first aspects.

[0040] In a fifth aspect, a computer program product is provided. The computer program product includes instructions. When the instructions are executed on a computer, the computer is caused to execute the method as described in any one of the above-mentioned first aspects.

[0041] The beneficial effects of the second to fifth aspects mentioned above can be referred to the first aspect and will not be repeated here.

[0042] It can be understood that various possible implementation methods of any one of the above aspects can be combined under the premise that there is no contradiction between the solutions. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 A schematic diagram of a software fault isolation process provided in an embodiment of the present application;

[0044] Figure 2 A schematic diagram of the effect of software fault isolation provided in an embodiment of the present application;

[0045] Figure 3 A schematic diagram of parameters of the static phase and the dynamic phase provided in the embodiment of the present application;

[0046] Figure 4 A schematic diagram of the structure of a computer system provided in an embodiment of the present application;

[0047] Figure 5 One of the flowcharts of the memory isolation method provided in the embodiment of the present application;

[0048] Figure 6 A second flowchart of the memory isolation method provided in an embodiment of the present application;

[0049] Figure 7 A third flowchart of the memory isolation method provided in an embodiment of the present application;

[0050] Figure 8 A fourth flowchart of the memory isolation method provided in an embodiment of the present application;

[0051] Fig. 9 A fifth flowchart of the memory isolation method provided in an embodiment of the present application;

[0052] Fig.10 A schematic diagram of the effect of fine-grained memory isolation provided in an embodiment of the present application;

[0053] Fig.11 A schematic diagram of the composition of a memory isolation device provided in an embodiment of the present application;

[0054] Fig.12 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0055] In the description of this application, unless otherwise specified, " / " indicates that the objects associated with each other are in an "or" relationship, for example, A / B can represent A or B; "and / or" in this application is merely a description of the association relationship between associated objects, indicating that three relationships may exist, for example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural.

[0056] In the description of this application, unless otherwise specified, "plurality" means two or more than two. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, or c can mean: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0057] In addition, in order to clearly describe the technical solutions of the embodiments of the present application, in the embodiments of the present application, words such as "first" and "second" are used to distinguish the same items or similar items with substantially the same functions and effects. Those skilled in the art can understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit the difference.

[0058] In the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a concrete way for easy understanding.

[0059] It is understood that the "embodiment" mentioned throughout the specification means that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, the various embodiments in the entire specification do not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It is understood that in various embodiments of the present application, the size of the sequence number of each process does not mean the order of execution, and the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present application.

[0060] It can be understood that in the present application, "when" and "if" both mean that corresponding processing will be carried out under certain objective circumstances, and do not limit the time, nor do they require any judgment action when implementing, nor do they mean the existence of other limitations.

[0061] It can be understood that some optional features in the embodiments of the present application may not rely on other features, such as the solution on which they are currently based, in certain scenarios, and may be implemented independently to solve corresponding technical problems and achieve corresponding effects. They may also be combined with other features according to needs in certain scenarios. Accordingly, the devices provided in the embodiments of the present application may also realize these features or functions accordingly, which will not be elaborated here.

[0062] In this application, unless otherwise specified, the same or similar parts between the various embodiments can refer to each other. In the various embodiments in this application, and the various implementation methods / implementation methods / implementation methods in each embodiment, if there is no special explanation and logical conflict, the terms and / or descriptions between different embodiments and the various implementation methods / implementation methods / implementation methods in each embodiment are consistent and can be referenced to each other. The technical features in different embodiments and the various implementation methods / implementation methods / implementation methods in each embodiment can be combined to form new embodiments, implementation methods, implementation methods, or implementation methods according to their inherent logical relationships. The implementation methods of this application described below do not constitute a limitation on the scope of protection of this application.

[0063] In order to make the embodiments of the present application clearer, some concepts involved in the present application are first briefly introduced.

[0064] 1. Program compilation.

[0065] Program compilation is called the static phase, and process execution is called the dynamic phase (or runtime phase).

[0066] Program compilation is the process of converting process-oriented program source code written in a high-level language (such as C language, etc.) into compiled intermediate code, and then converting the intermediate code into machine-readable binary code (i.e. executable file).

[0067] Intermediate code is an internal representation of the source program, or intermediate language. The role of intermediate code is to make the structure of the compiler program logically simpler and clearer, especially to make the optimization of the target code easier to achieve. Intermediate code is an intermediate code process, and the complexity of intermediate code is between source program code and machine code. Intermediate code has many forms, the most common ones are reverse Polish notation, quadruple, ternary and tree.

[0068] The compiler plug-in performs program instrumentation, analysis, and optimization at the intermediate code level.

[0069] 2. Static analysis.

[0070] Static analysis refers to the specific analysis of program control flow and data flow based on the intermediate code generated by the compilation during the program compilation phase, in order to achieve the effect of compilation optimization, such as software fault isolation (SFI) optimization. If the analysis shows that a certain memory access instruction is definitely safe (that is, the base address and offset of the memory access can be determined to prevent memory out of bounds and the possibility of reuse after release), then the SFI check for this memory access instruction can be omitted.

[0071] It can be understood that memory cross-bounds refers to accessing a memory address beyond the boundary of the originally allocated memory space. Use after free refers to using a dangling pointer after the memory is freed to access the freed memory space again.

[0072] Optionally, the static analysis tool can be implemented on a low level virtual machine (LLVM) framework, using LLVM's Clang tool, or whole-program-LLVM (WLLVM), gllvm, or other Clang wrappers to compile program source code.

[0073] The input of static analysis is the converted intermediate code. The memory objects in the program are mined to obtain the pointing information of all pointers, and the pointing information of all pointers is converted into a pointer analysis graph as the initial pointer analysis of the program. This is a pointer analysis that is insensitive to execution data flow and context, and is used to approximately detect the pointing information in the program. Then, the pointing information of the pointers in the program is analyzed to obtain the control flow graph and data flow graph of the sequential execution version of the program.

[0074] Among them, the control flow graph is an abstract representation of a process or procedure, which represents the possible execution flow of all basic blocks (i.e., statement sequences) in the form of a graph, and is the data structure required by the compiler for compilation analysis and optimization.

[0075] A data flow graph represents the logical flow and logical transformation of data within a system in the form of a graph from the perspective of data transmission and processing. It is the data structure required by the compiler for compilation analysis and optimization.

[0076] 3. Memory isolation.

[0077] Memory isolation is used to enable processes to run in independent memory spaces without affecting the stability of other processes or the system.

[0078] (1) Memory management unit (MMU) isolation.

[0079] The hardware protection provided by MMU is a method of implementing memory isolation. It acts as a bridge between the operating system layer and the memory, so that the software cannot directly access the physical address, but accesses the virtual address. The virtual memory address is converted into the physical memory address through a conversion table of MMU, and then accesses the physical memory address. In the above process, the program can only perceive the virtual address.

[0080] Since different processes have different virtual memory mappings, the physical memory corresponding to the same virtual address can be different for different processes, thereby achieving process isolation.

[0081] (2) Software fault isolation.

[0082] like Figure 1 As shown, SFI is a software-implemented memory isolation technology. After identifying a memory access instruction for memory access to process code, the compiler performs an instrumentation check (check_access(addr)) on the target address of the memory access (memory_access(addr)).

[0083] The purpose of software fault isolation is to ensure that memory access instructions for process code can only access data within the memory space (domain) corresponding to the process, such as Figure 2 As shown, the memory access instruction for the first code (domain 1code) in the first memory space (domain 1) can only access the first data (domain 1data) in the first memory space, and cannot go beyond the first memory space to access the second data (domain 2data) in the second memory space (domain2). Similarly, the second code (domain 2code) in the second memory space cannot access the first data in the first memory space. Based on this software fault isolation, the process can be run in an independent memory space when the process is running, which will not affect the stability of other processes or the system.

[0084] Compared with other isolation mechanisms, such as MMU isolation, SFI has the advantage of high efficiency and does not rely on special hardware or operating system support, reducing technical limitations and improving compatibility and scalability.

[0085] However, SFI and MMU isolation only provide boundary isolation and cannot enhance the internal security of the isolation domain. That is, the process can still illegally access or tamper with the data, and the security of the data in the memory space cannot be guaranteed. Figure 2 The existence of memory out-of-bounds and use-after-free vulnerabilities in the first memory space cannot affect the second data in the second memory space, but the first data may still be illegally accessed / tampered with, and the security of the data in the domain cannot be guaranteed during operation.

[0086] Since the data cannot be guaranteed to be secure at runtime, it is also impossible to ensure that the basis for optimization in the static analysis phase (such as data flow and control flow information) will not be tampered with at runtime. However, when static analysis guides the optimization in the dynamic phase, the consistency of dependent parameters in the static and dynamic phases is required to ensure the reliability of the static analysis results.

[0087] like Figure 3 As shown, during the static phase optimization, it is necessary to ensure control flow dependency, data flow dependency, inter-procedural analysis dependency, cross-shared library global analysis dependency, and concurrency dependency. Among them, control flow dependency needs to determine whether the control flow graph is consistent in the static phase and the dynamic phase; data flow dependency needs to determine whether the current memory read content is consistent with the last memory write content; inter-procedural analysis dependency needs to determine whether the caller passes the participating function input parameters consistently; cross-shared library global analysis dependency needs to determine whether the library loading order is correct; and concurrency dependency needs to determine which concurrent accesses exist for the feature data. In the traditional static analysis process, that is, when there is no need to guide the dynamic phase, the above conditions are met by default.

[0088] When optimizing in the dynamic phase, it is necessary to enable control flow protection (to protect the stack return address from being tampered with), enable data flow protection (to protect program variables, stack memory data from being tampered with), ensure stack security (to protect stack parameters from being tampered with), determine whether the analysis order in the static phase is consistent with the loading order in the dynamic phase, determine whether the concurrent access in the static phase is consistent with that in the dynamic phase, etc. When static analysis guides the optimization in the dynamic phase, it depends on whether the above conditions are consistent in the static phase and the dynamic phase.

[0089] If runtime anti-tampering capabilities cannot be provided, there will be a gap between the security capabilities of the static and dynamic phases, so compilation optimization in the static analysis phase cannot be performed. For example, data pointers can be tampered with through program vulnerabilities, which will lead to inconsistencies in program data flow during static analysis and dynamic runtime. Tampering with function pointers will lead to inconsistencies in program control flow during static analysis and dynamic runtime.

[0090] For example, let's assume that the process has access to an array member in the program, "int index = 3; int array [5];", which means that the pointer (index) is assigned a value of 3, and there are 5 elements in the array {0, 1, 2, 3, 4}. If the pointer is not tampered with, the pointer will point to the third element, which is represented by "array [index] = 2". However, if a runtime tampering problem occurs, the pointer will point to the second element at runtime, which is represented by "array [index] = 1". Since the second element does not exceed the range of the array, static analysis will consider that the memory access is not out of bounds.

[0091] In summary, the existing technology can only provide boundary isolation to isolate the process in the corresponding memory space. However, in the memory space corresponding to the process, the process can still illegally access or tamper with the data, and the security of the data in the memory space cannot be guaranteed. Furthermore, the compilation stub cannot achieve accurate static optimization.

[0092] In response to the above problems, an embodiment of the present application provides a memory isolation method, which can divide secure locations and non-secure locations other than secure locations for secure data in the memory space, and identify memory access instructions through access paths, so that unsecure memory access instructions can access non-secure locations, thereby ensuring the security of secure data during process execution.

[0093] The memory isolation method provided in the embodiment of the present application can be applied to various computer systems, for example, personal computers (PC), computer cluster systems, large computer systems or various supercomputers, etc., and the present application does not limit this. In addition, the present application can also be applied to various compilers, for example, GNU compiler collection (GNU compiler collection, GCC) and low level virtual machine (low level virtual machine, LLVM), etc., and the embodiment of the present application does not limit this.

[0094] Figure 4 A schematic diagram of the structure of a computer system is shown. The computer system 10 includes a compiler 11 and a terminal device 12. The compiler 11 is in communication connection with the terminal device 12.

[0095] Optionally, the compiler 11 and the terminal device 12 may be connected in a wired manner or in a wireless manner, which is not limited in the embodiment of the present application.

[0096] The compiler 11 is a computer program for implementing a program compilation function, such as a GCC compiler plug-in, which is implemented in the process of GCC compiling ARM processor programs.

[0097] A program runtime system (run-time system), also known as a runtime environment (runtime environment), is an environment in which compiled runtime code runs on a target machine. For example, an example of a runtime system is a Java runtime environment (JRE).

[0098] The runtime system can be installed on the terminal device 12. The terminal device 12 can communicate with one or more core networks (CN) via the access network. The terminal device 12 can be called an access terminal, a terminal, a user unit, a user station, a mobile station, a mobile station, a remote station, a remote terminal, a mobile device, a user terminal, a wireless network device, a user agent or a user device. The terminal can be a cellular phone, a cordless phone, a session initiation protocol (SIP) phone, a wireless local loop (WLL) station, a personal digital assistant (PDA), a handheld device with wireless communication function, a computing device or other device connected to a wireless modem, a vehicle-mounted device, a wearable device or the Internet of Things, a terminal device in a vehicle network, and any form of terminal device in a future network, etc.

[0099] The application scenarios of the embodiments of the present application are not limited. The system architecture and business scenarios described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided by the embodiments of the present application. It is known to those skilled in the art that with the evolution of network architecture and the emergence of new business scenarios, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems.

[0100] The memory isolation method provided by the embodiment of the present application is described in detail below in conjunction with the accompanying drawings. It should be noted that the embodiments of the present application can refer to each other, for example, the same or similar steps, method embodiments, system embodiments and device embodiments can refer to each other without limitation.

[0101] The execution subject of the memory isolation method provided in the embodiment of the present application may be the above-mentioned compiler 11. The memory isolation method provided in the embodiment of the present application may include: a process for identifying and redirecting security data (hereinafter referred to as "security data definition process"), and a process for isolating and instrumenting memory accesses (hereinafter referred to as "isolation and optimization process").

[0102] Combination Figure 1 , Figure 5 The flowchart of the security data definition process provided in the embodiment of the present application may include the following steps: S201 to S203.

[0103] S201. The compiler performs static analysis during the code compilation process of the target process to obtain a static analysis result of the target process.

[0104] Optionally, the static analysis results may include access variables, control flow graphs, data flow graphs, etc. of the target process.

[0105] In one possible implementation, static analysis includes the compiler performing a specific analysis of the program control flow and data flow of the intermediate code of the target process to obtain all access variables, such as the pointing information of pointers, and then analyzing the pointing information of the pointers to obtain the control flow graph and data flow graph of the target process.

[0106] Optionally, the access variable may include a pointer to the target address (defining the base address) and an offset.

[0107] Furthermore, the compiler can determine whether the accessed memory address exceeds the boundary of the originally allocated memory space based on the accessed variables, and whether the dangling pointer after the memory is released accesses the released memory space again, that is, whether memory cross-bounds occurs or is reused after release.

[0108] S202: When the static analysis result indicates that the access variable for the target data in the target process is a secure variable, the compiler determines that the target data is secure data.

[0109] Specifically, the compiler can identify security data of the intermediate code based on the static analysis results, so that the analysis results of the static stage can guide the optimization of the dynamic stage.

[0110] In one possible implementation, a pointer (defining a base address) and an offset jointly determine a target address, and only when both the pointer and the offset are safe variables is the accessed variable considered to be a safe variable.

[0111] In the first part, to determine whether the pointer is safe, you need to first take out the variable representing the pointer in the intermediate code, trace back the define-use chain of the pointer according to the data flow information provided by the compiler, and obtain the source of the pointer definition (i.e. the base address). To determine whether it is safe, two points must be met:

[0112] 1. The base address defined by the pointer is in a safe location, indicating that the source of the pointer is safe, indicating that the pointer points to a legal memory object, not an illegal address. Pointers include pointers obtained by taking the address of a variable or pointers returned by calling a memory allocation function. The pointer comes from taking the address of a variable, such as the code "int*p=&a;", and the pointer comes from the return value of a regular memory allocation function, such as the code "int*p=malloc(sizeof(int));".

[0113] 2. All data variables involved in the define-use chain defined by the pointer are safe data.

[0114] For example, the code is "int*p=&data;int*a=p;int*b=a;*b=5;", for pointer b, its definition comes from p, and its define-use chain, that is, the data flow access path is pab, involving three variables p, b, and a. The initial definition of the pointer "p=&data" is safe. If the three pointers p, a, and b all belong to secure data, that is, they are all located in a secure position, these variables will not be tampered with, then the data flow from p to b is credible, and the target address pointed to by pointer b can be considered legal.

[0115] In the second part, the method of judging whether the offset is safe is similar to that of the pointer. To be judged safe, two points must also be met:

[0116] 1. The initial definition of the offset is safe, that is, the offset is a constant, such as the code "int offset = 1;".

[0117] 2. The offset variables involved in the data flow access path corresponding to the offset are all safe variables.

[0118] For example, in the code “int a=1; int b=a; int offset=b;”, if a, b, and offset are all safe variables, then the offset can be considered safe.

[0119] Combining the above two aspects, if the pointer and the offset are both safe, then all accesses to the target data can be considered safe, and therefore the target data can be determined to be safe data.

[0120] In one possible implementation, the compiler can identify safe data based on the data usage and access method. When the data usage is pre-defined as safe, such as the stack return address, the stack memory data corresponding to the stack spilled, and the stack data memory corresponding to the caller-saved / callee-saved registers. Exemplarily, since the process ends normally, the value of the caller's PC register is used as the return address, that is, the address of the next instruction that calls the instruction. When the process ends abnormally, the return address is determined by the exception table, and this information is generally not saved in the stack frame. Therefore, it can be considered that the data usage of the stack return address is used for normal operation and is defined as safe data.

[0121] In addition, access method security can mean that there will be no memory out-of-bounds access or access that is reused after release. For example, all access variables that access a program variable or memory object can be statically determined to be secure variables, and the access method to the program variable or memory object is considered to be secure, and the program variable or memory object can be defined as secure data.

[0122] In one possible implementation, in addition to statically determining that all accessed variables are safe variables, safe data can also be required to be invisible to developers, for example: program local variables whose addresses are not explicitly taken, and data whose addresses are not propagated outside the function.

[0123] Among them, in the code "int a; int*p=&a;", data a is explicitly addressed, so a does not meet the definition of secure data. It can be understood that since explicit addressing is to put the address of the operand directly in the instruction and take out the content in the specified address storage unit, although it is simple and fast, it is easy for malicious behavior to obtain the target address. On the contrary, program local variables that are not explicitly addressed can reduce the probability of target address leakage. Therefore, it can be considered that program local variables that are not explicitly addressed are secure data, and program local variables that are explicitly addressed are non-secure data.

[0124] For heap memory objects, the address is not propagated outside the function, such as the code "int*a=malloc(10*sizeof(int)); a[5]=…;".

[0125] Based on any of the above methods, the compiler can identify security data.

[0126] S203: The compiler redirects the original memory location of the security data to a secure location in the memory space.

[0127] In one possible implementation, the compiler can pre-divide the memory space into safe and unsafe locations (safe / unsafe), and further divide the safe / unsafe partition within the boundary so that subsequent unsafe memory access checks can only access unsafe locations. On the basis of boundary isolation, it is further ensured that the data in the safe area within the boundary is not tampered with. Among them, the safe location can include the safe stack memory location and the safe heap memory location.

[0128] In one possible implementation, combining Figure 5 ,like Figure 6 As shown, when the security data is stack memory data, before the compiler redirects the original memory location of the security data to the security location, it also includes: S301 to S302.

[0129] S301, the compiler recognizes that the stack memory data is safe data.

[0130] The identification method may refer to the description in S201 to S202 and will not be described again here.

[0131] S302: The compiler records the original memory location of the stack memory data.

[0132] In a possible implementation, the compiler may record the original memory location (stack slot) of all stack memory data, and then scan the compiler backend instructions to determine whether the stack memory data is safe data based on the access variables to any stack memory data.

[0133] When the security data is stack memory data, the method in which the compiler redirects the original memory location of the security data to the security location specifically includes: S2031 to S2032.

[0134] S2031. The compiler allocates a secure stack memory position in the secure position for the stack memory data, and establishes a corresponding relationship between the original memory position of the stack memory data and the secure stack memory position.

[0135] Since the stack memory is automatically created and released by the program, it needs to be implemented within the program. Therefore, the compiler needs to establish a correspondence between the original memory location and the safe stack memory location so that the subsequent compiler can automatically obtain the redirected safe stack memory location.

[0136] S2032. The compiler updates the address pointing to the original stack memory location in the memory access instruction to the address pointing to the secure stack memory location according to the corresponding relationship.

[0137] In a possible implementation, the updating method may include: using the processor's stack register (the SP register in the ARM processor) plus the offset in the stack frame (the offset of the stack memory operand in the compiler intermediate code) to perform read and write operations on the stack memory data, and the stack register points to the stack base address. After the update, a reserved general register (the x18 register can be used in the ARM processor) is used to indicate the secure stack base address, and x18 plus the offset in the secure stack frame are used to perform read and write operations on the data in the secure stack memory location.

[0138] In one possible implementation, push (writing data from a general register to memory) and pop (reading data from memory to a general register) instructions are often used for parameter passing and return value acquisition during function calls.

[0139] Based on this, for the stack return address, callee / caller saved register, in the construction function entry stage (GCC's prologue stage) and exit stage (GCC's epilogue stage), the compiler updates the push and pop operations of these data to push / pop operations on safe data.

[0140] For stack spilled data, the compiler records the stack_slot_list layout before and after the compiler reload phase. The stack_slot added in the reload phase is the stack spilled stack memory, which updates the push / pop operations on the stackspilled data to push / pop operations on safe data.

[0141] For local variables that meet the conditions for being placed in the safe stack memory location (no address is taken, with the addressable attribute, the GCC compiler assigns the addressable attribute to all local variables that have not been taken), the compiler redirects the read and write operations of these local variables to the safe stack memory location. First, the local variables that meet the conditions are recorded in the dfinit stage, and then all compiler intermediate codes are traversed to read and write instructions to the memory, and the memory operands in the instructions are taken out. If they belong to safe data, the original memory location is updated to the safe stack memory location.

[0142] In one possible implementation, combining Figure 5 ,like Figure 7 As shown, when the security data is stack memory data, the method in which the compiler redirects the memory location of the security data to the security location specifically includes: S2033.

[0143] S2033. The compiler allocates a secure heap memory location in the secure location for the heap memory data, and updates the initial calling function that returns the original memory location of the heap memory data in the target process to a target calling function that returns the secure heap memory location.

[0144] Since heap memory is manually requested and released by programmers, a safe heap memory location needs to be allocated according to the data size. When a function call statement in the compiled intermediate code is identified to call a heap memory allocation function, the initial call function that returns the original memory location of the heap memory data in the target process needs to be updated to the target call function that returns the safe heap memory location, so that the heap memory location returned by the allocation is in a safe location.

[0145] Figure 8 The flowchart of the isolation and optimization process provided in the embodiment of the present application may include the following steps: S401 to S402.

[0146] S401: The compiler receives a memory access instruction of a target process.

[0147] In a specific implementation, the memory access instruction may be a processing instruction for performing operations such as addition, subtraction, logical AND, logical OR, displacement, etc., and may also be a read and write instruction. Specifically, the memory access instruction may include an smp instruction, a mov instruction, an fmul instruction, an fadd instruction, etc. The specific types of memory access instructions are not limited to the above examples, and the specific types of memory access instructions do not affect the protection scope of the embodiments of the present application.

[0148] The memory access instruction is used to indicate an access path for accessing a target address in the memory space.

[0149] Specifically, memory access instructions form an access path to the target address by pointing to the address through the operand, or by giving the address where the operand is located and then searching for the operand in the memory. Usually the operand includes: a pointer that defines the base address, and an offset.

[0150] S402: When the compiler determines, based on the access path, that the memory access instruction is used for non-secure access, the target process is allowed to access the non-secure location.

[0151] In one possible implementation, the compiler determines that a memory access instruction is used for secure access based on an access path, specifically including: when a target address of the access path is located at a secure location and an access variable in the access path is a secure variable, the compiler determines that a memory access instruction is used for secure access.

[0152] Among them, the security variables are predetermined by static analysis of the target process.

[0153] Optionally, the target address of the access path is located at a secure location, including: a base address defined by the pointer is located at a secure location, and the offset is a constant.

[0154] In one possible implementation, in order to ensure the security of secure data during operation, firstly, secure locations and non-secure locations other than secure locations are divided for secure data in the memory space. Then, memory access instructions are identified through access paths to ensure that unsafe memory access instructions can only access non-safe locations.

[0155] It can be understood that when the target process of non-secure access is allowed to access the non-secure location, it means that the access location is limited. Further, when the compiler determines that the memory access instruction is used for non-secure access, the target process is not allowed to access the secure location. Therefore, in another possible implementation, when it is determined that the memory access instruction is used for secure access, the compiler can allow the target process to access the secure location.

[0156] In one possible implementation, when the compiler determines that a memory access instruction is used for non-secure access, the compiler can implement restrictions on non-secure access by performing an instrumentation check on the memory access instruction. Figure 5 ,like Fig. 9 As shown, S402 specifically includes:

[0157] S4021. The compiler performs an instrumentation check on the memory access instruction.

[0158] Among them, the stub check is used to limit the memory access instructions of non-secure access to access non-secure locations. By identifying unsafe memory access instructions, the stub check is performed to ensure that the target address of the memory access is located in a non-secure location, making it impossible to access the secure location, and ensuring the boundary isolation within the memory space.

[0159] For each unsafe memory access instruction, the instrumentation check will insert additional check code, which is used to obtain the target address (including pointer and offset) of the memory access instruction and check the range of the target address to ensure that it falls into the unsafe position of the current memory space, thus achieving fine-grained memory isolation. For example, Fig.10 As shown, in the first memory space, when the memory access instruction of the first code is determined to be an unsafe access, only the unsafe first data (domain 1unsafe data) in the unsafe location in the first memory space can be accessed, and the safe first data (domain 1safe data) in the safe location cannot be accessed. The safe first data includes: return address, code / data pointer, sensitive data, etc. The same is true for the second memory space. In this way, even if the memory access instruction is unsafe, the target address it accesses can be limited to the unsafe location, and the safe data will not be tampered with.

[0160] Specifically, it is necessary to analyze the data flow define-use chain of pointers and offsets. In GCC, the static single assignment mechanism provides the ability to obtain the define-use chain of program variables. According to the data flow information provided by the static single assignment, the initial definition and data flow propagation chain of pointers and offsets can be obtained.

[0161] Furthermore, each intermediate code is scanned to identify all pointer dereferences, and based on the direction of pointer data flow propagation, it is determined whether the instrumentation check can be optimized, including S403 or S404.

[0162] S403: When the access variable of the memory access instruction is a secure variable, the compiler ends the execution of the stub check.

[0163] Since the instrumentation check is to check the access variables, such as pointers and offsets, when the access variable is a safe variable, the result of the instrumentation check must indicate that the target address is located in a limited area, so the instrumentation check step can be terminated to save processor resources.

[0164] For example, in the code "int*b=&i;int*a=b;*a=2;", the access variable of the statement "*a=2" is a constant and is considered a safe variable. Therefore, the memory access corresponding to the statement "*a=2" can be removed from the stub, and the stub check is terminated.

[0165] Furthermore, when variables a and b are both determined to be safe variables, the stub check can be completed for the entire code "int*b=&i;int*a=b;*a=2;".

[0166] S404. When the access variables of the first memory access instruction and the second memory access instruction are both secure variables, and the pointer in the access variable of the first memory access instruction and the pointer in the access variable of the second memory access instruction have the same value, the compiler will perform an instrumentation check on the first memory access instruction and determine the result of the check corresponding to the second memory access instruction.

[0167] For multiple dereferences of the same pointer propagation chain, only one insertion check is required at the pointer definition along the data flow, which can reduce processor resource consumption.

[0168] For example, the code "int*a=p; *a=2; int*b=p; *b=2;" has the same value p assigned to access variables a and b. Therefore, a stub check on p can cover the two memory access statements *a=2, *b=2.

[0169] The above mainly introduces the scheme of the embodiment of the present application from the perspective of method. It is understandable that in order to realize the above functions, the memory isolation device includes hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art should easily realize that, in combination with the units and algorithm steps of each example described in the embodiments disclosed herein, the embodiments of the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the embodiments of the present application.

[0170] The embodiment of the present application can divide the memory isolation device into functional units according to the above method example. For example, each functional unit can be divided according to each function, or two or more functions can be integrated into one processing unit. The above integrated unit can be implemented in the form of hardware or in the form of software functional units. It can be understood that the division of units in the embodiment of the present application is schematic and is only a logical functional division. There may be other division methods in actual implementation.

[0171] The present application embodiment provides a memory isolation device of a gateway system, such as Fig.11 As shown, the memory isolation device 50 includes: an instruction processing module 51 and a memory isolation module 52.

[0172] The instruction processing module 51 is configured to execute a memory access instruction received from a target process; the memory access instruction is used to indicate an access path for accessing a target address in a memory space.

[0173] The memory isolation module 52 is configured to execute, when it is determined based on the access path that the memory access instruction is for non-secure access, allowing the target process to access a non-secure location; a non-secure location is a memory location in the memory space other than a secure location allocated for secure data.

[0174] In a possible implementation, the memory isolation module 52 is further configured to allow the target process to access the secure location when it is determined, based on the access path, that the memory access instruction is for secure access.

[0175] In one possible implementation, the instruction processing module 51 is also configured to execute when the target address of the access path is located at a secure location and the access variable in the access path is a secure variable, determine that the memory access instruction is used for secure access; the secure variable is predetermined by static analysis of the target process.

[0176] In a possible implementation, the access variable includes a pointer pointing to a target address and an offset; the target address of the access path is located in a safe position, including: a base address defined by the pointer is located in a safe position, and the offset is a constant.

[0177] In one possible implementation, when a memory access instruction is used for non-secure access, the memory isolation module 52 is specifically configured to perform an instrumentation check on the memory access instruction; the instrumentation check is used to limit the memory access instruction for non-secure access to access a non-secure location.

[0178] In a possible implementation, the memory isolation device further includes: a first optimization module 53; the first optimization module 53 is configured to terminate the execution of the instrumentation check when the access variable of the memory access instruction is a security variable.

[0179] In one possible implementation, the memory isolation device also includes: a second optimization module 54; the second optimization module 54 is configured to execute a first memory access instruction and a second memory access instruction, and when the access variables are both security variables and the pointer in the access variable of the first memory access instruction and the pointer in the access variable of the second memory access instruction have the same value, the inspection result of the plug-in check performed on the first memory access instruction is determined as the inspection result corresponding to the second memory access instruction.

[0180] In one possible implementation, the memory isolation device also includes: a data identification module 55, and a redirection module 56; the data identification module 55 is configured to perform static analysis during the code compilation process of the target process to obtain a static analysis result of the target process; when the static analysis result indicates that the access variable for the target data in the target process is a secure variable, the target data is determined to be secure data; the redirection module 56 is configured to execute in the memory space to redirect the original memory location of the secure data to a secure location.

[0181] In one possible implementation, when the security data is stack memory data, the redirection module 56 is specifically configured to execute the allocation of a secure stack memory position in the secure position for the stack memory data, and establish a correspondence between the original memory position of the stack memory data and the secure stack memory position; based on the correspondence, the address pointing to the original stack memory position in the memory access instruction is updated to an address pointing to the secure stack memory position.

[0182] In one possible implementation, when the security data is heap memory data, the redirection module 56 is specifically configured to execute a secure heap memory location in a secure location allocated for the heap memory data, and update the initial calling function that returns the original memory location of the heap memory data in the target process to a target calling function that returns the secure heap memory location.

[0183] In the case of implementing the functions of the above-mentioned integrated modules in the form of hardware, the memory isolation device involved in the above-mentioned embodiment can also be called an electronic device. The embodiment of the present application provides a possible structure of the above-mentioned electronic device. Fig.12 As shown, the electronic device 60 includes: a processor 602 and a bus 604. In some exemplary embodiments, the electronic device 60 may further include a memory 601; optionally, the electronic device 60 may further include a communication interface 603.

[0184] The processor 602 may be a processor that implements or executes various exemplary logic blocks, modules, and circuits described in conjunction with the embodiments of the present application. The processor 602 may be a central processing unit, a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array, or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It may implement or execute various exemplary logic blocks, modules, and circuits described in conjunction with the embodiments of the present application. The processor 602 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like.

[0185] The communication interface 603 is used to connect with other devices via a communication network, such as Ethernet, wireless access network, wireless local area network (WLAN), etc.

[0186] The memory 601 may be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program codes in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto.

[0187] As a possible implementation, the memory 601 may exist independently of the processor 602, and the memory 601 may be connected to the processor 602 via a bus 604 for storing instructions or program codes. When the processor 602 calls and executes the instructions or program codes stored in the memory 601, the management method of the gateway system provided in the embodiment of the present application can be implemented.

[0188] In another possible implementation, the memory 601 may also be integrated with the processor 602 .

[0189] The bus 604 may be an extended industry standard architecture (EISA) bus, etc. The bus 604 may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Fig.12 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0190] Some embodiments of the present application provide a computer-readable storage medium (e.g., a non-transitory computer-readable storage medium), which stores computer program instructions. When the computer program instructions are executed on a computer, the computer executes the gateway system management method as described in any of the above embodiments.

[0191] Exemplarily, the above-mentioned computer-readable storage media may include, but are not limited to: magnetic storage devices (e.g., hard disks, floppy disks or magnetic tapes, etc.), optical disks (e.g., compact disks (CDs), digital versatile disks (DVDs), etc.), smart cards and flash memory devices (e.g., erasable programmable read-only memory (EPROM), cards, sticks or key drives, etc.). The various computer-readable storage media described in this application may represent one or more devices and / or other machine-readable storage media for storing information. The term "machine-readable storage medium" may include, but is not limited to, wireless channels and various other media capable of storing, containing and / or carrying instructions and / or data.

[0192] An embodiment of the present application provides a computer program product including instructions. When the computer program product is run on a computer, the computer is enabled to execute the gateway system management method described in any of the above embodiments.

[0193] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A memory isolation method, characterized in that: include: Receive memory access instructions from the target process; The memory access instruction is used to indicate an access path for accessing a target address in a memory space; When it is determined, based on the access path, that the memory access instruction is used for non-secure access, the target process is allowed to access a non-secure location; the non-secure location is a memory location in the memory space other than a secure location allocated for secure data.

2. The method according to claim 1, characterized in that Also includes: When it is determined, based on the access path, that the memory access instruction is for secure access, the target process is allowed to access the secure location.

3. The method according to claim 2, characterized in that Determining, according to the access path, that the memory access instruction is used for secure access includes: When the target address of the access path is located at the secure location and the access variable in the access path is a secure variable, the memory access instruction is determined to be used for secure access; the secure variable is predetermined by statically analyzing the target process.

4. The method according to claim 3, characterized in that The access variable includes a pointer pointing to the target address and an offset; the target address of the access path is located at the safe location, including: the base address defined by the pointer is located at the safe location, and the offset is a constant.

5. The method according to claim 1, characterized in that When the memory access instruction is used for non-secure access, allowing the target process to access the non-secure location includes: An instrumentation check is performed on the memory access instruction; the instrumentation check is used to limit the memory access instruction of non-secure access to access the non-secure location.

6. The method according to claim 5, characterized in that Also includes: When the access variable of the memory access instruction is a secure variable, the execution of the instrumentation check ends.

7. The method according to claim 5, characterized in that Also includes: When the access variables of a first memory access instruction and a second memory access instruction are both secure variables, and the pointer in the access variable of the first memory access instruction and the pointer in the access variable of the second memory access instruction have the same value, the inspection result of the insertion check performed on the first memory access instruction will be determined as the inspection result corresponding to the second memory access instruction.

8. The method according to claim 1, characterized in that Also includes: Performing static analysis during the code compilation process of the target process to obtain a static analysis result of the target process; When the static analysis result indicates that the access variable for the target data in the target process is a secure variable, determining that the target data is secure data; In the memory space, an original memory location of the security data is redirected to the secure location.

9. The method according to claim 8, characterized in that When the security data is stack memory data, redirecting the original memory location of the security data to the security location includes: Allocating a secure stack memory position in the secure position for the stack memory data, and establishing a corresponding relationship between the original memory position of the stack memory data and the secure stack memory position; According to the corresponding relationship, the address pointing to the original stack memory location in the memory access instruction is updated to the address pointing to the secure stack memory location.

10. The method according to claim 8, characterized in that When the security data is heap memory data, redirecting the memory location of the security data to the security location includes: A secure heap memory location in the secure location is allocated to the heap memory data, and an initial calling function in the target process that returns the original memory location of the heap memory data is updated to a target calling function that returns the secure heap memory location.

11. A memory isolation device, characterized in that: include: A functional unit for executing the method as claimed in any one of claims 1 to 10; wherein the actions performed by the functional unit are implemented by hardware or by hardware executing corresponding software implementations.

12. An electronic device, characterized in that: include: processor; The processor is connected to a memory, the memory is used to store computer-executable instructions, and the processor executes the computer-executable instructions stored in the memory so that the electronic device implements the method according to any one of claims 1 to 10.

13. A computer-readable storage medium, characterized in that: The method comprises instructions, which, when executed on a computer, cause the computer to execute the method according to any one of claims 1 to 10.

14. A computer program product, characterized in that The method comprises instructions, which, when executed on a computer, cause the computer to execute the method according to any one of claims 1 to 10.

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