Driving method and device of display panel, electronic device and storage medium

Abstract

The present disclosure relates to a display panel driving method and device, an electronic device and a storage medium. The method comprises: controlling the display panel to perform display driving in a first mode; and controlling the display panel to switch from the first mode to a second mode to perform display driving; wherein the refresh frequency of the first mode is greater than the refresh frequency of the second mode; each display period of the first mode comprises at least one data writing frame; each display period of the second mode comprises at least one data writing frame and at least one data holding frame; and N data holding frames in the first display period of the second mode are located before the first data writing frame in the first display period of the second mode, and N is an integer greater than or equal to 1. In this way, the brightness difference of the display panel can be reduced during the process of switching different refresh frequencies to perform display driving, thereby improving the flicker problem of the display panel.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the field of display panels, and in particular, to a display panel driving method and device, an electronic device, and a storage medium. BACKGROUND

[0002] With the rapid development of today's technology, the application scenarios of display panels are also increasing. In different application scenarios, the display panel can be controlled to switch different refresh frequencies for display driving. However, in the process of controlling the display panel to switch different refresh frequencies for display driving, the brightness of the display panel will change abruptly, causing flickering of the display panel, which seriously affects the user experience. SUMMARY

[0003] To overcome the problems in the related art, the present disclosure provides a display panel driving method and device, an electronic device, and a storage medium. The present disclosure overcomes the problem of flickering of the display panel caused by abrupt change in brightness of the display panel in the process of switching different refresh frequencies for display driving.

[0004] According to a first aspect of an embodiment of the present disclosure, a display panel driving method is provided, the method comprising:

[0005] controlling the display panel to display drive in a first mode;

[0006] controlling the display panel to switch from the first mode to a second mode for display driving; wherein the refresh frequency of the first mode is greater than the refresh frequency of the second mode; each display period of the first mode comprises at least one data write frame; each display period of the second mode comprises at least one data write frame and at least one data hold frame; N data hold frames in a first display period in the second mode are located before a first data write frame in the first display period in the second mode, and N is an integer greater than or equal to 1.

[0007] In some embodiments, each display period of the first mode comprises R1 data write frames and H1 data hold frames, and each display period of the second mode comprises R2 data write frames and H2 data hold frames; wherein R1 / (R1+H1) is greater than R2 / (R2+H2), R1, R2, and H2 are integers greater than or equal to 1, and H1 is an integer greater than or equal to 0.

[0008] In some embodiments, N is less than H2.

[0009] In some embodiments, the arrangement of data write frames and data hold frames in the first display period in the second mode is different from the arrangement of data write frames and data hold frames in other display periods in the second mode.

[0010] In some embodiments, when R2 is 1, in the first display period in the second mode, 1 data write frame is located between H2 data retention frames, N data retention frames are located before the data write frame, and (H2-N) data retention frames are located after the data write frame; in other display periods in the second mode, 1 data write frame is located before H2 data retention frames arranged in sequence.

[0011] In some embodiments, when R2 is 1, the number of sorting bits of the data write frame in the first display period in the second mode is (N+1), wherein the number of sorting bits (N+1) ranges from 1 / 3*(H2+1) to 2 / 3*(H2+1).

[0012] In some embodiments, the arrangement of the data write frame and the data retention frame in each display period in the first mode is the same; in each display period in the first mode, R1 data write frames arranged in sequence are located before H1 data retention frames arranged in sequence.

[0013] In some embodiments, when H1 is 0, N data retention frames are arranged between the data write frame in the last display period in the first mode and the first data write frame in the first display period in the second mode.

[0014] When H1 is greater than or equal to 1, N data retention frames are arranged between the last data retention frame in the last display period in the first mode and the first data write frame in the first display period in the second mode.

[0015] According to a second aspect of the embodiments of the present disclosure, a driving device of a display panel is provided, and the device comprises:

[0016] A first driving module configured to control the display panel to perform display driving in a first mode.

[0017] A second driving module configured to control the display panel to switch from the first mode to a second mode to perform display driving; wherein the refresh frequency of the first mode is greater than the refresh frequency of the second mode; each display period of the first mode comprises at least one data write frame; each display period of the second mode comprises at least one data write frame and at least one data retention frame; N data retention frames in the first display period in the second mode are located before the first data write frame in the first display period in the second mode, and N is an integer greater than or equal to 1.

[0018] In some embodiments, each display period of the first mode includes R1 data write frames and H1 data hold frames, each display period of the second mode includes R2 data write frames and H2 data hold frames; wherein R1 / (R1+H1) is greater than R2 / (R2+H2), R1, R2, H2 are integers greater than or equal to 1, and H1 is an integer greater than or equal to 0.

[0019] In some embodiments, N is less than H2.

[0020] In some embodiments, the arrangement of data write frames and data hold frames in the first display period of the second mode is different from the arrangement of data write frames and data hold frames in other display periods of the second mode.

[0021] In some embodiments, when R2 is 1, in the first display period of the second mode, 1 data write frame is located between H2 data hold frames, N data hold frames are located before the data write frame, and (H2-N) data hold frames are located after the data write frame; in other display periods of the second mode, 1 data write frame is located before H2 data hold frames arranged in sequence.

[0022] In some embodiments, when R2 is 1, in the first display period of the second mode, the number of sorting bits of the data write frame is (N+1), wherein the number of sorting bits (N+1) ranges from 1 / 3*(H2+1) to 2 / 3*(H2+1).

[0023] In some embodiments, the arrangement of data write frames and data hold frames in each display period of the first mode is the same; in each display period of the first mode, R1 data write frames arranged in sequence are located before H1 data hold frames arranged in sequence.

[0024] In some embodiments, when H1 is 0, N data hold frames are arranged between the data write frame in the last display period of the first mode and the first data write frame in the first display period of the second mode.

[0025] When H1 is greater than or equal to 1, N data hold frames are arranged between the last data hold frame in the last display period of the first mode and the first data write frame in the first display period of the second mode.

[0026] According to a third aspect of embodiments of the present disclosure, an electronic device is provided, the device comprising:

[0027] a processor;

[0028] a memory for storing processor-executable instructions;

[0029] The processor is configured to implement the steps in the driving method of any one of the display panels in the first aspect when executing.

[0030] According to a fourth aspect of the embodiments of the present disclosure, a non-transitory computer-readable storage medium is provided, when instructions in the storage medium are executed by a processor in an electronic device, the electronic device is enabled to perform the steps in the driving method of any one of the display panels in the first aspect.

[0031] The technical solutions provided by the embodiments of the present disclosure can include the following beneficial effects:

[0032] In the embodiments of the present disclosure, the display panel is controlled to be driven in a first mode; the display panel is controlled to be switched from the first mode to a second mode for display driving; wherein the refresh frequency of the first mode is greater than the refresh frequency of the second mode; each display period of the first mode includes at least one data writing frame; each display period of the second mode includes at least one data writing frame and at least one data holding frame; N data holding frames in the first display period of the second mode are located before the first data writing frame in the first display period of the second mode, and N is an integer greater than or equal to 1.

[0033] Through the embodiments of the present disclosure, in the process of switching different refresh frequencies for display driving of the display panel, N data holding frames in the first display period of the second mode are located before the first data writing frame in the first display period of the second mode, so that the brightness difference of the display panel can be reduced in the process of switching different refresh frequencies for display driving of the display panel, and the flicker problem of the display panel can be improved.

[0034] It should be understood that the foregoing general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0035] The accompanying drawings, which are incorporated into the specification and constitute part of the specification, illustrate embodiments consistent with the present disclosure and, together with the specification, serve to explain the principles of the present disclosure.

[0036] Figure 1 is a characteristic curve diagram of the hysteresis effect of the pixel circuit thin film transistor;

[0037] Figure 2 is a schematic diagram of the brightness change of the display panel in the process of controlling the display panel to be driven in different refresh frequencies;

[0038] Figure 3is a schematic diagram of a luminance change of a display panel after a transition frame is added;

[0039] Figure 4 is a flowchart of a driving method of a display panel according to an example embodiment;

[0040] Figure 5 is a schematic diagram of a luminance change of a display panel according to a related technical solution;

[0041] Figure 6 is a schematic diagram of a luminance change of a display panel according to an example embodiment;

[0042] Figure 7 is a block diagram of a driving apparatus of a display panel according to an example embodiment;

[0043] Figure 8 is a block diagram of an electronic device according to an example embodiment. DETAILED DESCRIPTION

[0044] The example embodiments will be described in detail herein with reference to the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following example embodiments do not represent all implementations consistent with the present disclosure. Instead, they are merely examples of apparatuses and methods consistent with some aspects of the present disclosure as detailed in the appended claims.

[0045] In different application scenarios, a display panel can be controlled to be driven at different refresh frequencies. For dynamic pictures, the display panel can be controlled to be driven at a higher refresh frequency, and at this time, the picture presented by the display panel has better fluency. For static pictures, the display panel can be controlled to be driven at a lower refresh frequency, and at this time, the power consumption of the display panel is lower. That is, controlling the display panel to switch different refresh frequencies for display driving can achieve a balance between picture fluency and low power consumption. For example, a Low Temperature Polycrystalline Oxide (LTPO) screen can realize self-adaptation of a refresh frequency of 1 Hz to 120 Hz, and has become one of the main screens of high-end mobile phone products.

[0046] In this article, "refresh frequency" refers to the number of times of image refresh per unit time, and the unit is Hz. Generally, the higher the refresh frequency, the shorter the refresh period. For example, if the refresh frequency is 1 Hz, the refresh period is 1 s; if the refresh frequency is 120 Hz, the refresh period is (1 / 120) s, about 8.3 ms.

[0047] However, in the process of controlling the display panel to display drive at different refresh frequencies, due to the hysteresis of the pixel circuit thin film transistor (TFT), the threshold voltage (Vth) is offset in the process of the thin film transistor switching from one working state to another, and the driving current of the organic light-emitting diode (OLED) changes.

[0048] Exemplarily, the display panel can include a pixel circuit and a light-emitting element, the pixel circuit can include a driving transistor, and the light-emitting element can include an organic light-emitting diode; wherein the driving transistor can be used to provide driving current to the light-emitting element to control the light-emitting element to emit light. The driving transistor can be ion polarized inside, and then a built-in electric field is formed inside the driving transistor, causing the threshold voltage of the driving transistor to shift.

[0049] Herein, the "hysteresis effect" refers to the fact that the current change curve when the voltage applied to the thin film transistor changes from low to high and the current change curve when the voltage applied to the thin film transistor changes from high to low do not coincide.

[0050] Figure 1 is a characteristic curve diagram of the hysteresis effect of the pixel circuit thin film transistor. As shown in Figure 1 , the abscissa axis is the voltage Vgs between the gate and the source, and the ordinate axis is the current Ids between the source and the drain. Figure 1 The solid line in the middle shows the current change curve when the voltage applied to the thin film transistor changes from low to high, and the dashed line shows the current change curve when the voltage applied to the thin film transistor changes from high to low, and the solid line and the dashed line do not coincide. Among them, for the same current value, according to the current change curve shown by the solid line, the voltage V1 can be obtained, and according to the current change curve shown by the dashed line, the voltage V2 can be obtained, and the difference between the voltage V1 and the voltage V2 is ΔV. In other words, for the same voltage value, different current values can be obtained. In this way, the hysteresis effect affects the stability of the driving current provided by the driving transistor, and further affects the light-emitting stability of the light-emitting element.

[0051] Figure 2 is a schematic diagram of the brightness change of the display panel in the process of controlling the display panel to display drive at different refresh frequencies. As shown in Figure 2As shown in FIG. 7, the abscissa axis is time, and the ordinate axis is brightness. The display panel is controlled to be driven at a refresh frequency of 120 Hz, and the brightness of the display panel remains stable. The refresh frequency is switched from 120 Hz to 10 Hz, and the display panel is controlled to be driven at a refresh frequency of 10 Hz. The brightness of the first frame at the refresh frequency of 10 Hz decreases, and the brightness of the second frame at the refresh frequency of 10 Hz remains stable. That is, when the refresh frequency is switched from 120 Hz to 10 Hz, the display panel brightness corresponding to the first frame at the refresh frequency of 10 Hz changes suddenly, causing the display panel to flicker, which seriously affects the user experience.

[0052] In the related technical solution, the hysteresis characteristic of the thin film transistor can be improved through process optimization, thereby improving the problem of flicker of the display panel caused by sudden change of the brightness of the display panel. However, the above process optimization solution is relatively complex.

[0053] In the related technical solution, the transition frame can also be inserted between the switching of the refresh frequencies to reduce the difference in the refresh frequencies between adjacent two frames, thereby improving the problem of flicker of the display panel. In combination with Figure 2 As shown in FIG. 7, in the process of switching the refresh frequency from 120 Hz to 10 Hz, the difference between the refresh frequencies is large, and the change difference between adjacent two frames is large, which may cause the problem of flicker of the display panel.

[0054] For example, if the refresh frequency is directly switched from 120 Hz to 1 Hz, the frequency difference between adjacent two frames is 119 Hz, the change difference between adjacent two frames is large, and the problem of flicker of the display panel may occur. Figure 3 FIG. 8 is a schematic diagram of brightness change of the display panel after increasing the transition frame. As shown in FIG. 8, the abscissa axis is time, and the ordinate axis is brightness. The display panel is controlled to be driven at a refresh frequency of 120 Hz, and the brightness of the display panel remains stable. The refresh frequency is switched from 120 Hz to 1 Hz, and the display panel is controlled to be driven at a refresh frequency of 1 Hz. The brightness of the first frame at the refresh frequency of 1 Hz decreases, and the brightness of the second frame at the refresh frequency of 1 Hz remains stable. That is, when the refresh frequency is switched from 120 Hz to 1 Hz, the display panel brightness corresponding to the first frame at the refresh frequency of 1 Hz changes suddenly, causing the display panel to flicker, which seriously affects the user experience. Figure 3 As shown in FIG. 8, in the process of switching the refresh frequency from 120 Hz to 1 Hz, the transition frame is inserted, that is, the refresh frequency is switched from 120 Hz to 60 Hz, 20 Hz, 8 Hz, and finally to 1 Hz. In this way, the difference in the refresh frequencies between any adjacent two frames is reduced, thereby improving the problem of flicker of the display panel. However, the above method of inserting the transition frame needs to increase power consumption and is relatively complex to set.

[0055] Therefore, the embodiments of the present disclosure provide a display panel driving method and device, an electronic device, and a storage medium.

[0056] Figure 4 FIG. 9 is a flowchart of a display panel driving method according to an example embodiment. As shown in FIG. 9, the method mainly includes the following steps: Figure 4 As shown in FIG. 9, the method mainly includes the following steps:

[0057] In step 401, the display panel is controlled to be driven in a first mode;

[0058] In step 402, the display panel is controlled to switch from the first mode to the second mode for display driving; wherein the refresh frequency of the first mode is greater than the refresh frequency of the second mode; each display period of the first mode comprises at least one data writing frame; each display period of the second mode comprises at least one data writing frame and at least one data maintaining frame; the N data maintaining frames in the first display period of the second mode are located before the first data writing frame in the first display period of the second mode, and N is an integer greater than or equal to 1.

[0059] In the embodiments of the present disclosure, the difference between the first mode and the second mode lies in the refresh frequency. In other words, controlling the display panel to display in the first mode means controlling the display panel to display at the first refresh frequency, and controlling the display panel to display in the second mode means controlling the display panel to display at the second refresh frequency; wherein the first refresh frequency is greater than the second refresh frequency. In the driving method provided by the embodiments of the present disclosure, the display panel is controlled to display at a higher refresh frequency and then is controlled to display at a lower refresh frequency.

[0060] In the embodiments of the present disclosure, the display period in different modes is related to the refresh frequency. In the first mode, the length of the first display period is the inverse of the first refresh frequency; in the second mode, the length of the second display period is the inverse of the second refresh frequency. That is, the higher the refresh frequency, the shorter the corresponding display period.

[0061] In a specific example, the first refresh frequency in the first mode is 120Hz, and the corresponding first display period is (1 / 120)s; the second refresh frequency in the second mode is 10Hz, and the corresponding second display period is (1 / 10)s.

[0062] In the embodiments of the present disclosure, a display cycle can include a data writing (Refresh) frame and a data holding (Holding) frame. As described above, the display panel can include a driving transistor and a light emitting element, and the driving transistor can be used to provide a driving current to the light emitting element to control the light emitting element to emit light. More specifically, the driving transistor has a data input end, a control end and a data output end, wherein the data input end is the source of the driving transistor, used to input a data signal to the driving transistor; the data output end is the drain of the driving transistor, used to connect the light emitting element and provide a driving current to the light emitting element; and the control end is the gate of the driving transistor, used to control the driving transistor to turn on or turn off. In the data writing frame, the source of the driving transistor can receive a data signal, and the driving transistor is turned on to provide a driving current to the light emitting element, so as to drive the display panel to display a picture. In the data holding frame, the source of the driving transistor does not receive a data signal, and the driving transistor does not provide a driving current to the light emitting element, so as to maintain the picture of the data writing frame.

[0063] Exemplarily, the maximum refresh frequency of the display panel is 120Hz, and the display cycle corresponding to 120Hz includes 1 data writing frame. If it is needed to switch the display panel to other refresh frequencies for display driving, it is needed to adjust the number of data writing frames and data holding frames in the display cycle. The refresh frequency corresponding to the display cycle is the maximum refresh frequency*(number of data writing frames / (number of data writing frames+number of data holding frames)). In the case that the number of data writing frames in the display cycle is maintained as 1, if the display cycle includes 1 data writing frame and 1 data holding frame, the corresponding refresh frequency is 1 / 2 of the maximum refresh frequency, i.e. 60Hz; if the display cycle includes 1 data writing frame and 2 data holding frames, the corresponding refresh frequency is 1 / 3 of the maximum refresh frequency, i.e. 40Hz. Similarly, if the display cycle includes 1 data writing frame, and the number of data holding frames is 3, 4, 5, 7, 9, 11, 19, 23, 29, 39, 59 or 119 respectively, the corresponding refresh frequencies are 30Hz, 24Hz, 20Hz, 15Hz, 12Hz, 10Hz, 6Hz, 5Hz, 4Hz, 3Hz, 2Hz or 1Hz respectively.

[0064] Of course, more diversified refresh frequencies can also be realized by adjusting the number of data writing frames in the display cycle. In the case that the number of data holding frames in the display cycle is maintained as 1, if the display cycle includes 2 data writing frames and 1 data holding frame, the corresponding refresh frequency is 2 / 3 of the maximum refresh frequency, i.e. 80Hz; if the display cycle includes 3 data writing frames and 1 data holding frame, the corresponding refresh frequency is 3 / 4 of the maximum refresh frequency, i.e. 90Hz.

[0065] Herein, the data write frame is located before the data hold frame in the display period, and all the data write frames are arranged continuously, and all the data hold frames are arranged continuously. Exemplarily, in the display period corresponding to 40Hz, 2 data hold frames are arranged continuously after 1 data write frame. Exemplarily, in the display period corresponding to 90Hz, 3 data write frames are arranged continuously before 1 data write frame.

[0066] In the embodiments of the present disclosure, the display panel is driven by switching from the first mode to the second mode, i.e., by switching from the first refresh frequency to the second refresh frequency. The last display period in the first mode and the first display period in the second mode are two display periods arranged adjacently. The N data hold frames in the first display period in the second mode are located before the first data write frame in the first display period in the second mode, and N is an integer greater than or equal to 1.

[0067] In some embodiments, each display period in the first mode can include 1 data write frame and no data hold frame. In this case, the data write frame in the last display period in the first mode and the first data hold frame in the first display period in the second mode are arranged adjacently. In other words, the data write frame in the last display period in the first mode and the first data write frame in the first display period in the second mode are not arranged adjacently; or, there are N data hold frames between the data write frame in the last display period in the first mode and the first data write frame in the first display period in the second mode; or, the N data hold frames in the first display period in the second mode are located before the first data write frame in the first display period in the second mode.

[0068] In some embodiments, each display period in the first mode can include 1 data write frame and at least 1 data hold frame. In this case, the last data hold frame in the last display period in the first mode and the first data hold frame in the first display period in the second mode are arranged adjacently. In other words, the last data hold frame in the last display period in the first mode and the first data write frame in the first display period in the second mode are not arranged adjacently; or, there are N data hold frames between the last data hold frame in the last display period in the first mode and the first data write frame in the first display period in the second mode; or, the N data hold frames in the first display period in the second mode are located before the first data write frame in the first display period in the second mode.

[0069] Figure 5is a luminance change schematic diagram of a display panel according to a related technical solution. Taking the first refresh frequency of the first mode as 120Hz and the second refresh frequency of the second mode as 10Hz as an example, 120Hz is high frequency and 10Hz is low frequency. As shown in Figure 5 , the abscissa axis is time and the ordinate axis is luminance. Figure 5 Three display periods of the first mode are shown, and each display period of the first mode includes one data write frame and does not include a data retention frame. Figure 5 Three display periods of the second mode are also shown, and the arrangement of the data write frame and the data retention frame in each display period of the second mode is the same, that is, each display period of the second mode includes one data write frame and 11 data retention frames, and the 11 data retention frames are arranged continuously after the data write frame.

[0070] Referring to Figure 5 , the display panel is switched from high frequency to low frequency for display driving, and the data write frame in the last display period of the first mode and the data write frame in the first display period of the second mode are arranged adjacently. The threshold voltage compensation of the pixel circuit is collected in real time, and the threshold voltage compensation of the first data write frame in the first display period of the low frequency will use the threshold voltage compensation at the last moment, that is, the threshold voltage compensation of the first data write frame in the first display period of the low frequency will use the threshold voltage compensation of the last display period of the high frequency, which causes the luminance of the first display period of the low frequency to change suddenly, resulting in flicker of the display panel. The luminance of the second display period of the low frequency will remain stable. Figure 5 The difference between the luminance of the last display period of the first mode and the minimum value of the luminance of the first display period of the second mode is ΔL1.

[0071] Figure 6 is a luminance change schematic diagram of a display panel according to an example embodiment. Taking the first refresh frequency of the first mode as 120Hz and the second refresh frequency of the second mode as 10Hz as an example, 120Hz is high frequency and 10Hz is low frequency. As shown in Figure 6 , the abscissa axis is time and the ordinate axis is luminance. Figure 6 Three display periods of the first mode are shown, and each display period of the first mode includes one data write frame and does not include a data retention frame. Figure 6The 3 display periods of the second mode are also shown. The arrangement of the data write frame and the data retention frame in the first display period of the second mode is different from the arrangement of the data write frame and the data retention frame in other display periods of the second mode. Each of the display periods of the second mode includes 1 data write frame and 11 data retention frames. In the first display period of the second mode, the 1 data write frame is located between the 11 data retention frames, that is, 3 data retention frames are located before the 1 data write frame and 8 data retention frames are located after the 1 data write frame in the first display period of the second mode. In other display periods of the second mode, the 1 data write frame is located before the 11 data retention frames arranged in succession.

[0072] With reference to Figure 6 , the display panel is controlled to switch from the high frequency to the low frequency for display driving. The data write frame in the last display period of the first mode and the first data write frame in the first display period of the second mode are not arranged adjacently, that is, the data write frame in the last display period of the first mode and the first data write frame in the first display period of the second mode are separated by 3 data retention frames, wherein the 3 data retention frames belong to the first display period of the second mode. In other words, the 3 data retention frames in the first display period of the second mode are located before the first data write frame in the first display period of the second mode. Since there is a certain buffer time after being separated by 3 data retention frames, the threshold voltage compensation in the low frequency state can be used when the threshold voltage compensation is performed on the first data write frame in the first display period of the low frequency. In this way, the flicker problem of the display panel can be improved. Figure 6 The difference between the luminance of the last display period of the first mode and the minimum luminance of the first display period of the second mode is ΔL2. Figure 6 The luminance difference ΔL2 shown is less than Figure 5 The luminance difference ΔL1 shown; wherein the human eye can perceive the flicker of the display panel when observing the luminance difference ΔL1, and the human eye cannot perceive the flicker of the display panel when observing the luminance difference ΔL2. Therefore, by reducing the difference between the luminance of the last display period of the first mode and the minimum luminance of the first display period of the second mode, the flicker problem of the display panel can be effectively improved.

[0073] In the embodiments of the present disclosure, the display panel is controlled to switch from the first mode of the high frequency to the second mode of the low frequency for display driving. In the first display period of the second mode, N data retention frames are located before the first data write frame in the first display period of the second mode. In this way, the driving timing can be adjusted when the display panel is switched to display driving at different refresh frequencies, so that the luminance difference of the display panel can be effectively reduced, and the flicker problem of the display panel can be improved.

[0074] In some embodiments, N is less than the number of data holding frames included in a display period in the second mode. That is, the at least one data holding frame in the first display period in the second mode is located before the first data writing frame in the first display period in the second mode; and the at least one data holding frame in the first display period in the second mode is located after the first data writing frame in the first display period in the second mode.

[0075] In some embodiments, each display period in the first mode includes R1 data writing frames and H1 data holding frames, each display period in the second mode includes R2 data writing frames and H2 data holding frames; wherein R1 / (R1+H1) is greater than R2 / (R2+H2), R1, R2, H2 are integers greater than or equal to 1, and H1 is an integer greater than or equal to 0.

[0076] Here, the refresh frequency of the first mode (i.e., the first refresh frequency) is greater than the refresh frequency of the second mode (i.e., the second refresh frequency).

[0077] The driving method of the display panel provided by the embodiments of the present disclosure can be used in the application scenario of high frequency switching to low frequency. It should be noted that the high frequency and the low frequency in the embodiments of the present disclosure are relative concepts, which are used to illustrate the relative size relationship between the two frequencies. The embodiments of the present disclosure do not have special limitations on the specific values of the first refresh frequency (i.e., high frequency) and the second refresh frequency (i.e., low frequency).

[0078] In some embodiments, the arrangement of the data writing frames and the data holding frames in each display period in the first mode is the same; and the R1 data writing frames arranged continuously in each display period in the first mode are located before the H1 data holding frames arranged continuously.

[0079] Here, each data writing frame in each display period in the first mode is located before a data holding frame, and all the data writing frames are arranged continuously, and all the data holding frames are arranged continuously.

[0080] Referring to Figure 6 It is shown that the refresh frequency of the first mode is 120Hz, and each display period in the first mode includes 1 data writing frame and does not include a data holding frame.

[0081] In some embodiments, in the case that H1 is 0, the data writing frame in the last display period in the first mode and the first data writing frame in the first display period in the second mode are separated by N data holding frames.

[0082] In the case that H1 is greater than or equal to 1, the last data retention frame in the last display period in the first mode and the first data write frame in the first display period in the second mode are arranged with N data retention frames therebetween.

[0083] Here, the last display period in the first mode and the first display period in the second mode are arranged adjacently. The last frame in the last display period in the first mode can be either a data write frame or a data retention frame. This depends on the refresh frequency corresponding to the display period in the first mode. In the case that each display period in the first mode includes only a data write frame and does not include a data retention frame, of course, the data write frame in the last display period in the first mode and the first data retention frame in the first display period in the second mode are arranged adjacently, more specifically, the data write frame in the last display period in the first mode and the first data write frame in the first display period in the second mode are arranged with N data retention frames therebetween. In the case that each display period in the first mode includes a data write frame and a data retention frame, of course, the last data retention frame in the last display period in the first mode and the first data retention frame in the first display period in the second mode are arranged adjacently, more specifically, the last data retention frame in the last display period in the first mode and the first data write frame in the first display period in the second mode are arranged with N data retention frames therebetween.

[0084] Figure 5 and Figure 6 Only the case that each display period in the first mode includes only a data write frame and does not include a data retention frame is shown, which does not constitute a limitation to the protection scope of the present disclosure.

[0085] In some embodiments, the arrangement of the data write frame and the data retention frame in the first display period in the second mode is different from the arrangement of the data write frame and the data retention frame in other display periods in the second mode.

[0086] Here, in the process of switching from the first mode to the second mode, the brightness of the first display period in the second mode can have a flickering problem until the brightness of the second display period in the second mode is stable, therefore, the arrangement of the data write frame and the data retention frame in the first display period in the second mode needs to be adjusted, so as to improve the flickering problem of the display panel in the process of switching from the first mode to the second mode.

[0087] Specifically, the arrangement of the data write frame and the data hold frame in the first display period in the second mode is adjusted, and the first data write frame in the first display period in the second mode is delayed, i.e., the data write frame in the first display period in the second mode is moved backward along the time axis. The arrangement of the data write frame and the data hold frame in other display periods in the second mode does not need to be adjusted, i.e., the data write frame is located before the data hold frame, and all the data write frames are arranged continuously, and all the data hold frames are arranged continuously.

[0088] In some embodiments, when R2 is 1, 1 data write frame in the first display period in the second mode is located between H2 data hold frames, N data hold frames are located before the data write frame, and (H2-N) data hold frames are located after the data write frame; 1 data write frame in other display periods in the second mode is located before H2 data hold frames arranged continuously.

[0089] Here, when the number of data write frames in a display period in the second mode is 1, 1 data write frame in the first display period in the second mode needs to be moved backward along the time axis, and at this time, 1 data write frame in the first display period in the second mode is located between H2 data hold frames, and more specifically, N data hold frames are located before the data write frame, and (H2-N) data hold frames are located after the data write frame. The position of the data write frame in other display periods in the second mode does not need to be adjusted, and at this time, 1 data write frame in other display periods in the second mode is located before H2 data hold frames arranged continuously.

[0090] In some embodiments, when R2 is 1, the number of sorting bits of the data write frame in the first display period in the second mode is (N+1), and the range of the number of sorting bits (N+1) is 1 / 3*(H2+1) to 2 / 3*(H2+1).

[0091] Here, the number of data write frames in a display period in the second mode is 1, and the data write frame can be moved and inserted backward between the H2 data holding frames arranged in series. It should be noted that the number of sorting bits of the data write frame in the first display period in the second mode mainly needs to consider two aspects. On the one hand, as the value of N increases, the buffer time between frequency switching becomes longer, and the probability of using threshold voltage compensation in a low frequency state when performing threshold voltage compensation on the data write frame is higher, which is conducive to improving the flicker problem of the display panel. On the other hand, as the value of N increases, the number of data holding frames between the last frame (i.e., the data write frame or the data holding frame) in the last display period in the first mode and the first data write frame in the first display period in the second mode increases, and the brightness of the display panel also gradually decreases, which is not conducive to improving the flicker problem of the display panel. Therefore, considering the influence of the above two aspects on the flicker problem of the display panel, the range of the number of sorting bits (N+1) is set to 1 / 3*(H2+1) to 2 / 3*(H2+1).

[0092] In a specific example, the number of data write frames R2 in each display period in the second mode is 1, the number of data holding frames H2 is 11, and the range of the number of sorting bits of the data write frame in the first display period in the second mode is 4 to 8.

[0093] Figure 7 is a block diagram of a driving device of a display panel according to an exemplary embodiment. As shown in Figure 7 the device 700 mainly includes:

[0094] The first driving module 701 is configured to control the display panel to perform display driving in a first mode.

[0095] The second driving module 702 is configured to control the display panel to switch from the first mode to a second mode for display driving. The refresh frequency of the first mode is greater than the refresh frequency of the second mode. Each display period of the first mode includes at least one data write frame. Each display period of the second mode includes at least one data write frame and at least one data holding frame. N data holding frames in the first display period in the second mode are located before the first data write frame in the first display period in the second mode, and N is an integer greater than or equal to 1.

[0096] In some embodiments, each display period in the first mode comprises R1 data write frames and H1 data hold frames, each display period in the second mode comprises R2 data write frames and H2 data hold frames; wherein R1 / (R1+H1) is greater than R2 / (R2+H2), R1, R2, H2 are integers greater than or equal to 1, and H1 is an integer greater than or equal to 0.

[0097] In some embodiments, N is less than H2.

[0098] In some embodiments, the arrangement of data write frames and data hold frames in the first display period in the second mode is different from the arrangement of data write frames and data hold frames in other display periods in the second mode.

[0099] In some embodiments, when R2 is 1, in the first display period in the second mode, 1 data write frame is located between H2 data hold frames, N data hold frames are located before the data write frame, and (H2-N) data hold frames are located after the data write frame; in other display periods in the second mode, 1 data write frame is located before H2 data hold frames arranged consecutively.

[0100] In some embodiments, when R2 is 1, in the first display period in the second mode, the number of sorting bits of data write frames is (N+1), wherein the number of sorting bits (N+1) ranges from 1 / 3*(H2+1) to 2 / 3*(H2+1).

[0101] In some embodiments, the arrangement of data write frames and data hold frames in each display period in the first mode is the same; in each display period in the first mode, R1 data write frames arranged consecutively are located before H1 data hold frames arranged consecutively.

[0102] In some embodiments, when H1 is 0, N data hold frames are arranged between the data write frame in the last display period in the first mode and the first data write frame in the first display period in the second mode.

[0103] When H1 is greater than or equal to 1, N data hold frames are arranged between the last data hold frame in the last display period in the first mode and the first data write frame in the first display period in the second mode.

[0104] Figure 8is a block diagram of an electronic device illustrated in accordance with an exemplary embodiment. For example, the device 800 can be a mobile phone, a tablet computer, a computer, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, a wearable device (such as a smart watch, a smart bracelet, a smart ring, etc.), or the like.

[0105] Referring to Figure 8 The device 800 can include one or more of the following components: a processing component 802, a memory 804, a power supply component 806, a multimedia component 808, an audio component 810, an input / output (I / O) interface 812, a sensor component 814, and a communication component 816.

[0106] The processing component 802 usually controls overall operations of the device 800, such as operations associated with displaying, making phone calls, data communications, camera operations, and recording operations. The processing component 802 can include one or more processors 820 to execute instructions to complete all or part of steps of the above-described methods. In addition, the processing component 802 can include one or more modules to facilitate interaction between the processing component 802 and other components. For example, the processing component 802 can include a multimedia module to facilitate the interaction between the multimedia component 808 and the processing component 802.

[0107] The memory 804 is configured to store various types of data to support operations of the device 800. Examples of these data include instructions for any application or method operating on the device 800, contact data, phonebook data, messages, pictures, videos, and the like. The memory 804 can be implemented by any type of volatile or non-volatile storage devices or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk or optical disk.

[0108] The power supply component 806 provides power for various components of the device 800. The power supply component 806 can include a power supply management system, one or more power supplies, and other components associated with generating, managing and distributing power for the device 800.

[0109] The multimedia component 808 includes a screen providing an output interface between the device 800 and a user. In some embodiments, the screen can include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen can be implemented as a touch screen to receive an input signal from a user. The touch panel includes one or more touch sensors for sensing a touch, a slide and a gesture on the touch panel. The touch sensor can not only sense a boundary of a touching or a sliding action, but also detect duration and pressure related to the touching or sliding action. In some embodiments, the multimedia component 808 includes a front camera and / or a rear camera. When the device 800 is in an operation mode, such as a shooting mode or a video mode, the front camera and / or the rear camera can receive external multimedia data.

[0110] The audio component 810 is configured to output and / or input an audio signal. For example, the audio component 810 includes a microphone (MIC) configured to receive an external audio signal when the device 800 is in an operation mode, such as a call mode, a recording mode and a voice recognition mode. The received audio signal can be further stored in the memory 804 or transmitted via the communication component 816. In some embodiments, the audio component 810 further includes a speaker for outputting an audio signal.

[0111] The I / O interface 812 provides an interface between the processing component 802 and peripheral interface modules, such as a keypad, a click wheel, buttons and the like. The buttons can include, but are not limited to, a home button, a volume button, a start button and a lock button.

[0112] The sensor component 814 includes one or more sensors for providing status assessments of various aspects of the device 800. For example, the sensor component 814 can detect an open / closed position of the device 800, relative positioning of components, such as a display and a keypad of the device 800, a change of position of the device 800 or a component of the device 800, presence or absence of user contact with the device 800, a change in orientation of the device 800 or acceleration / deceleration of the device 800, and a temperature change of the device 800, among a plethora of other examples. The sensor component 814 can include an orientation sensor, an acceleration sensor, a proximity sensor, a gesture sensor, a gravity sensor, a biometric sensor, a temperature sensor, a humidity sensor, and an illuminance sensor, among a plethora of other examples.

[0113] The communication component 816 is configured to facilitate wired or wireless communication between the device 800 and other devices. The device 800 can access a wireless network based on a communication standard, such as WiFi, 4G, or 5G, or a combination thereof. In an example embodiment, the communication component 816 receives a broadcast signal or broadcast related information from an external broadcast management system via a broadcast channel. In an example embodiment, the communication component 816 also includes a Near Field Communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on Radio Frequency Identification (RFID) techniques, infrared data association (IrDA) techniques, ultra-wideband (UWB) techniques, Bluetooth (BT) techniques, and other techniques.

[0114] In an example embodiment, the device 800 can be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, micro-controllers, microprocessors, or other electronic elements, for performing the above-described methods.

[0115] In an example embodiment, a non-transitory computer-readable storage medium including instructions, such as the memory 804 including instructions, is also provided, which can be executed by the processor 820 of the device 800 to complete the above-described driving method of the display panel. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disc, and an optical data storage device, etc.

[0116] A non-transitory computer-readable storage medium, when instructions in the storage medium are executed by a processor in an electronic device, enables the electronic device to perform a driving method of a display panel, the method comprising:

[0117] controlling the display panel to be driven in a first mode for display;

[0118] controlling the display panel to be switched from the first mode to a second mode for display driving; wherein a refresh frequency of the first mode is greater than a refresh frequency of the second mode; each display period of the first mode includes at least one data writing frame; each display period of the second mode includes at least one data writing frame and at least one data holding frame; N data holding frames in a first display period in the second mode are located before a first data writing frame in the first display period in the second mode, and N is an integer greater than or equal to 1.

[0119] Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the features disclosed herein. It is intended that the disclosure be construed as including any paterns of this disclosure that can be derived from the description and illustrations presented herein without departing from the scope and spirit of the disclosure. The specification and examples are exemplary only, with the true scope and spirit of the disclosure being indicated by the following claims.

[0120] It is to be understood that the disclosure is not limited to the precise construction here described and illustrated and that various modifications and changes can be made without departing from the scope thereof. The only scope of the disclosure is to be determined by the appended claims.

Claims

1. A driving method for a display panel, characterized in that, The method includes: Control the display panel to drive the display in a first mode; The display panel is controlled to switch from the first mode to the second mode for display driving; wherein, the refresh rate of the first mode is greater than the refresh rate of the second mode; each display cycle of the first mode includes at least one data write frame; each display cycle of the second mode includes at least one data write frame and at least one data hold frame; N data hold frames in the first display cycle of the second mode are located before the first data write frame in the first display cycle of the second mode, where N is an integer greater than or equal to 1; at least one data hold frame in the first display cycle of the second mode is located after the first data write frame in the first display cycle of the second mode.

2. The driving method according to claim 1, characterized in that, Each display cycle of the first mode includes R1 data write frames and H1 data hold frames, and each display cycle of the second mode includes R2 data write frames and H2 data hold frames; wherein, R1 / (R1+H1) is greater than R2 / (R2+H2), R1, R2, and H2 are all integers greater than or equal to 1, and H1 is an integer greater than or equal to 0.

3. The driving method according to claim 2, characterized in that, N is less than H2.

4. The driving method according to claim 2, characterized in that, The arrangement of data write frames and data hold frames in the first display cycle of the second mode is different from the arrangement of data write frames and data hold frames in other display cycles of the second mode.

5. The driving method according to claim 2, characterized in that, When R2 is 1, in the first display cycle of the second mode, one data write frame is located between H2 data hold frames, N data hold frames are located before the data write frame and (H2−N) data hold frames are located after the data write frame; in other display cycles of the second mode, one data write frame is located before H2 consecutively arranged data hold frames.

6. The driving method according to claim 2, characterized in that, When R2 is 1, the number of sorting bits for the data written frame in the first display cycle of the second mode is (N+1), where the number of sorting bits (N+1) ranges from 1 / 3*(H2+1) to 2 / 3*(H2+1).

7. The driving method according to claim 2, characterized in that, In the first mode, the data write frames and data hold frames are arranged in the same way in each display cycle; in the first mode, the R1 consecutive data write frames are placed before the H1 consecutive data hold frames in each display cycle.

8. The driving method according to claim 2, characterized in that, When H1 is 0, there is an interval of N data hold frames between the data write frame in the last display cycle of the first mode and the first data write frame in the first display cycle of the second mode. When H1 is greater than or equal to 1, there is an interval of N data holding frames between the last data holding frame in the last display cycle of the first mode and the first data writing frame in the first display cycle of the second mode.

9. A driving device for a display panel, characterized in that, The device includes: The first driving module is configured to control the display panel to drive the display in a first mode. The second driving module is configured to control the display panel to switch from the first mode to the second mode for display driving; wherein, the refresh rate of the first mode is greater than the refresh rate of the second mode; each display cycle of the first mode includes at least one data write frame; each display cycle of the second mode includes at least one data write frame and at least one data hold frame; N data hold frames in the first display cycle of the second mode are located before the first data write frame in the first display cycle of the second mode, where N is an integer greater than or equal to 1; at least one data hold frame in the first display cycle of the second mode is located after the first data write frame in the first display cycle of the second mode.

10. An electronic device, characterized in that, The device includes: processor; Memory used to store processor-executable instructions; The processor is configured to: implement the steps of the driving method for the display panel as described in any one of claims 1 to 8 when executing.

11. A non-transitory computer-readable storage medium, characterized in that, When the instructions in the storage medium are executed by a processor in an electronic device, the electronic device is able to perform the steps in the driving method of the display panel as claimed in any one of claims 1 to 8.

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