A transformer area arcless circuit breaker and control method

Abstract

This invention discloses an arc-free circuit breaker and control method for power distribution areas. It connects a microprocessor to a voltage sensor, a current sensor, a mechanical circuit breaker, a GPS module, a wireless communication module, a thyristor drive circuit, and an inverter. The microprocessor receives the induced signals from the voltage and current sensors, the clock signal from the GPS module, and the control information from the wireless communication module. Based on these signals, the microprocessor calculates the operating status of the power distribution area and controls the mechanical circuit breaker, thyristor drive circuit, and inverter according to the calculation and analysis results. This solves the problem that traditional circuit breakers can no longer meet the increasing demands of photovoltaic power generation, charging piles, and other new energy sources in power distribution areas.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of circuit breakers, and particularly relates to a no-arc circuit breaker for a transformer area and a control method. BACKGROUND

[0002] Prior inventions or utility models have proposed no-arc AC circuit breaker design schemes, such as an intelligent no-arc circuit breaker with a patent number ZL200520096776.4, a three-phase no-arc circuit breaker with an application number 201020652885.0, a high-breaking no-arc circuit breaker with an application number CN201710544678.X, and an arc extinction module of a no-arc miniature circuit breaker with an application number 202221641724.0, but all have certain defects. Due to the use of new energy, charging piles in transformer areas and roof photovoltaics are increasing, and the power quality of transformer areas is getting worse, so the breaking decision of traditional circuit breakers cannot meet the increasing needs of new energy in transformer areas. The connection of new energy also puts forward new requirements for no-arc AC circuit breakers. The present application is designed based on the increasing demand for the connection of new energy in existing transformer areas. SUMMARY

[0003] In view of the above-mentioned deficiencies in the prior art, the no-arc circuit breaker for a transformer area and the control method provided by the present application solve the problem that traditional circuit breakers cannot meet the increasing needs of new energy such as photovoltaics and charging piles in transformer areas.

[0004] In order to achieve the above-mentioned purposes, the technical scheme adopted by the present application is as follows: a no-arc circuit breaker for a transformer area, comprising a voltage sensor, a current sensor, a left-end resistor, a left-end inductor, a transformer, a mechanical circuit breaker, a right-end resistor, a right-end inductor, a thyristor, a thyristor drive circuit, a microprocessor, a wireless communication module, a GPS module and an inverter.

[0005] The microprocessor is connected with the voltage sensor, the current sensor, the thyristor drive circuit, the wireless communication module, the GPS module and the inverter respectively, the voltage sensor is further connected with the current sensor, the left-end resistor and the left-end inductor in sequence, the left-end inductor is further connected with a No.1 terminal of the transformer, the mechanical circuit breaker and the thyristor respectively, the inverter is connected with a No.3 terminal and a No.4 terminal of the transformer, the thyristor drive circuit is connected with the thyristor, and the mechanical circuit breaker is further connected with the thyristor and the right-end resistor respectively, and the right-end resistor is further connected with the right-end inductor.

[0006] The voltage sensor is used to collect the voltage values of three phases of the transformer output of the transformer area, the current sensor is used to collect the current values of three phases of the transformer output of the transformer area, the wireless communication module is used to receive the control information of the transformer area circuit breaker, the GPS module is used to provide a clock signal for the microprocessor, and the microprocessor is used to calculate the operation state of the transformer area according to the voltage and current values of three phases of the transformer output, the clock signal and the control information, and control the mechanical circuit breaker and the thyristor drive circuit according to the calculation result, and the thyristor is used to control the current.

[0007] Further, the inverter includes a three-phase inverter structure, each phase of the inverter structure includes a capacitor, a connection terminal K1, a connection terminal K2, a first IGBT module, a second IGBT module, a third IGBT module, a fourth IGBT module, a first IGBT drive module, a second IGBT drive module, a third IGBT drive module, a fourth IGBT drive module, a connection port Q1, a connection port Q2, a connection port Q3 and a connection port Q4.

[0008] The connection terminal K1 is connected with the No. 3 terminal of the transformer, the connection terminal K2 is connected with the No. 4 terminal of the transformer, and the connection port Q1, the connection port Q2, the connection port Q3 and the connection port Q4 are connected with the port of the microprocessor.

[0009] The gate of the first IGBT module is connected with the connection port Q1 through the first IGBT drive module, the collector of the first IGBT module is connected with one end of the capacitor, and the emitter of the first IGBT module is connected with the connection terminal K2 and the collector of the second IGBT module respectively, the gate of the second IGBT module is connected with the connection port Q2 through the second IGBT drive module, and the emitter of the second IGBT module is connected with the other end of the capacitor.

[0010] The gate of the fourth IGBT module is connected with the connection port Q4 through the fourth IGBT drive module, the collector of the fourth IGBT module is connected with one end of the capacitor, the emitter of the fourth IGBT module is connected with the connection terminal K1 and the collector of the third IGBT module respectively, the gate of the third IGBT module is connected with the connection port Q3 through the third IGBT drive module, and the emitter of the third IGBT module is connected with the other end of the capacitor.

[0011] The control method of the arcless circuit breaker of the transformer area includes the following steps:

[0012] S1, initialization operation is performed through an initialization subprogram;

[0013] S2, a trip criterion is calculated through a trip and compensation criterion calculation subprogram;

[0014] S3, in response to the trip criterion being equal to 1, a trip action is performed through a trip action subprogram.

[0015] Further: In S268, the method for calling the compensation action subroutine is specifically as follows:

[0016] S2681. Determine if BuChangF2 is equal to 1. If it is, then:

[0017] bcDataF2[2*i]=-1*BiF2*M2data[i], where i ranges from 0 to 99;

[0018] bcDataF2[2*i+1]=(bcDataF2[2*i]+bcDataF2[2*i+2]) / 2, where i ranges from 0 to 98;

[0019] bcDataF2

[199] =(bcDataF2[0]+bcDataF2

[198] ) / 2;

[0020] bcDataF2[i+200]=bcDataF2[i], where i ranges from 0 to 199;

[0021] If not, then bcDataF2[i] = 0, where i ranges from 0 to 399;

[0022] S2682. Determine whether BuChangF3 is equal to 1. If not, then bcDataF3[i] = 0, where i ranges from 0 to 399; if yes, then:

[0023] bcDataF3[2*i]=-1*BiF3*M3data[i], where i ranges from 0 to 65;

[0024] bcDataF3[2*i+1]=(bcDataF3[2*i]+bcDataF3[2*i+2]) / 2; where i ranges from 0 to 64;

[0025] bcDataF3

[131] =(bcDataF3[0]+bcDataF3

[130] ) / 2;

[0026] bcDataF3

[132] =bcDataF3

[131] ;

[0027] bcDataF3[i+133] = bcDataF3[i]; where i ranges from 0 to 132;

[0028] bcDataF3

[266] =bcDataF3

[265] ;

[0029] bcDataF3[i+267] = bcDataF3[i]; where i ranges from 0 to 132;

[0030] S2683. Determine if BuChangF4 is equal to 1; if not, then bcDataF4[i] = 0, where i ranges from 0 to 399; if yes, then:

[0031] bcDataF4[2*i]=-1*BiF4*M4data[i], i ranges from 0 to 49;

[0032] bcDataF4[2*i+1]=(bcDataF4[2*i]+bcDataF4[2*i+2]) / 2; where i ranges from 0 to 48;

[0033] bcDataF4

[99] =(bcDataF4[0]+bcDataF4

[98] ) / 2;

[0034] bcDataF4[i+100] = bcDataF4[i]; where i ranges from 0 to 99;

[0035] bcDataF4[i+200] = bcDataF4[i]; where i ranges from 0 to 199;

[0036] S2684: Determine if BuChangF5 is equal to 1. If not, then bcDataF5[i] = 0; where i ranges from 0 to 399.

[0037] If so, then:

[0038] bcDataF5[2*i]=-1*BiF5*M5data[i], where i ranges from 0 to 39;

[0039] bcDataF5[2*i+1]=(bcDataF5[2*i]+bcDataF5[2*i+2]) / 2; where i ranges from 0 to 38;

[0040] bcDataF5

[79] =(bcDataF5[0]+bcDataF5

[78] ) / 2;

[0041] bcDataF5[i+80] = bcDataF5[i]; where i ranges from 0 to 79;

[0042] bcDataF5[i+160] = bcDataF6[i]; where i ranges from 0 to 159;

[0043] bcDataF5[i+320] = bcDataF6[i]; where i ranges from 0 to 79;

[0044] S2685, Calculate BuChangV;

[0045] BuChangV=bcDataF2[i]+bcDataF3[i]+bcDataF4[i]+bcDataF5[i], i=0~399;

[0046] S2686. Set CBuchang = 0 to complete the call to the compensation action subroutine.

[0047] Further: S1 includes the following sub-steps:

[0048] S11. Set the low-frequency interrupt clock to 20 milliseconds, set the high-frequency interrupt clock to 50 microseconds, set the wireless communication module reading interface, and set the GPS module reading interface.

[0049] S12. Set low-frequency interrupt conditions and call the low-frequency interrupt subroutine; set high-frequency interrupt conditions and call the high-frequency interrupt subroutine.

[0050] S13. Set variables, including:

[0051] MA represents the current time in seconds, with a value range of 0-59; HA represents the current time in milliseconds, with a value range of 0-999; UA represents the current time in microseconds, with a value range of 0-999; AH0 represents the moment when the phase of phase A voltage reaches zero degrees in milliseconds, with a unit of 50 milliseconds and a value range of 0-20; AU0 represents the moment when the phase of phase A voltage reaches zero degrees in microseconds, with a unit of microseconds and a value range of 0-20; CH represents the high-frequency interrupt counter, with a value range of 0-999; VY represents the trip voltage threshold; IY represents the trip current threshold; BY represents the compensation threshold; TZ represents the trip flag; CVA represents the sensor read counter, with a value range of 0-999; CZQ represents the period counter, with a value range of 0-199; SUMV represents voltage summation; and SUMI represents current summation.

[0052] The array AVINA

[400] represents the first reading value of phase A of the voltage sensor, the array AVINB

[400] represents the second reading value of phase A of the voltage sensor, the array AFV

[400] represents the floating-point value of phase A voltage, the array AIINA

[400] represents the first reading value of phase A of the current sensor, the array AIINB

[400] represents the second reading value of phase A of the current sensor, the array AFI

[400] represents the floating-point value of phase A current, and the array AVBZ

[400] represents phase A compensation.

[0053] The array BVINA

[400] represents the first reading value of phase B of the voltage sensor, the array BVINB

[400] represents the second reading value of phase B of the voltage sensor, the array BFV

[400] represents the floating-point value of phase B voltage, the array BIINA

[400] represents the first reading value of phase B of the current sensor, the array BINB

[400] represents the second reading value of phase B of the current sensor, the array BFI

[400] represents the floating-point value of phase B current, and the array BVBZ

[400] represents phase B compensation.

[0054] The array CVINA

[400] represents the first reading value of phase C of the voltage sensor, the array CVINB

[400] represents the second reading value of phase C of the voltage sensor, the array CFV

[400] represents the floating-point value of phase C voltage, the array CIINA

[400] represents the first reading value of phase C of the current sensor, the array CIINB

[400] represents the second reading value of phase C of the current sensor, the array CFI

[400] represents the floating-point value of phase C current, and the array CVBZ

[400] represents phase C compensation;

[0055] PT represents the time update data position, FTZ represents the trip calculation variable, FBZ represents the compensation calculation variable, FZD represents the low frequency interruption flag, SELF represents the storage selection flag, ACNTVI represents the A-phase storage position counter, BCNTVI represents the B-phase storage position counter, and CCNTVI represents the C-phase storage position counter.

[0056] S14. Initialize variables. The variables to be initialized are:

[0057] MA=0, HA=0, UA=0, AH0=0, AU0=0, CH=0, PT=0, FTZ=0, FBZ=0, TZ=0, SELF=0, ACNTVI=0, BCNT VI=0, CCNTVI=0, FZD=0, FBZ=0, XY=0, ZY=0, BY=0, CVA=0, CZQ=0, SUMV=0, SUMI=0, ZSUM=0;

[0058] AVINA

[400] , AVINB

[400] , AIINA

[400] , AIINB

[400] , BVINA

[400] , BVINB

[400] , BIINA

[400] , BIINB

[400] , CVINA

[400] , CVINB

[400] , CIINA

[400] and CIINB

[400] are all initialized to all zeros;

[0059] S15. Set the first parameter M1data and the comparison variables BiJiao and BiJiaoV[i].

[0060] Furthermore: In S12, the method for calling the low-frequency interrupt subroutine is specifically as follows:

[0061] SA1: Read the data from the wireless communication module, parse the read data according to the wireless communication protocol, and update the variables AH0, AUO, VY, IY, and BY.

[0062] The wireless communication protocol is byte-coded as follows: 55, AA, AH0, AU0, VY high 8 bits, VY low 8 bits, IY high 8 bits, IY low 8 bits, BY high 8 bits, BY low 8 bits, parity bit, 33, CC;

[0063] Among them, 55 and AA indicate the start of the communication packet, and 33 and CC indicate the end of the communication packet; the parity bits are the bitwise XORed of the high eight bits of A0, AH0, AU0, low eight bits of VY, high eight bits of IY, low eight bits of IY, high eight bits of BY, and low eight bits of BY.

[0064] SA2: Read GPS module data, parse the read data according to the GPS communication protocol, and update the MA, HA, and UA variables;

[0065] The GPS communication protocol is byte-coded as follows: 55, AA, MA, AH0, AU0, check bit, 33, CC;

[0066] Among them, 55 and AA indicate the start of the communication packet, and 33 and CC indicate the end of the communication packet; the parity bits are the high eight bits of MA and HA and the low eight bits of HA, which are XORed bit by bit.

[0067] SA3. Assign the value of CVA to PT;

[0068] SA4. Invert SELF and calculate ACNTVI, ACNTVI = AH0 * 20 + AUO;

[0069] If ACNTVI is less than or equal to 133, then let CCNTVI = ACNTVI + 133;

[0070] BCNTVI = ACNTVI + 266;

[0071] In response to ACNTVI being greater than or equal to 266, let CCNTVI = ACNTVI - 133;

[0072] BCNTVI = ACNTVI - 266;

[0073] In response to ACNTVI being greater than 133 and less than 266, let CCNTVI = ACNTVI + 133 and BCNTVI = ACNTVI - 133;

[0074] SA5, let FZD = 1.

[0075] Further: In S12, the method for calling the high-frequency interrupt subroutine is specifically as follows:

[0076] SB1. Let VIN[CVA] equal to the stored value of the memory corresponding to the voltage sensor, let IIN[CVA] equal to the stored value of the memory corresponding to the current sensor, and increment the CVA value by 1.

[0077] SB2. Determine if the CVA value is equal to 1000. If yes, proceed to SB3; otherwise, proceed to SB4.

[0078] SB3. Set CVA = 0 and FBZ = 1;

[0079] SB4. Determine if BZ equals 1. If yes, proceed to SB5. If no, complete the call to the high-frequency interrupt subroutine.

[0080] SB5. Determine whether BuChangV[CBuchang] is greater than BiJiaoV[CBuchang]. If yes, control the second IGBT module to turn on and control the third IGBT module to turn off. If no, control the second IGBT module to turn off and control the third IGBT module to turn on.

[0081] SB6. Increment the value of Cbuchang by 1. If CBuchang is greater than 399, then set CBuchang = 0.

[0082] SB7, complete the call to the high-frequency interrupt subroutine.

[0083] Further: S2 includes the following sub-steps:

[0084] S21. In response to FZD equaling 0, determine whether SELF is true. If it is, proceed to S22.

[0085] If not, for i = 0 to 399, calculate the value of the corresponding variable using the following formula and proceed to S23;

[0086] AFV[i]=(AVINB[i]–32768) / 32768

[0087] AFI[i]=(AIINB[i]–32768) / 32768

[0088] BFV[i]=(BVINB[i]–32768) / 32768

[0089] BFI[i]=(BIINB[i]–32768) / 32768

[0090] CFV[i]=(CVINB[i]–32768) / 32768

[0091] CFI[i]=(CIINB[i]–32768) / 32768

[0092] S22. For i = 0 to 399, calculate the value of the corresponding variable using the following formula, and then proceed to S23;

[0093] AFV[i]=(AVINA[i]–32768) / 32768

[0094] AFI[i]=(AIINA[i]–32768) / 32768

[0095] BFV[i]=(BVINA[i]–32768) / 32768

[0096] BFI[i]=(BIINA[i]–32768) / 32768

[0097] CFV[i]=(CVINA[i]–32768) / 32768

[0098] CFI[i]=(CIINA[i]–32768) / 32768

[0099] S23. Based on the variables being calculated, calculate ASUMV, BSUMV, CSUMV, ASUMI, BSUMI, and CSUMI, and proceed to S24.

[0100]

[0101] S24. Calculate the maximum value of ASUMV, BSUMV and CSUMV, denoted by MAXSUMV. Calculate the maximum value of ASUMI, BSUMI and CSUMI, denoted by MAXSUMI. Proceed to S25.

[0102] S25. Determine whether either MAXSUMV is less than VY or MAXSUMI is greater than IY is satisfied. If yes, set the trip criterion TZ = 1 and proceed to S26; otherwise, set the trip criterion TZ = 0 and proceed to S26.

[0103] S26. Call the compensation judgment subroutine.

[0104] Furthermore, S26 specifically refers to:

[0105] S261. Take 300 sample points before the current IIN sampling data for INDATA

[300] . The sampling method is as follows: Determine whether CAV is greater than or equal to 300. If so, then INDATA

[300] = IIN[CAV - 300 ~ CAV]; if not, then the data of INDATA

[300] is the concatenation of two segments of data, IIN[1000 - CAV ~ 1000] and IIN[0 ~ CAV].

[0106] S262. Search within the range of i = 0 to 100 for the first i that simultaneously satisfies INDATA[i] * INDATA[i + 4] < 0 and INDATA[i] < INDATA[i + 4], and let j = i;

[0107] S263. Calculate SUMF1:

[0108]

[0109] S264. Take k = 1 to 25 and calculate SUMF2[k]:

[0110]

[0111] Obtain the maximum value in SUMF2[k], let the maximum value be MaxSumF2, and let MaxkF2 be the k value at which the maximum value is taken;

[0112] Calculate BiF2:

[0113] BiF2 = MaxSumF2 / SUMF1;

[0114] Determine whether BiF2 is greater than 0.03. If so, then let BuChangF2 = 1; if not, then let BuChangF2 = 0;

[0115] S265. Take k = 1 to 15 and calculate SUMF3[k]:

[0116]

[0117] In the formula, m is the remainder obtained by dividing i by 66;

[0118] Obtain the maximum value in SUMF3[k], let the maximum value be MaxSumF3, and let MaxkF3 be the k value at which the maximum value is taken;

[0119] Calculate BiF3:

[0120] BiF3 = MaxSumF3 / SUMF1

[0121] Determine if BiF3 is greater than 0.03. If yes, set BuChangF3 = 1; otherwise, set BuChangF3 = 0.

[0122] S266. Take k = 1 to 12, calculate SUMF4[k]:

[0123]

[0124] In the formula, m is the remainder when i is divided by 50;

[0125] Get the maximum value in SUMF4[k], let the maximum value be MaxSumF4, and let MaxkF4 be the k value for getting the maximum value;

[0126] Calculate BiF4:

[0127] BiF4 = MaxSumF4 / SUMF1

[0128] Determine if BiF4 is greater than 0.03. If yes, set BuChangF4 = 1; otherwise, set BuChangF4 = 0.

[0129] S267. Taking k = 1 to 10, calculate SUMF5[k] =:

[0130]

[0131] In the formula, m is the remainder when i is divided by 40;

[0132] Get the maximum value in SUMF5[k], let the maximum value be MaxSumF5, and let MaxkF5 be the k value for getting the maximum value;

[0133] Calculate BiF5:

[0134] BiF5 = MaxSumF5 / SUMF1

[0135] Determine if BiF5 is greater than 0.03. If yes, set BuChangF5 = 1; otherwise, set BuChangF5 = 0.

[0136] S268, Calculate BuChang;

[0137] BuChang=BuChangF2+BuChangF3+BuChangF4+BuChangF5;

[0138] Determine if BuChang is greater than or equal to 1. If yes, then BZ = 1 and call the compensation action subroutine. If no, then BZ = 0.

[0139] Further: In S3, the method for performing the tripping action through the tripping action subroutine is specifically as follows:

[0140] S31, control the thyristor to conduct;

[0141] S32, Control the mechanical circuit breaker to disconnect;

[0142] S33, control the thyristor to disconnect.

[0143] The beneficial effects of this invention are as follows: This invention provides an arc-free circuit breaker and control method for power distribution areas. It connects a microprocessor to a voltage sensor, a current sensor, a mechanical circuit breaker, a GPS module, a wireless communication module, a thyristor drive circuit, and an inverter. The microprocessor receives the induced signals from the voltage and current sensors, the clock signal from the GPS module, and the control information from the wireless communication module. Based on these signals, the microprocessor calculates the operating status of the power distribution area and controls the mechanical circuit breaker, thyristor drive circuit, and inverter according to the calculation and analysis results. This solves the problem that traditional circuit breakers can no longer meet the increasing demands of photovoltaic power generation, charging piles, and other new energy sources in power distribution areas. Attached Figure Description

[0144] Figure 1 This is a schematic diagram of the structure of an arc-free circuit breaker for transformer substations according to the present invention;

[0145] Figure 2 This is a schematic diagram of the transformer connection method.

[0146] Figure 3 This is a schematic diagram of the inverter structure.

[0147] Figure 4 This is a flowchart of the control method for arc-free circuit breakers in transformer substations.

[0148] Wherein: 1. Voltage sensor; 101. Capacitor; 102-1. Connection terminal K1; 102-2. Connection terminal K2; 103-1. First IGBT module; 103-2. Second IGBT module; 103-3. Third IGBT module; 103-4. Fourth IGBT module; 104-1. First IGBT driver module; 104-2. Second IGBT driver module; 104-3. Third IGBT driver module; 104-4. Four IGBT driver modules; 105-1, Connection port Q1; 105-2, Connection port Q2; 105-3, Connection port Q3; 105-4, Connection port Q4; 2, Current sensor; 3, Left end resistor; 4, Left end inductor; 5, Transformer; 6, Mechanical circuit breaker; 7, Right end resistor; 8, Right end inductor; 9, Thyristor; 10, Thyristor driver circuit; 11, Microprocessor; 12, Wireless communication module; 13, GPS module; 14, Inverter. Detailed Implementation

[0149] The specific embodiments of the present invention are described below to enable those skilled in the art to understand the present invention. However, it should be understood that the present invention is not limited to the scope of the specific embodiments. For those skilled in the art, various changes are obvious as long as they are within the spirit and scope of the present invention as defined and determined by the appended claims. All inventions utilizing the concept of the present invention are protected.

[0150] Example 1:

[0151] like Figure 1 As shown, in one embodiment of the present invention, an arc-free circuit breaker for transformer substations includes a voltage sensor 1, a current sensor 2, a left-end resistor 3, a left-end inductor 4, a transformer 5, a mechanical circuit breaker 6, a right-end resistor 7, a right-end inductor 8, a thyristor 9, a thyristor drive circuit 10, a microprocessor 11, a wireless communication module 12, a GPS module 13, and an inverter 14.

[0152] Among them, the microprocessor 11 is connected to the voltage sensor 1, the current sensor 2, the thyristor drive circuit 10, the wireless communication module 12, the GPS module 13 and the inverter 14 respectively. The voltage sensor 1 is also connected to the current sensor 2, the left end resistor 3 and the left end inductor 4 in sequence. The left end inductor 4 is also connected to the first terminal of the transformer 5, the mechanical circuit breaker 6 and the thyristor 9 respectively. The inverter 14 is connected to the third and fourth terminals of the transformer 5. The thyristor drive circuit 10 is connected to the thyristor 9. The mechanical circuit breaker 6 is also connected to the thyristor 9 and the right end resistor 7 respectively. The right end resistor 7 is also connected to the right end inductor 8.

[0153] Voltage sensor 1 is used to collect the three-phase voltage values ​​output by the transformer in the distribution area, current sensor 2 is used to collect the three-phase current values ​​output by the transformer in the distribution area, wireless communication module 12 is used to receive control information from the circuit breaker in the distribution area, GPS module 13 is used to provide clock signals to microprocessor 11, microprocessor 11 is used to calculate the operating status of the distribution area based on the three-phase voltage and current values ​​output by the transformer in the distribution area, clock signals and control information, and controls mechanical circuit breaker 6 and thyristor drive circuit 10 based on the calculation results, thyristor 9 is used to control current.

[0154] In this embodiment, Figure 1 The diagram only shows the structure of one phase. In the three-phase structure, there is only one microprocessor 11, one wireless communication module 12, and one GPS module 13. The mechanical circuit breaker 6 is a three-phase circuit breaker. Each of the other components, such as voltage sensor 1, current sensor 2, left-end resistor 3, left-end inductor 4, right-end resistor 7, right-end inductor 8, thyristor 9, and thyristor drive circuit 10, requires one for each phase, and three for each of the three phases. The connection method between each phase is the same.

[0155] The output of the transformer in the distribution area consists of three-phase conductors. These conductors pass through voltage sensor 1 and current sensor 2, and are then connected in series with a left-end resistor 3 and a left-end inductor 4. Finally, they are connected to one phase of the input of the mechanical circuit breaker 6. The connection point is connected to terminal 1 of the transformer 5. The output of the same phase of the mechanical circuit breaker 6 is connected to the right-end resistor 7. A right-end inductor 8 is connected in series to the right side of the right-end resistor 7. The right-end inductor 8 is connected to the distribution area load to supply power to the load and is connected to the input of the mechanical circuit breaker 6. The output of the mechanical circuit breaker 6 is connected to the input of the power quality regulation module. Voltage sensors 1 and current sensors 2 for each phase collect the voltage and current values ​​of the three phases (A, B, and C) output of the transformer in the distribution area. The sensor outputs are connected to the analog-to-digital conversion interface of the microprocessor 11.

[0156] The output of the thyristor drive circuit 10 is connected to the thyristor 9 to control the thyristor 9; the thyristor 9 is a bidirectional thyristor, which is composed of two thyristors connected in reverse parallel.

[0157] Transformer 5 connection method as follows Figure 2 As shown.

[0158] The inverter 14 includes a three-phase inverter structure. In this embodiment, the inverter structure is as follows: Figure 3As shown, the inverter structure for each phase includes a capacitor 101, connection terminals K1 102-1 and K2 102-2, a first IGBT module 103-1, a second IGBT module 103-2, a third IGBT module 103-3, a fourth IGBT module 103-4, a first IGBT driver module 104-1, a second IGBT driver module 104-2, a third IGBT driver module 104-3, a fourth IGBT driver module 104-4, connection ports Q1 105-1, Q2 105-2, Q3 105-3, and Q4 105-4;

[0159] Connection terminal K1 102-1 is connected to terminal 3 of transformer 5, connection terminal K2 102-2 is connected to terminal 4 of transformer 5, and connection ports Q1 105-1, Q2 105-2, Q3 105-3 and Q4 105-4 are all connected to the ports of microprocessor 11.

[0160] In this configuration, the gate of the first IGBT module 103-1 is connected to the connection port Q1105-1 through the first IGBT driver module 104-1; the collector of the first IGBT module 103-1 is connected to one end of the capacitor 101; the emitter of the first IGBT module 103-1 is connected to the connection terminal K2 102-2 and the collector of the second IGBT module 103-2; the gate of the second IGBT module 103-2 is connected to the connection port Q2 105-1 through the second IGBT driver module 104-2; and the emitter of the second IGBT module 103-2 is connected to the other end of the capacitor 101.

[0161] The gate of the fourth IGBT module 103-4 is connected to the connection port Q4 105-4 through the fourth IGBT driver module 104-4. The collector of the fourth IGBT module 103-4 is connected to one end of the capacitor 101. The emitter of the fourth IGBT module 103-4 is connected to the connection terminal K1 102-1 and the collector of the third IGBT module 103-3, respectively. The gate of the third IGBT module 103-3 is connected to the connection port Q3 105-3 through the third IGBT driver module 104-3. The emitter of the third IGBT module 103-3 is connected to the other end of the capacitor 101.

[0162] like Figure 4 As shown, the control method for arc-free circuit breakers in transformer substations includes the following steps:

[0163] S1. Initialization is performed through an initialization subroutine;

[0164] S2. Calculate the tripping criterion through the tripping and compensation criterion calculation subroutine;

[0165] S3. In response to the tripping criterion being equal to 1, a tripping action is performed through the tripping action subroutine.

[0166] S1 includes the following steps:

[0167] S11. Set the low-frequency interrupt clock to 20 milliseconds, set the high-frequency interrupt clock to 50 microseconds, set the wireless communication module 12 reading interface, and set the GPS module 13 reading interface.

[0168] S12. Set low-frequency interrupt conditions and call the low-frequency interrupt subroutine; set high-frequency interrupt conditions and call the high-frequency interrupt subroutine.

[0169] S13. Set variables, including:

[0170] MA represents the current time in seconds, with a value range of 0-59; HA represents the current time in milliseconds, with a value range of 0-999; UA represents the current time in microseconds, with a value range of 0-999; AH0 represents the moment when the phase of phase A voltage reaches zero degrees in milliseconds, with a unit of 50 milliseconds and a value range of 0-20; AU0 represents the moment when the phase of phase A voltage reaches zero degrees in microseconds, with a unit of microseconds and a value range of 0-20; CH represents the high-frequency interrupt counter, with a value range of 0-999; VY represents the trip voltage threshold; IY represents the trip current threshold; BY represents the compensation threshold; TZ represents the trip flag; CVA represents the sensor read counter, with a value range of 0-999; CZQ represents the period counter, with a value range of 0-199; SUMV represents voltage summation; and SUMI represents current summation.

[0171] The array AVINA

[400] represents the first reading value of phase A of voltage sensor 1, the array AVINB

[400] represents the second reading value of phase A of voltage sensor 1, the array AFV

[400] represents the floating-point value of phase A voltage, the array AIINA

[400] represents the first reading value of phase A of current sensor 2, the array AIINB

[400] represents the second reading value of phase A of current sensor 2, the array AFI

[400] represents the floating-point value of phase A current, and the array AVBZ

[400] represents phase A compensation;

[0172] The array BVINA

[400] represents the first reading value of phase B of voltage sensor 1, the array BVINB

[400] represents the second reading value of phase B of voltage sensor 1, the array BFV

[400] represents the floating-point value of phase B voltage, the array BIINA

[400] represents the first reading value of phase B of current sensor 2, the array BINB

[400] represents the second reading value of phase B of current sensor 2, the array BFI

[400] represents the floating-point value of phase B current, and the array BVBZ

[400] represents phase B compensation;

[0173] The array CVINA

[400] represents the first reading value of phase C of voltage sensor 1, the array CVINB

[400] represents the second reading value of phase C of voltage sensor 1, the array CFV

[400] represents the floating-point value of phase C voltage, the array CIINA

[400] represents the first reading value of phase C of current sensor 2, the array CIINB

[400] represents the second reading value of phase C of current sensor 2, the array CFI

[400] represents the floating-point value of phase C current, and the array CVBZ

[400] represents phase C compensation;

[0174] PT represents the time update data position, FTZ represents the trip calculation variable, FBZ represents the compensation calculation variable, FZD represents the low frequency interruption flag, SELF represents the storage selection flag, ACNTVI represents the A-phase storage position counter, BCNTVI represents the B-phase storage position counter, and CCNTVI represents the C-phase storage position counter.

[0175] S14. Initialize variables. The variables to be initialized are:

[0176] MA=0, HA=0, UA=0, AH0=0, AU0=0, CH=0, PT=0, FTZ=0, FBZ=0, TZ=0, SELF=0, ACNTVI=0, BCNT VI=0, CCNTVI=0, FZD=0, FBZ=0, XY=0, ZY=0, BY=0, CVA=0, CZQ=0, SUMV=0, SUMI=0, ZSUM=0;

[0177] AVINA

[400] , AVINB

[400] , AIINA

[400] , AIINB

[400] , BVINA

[400] , BVINB

[400] , BIINA

[400] , BIINB

[400] , CVINA

[400] , CVINB

[400] , CIINA

[400] and CIINB

[400] are all initialized to all zeros;

[0178] S15. Set the first parameter M1data and comparison variables BiJiao and BiJiaoV[i]. The value of M1data is:

[0179] M1data

[400] = {0.015707,0.031411,0.047106,0.062791,0.078459,0.094108,0.109734,0.125333,0.140901,0.156434,0.171929,0.187381,0.2} 02787,0.218143,0.233445,0.248690,0.263873,0.278991,0.294040,0.309017,0.323917,0.338738,0.353475,0.368125,0.382683,0.397148,0. 411514,0.425779,0.439939,0.453990,0.467930,0.481754,0.495459,0.509041,0.522499,0.535827,0.549023,0.562083,0.575005,0.587785, 0.600420,0.612907,0.625243,0.637424,0.649448,0.661312,0.673013,0.684547,0.695913,0.707107,0.718126,0.728969,0.739631,0.750111 ,0.760406,0.770513,0.780430,0.790155,0.799685,0.809017,0.818150,0.827081,0.835807,0.844328,0.852640,0.860742,0.868632,0.8763 07,0.883766,0.891007,0.898028,0.904827,0.911403,0.917755,0.923880,0.929776,0.935444,0.940881,0.946085,0.951057,0.955793,0.960 294,0.964557,0.968583,0.972370,0.975917,0.979223,0.982287,0.985109,0.987688,0.990024,0.992115,0.993961,0.995562,0.996917,0.9 98027,0.998890,0.999507,0.999877,1.000000,0.999877,0.999507,0.998890,0.998027,0.996917,0.995562,0.993961,0.992115,0.990024,0.987688,0.985109,0.982287,0.979223,0.975917,0.972370,0.968583,0.964557,0.960294,0.955793,0.951057,0.946085,0.940881,0.935444,0.929776,0.923880,0.917755,0.911403,0.904827,0.898028,0.891007,0.883766,0.876307,0.868632,0.860742,0.852640,0.844328,0.835807,0.827081,0.818150,0.809017,0.799685,0.790155,0.780430,0.770513,0.760406,0.750111,0.739631,0.728969,0.718126,0.707107,0.695913,0.684547,0.673013,0.661312,0.649448,0.637424,0.625243,0.612907,0.600420,0.587785,0.575005,0.562083,0.549023,0.535827,0.522499,0.509041,0.495459,0.481754,0.467930,0.453990,0.439939,0.425779,0.411514,0.397148,0.382683,0.368125,0.353475,0.338738,0.323917,0.309017,0.294040,0.278991,0.263873,0.248690,0.233445,0.218143,0.202787,0.187381,0.171929,0.156434,0.140901,0.125333,0.109734,0.094108,0.078459,0.062791,0.047106,0.031411,0.015707,0.000000,-0.015707,-0.031411,-0.047106,-0.062791,-0.078459,-0.094108,-0.109734,-0.125333,-0.140901,-0.156434,-0.171929,-0.187381,-0.202787,-0.218143,-0.233445,-0.248690,-0.263873,-0.278991,-0.294040,-0.309017,-0.323917,-0.338738,-0.353475,-0.368125,-0.382683,-0.397148,-0.411514,-0.425779,-0.439939,-0.453990,-0.467930,-0.481754,-0.495459,-0.509041,-0.522499,-0.535827,-0.549023,-0.562083,-0.575005,-0.587785,-0.600420,-0.612907,-0.625243,-0.637424,-0.649448,-0.661312,-0.673013,-0.684547,-0.695913,-0.707107,-0.718126,-0.728969,-0.739631,-0.750111,-0.760406,-0.770513,-0.780430,-0.790155,-0.799685,-0.809017,-0.818150,-0.827081,-0.835807,-0.844328,-0.852640,-0.860742,-0.868632,-0.876307,-0.883766,-0.891007,-0.898028,-0.904827,-0.911403,-0.917755,-0.923880,-0.929776,-0.935444,-0.940881,-0.946085,-0.951057,-0.955793,-0.960294,-0.964557,-0.968583,-0.972370,-0.975917,-0.979223,-0.982287,-0.985109,-0.987688,-0.990024,-0.992115,-0.993961,-0.995562,-0.996917,-0.998027,-0.998890,-0.999507,-0.999877,-1.000000,-0.999877,-0.999507,-0.998890,-0.998027,-0.996917,-0.995562,-0.993961,-0.992115,-0.990024,-0.987688,-0.985109,-0.982287,-0.979223,-0.975917,-0.972370,-0.968583,-0.964557,-0.960294,-0.955793,-0.951057,-0.946085,-0.940881,-0.935444,-0.929776,-0.923880,-0.917755,-0.911403,-0.904827,-0.898028,-0.891007,-0.883766,-0.876307,-0.868632,-0.860742,-0.852640,-0.844328,-0.835807,-0.827081,-0.8181 50, -0.809017, -0.799685, -0.790155, -0.780430, -0.770513, -0.760406, -0.750111, -0.739631, -0.728969, -0.718126, -0.707107, -0.695913, -0.684547, -0.673013, -0.661312, -0.649448, -0.637424, -0.625243, -0.612907, -0.600420, -0 .587785,-0.575005,-0.562083,-0.549023,-0.535827,-0.522499,-0.509041,-0.495459,-0.481754,-0.467930,-0.453990,-0.439939,-0.425779,-0.411514,-0.397148,-0.382683,-0.368125,-0.353475,-0.338738,-0.323917,-0.309 017,-0.294040,-0.278991,-0.263873,-0.248690,-0.233445,-0.218143,-0.202787,-0.187381,-0.171929,-0.156434,-0.140901,-0.125333,-0.109734,-0.094108,-0.078459,-0.062791,-0.047106,-0.031411,-0.015707,-0.000000}。 .

[0180] Setting: BiJiao

[10] ={-1,-0.6,-0.2,0.2,0.6,1,0.6,0.2,-0.2,-0.6}

[0181] i=0~399; m=i divide by 10 to get the remainder, BiJiaoV[i]=BiJiao[m].

[0182] In S12, the method for calling the low-frequency interrupt subroutine is as follows:

[0183] SA1: Read the data from the wireless communication module 12, parse the read data according to the wireless communication protocol, and update the variables AH0, AUO, VY, IY, and BY.

[0184] The wireless communication protocol is byte-coded as follows: 55, AA, AH0, AU0, VY high 8 bits, VY low 8 bits, IY high 8 bits, IY low 8 bits, BY high 8 bits, BY low 8 bits, parity bit, 33, CC;

[0185] Among them, 55 and AA indicate the start of the communication packet, and 33 and CC indicate the end of the communication packet; the parity bits are the bitwise XORed of the high eight bits of A0, AH0, AU0, low eight bits of VY, high eight bits of IY, low eight bits of IY, high eight bits of BY, and low eight bits of BY.

[0186] SA2: Read data from GPS module 13, parse the read data according to the GPS communication protocol, and update the MA, HA, and UA variables;

[0187] The GPS communication protocol is byte-coded as follows: 55, AA, MA, AH0, AU0, check bit, 33, CC;

[0188] Among them, 55 and AA indicate the start of the communication packet, and 33 and CC indicate the end of the communication packet; the parity bits are the high eight bits of MA and HA and the low eight bits of HA, which are XORed bit by bit.

[0189] SA3. Assign the value of CVA to PT;

[0190] SA4. Invert SELF and calculate ACNTVI, ACNTVI = AH0 * 20 + AUO;

[0191] If ACNTVI is less than or equal to 133, then let CCNTVI = ACNTVI + 133;

[0192] BCNTVI = ACNTVI + 266;

[0193] In response to ACNTVI being greater than or equal to 266, let CCNTVI = ACNTVI - 133;

[0194] BCNTVI = ACNTVI - 266;

[0195] In response to ACNTVI being greater than 133 and less than 266, let CCNTVI = ACNTVI + 133 and BCNTVI = ACNTVI - 133;

[0196] SA5, let FZD = 1.

[0197] In S12, the method for calling the high-frequency interrupt subroutine is as follows:

[0198] SB1. Let VIN[CVA] equal to the stored value of the memory corresponding to voltage sensor 1, let IIN[CVA] equal to the stored value of the memory corresponding to current sensor 2, and increment the CVA value by 1.

[0199] SB2. Determine if the CVA value is equal to 1000. If yes, proceed to SB3; otherwise, proceed to SB4.

[0200] SB3. Set CVA = 0 and FBZ = 1;

[0201] SB4. Determine if BZ equals 1. If yes, proceed to SB5. If no, complete the call to the high-frequency interrupt subroutine.

[0202] SB5. Determine whether BuChangV[CBuchang] is greater than BiJiaoV[CBuchang]. If yes, control the second IGBT module 103-2 to turn on and control the third IGBT module 103-3 to turn off. If no, control the second IGBT module 103-2 to turn off and control the third IGBT module 103-3 to turn on.

[0203] SB6. Increment the value of Cbuchang by 1. If CBuchang is greater than 399, then set CBuchang = 0.

[0204] SB7, complete the call to the high-frequency interrupt subroutine.

[0205] S2 includes the following steps:

[0206] S21. In response to FZD equaling 0, determine whether SELF is true. If it is, proceed to S22.

[0207] If not, for i = 0 to 399, calculate the value of the corresponding variable using the following formula and proceed to S23;

[0208] AFV[i]=(AVINB[i]–32768) / 32768

[0209] AFI[i]=(AIINB[i]–32768) / 32768

[0210] BFV[i]=(BVINB[i]–32768) / 32768

[0211] BFI[i]=(BIINB[i]–32768) / 32768

[0212] CFV[i]=(CVINB[i]–32768) / 32768

[0213] CFI[i]=(CIINB[i]–32768) / 32768

[0214] S22. For i = 0 to 399, calculate the value of the corresponding variable using the following formula, and then proceed to S23;

[0215] AFV[i]=(AVINA[i]–32768) / 32768

[0216] AFI[i]=(AIINA[i]–32768) / 32768

[0217] BFV[i]=(BVINA[i]–32768) / 32768

[0218] BFI[i]=(BIINA[i]–32768) / 32768

[0219] CFV[i]=(CVINA[i]–32768) / 32768

[0220] CFI[i]=(CIINA[i]–32768) / 32768

[0221] S23. Based on the variables being calculated, calculate ASUMV, BSUMV, CSUMV, ASUMI, BSUMI, and CSUMI, and proceed to S24.

[0222]

[0223] S24. Calculate the maximum value of ASUMV, BSUMV and CSUMV, denoted by MAXSUMV. Calculate the maximum value of ASUMI, BSUMI and CSUMI, denoted by MAXSUMI. Proceed to S25.

[0224] S25. Determine whether either MAXSUMV is less than VY or MAXSUMI is greater than IY is satisfied. If yes, set the trip criterion TZ = 1 and proceed to S26; otherwise, set the trip criterion TZ = 0 and proceed to S26.

[0225] S26. Call the compensation judgment subroutine.

[0226] Specifically, S26 is:

[0227] S261. INDATA

[300] takes 300 samples before the current IIN sampling data. The sampling method is as follows: Determine whether CAV is greater than or equal to 300. If so, INDATA

[300] = IIN[CAV - 300 ~ CAV]; if not, the data of INDATA

[300] is the concatenation of two segments of data, IIN[1000 - CAV ~ 1000] and IIN[0 ~ CAV].

[0228] S262. Search within the range of i = 0 to 100 for the first i that simultaneously satisfies INDATA[i] * INDATA[i + 4] < 0 and INDATA[i] < INDATA[i + 4], and let j = i.

[0229] S263. Calculate SUMF1:

[0230]

[0231] S264. Take k = 1 to 25 and calculate SUMF2[k]:

[0232]

[0233] Obtain the maximum value in SUMF2[k], let the maximum value be MaxSumF2, and let MaxkF2 be the k value corresponding to the maximum value; calculate BiF2:

[0234] BiF2 = MaxSumF2 / SUMF1;

[0235] Determine whether BiF2 is greater than 0.03. If so, let BuChangF2 = 1; if not, let BuChangF2 = 0. <000049​​​​​​​​​​​​​​​​​​​​

[0243]

[0244] In the formula, m is the remainder when i is divided by 50;

[0245] Find the maximum value in SUMF4[k], let the maximum value be MaxSumF4, and let MaxkF4 be the k value for finding the maximum value; calculate BiF4:

[0246] BiF4 = MaxSumF4 / SUMF1

[0247] Determine if BiF4 is greater than 0.03. If yes, set BuChangF4 = 1; otherwise, set BuChangF4 = 0.

[0248] S267. Taking k = 1 to 10, calculate SUMF5[k] =:

[0249]

[0250] In the formula, m is the remainder when i is divided by 40;

[0251] Find the maximum value in SUMF5[k], let the maximum value be MaxSumF5, and let MaxkF5 be the k value for finding the maximum value; calculate BiF5:

[0252] BiF5 = MaxSumF5 / SUMF1

[0253] Determine if BiF5 is greater than 0.03. If yes, set BuChangF5 = 1; otherwise, set BuChangF5 = 0.

[0254] S268, Calculate BuChang;

[0255] BuChang=BuChangF2+BuChangF3+BuChangF4+BuChangF5;

[0256] Determine if BuChang is greater than or equal to 1. If yes, then BZ = 1, and the compensation action subroutine is called; otherwise, BZ = 0. The specific method for calling the compensation action subroutine in S268 is as follows:

[0257] S2681. Determine if BuChangF2 is equal to 1. If it is, then:

[0258] bcDataF2[2*i]=-1*BiF2*M2data[i], where i ranges from 0 to 99;

[0259] bcDataF2[2*i+1]=(bcDataF2[2*i]+bcDataF2[2*i+2]) / 2, where i ranges from 0 to 98;

[0260] bcDataF2

[199] =(bcDataF2[0]+bcDataF2

[198] ) / 2;

[0261] bcDataF2[i+200]=bcDataF2[i], where i ranges from 0 to 199;

[0262] If not, then bcDataF2[i] = 0, where i ranges from 0 to 399;

[0263] S2682. Determine whether BuChangF3 is equal to 1. If not, then bcDataF3[i] = 0, where i ranges from 0 to 399; if yes, then:

[0264] bcDataF3[2*i]=-1*BiF3*M3data[i], where i ranges from 0 to 65;

[0265] bcDataF3[2*i+1]=(bcDataF3[2*i]+bcDataF3[2*i+2]) / 2; where i ranges from 0 to 64;

[0266] bcDataF3

[131] =(bcDataF3[0]+bcDataF3

[130] ) / 2;

[0267] bcDataF3

[132] =bcDataF3

[131] ;

[0268] bcDataF3[i+133] = bcDataF3[i]; where i ranges from 0 to 132;

[0269] bcDataF3

[266] =bcDataF3

[265] ;

[0270] bcDataF3[i+267] = bcDataF3[i]; where i ranges from 0 to 132;

[0271] S2683. Determine if BuChangF4 is equal to 1; if not, then bcDataF4[i] = 0, where i ranges from 0 to 399; if yes, then:

[0272] bcDataF4[2*i]=-1*BiF4*M4data[i], i ranges from 0 to 49;

[0273] bcDataF4[2*i+1]=(bcDataF4[2*i]+bcDataF4[2*i+2]) / 2; where i ranges from 0 to 48;

[0274] bcDataF4

[99] =(bcDataF4[0]+bcDataF4

[98] ) / 2;

[0275] bcDataF4[i+100] = bcDataF4[i]; where i ranges from 0 to 99;

[0276] bcDataF4[i+200] = bcDataF4[i]; where i ranges from 0 to 199;

[0277] S2684: Determine if BuChangF5 is equal to 1. If not, then bcDataF5[i] = 0; where i ranges from 0 to 399; if yes, then:

[0278] bcDataF5[2*i]=-1*BiF5*M5data[i], where i ranges from 0 to 39;

[0279] bcDataF5[2*i+1]=(bcDataF5[2*i]+bcDataF5[2*i+2]) / 2; where i ranges from 0 to 38;

[0280] bcDataF5

[79] =(bcDataF5[0]+bcDataF5

[78] ) / 2;

[0281] bcDataF5[i+80] = bcDataF5[i]; where i ranges from 0 to 79;

[0282] bcDataF5[i+160] = bcDataF6[i]; where i ranges from 0 to 159;

[0283] bcDataF5[i+320] = bcDataF6[i]; where i ranges from 0 to 79;

[0284] S2685, Calculate BuChangV;

[0285] BuChangV=bcDataF2[i]+bcDataF3[i]+bcDataF4[i]+bcDataF5[i], i=0~399;

[0286] S2686. Set CBuchang = 0 to complete the call to the compensation action subroutine.

[0287] In S3, the method for performing the tripping action through the tripping action subroutine is as follows:

[0288] S31, control thyristor 9 to conduct;

[0289] S32, Control mechanical circuit breaker 6 to disconnect;

[0290] S33, control thyristor 9 to disconnect.

[0291] The beneficial effects of this invention are as follows: This invention provides an arc-free circuit breaker and control method for power distribution areas. A microprocessor 11 is connected to a voltage sensor 1, a current sensor 2, a mechanical circuit breaker 6, a GPS module 13, a wireless communication module 12, a thyristor drive circuit 10, and an inverter 14. The microprocessor 11 receives the sensing signals from the voltage sensor 1 and current sensor 2, the clock signal from the GPS module 13, and the control information from the wireless communication module 12. Based on the sensing signals from the voltage sensor 1 and current sensor 2, the clock signal from the GPS module 13, and the control information from the wireless communication module 12, it calculates the operating status of the power distribution area and controls the mechanical circuit breaker 6, the thyristor drive circuit 10, and the inverter 14 based on the calculation and analysis results. This solves the problem that traditional circuit breakers can no longer meet the increasing demand from photovoltaic, charging piles, and other new energy sources in power distribution areas.

[0292] In the description of this invention, it should be understood that the terms "center," "thickness," "upper," "lower," "horizontal," "top," "bottom," "inner," "outer," and "radial," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying the relative importance or the number of technical features implicitly specified. Therefore, a feature defined by "first," "second," and "third" may explicitly or implicitly include one or more of that feature.

Claims

1. A transformer substation arc-free circuit breaker, characterized in that, It includes a voltage sensor (1), a current sensor (2), a left-end resistor (3), a left-end inductor (4), a transformer (5), a mechanical circuit breaker (6), a right-end resistor (7), a right-end inductor (8), a thyristor (9), a thyristor drive circuit (10), a microprocessor (11), a wireless communication module (12), a GPS module (13), and an inverter (14). Among them, the microprocessor (11) is connected to the voltage sensor (1), the current sensor (2), the thyristor drive circuit (10), the wireless communication module (12), the GPS module (13) and the inverter (14) respectively. The voltage sensor (1) is also connected to the current sensor (2), the left end resistor (3) and the left end inductor (4) in sequence. The left end inductor (4) is also connected to the No. 1 terminal of the transformer (5), the mechanical circuit breaker (6) and the thyristor (9) respectively. The inverter (14) is connected to the No. 3 and No. 4 terminals of the transformer (5). The thyristor drive circuit (10) is connected to the thyristor (9). The mechanical circuit breaker (6) is also connected to the thyristor (9) and the right end resistor (7) respectively. The right end resistor (7) is also connected to the right end inductor (8). The voltage sensor (1) is used to collect the three-phase voltage values ​​output by the transformer in the distribution area, the current sensor (2) is used to collect the three-phase current values ​​output by the transformer in the distribution area, the wireless communication module (12) is used to receive the control information of the circuit breaker in the distribution area, the GPS module (13) is used to provide a clock signal to the microprocessor (11), the microprocessor (11) is used to calculate the operating status of the distribution area based on the three-phase voltage and current values ​​output by the transformer in the distribution area, the clock signal and the control information, and to control the mechanical circuit breaker (6) and the thyristor drive circuit (10) based on the calculation results, and the thyristor (9) is used to control the current; The inverter (14) includes a three-phase inverter structure. Each phase of the inverter structure includes a capacitor (101), connection terminal K1 (102-1), connection terminal K2 (102-2), first IGBT module (103-1), second IGBT module (103-2), third IGBT module (103-3), fourth IGBT module (103-4), first IGBT drive module (104-1), second IGBT drive module (104-2), third IGBT drive module (104-3), fourth IGBT drive module (104-4), connection port Q1 (105-1), connection port Q2 (105-2), connection port Q3 (105-3), and connection port Q4 (105-4). Terminal K1 (102-1) is connected to terminal 3 of transformer (5), terminal K2 (102-2) is connected to terminal 4 of transformer (5), and ports Q1 (105-1), Q2 (105-2), Q3 (105-3) and Q4 (105-4) are all connected to ports of microprocessor (11). The gate of the first IGBT module (103-1) is connected to the connection port Q1 (105-1) through the first IGBT driver module (104-1), the collector of the first IGBT module (103-1) is connected to one end of the capacitor (101), the emitter of the first IGBT module (103-1) is connected to the connection terminal K2 (102-2) and the collector of the second IGBT module (103-2) respectively, the gate of the second IGBT module (103-2) is connected to the connection port Q2 (105-2) through the second IGBT driver module (104-2), and the emitter of the second IGBT module (103-2) is connected to the other end of the capacitor (101). The gate of the fourth IGBT module (103-4) is connected to the connection port Q4 (105-4) through the fourth IGBT driver module (104-4). The collector of the fourth IGBT module (103-4) is connected to one end of the capacitor (101). The emitter of the fourth IGBT module (103-4) is connected to the connection terminal K1 (102-1) and the collector of the third IGBT module (103-3) respectively. The gate of the third IGBT module (103-3) is connected to the connection port Q3 (105-3) through the third IGBT driver module (104-3). The emitter of the third IGBT module (103-3) is connected to the other end of the capacitor (101).

2. A control method for a transformer substation arc-free circuit breaker, applied to the transformer substation arc-free circuit breaker as described in claim 1, characterized in that, Includes the following steps: S1. Initialization is performed through an initialization subroutine; S2. Calculate the tripping criterion using the tripping and compensation criterion calculation subroutine; including: S21. In response to FZD equaling 0, determine whether SELF is true. If it is, proceed to S22. If not, for i=0~399, calculate the value of the corresponding variable using the following formula and proceed to S23; AFV[i] =(AVINB[i] – 32768) / 32768 AFI[i] =( AIINB[i] – 32768) / 32768 BFV[i] =( BVINB[i] – 32768) / 32768 BFI[i] =( BIINB[i] – 32768) / 32768 CFV[i] =( CVINB[i] – 32768) / 32768 CFI[i] =( CIINB[i] – 32768) / 32768 S22. For i=0~399, calculate the value of the corresponding variable using the following formula, and then proceed to S23; AFV[i] =(AVINA[i] – 32768) / 32768 AFI[i] =(AIINA[i] – 32768) / 32768 BFV[i] =( BVINA[i] – 32768) / 32768 BFI[i] =(BIINA[i] – 32768) / 32768 CFV[i] =(CVINA[i] – 32768) / 32768 CFI[i] =(CIINA[i] – 32768) / 32768 S23. Based on the variables being calculated, calculate ASUMV, BSUMV, CSUMV, ASUMI, BSUMI, and CSUMI, and proceed to S24. S24. Calculate the maximum value of ASUMV, BSUMV and CSUMV, denoted by MAXSUMV. Calculate the maximum value of ASUMI, BSUMI and CSUMI, denoted by MAXSUMI. Proceed to S25. S25. Determine whether either MAXSUMV is less than VY or MAXSUMI is greater than IY is satisfied. If yes, set the trip criterion TZ=1 and proceed to S26; otherwise, set the trip criterion TZ=0 and proceed to S26. S26. Call the compensation judgment subroutine; S3. In response to the tripping criterion being equal to 1, a tripping action is performed through the tripping action subroutine.

3. The control method according to claim 2, characterized in that, S1 includes the following steps: S11. Set the low-frequency interrupt clock to 20 milliseconds, set the high-frequency interrupt clock to 50 microseconds, set the wireless communication module (12) reading interface, and set the GPS module (13) reading interface; S12. Set low-frequency interrupt conditions and call the low-frequency interrupt subroutine; set high-frequency interrupt conditions and call the high-frequency interrupt subroutine. S13. Set variables, including: MA represents the current time in seconds, with a value range of 0-59; HA represents the current time in milliseconds, with a value range of 0-999; UA represents the current time in microseconds, with a value range of 0-999; AH0 represents the moment when the phase of phase A voltage reaches zero degrees in milliseconds, with a value range of 0-20 in 50 milliseconds; AU0 represents the moment when the phase of phase A voltage reaches zero degrees in microseconds, with a value range of 0-20 in microseconds; CH represents the high-frequency interrupt counter, with a value range of 0-999; VY represents the trip voltage threshold; IY represents the trip current threshold; BY represents the compensation threshold; TZ represents the trip flag; CVA represents the sensor read counter, with a value range of 0-999; CZQ represents the period counter, with a value range of 0-199; SUMV represents voltage summation; and SUMI represents current summation. The array AVINA[400] represents the first reading value of phase A of voltage sensor (1), the array AVINB[400] represents the second reading value of phase A of voltage sensor (1), the array AFV[400] represents the floating-point value of phase A voltage, the array AIINA[400] represents the first reading value of phase A of current sensor (2), the array AIINB[400] represents the second reading value of phase A of current sensor (2), the array AFI[400] represents the floating-point value of phase A current, and the array AVBZ[400] represents phase A compensation; The array BVINA[400] represents the first reading value of phase B of voltage sensor (1), the array BVINB[400] represents the second reading value of phase B of voltage sensor (1), the array BFV[400] represents the floating point value of phase B voltage, the array BIINA[400] represents the first reading value of phase B of current sensor (2), the array BINB[400] represents the second reading value of phase B of current sensor (2), the array BFI[400] represents the floating point value of phase B current, and the array BVBZ[400] represents phase B compensation; The array CVINA[400] represents the first reading value of phase C of voltage sensor (1), the array CVINB[400] represents the second reading value of phase C of voltage sensor (1), the array CFV[400] represents the floating value of phase C voltage, the array CIINA[400] represents the first reading value of phase C of current sensor (2), the array CIINB[400] represents the second reading value of phase C of current sensor (2), the array CFI[400] represents the floating value of phase C current, and the array CVBZ[400] represents phase C compensation; PT represents the time update data position, FTZ represents the trip calculation variable, FBZ represents the compensation calculation variable, FZD represents the low frequency interruption flag, SELF represents the storage selection flag, ACNTVI represents the A-phase storage position counter, BCNTVI represents the B-phase storage position counter, and CCNTVI represents the C-phase storage position counter. S14. Initialize variables. The variables to be initialized are: MA=0, HA=0, UA=0, AH0=0, AU0=0, CH=0, PT=0, FTZ=0, FBZ=0, TZ=0, SELF =0, ACNTVI=0, BCNTVI=0, CCNTVI=0, FZD=0, FBZ=0, XY=0, ZY=0, BY=0, CVA=0, CZQ=0, SUMV=0, SUMI=0, ZSUM=0; AVINA[400], AVINB[400], AIINA[400], AIINB[400], BVINA[400], BVINB[400], BIINA[400], BIINB[400], CVINA[400], CVINB[400], CIINA[400] and CIINB[400] are all initialized to all zeros; S15. Set the first parameter M1data and the comparison variables BiJiao and BiJiaoV[i].

4. The control method according to claim 3, characterized in that, In step S12, the method for calling the low-frequency interrupt subroutine is as follows: SA1, read the data from the wireless communication module (12), parse the read data according to the wireless communication protocol, and update the variables AH0, AUO, VY, IY and BY; The wireless communication protocol is byte-coded as follows: 55, AA, AH0, AU0, VY high 8 bits, VY low 8 bits, IY high 8 bits, IY low 8 bits, BY high 8 bits, BY low 8 bits, parity bit, 33, CC; Among them, 55 and AA indicate the start of the communication packet, and 33 and CC indicate the end of the communication packet; the parity bits are the bitwise XORed of the high eight bits of A0, AH0, AU0, low eight bits of VY, high eight bits of IY, low eight bits of IY, high eight bits of BY, and low eight bits of BY. SA2, read data from GPS module (13), parse the read data according to the GPS communication protocol, and update the MA, HA and UA variables; The GPS communication protocol is byte-coded as follows: 55, AA, MA, AH0, AU0, check bit, 33, CC; Among them, 55 and AA indicate the start of the communication packet, and 33 and CC indicate the end of the communication packet; the parity bits are the high eight bits of MA and HA and the low eight bits of HA, which are XORed bit by bit. SA3. Assign the value of CVA to PT; SA4. Invert SELF and calculate ACNTVI, ACNTVI = AH0 * 20 + AUO; If ACNTVI is less than or equal to 133, then let CCNTVI = ACNTVI + 133; BCNTVI = ACNTVI + 266; In response to ACNTVI being greater than or equal to 266, let CCNTVI = ACNTVI - 133; BCNTVI = ACNTVI - 266; In response to ACNTVI being greater than 133 and less than 266, let CCNTVI = ACNTVI + 133 and BCNTVI = ACNTVI - 133; SA5, let FZD=1.

5. The control method according to claim 3, characterized in that, In S12, the method for calling the high-frequency interrupt subroutine is as follows: SB1. Let VIN[CVA] equal to the stored value of the memory corresponding to the voltage sensor (1), let IIN[CVA] equal to the stored value of the memory corresponding to the current sensor (2), and add 1 to the CVA value; SB2. Determine if the CVA value is equal to 1000. If yes, proceed to SB3; otherwise, proceed to SB4. SB3. Set CVA=0 and FBZ=1; SB4. Determine if BZ equals 1. If yes, proceed to SB5. If no, complete the call to the high-frequency interrupt subroutine. SB5. Determine whether BuChangV[CBuchang] is greater than BiJiaoV[CBuchang]. If yes, control the second IGBT module (103-2) to turn on and control the third IGBT module (103-3) to turn off. If no, control the second IGBT module (103-2) to turn off and control the third IGBT module (103-3) to turn on. SB6. Increment the value of Cbuchang by 1. If CBuchang is greater than 399, then set CBuchang = 0. SB7, complete the call to the high-frequency interrupt subroutine.

6. The control method according to claim 2, characterized in that, Specifically, S26 is: S261, INDATA[300] takes 300 sample points before the current IIN sample data. The sampling method is as follows: determine whether CAV is greater than or equal to 300. If yes, then INDATA[300] = IIN[CAV-300~CAV]; if no, then the data of INDATA[300] is the concatenation of two segments of data: IIN[1000-CAV~1000] and IIN[0~CAV]. S262. Find the first i in the range i=0~100 that simultaneously satisfies INDATA[i]* INDATA[i+4] less than zero and INDATA[i]< INDATA[i+4], and let j=i; S263, Calculation : S264. Taking k = 1~25, calculate... : Get the maximum value in SUMF2[k], let the maximum value be MaxSumF2, and let MaxkF2 be the k value for getting the maximum value; Calculate BiF2: BiF2 = MaxSumF2 / SUMF1; Determine if BiF2 is greater than 0.

03. If yes, set BuChangF2=1; otherwise, set BuChangF2=0. S265. Taking k = 1~15, calculate... : In the formula, m is the remainder when i is divided by 66; Get the maximum value in SUMF3[k], let the maximum value be MaxSumF3, and let MaxkF3 be the k value for getting the maximum value; Calculate BiF3: BiF3 = MaxSumF3 / SUMF1 Determine if BiF3 is greater than 0.

03. If yes, set BuChangF3=1; otherwise, set BuChangF3=0. S266. Taking k = 1~12, calculate... : In the formula, m is the remainder when i is divided by 50; Get the maximum value in SUMF4[k], let the maximum value be MaxSumF4, and let MaxkF4 be the k value for getting the maximum value; Calculate BiF4: BiF4 = MaxSumF4 / SUMF1 Determine if BiF4 is greater than 0.

03. If yes, set BuChangF4=1; otherwise, set BuChangF4=0. S267. Taking k = 1~10, calculate... : In the formula, m is the remainder when i is divided by 40; Get the maximum value in SUMF5[k], let the maximum value be MaxSumF5, and let MaxkF5 be the k value for getting the maximum value; Calculate BiF5: BiF5 = MaxSumF5 / SUMF1 Determine if BiF5 is greater than 0.

03. If yes, set BuChangF5=1; otherwise, set BuChangF5=0. S268, Calculate BuChang; BuChang= BuChangF2+ BuChangF3+ BuChangF4+ BuChangF5; Determine if BuChang is greater than or equal to 1. If yes, then BZ=1 and call the compensation action subroutine. If no, then BZ=0.

7. The control method according to claim 6, characterized in that, In S268, the method for calling the compensation action subroutine is as follows: S2681. Determine if BuChangF2 is equal to 1. If it is, then: bcDataF2[2*i]=-1* BiF2* M2data[i], where i ranges from 0 to 99; bcDataF2[2*i+1]=(bcDataF2[2*i]+ bcDataF2[2*i+2]) / 2, where i ranges from 0 to 98; bcDataF2[199]=( bcDataF2[0] + bcDataF2[198]) / 2; bcDataF2[i+200]= bcDataF2[i], where i ranges from 0 to 199; If not, then bcDataF2[i]=0, where i ranges from 0 to 399; S2682. Determine whether BuChangF3 is equal to 1. If not, then bcDataF3[i] = 0, where i ranges from 0 to 399. If so, then: bcDataF3[2*i]=-1* BiF3* M3data[i], where i ranges from 0 to 65; bcDataF3[2*i+1]=(bcDataF3[2*i]+ bcDataF3[2*i+2]) / 2; where i ranges from 0 to 64; bcDataF3[131]=( bcDataF3[0] + bcDataF3[130]) / 2; bcDataF3[132]= bcDataF3[131]; bcDataF3[i+133] = bcDataF3[i]; where i ranges from 0 to 132; bcDataF3[266]= bcDataF3[265]; bcDataF3[i+267] = bcDataF3[i]; where i ranges from 0 to 132; S2683. Determine if BuChangF4 is equal to 1; if not, then bcDataF4[i] = 0, where i ranges from 0 to 399; If so, then: bcDataF4[2*i]= -1* BiF4* M4data[i], i ranges from 0 to 49; bcDataF4[2*i+1]=(bcDataF4[2*i]+ bcDataF4[2*i+2]) / 2; where i ranges from 0 to 48; bcDataF4[99]=( bcDataF4[0] + bcDataF4[98]) / 2; bcDataF4[i+100] = bcDataF4[i]; where i ranges from 0 to 99; bcDataF4[i+200]= bcDataF4[i]; where i ranges from 0 to 199; S2684: Determine if BuChangF5 is equal to 1. If not, then bcDataF5[i] = 0; where i ranges from 0 to 399. If so, then: bcDataF5[2*i]= -1* BiF5* M5data[i], where i ranges from 0 to 39; bcDataF5[2*i+1]=(bcDataF5[2*i]+ bcDataF5[2*i+2]) / 2;where i ranges from 0 to 38; bcDataF5[79]=( bcDataF5[0] + bcDataF5[78]) / 2; bcDataF5[i+80]= bcDataF5[i]; where i ranges from 0 to 79; bcDataF5[i+160]= bcDataF6[i]; where i ranges from 0 to 159; bcDataF5[i+320]= bcDataF6[i]; where i ranges from 0 to 79; S2685, Calculate BuChangV; BuChangV = bcDataF2[i] + bcDataF3[i]+ bcDataF4[i]+bcDataF5[i],i=0~399; S2686. Set CBuchang=0 to complete the call to the compensation action subroutine.

8. The control method according to claim 2, characterized in that, In S3, the method for performing the tripping action through the tripping action subroutine is as follows: S31, control the thyristor (9) to conduct; S32, Control the mechanical circuit breaker (6) to disconnect; S33, control thyristor (9) to disconnect.

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