Data mapping method and related device

Abstract

The embodiment of the invention discloses a data mapping method and a related device, which can obtain higher coding gain while keeping good compatibility, and can ensure the resistance to channel burst errors at the same time. Specifically, a first data stream encoded by an outer code is obtained. Afterwards, the first data stream is subjected to inner code coding to obtain a second data stream, the second data stream comprises L code words subjected to second FEC coding, L is an integral multiple of 8, each code word comprises n bits, and n is an odd number larger than 1. Furthermore, the L code words are interleaved and mapped to obtain n * L / 8 DP-16QAM symbols, any one of an X polarization direction I-path component, an X polarization direction Q-path component, a Y polarization direction I-path component and a Y polarization direction Q-path component of each DP-16QAM symbol is obtained by mapping two bits in the L code words, and each DP-16QAM symbol is obtained by mapping eight bits from eight code words.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of optical communications, and in particular, to a data mapping method and related devices. Background Art

[0002] Driven by 5G, cloud computing, big data, and artificial intelligence, optical communication systems and optical transport networks (OTN) are developing towards large capacity and ultra-high speed. Using forward error correction (FEC) to correct errors in transmitted data can solve transmission errors and recover the original data sent by the sender from the received data.

[0003] In the 400G ZR scenario, CFEC (Concatenated-FEC) is used as the error correction coding scheme in the optical module, where the outer code uses staircase code and the inner code uses double-bit extended Hamming code. Before the data stream with inner code coding is sent to the transmission medium, symbol mapping and channel interleaving are required to enhance the resistance of cFEC to channel burst errors. The existing scheme is a channel interleaving designed on the basis that the inner code word length is a multiple of 8. In the future 1.6TZR scenario, due to the significant increase in transmission rate, the performance of the existing CFEC scheme cannot meet the link budget of this scenario, so a more powerful codeword and corresponding channel interleaving method are urgently needed. Summary of the invention

[0004] The embodiments of the present application provide a data mapping method and related devices, which can obtain a higher coding gain while maintaining good compatibility and at the same time ensure the ability to resist channel burst errors.

[0005] In the first aspect, an embodiment of the present application provides a data mapping method. First, a first data stream encoded by a first forward error correction (FEC) is obtained, and the first FEC encoding can be regarded as an outer code encoding. After that, the first data stream is subjected to a second FEC encoding to obtain a second data stream, and the second FEC encoding can be regarded as an inner code encoding. The second data stream includes L codewords encoded by the second FEC, where L is an integer multiple of 8, and each codeword includes n bits, and n is an odd number greater than 1. Furthermore, the L codewords are interleaved and mapped to obtain n×L / 8 dual-polarization (DP)-16QAM symbols, and any one of the components of the I component in the X polarization direction, the Q component in the X polarization direction, the I component in the Y polarization direction, and the Q component in the Y polarization direction of each DP-16QAM symbol is obtained by mapping 2 bits in the L codewords, and each DP-16QAM is obtained by mapping 8 bits from 8 codewords respectively.

[0006] In this embodiment, the inner code word designed by this scheme includes an odd number of bits, and a BCH code or its extended code with an error correction capability of 2 bits can be used to improve the performance of the inner code coding. For example, (135,119) coding or (137,119) coding can be used instead of the existing (128,119) coding, which can obtain a higher coding gain while maintaining good compatibility. Since the inner code code word length used in this scheme is no longer a multiple of 8, the method of independently mapping each inner code code word to a DP-16QAM symbol in the existing interleaving mapping scheme is no longer applicable. Therefore, this application specifically designs an interleaving mapping method, that is, each DP-16QAM symbol is obtained by mapping 8 bits from 8 code words, which can also ensure the resistance to channel burst errors.

[0007] In some possible implementations, the L codewords include L / 2 first-category codewords and L / 2 second-category codewords. bits are mapped to the most significant bits (MSBs) of the four polarization components in n×L / 8 DP-16QAM symbols. bits are mapped to the least significant bit (LSB) of the four polarization components in n×L / 8 DP-16QAM symbols. bits are mapped to the MSBs of the four polarization components in n×L / 8 DP-16QAM symbols. bits are mapped to the LSBs of the four polarization components in n×L / 8 DP-16QAM symbols. Indicates rounding down. Indicates rounding up. In other words, the bits in each codeword are mapped as evenly as possible to the MSB and LSB of the four polarization components in n×L / 8 DP-16QAM symbols. Since the MSB and LSB have different abilities to resist noise, the performance of encoding and decoding can be maximized by evenly mapping the bits in each inner codeword to the MSB and LSB.

[0008] In some possible implementations, the number of bits from any codeword among the 2×n×L / 8 bits included in any polarization component of the n×L / 8 DP-16QAM symbols is w, That is, the number of bits from any codeword in the 2×n×L / 8 bits included in any polarization component of the n×L / 8 DP-16QAM symbols is as close or identical as possible, which is beneficial to reducing performance degradation caused by continuous errors.

[0009] In some possible implementations, the number of bits of each codeword mapped to any polarization component in n×L / 8 DP-16QAM symbols is r, That is, the number of bits of each codeword mapped to any polarization component in the n×L / 8 DP-16QAM symbols is as close or identical as possible, which is beneficial to reducing performance degradation caused by continuous errors.

[0010] In some possible implementations, each consecutive L / 8 DP-16QAM symbols among n×L / 8 DP-16QAM symbols are mapped by L bits from L codewords respectively. In the scenario where L is greater than 8, this interleaved mapping method can also be well compatible with the inner codewords provided in the embodiments of the present application.

[0011] In some possible implementations, By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word Bit mapping is obtained. Among them, It represents the lth pulse amplitude modulation PAM4 symbol component of the I-path component in the X polarization direction among the n×L / 8 DP-16QAM symbols. It represents the lth PAM4 symbol component of the Q path component in the X polarization direction among n×L / 8 DP-16QAM symbols. It represents the lth PAM4 symbol component of the I-path component in the Y polarization direction among the n×L / 8 DP-16QAM symbols. It represents the lth PAM4 symbol component of the Q-path component in the Y polarization direction among n×L / 8 DP-16QAM symbols. a%b means a modulo b, and a^b means XOR of a and b. This implementation provides an XOR shift method for interleaving mapping, which enhances the practicality of this solution.

[0012] In some possible implementations, By The code word bits and the 8th The code word The bit mapping is obtained. By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word The bit mapping is obtained. By 8th The code word bits and The code word Bit mapping is obtained. Among them, It represents the lth PAM4 symbol component of the I-path component in the X polarization direction among the n×L / 8 DP-16QAM symbols. It represents the lth PAM4 symbol component of the Q path component in the X polarization direction among n×L / 8 DP-16QAM symbols. It represents the lth PAM4 symbol component of the I-path component in the Y polarization direction among the n×L / 8 DP-16QAM symbols. It represents the lth PAM4 symbol component of the Q-path component in the Y polarization direction among n×L / 8 DP-16QAM symbols. This implementation provides a cyclic shift method for interleaving mapping, thereby improving the flexibility of the solution.

[0013] In some possible implementations, the number of information bits in the codeword is k=119, n=133, 135 or 137. On the basis of being compatible with 400G ZR, a BCH code or its extended code with an error correction capability of 2 bits can be used, which is beneficial to improving the performance of inner code encoding.

[0014] In some possible implementations, the first FEC encoding uses staircase (512, 510) encoding, which has a better practical effect.

[0015] In some possible implementations, the first data stream is bit-filled after the first FEC encoding, which is beneficial for the receiving end to better synchronize the inner code and the outer code, wherein the number of filled bits is greater than or equal to 1.

[0016] In some possible implementations, the first data stream undergoes convolution interleaving after being first FEC encoded.

[0017] In some possible implementations, before obtaining the first data stream after the first FEC encoding, the method further includes: distributing the input data stream to obtain 4 distribution data streams, wherein each 4 consecutive bits in the input data stream are distributed to the 4 distribution data streams respectively; and performing the first FEC encoding on each distribution data stream. This data method is conducive to compatibility with 1.6T, 800G, 400G and other throughput scenarios.

[0018] In a second aspect, an embodiment of the present application provides a data mapping device. The data mapping device includes: an acquisition unit, an encoding unit, and an interleaving mapping unit. The acquisition unit is used to: acquire a first data stream encoded by a first FEC. The encoding unit is used to: perform a second FEC encoding on the first data stream to obtain a second data stream. The second data stream includes L codewords encoded by the second FEC, L is an integer multiple of 8, each codeword includes n bits, and n is an odd number greater than 1. The interleaving mapping unit is used to: interleave and map the L codewords to obtain n×L / 8 DP-16QAM symbols. Any one of the I-path component in the X polarization direction, the Q-path component in the X polarization direction, the I-path component in the Y polarization direction, and the Q-path component in the Y polarization direction of each DP-16QAM symbol is obtained by mapping 2 bits in the L codewords, and each DP-16QAM is obtained by mapping 8 bits from 8 codewords respectively.

[0019] In some possible implementations, the L codewords include L / 2 first-category codewords and L / 2 second-category codewords. bits are mapped to the MSBs of the four polarization components in n×L / 8 DP-16QAM symbols. bits are mapped to the LSBs of the four polarization components in n×L / 8 DP-16QAM symbols. bits are mapped to the MSBs of the four polarization components in n×L / 8 DP-16QAM symbols. bits are mapped to the LSBs of the four polarization components in n×L / 8 DP-16QAM symbols. Indicates rounding down. Indicates rounding up. In other words, the bits in each codeword are mapped as evenly as possible to the MSB and LSB of the four polarization components in n×L / 8 DP-16QAM symbols. Since the MSB and LSB have different abilities to resist noise, the performance of encoding and decoding can be maximized by evenly mapping the bits in each inner codeword to the MSB and LSB.

[0020] In some possible implementations, the number of bits from any codeword among the 2×n×L / 8 bits included in any polarization component of the n×L / 8 DP-16QAM symbols is w, That is, the number of bits from any codeword in the 2×n×L / 8 bits included in any polarization component of the n×L / 8 DP-16QAM symbols is as close or identical as possible, which is beneficial to reducing performance degradation caused by continuous errors.

[0021] In some possible implementations, the number of bits of each codeword mapped to any polarization component in n×L / 8 DP-16QAM symbols is r, That is, the number of bits of each codeword mapped to any polarization component in the n×L / 8 DP-16QAM symbols is as close or identical as possible, which is beneficial to reducing performance degradation caused by continuous errors.

[0022] In some possible implementations, each consecutive L / 8 DP-16QAM symbols among the n×L / 8 DP-16QAM symbols are mapped to L bits from L codewords respectively.

[0023] In some possible implementations, By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word Bit mapping is obtained. Among them, It represents the lth pulse amplitude modulation PAM4 symbol component of the I-path component in the X polarization direction among the n×L / 8 DP-16QAM symbols. It represents the lth PAM4 symbol component of the Q path component in the X polarization direction among n×L / 8 DP-16QAM symbols. It represents the lth PAM4 symbol component of the I-path component in the Y polarization direction among the n×L / 8 DP-16QAM symbols. It represents the lth PAM4 symbol component of the Q-path component in the Y polarization direction among n×L / 8 DP-16QAM symbols. a%b means a modulo b, and a^b means XOR of a and b. This implementation provides an XOR shift method for interleaving mapping, which enhances the practicality of this solution.

[0024] In some possible implementations, By The code word bits and the 8th The code word The bit mapping is obtained. By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word The bit mapping is obtained. By 8th The code word bits and The code word Bit mapping is obtained. Among them, It represents the lth PAM4 symbol component of the I-path component in the X polarization direction among the n×L / 8 DP-16QAM symbols. It represents the lth PAM4 symbol component of the Q path component in the X polarization direction among n×L / 8 DP-16QAM symbols. It represents the lth PAM4 symbol component of the I-path component in the Y polarization direction among the n×L / 8 DP-16QAM symbols. It represents the lth PAM4 symbol component of the Q-path component in the Y polarization direction among n×L / 8 DP-16QAM symbols. This implementation provides a cyclic shift method for interleaving mapping, thereby improving the flexibility of the solution.

[0025] In some possible implementations, the number of information bits in the codeword is k=119, n=133, 135 or 137. On the basis of being compatible with 400G ZR, a BCH code or its extended code with an error correction capability of 2 bits can be used, which is beneficial to improving the performance of inner code encoding.

[0026] In some possible implementations, the first FEC encoding uses staircase (512, 510) encoding, which has a better practical effect.

[0027] In some possible implementations, the first data stream is bit-filled after the first FEC encoding, which is beneficial for the receiving end to better synchronize the inner code and the outer code, wherein the number of filled bits is greater than or equal to 1.

[0028] In some possible implementations, the first data stream undergoes convolution interleaving after being first FEC encoded.

[0029] In some possible implementations, the data mapping device also includes a processing unit, and before obtaining the first data stream that has been encoded by the first FEC, the processing unit is used to: distribute data on the input data stream to obtain 4 distribution data streams, wherein every 4 consecutive bits in the input data stream are distributed to 4 distribution data streams respectively; and perform the first FEC encoding on each distribution data stream.

[0030] In a third aspect, an embodiment of the present application provides a chip, which includes a processor and a memory, the memory and the processor are interconnected through lines, instructions are stored in the memory, and the processor is used to execute the method described in any implementation method of the first aspect.

[0031] In a fourth aspect, an embodiment of the present application provides a data transmission system, which includes a data sending device and a data receiving device, wherein the data sending device is used to execute the method described in any embodiment of the first aspect and send data to the data receiving device, and the data receiving device is used to perform operations such as decoding the received data.

[0032] In a fifth aspect, an embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a computer, the method described in any implementation manner of the first aspect is implemented.

[0033] It can be seen from the above technical solutions that the embodiments of the present application have the following advantages:

[0034] In this embodiment, the inner code word designed by this scheme includes an odd number of bits, and a BCH code or its extended code with an error correction capability of 2 bits can be used to improve the performance of the inner code coding. For example, (135,119) coding or (137,119) coding can be used instead of the existing (128,119) coding, which can obtain a higher coding gain while maintaining good compatibility. Since the inner code code word length used in this scheme is no longer a multiple of 8, the method of independently mapping each inner code code word to a DP-16QAM symbol in the existing interleaving mapping scheme is no longer applicable. Therefore, this application specifically designs an interleaving mapping method, that is, each DP-16QAM symbol is obtained by mapping 8 bits from 8 code words, which can also ensure the resistance to channel burst errors. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 A schematic diagram of a communication system used in an embodiment of the present application;

[0036] Figure 2 A schematic diagram of another communication system used in an embodiment of the present application;

[0037] Figure 3 A schematic diagram of an implementation method of data processing at the sending end and data processing at the receiving end in the embodiment of the present application;

[0038] Figure 4 A schematic diagram of a flow chart of a data mapping method provided in an embodiment of the present application;

[0039] Figure 5 This is a schematic diagram of the first application scenario of interleaving mapping in an embodiment of the present application;

[0040] Figure 6 This is a schematic diagram of a second application scenario of interleaving mapping in an embodiment of the present application;

[0041] Figure 7 This is a schematic diagram of a third application scenario of interleaving mapping in an embodiment of the present application;

[0042] Figure 8 This is a schematic diagram of a fourth application scenario of interleaving mapping in an embodiment of the present application;

[0043] Fig. 9This is a schematic diagram of a fifth application scenario of interleaving mapping in an embodiment of the present application;

[0044] Fig.10 This is a schematic diagram of a sixth application scenario of interleaving mapping in an embodiment of the present application;

[0045] Fig.11 A schematic diagram of an implementation of a multi-channel parallel transmitting end data processor in an embodiment of the present application;

[0046] Fig.12 A schematic diagram of an implementation method of data distribution in an embodiment of the present application;

[0047] Fig.13 A schematic diagram of the structure of a data mapping device in an embodiment of the present application;

[0048] Fig.14 Schematic diagram of another structure of the data mapping device in the embodiment of the present application. DETAILED DESCRIPTION

[0049] The embodiment of the present application provides a data mapping method and related devices, which can obtain a higher coding gain while maintaining good compatibility, and at the same time can ensure the resistance to channel burst errors. It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, rather than to limit a specific order or sequence. It should be understood that the above terms can be interchanged where appropriate, so that the embodiments described in this application can be implemented in an order other than the content described in this application. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0050] Figure 1 Schematic diagram of a communication system used in the embodiment of the present application. Figure 1As shown, the communication system includes a transmitting device 01, a transmitting processing module 02, a channel transmission medium 03, a receiving processing module 04 and a receiving device 05. Taking the communication system as a data center network as an example, the transmitting device 01 and the receiving device 05 can be devices such as switches or routers, and the transmitting device 01 is also called a client-side chip (host chip) located at the transmitting end, and the receiving device 05 is also called a client-side chip located at the receiving end, and the channel transmission medium 03 can be an optical fiber. The client-side chip is sometimes also called a client-side device (host device). Among them, the transmitting device 01 and the transmitting processing module 02 can be connected through an attachment unit interface (AUI), and the receiving device 05 and the receiving processing module 04 can be connected through the AUI. The transmitting processing module 02 and the receiving processing module 04 can be optical modules (optical modules), electrical modules, connectors (connectors) or other modules that process data during data transmission. For example, the processing module can be an 800ZR module (800ZR module, a coherent optical module). Furthermore, the transmitting device 01, the transmitting processing module 02, the channel transmission medium 03, the receiving processing module 04 and the receiving device 05 in the communication system can support bidirectional transmission or unidirectional transmission, which is not specifically limited here.

[0051] Figure 2 FIG. 1 is a schematic diagram of another communication system used in the embodiment of the present application. Figure 2 As shown, at the transmitting end, the information source provides the data stream to be sent; the transmitting end data processor receives the data stream, and performs data processing including coding, interleaving, and modulation on it to obtain a symbol data stream, which is sent to the transmitting end signal processor for framing, transmitted through the channel, and reaches the receiving device. After the receiving device receives the distorted signal caused by noise or other damage in the channel, it is sent to the receiving end signal processor for dispersion compensation, synchronization, phase recovery and other operations, and then sent to the receiving end data processor for demodulation, deinterleaving, decoding, and recovery of the original data, which is sent to the destination. Among them, Figure 2 The transmitting data processing and transmitting signal processing shown in can be applied to Figure 1 In the sending end processing module 02 shown, Figure 2 The receiving end data processing and receiving end signal processing shown in can be applied to Figure 1 In the receiving end processing module 04 shown.

[0052] Figure 3 Schematic diagram of an implementation method of data processing at the sending end and data processing at the receiving end in the embodiment of the present application. Figure 3As shown, the data processing operation at the transmitting end includes outer code encoding, inner code encoding, symbol mapping and channel interleaving of the input data stream. The data processing operation at the receiving end includes symbol inverse mapping, channel deinterleaving, inner code decoding and outer code decoding of the input data stream. In some possible scenarios, the data processing at the transmitting end can also perform operations such as padding bit insertion, scrambling and convolution interleaving between outer code encoding and inner code encoding, so the received data processing also needs to perform corresponding inverse transformation operations.

[0053] It should be understood that the "inner" in the inner code and the "outer" in the outer code are distinguished only based on the distance of the execution subject operating the data relative to the channel transmission medium. The execution subject operating the inner code is closer to the channel transmission medium, and the execution subject operating the outer code is farther away from the channel transmission medium. Figure 1 For example, since the transmitting end processing module 02 encodes the data twice before sending it to the channel transmission medium. The data encoded by the transmitting end processing module 02 first is far away from the channel transmission medium, and the data encoded by the transmitting end processing module 02 later is closer to the channel transmission medium. Therefore, the data encoded by the transmitting end processing module 02 first is called data encoded by the outer code, and the data encoded by the transmitting end processing module 02 later is called data encoded by the inner code. Correspondingly, the data decoded by the receiving end processing module 04 first is called data decoded by the inner code, and the data decoded by the receiving end processing module 04 later is called data decoded by the outer code. In a possible implementation, the above-mentioned inner code encoding and outer code encoding are both FEC encoding methods, thereby forming a cascade FEC transmission scheme. For example, the transmitting end processing module 02 can use staircase code for outer code encoding, use Hamming code for inner code encoding, or use Bose-Chaudhuri-Hocquenghem (BCH) code for inner code encoding.

[0054] It should be noted that the above content is an exemplary description of the application scenario of the data mapping method provided in the embodiment of the present application, and does not constitute a limitation on the application scenario of the data mapping method. A person of ordinary skill in the art will know that as business needs change, its application scenario can be adjusted according to application needs, and the embodiment of the present application does not list them one by one. The following mainly introduces the data mapping method applied to the data sending end. The data inverse mapping method applied to the receiving end can be understood as the inverse operation of the data mapping method of the sending end. On the basis of the determination of the data mapping method of the sending end, the data inverse mapping method of the receiving end is also clear, and this application will no longer introduce the data inverse mapping method of the receiving end in detail.

[0055] Figure 4A flow chart of a data mapping method provided in an embodiment of the present application. The data mapping method includes the following steps, which are described in detail below. It should be understood that, for ease of explanation, the first FEC encoding in the following text can be regarded as the outer code encoding introduced above, and the second FEC encoding in the following text can be regarded as the inner code encoding introduced above, and the following text can be understood based on this.

[0056] 101. Obtain a first data stream that has undergone first FEC encoding.

[0057] It should be understood that the present application does not limit the specific implementation of the outer code encoding. As an example, the outer code encoding can specifically adopt staircase (512, 510) encoding. In some possible scenarios, the first data stream encoded by the outer code can also be called a coded data frame, and the bits in the coded data frame are distributed in rows and columns.

[0058] 102. Perform second FEC encoding on the first data stream to obtain a second data stream.

[0059] In the embodiment of the present application, the second data stream encoded by the inner code includes L inner code words, where L is an integer multiple of 8. Each code word includes k information bits and nk check bits, a total of n bits, where n cannot be divided by 8. Each code word includes r bit subsets, each bit subset includes d bits, and the number of bits included in each code word is n=r×d. Specifically, d can be the greatest common divisor of n and 8, for example, d=1, 2, or 4.

[0060] In a possible implementation manner, the inner code encoding in the embodiment of the present application may specifically adopt GF(2 m ) BCH coding or extended BCH coding with error correction of t = 2 bits, which increases the error correction capability of the inner code word to t = 2 bits, that is, an inner code word can correct errors of t = 2 bits at most, improving the performance of cascade coding. GF refers to a finite field, also known as a Galois field, 2 m Indicates the order of the finite field. The nk check bits in the inner code word using BCH coding do not include the cyclic redundancy check (CRC) extended check bit, and the nk check bits in the inner code word using extended BCH coding include 1-bit or 2-bit CRC extended check bits. If the nk check bits do not include the CRC extended check bit, then nk = m×t; if the nk check bits include 1-bit CRC extended check bit, then nk = m×t+1; if the nk check bits include 2-bit CRC extended check bits, then nk = m×t+2.

[0061] As an example, taking k=119 as an example, if d=1, that is, the length of the inner code word is an odd number of bits, the following Table 1 provides several possible inner code encoding schemes. Among them, n represents the length of the inner code word, k represents the information sequence length of the inner code word, the no extension in the remark means that there is no CRC extension check bit in the check sequence, the single-bit extension in the remark means that there is a 1-bit CRC extension check bit in the check sequence, and the double-bit extension in the remark means that there are 2 bits of CRC extension check bits in the check sequence. Schemes 1 and 2 in Table 1 are built on GF(2 8 ), Schemes 3 and 4 in Table 1 are constructed on GF(2 7 )superior.

[0062] Table 1

[0063] plan k n Remark 1 119 135 No extensions 2 119 137 Dual-bit extension 3 119 133 No extensions 4 119 135 Dual-bit extension

[0064] As another example, taking k=119 as an example, if d=2, the length n of the inner code word can be 134, and there is a 1-bit CRC extended check bit in the check sequence. This scheme is built on GF(2 7 )superior.

[0065] 103. Interleave and map the L codewords to obtain n×L / 8 DP-16QAM symbols.

[0066] It should be understood that the symbol mapping method includes but is not limited to quadrature phase shift keying (Quadrature Phase ShiftKeying, QPSK) and quadrature amplitude modulation (Quadrature Amplitude Modulation, QAM), and further polarization symbol division is performed to obtain dual-polarization (Dual-polarization, DP) symbols, for example, DP-QPSK, DP-8QAM, DP-16QAM, DP-32QAM and DP-64QAM, etc. The embodiment of the present application is mainly introduced by taking DP-16QAM symbols as an example.

[0067] Specifically, any one of the X polarization direction I-path (in-phase) component, the X polarization direction Q-path (quadrature-phase) component, the Y polarization direction I-path (in-phase) component, and the Y polarization direction Q-path (quadrature-phase) component of each DP-16QAM symbol is obtained by mapping 2 bits in the L codewords, and each DP-16QAM symbol is obtained by mapping 8 bits from 8 codewords, respectively. Among them, the X polarization direction and the Y polarization direction are orthogonal to each other, and any one of the components of the DP-16QAM symbol can also be called a PAM4 symbol component.

[0068] In the embodiment of the present application, a bit subset of d bits is used as the minimum granularity for interleaving mapping, with the purpose of minimizing the implementation complexity of interleaving. That is, when the length n of the inner code word is a multiple of 4, d=4 bits or equivalently a 16QAM symbol is used as the minimum granularity for interleaving mapping. When the length n of the inner code word is a multiple of 2, d=2 bits or equivalently a PAM4 symbol is used as the minimum granularity for interleaving mapping. When the length n of the inner code word is an odd number, that is, d=1, a single bit is used as the minimum granularity for interleaving mapping.

[0069] It should be noted that the interleaving mapping mentioned here can actually be one operation. Alternatively, the interleaving mapping can also include multiple operations, for example, the interleaving mapping includes symbol mapping, polarization division and interleaving operations. In one possible implementation, the L codewords are first interleaved to disrupt the order of the L codewords, and then the interleaved L codewords are symbol mapped and polarization divided to obtain the required n×L / 8 DP-16QAM symbols. In another possible implementation, the L codewords are symbol mapped and polarization divided, and then interleaved to obtain the required n×L / 8 DP-16QAM symbols.

[0070] It should be noted that the interleaving mapping designed in the embodiment of the present application mainly considers two aspects. The first consideration is to map the bits in each codeword as evenly as possible to the most significant bit (MSB) and the least significant bit (LSB) of the 4 polarization components in the n×L / 8 DP-16QAM symbols. Since the MSB and LSB have different abilities to resist noise, the performance of the encoding and decoding can be maximized by evenly mapping the bits in each inner codeword to the MSB and LSB. The second consideration is that the number of bits from any codeword in the 2×n×L / 8 bits included in any polarization component in the n×L / 8 DP-16QAM symbols is as close or identical as possible, and the number of bits of each codeword mapped to any polarization component in the n×L / 8 DP-16QAM symbols is as close or identical as possible, which is conducive to reducing the performance degradation caused by continuous errors. The following further introduces these two considerations in detail.

[0071] With regard to the first aspect, L / 2 of the L inner code words can be recorded as first-category code words, and the other L / 2 of the L inner code words can be recorded as second-category code words. bits are mapped to the MSBs of the four polarization components in n×L / 8 DP-16QAM symbols. bits are mapped to the LSBs of the four polarization components in n×L / 8 DP-16QAM symbols. bits are mapped to the MSBs of the four polarization components in n×L / 8 DP-16QAM symbols. bits are mapped to the LSBs of the four polarization components in n×L / 8 DP-16QAM symbols. Indicates rounding down. It should be understood that in the scenario where d=2 or 4, that is, n is an even number, the above and are equal to

[0072] For the second consideration, the number of bits from any codeword in the 2×n×L / 8 bits included in any polarization component of n×L / 8 DP-16QAM symbols is recorded as w, and the number of bits mapped from each codeword to any polarization component of n×L / 8 DP-16QAM symbols is recorded as r. In the scenario of d=1, In the scenario where d=2, or or In the scenario of d=4, or or

[0073] Several specific interleaving mapping methods are provided below based on different values ​​of d. It should be understood that the several interleaving mapping methods provided below are all introduced with L=8 as an example. It represents the lth PAM4 symbol component of the I-path component in the X polarization direction among the n DP-16QAM symbols. It represents the lth PAM4 symbol component of the Q path component in the X polarization direction among n DP-16QAM symbols. It represents the lth PAM4 symbol component of the I-path component in the Y polarization direction among the n DP-16QAM symbols. It represents the lth PAM4 symbol component of the Q path component in the Y polarization direction among n DP-16QAM symbols, 0≤l≤n-1, a%b represents a modulo b, and a^b represents a and b XOR. Figure 5-Figure 8 The solid and dashed boxes in FIG. 1 are used to distinguish the bits mapped to the MSB and LSB of the four polarization components in the DP-16QAM symbol. Figure 5-Figure 8The different shaded parts in the DP-16QAM symbol are used to distinguish the bits of the four polarization components in the DP-16QAM symbol. It should also be understood that the conditions satisfied by the interleaving mapping methods of XOR shift and cyclic shift introduced in the following application scenarios are only one possible implementation method. In addition, those skilled in the art can also flexibly transform the conditions provided in the embodiments of the present application to achieve Figure 5-Figure 8 The effects after interleaving and mapping shown in are not listed one by one here.

[0074] Figure 5 Schematic diagram of the first application scenario of interleaving mapping in the embodiment of the present application. Figure 5 As shown, taking n=135 as an example, an XOR shift method is used for interleaving mapping in the scenario of d=1. Specifically, the XOR shift interleaving mapping satisfies the following conditions:

[0075] Obtained by mapping the lth bit of the 0^(l%8)th codeword and the lth bit of the 1^(l%8)th codeword;

[0076] Obtained by mapping the lth bit of the 2^(l%8)th codeword and the lth bit of the 3^(l%8)th codeword;

[0077] Obtained by mapping the lth bit of the 4^(l%8)th codeword and the lth bit of the 5^(l%8)th codeword;

[0078] It is obtained by mapping the lth bit of the 6^(l%8)th codeword and the lth bit of the 7^(l%8)th codeword.

[0079] Figure 6 Schematic diagram of the second application scenario of interleaving mapping in the embodiment of the present application. Figure 6 As shown, taking n=135 as an example, a cyclic shift is used for interleaving mapping in a scenario where d=1. Specifically, the cyclic shift interleaving mapping satisfies the following conditions:

[0080] Obtained by mapping the lth bit of the (0+l)%8th codeword and the lth bit of the (1+l)%8th codeword;

[0081] Obtained by mapping the lth bit of the (2+1)%8th codeword and the lth bit of the (3+1)%8th codeword;

[0082] Obtained by mapping the lth bit of the (4+1)%8th codeword and the lth bit of the (5+1)%8th codeword;

[0083] It is obtained by mapping the lth bit of the (6+l)%8th codeword and the lth bit of the (7+l)%8th codeword.

[0084] It should be noted that in the above Figure 5 and Figure 6 In the embodiment shown, X I ,X Q ,Y I ,Y Q Among the 2×135=270 bits corresponding to each signal in , the number of bits from any codeword is 33 or 34, satisfying From the codeword perspective, the number of bits in each codeword that are ultimately mapped to any one of the four components is 33 or 34. In addition, the first type of codewords bits are mapped to the MSBs of the four polarization components in the 135 DP-16QAM symbols. bits are mapped to the LSBs of the four polarization components in 135 DP-16QAM symbols. bits are mapped to the MSBs of the four polarization components in the 135 DP-16QAM symbols. The bits are mapped to the LSBs of the four polarization components in the 135 DP-16QAM symbols.

[0085] Figure 7 FIG. 2 is a schematic diagram of the third application scenario of interleaving mapping in the embodiment of the present application. Figure 7 As shown, taking n=134 as an example, an XOR shift method is used for interleaving mapping in the scenario of d=2. Specifically, the XOR shift interleaving mapping satisfies the following conditions:

[0086] By The code word bits and Bit mapping is obtained;

[0087] By The code word bits and Bit mapping is obtained;

[0088] By The code word bits and Bit mapping is obtained;

[0089] By The code word bits and The bit mapping is obtained.

[0090] Figure 8 FIG. 4 is a schematic diagram of the fourth application scenario of interleaving mapping in the embodiment of the present application. Figure 8 As shown, taking n=134 as an example, a cyclic shift is used for interleaving mapping in a scenario where d=2. Specifically, the cyclic shift interleaving mapping satisfies the following conditions:

[0091] By The code word bits and Bit mapping is obtained;

[0092] By The code word bits and Bit mapping is obtained;

[0093] By The code word bits and Bit mapping is obtained;

[0094] By The code word bits and The bit mapping is obtained.

[0095] It should be noted that in the above Figure 7 and Figure 8 In the embodiment shown, X I ,X Q ,Y I ,Y Q Among the 2×134=268 bits corresponding to each signal in , the number of bits from any codeword is or From the codeword perspective, the number of bits in each codeword that are ultimately mapped to any one of the four components is or In addition, each codeword bits are mapped to the MSBs of the four polarization components in the 134 DP-16QAM symbols. The bits are mapped to the LSBs of the four polarization components in the 135 DP-16QAM symbols.

[0096] For the scenario of d=4, no more figures are provided. Figure 5-Figure 8 Based on the actual value of n, it can be transformed. Here, the interleaving mapping is performed by cyclic shift. As for the interleaving mapping by XOR shift, it can be based on Figure 5 or Figure 7 Specifically, the interleaving mapping of the cyclic shift satisfies the following conditions:

[0097] By The code word bits and Bit mapping is obtained;

[0098] By The code word bits and Bit mapping is obtained;

[0099] By The code word bits and Bit mapping is obtained;

[0100] By The code word bits and The bit mapping is obtained.

[0101] above Figure 5-Figure 8 Several implementation methods of interleaving mapping in the scenario of L=8 are provided, and an implementation method of interleaving mapping in the scenario of L=16 with d=1 as an example is provided below. As for implementation methods with other values ​​of L and d, they can be flexibly changed based on the embodiments provided in this application, and will not be introduced one by one here.

[0102] Fig. 9 FIG. 5 is a schematic diagram of the fifth application scenario of interleaving mapping in the embodiment of the present application. Fig. 9 As shown, taking n=135 as an example, an XOR shift method is used for interleaving mapping in the scenario of d=1. Specifically, the XOR shift interleaving mapping satisfies the following conditions:

[0103] By The code word bits and The code word Bit mapping is obtained;

[0104] By The code word bits and The code word Bit mapping is obtained;

[0105] By The code word bits and The code word Bit mapping is obtained;

[0106] By The code word bits and The code word The bit mapping is obtained.

[0107] Fig.10 FIG. 6 is a schematic diagram of the sixth application scenario of interleaving mapping in the embodiment of the present application. Fig.10 As shown, taking n=135 as an example, a cyclic shift is used for interleaving mapping in a scenario where d=1. Specifically, the cyclic shift interleaving mapping satisfies the following conditions:

[0108] By The code word bits and The code word Bit mapping is obtained;

[0109] By The code word bits and The code word Bit mapping is obtained;

[0110] By The code word bits and The code word Bit mapping is obtained;

[0111] By The code word bits and The code word The bit mapping is obtained.

[0112] It should be noted that in the above Fig. 9 and Fig.10 In the embodiment shown, X I ,X Q ,Y I ,Y QEach signal corresponds to bits, the number of bits from any codeword is 33 or 34. From the perspective of codewords, the number of bits in each codeword that are ultimately mapped to any one of the four components is 33 or 34, satisfying In addition, the first type of codewords bits are mapped to the MSBs of the four polarization components in the 270 DP-16QAM symbols. bits are mapped to the LSBs of the four polarization components in the 270 DP-16QAM symbols. bits are mapped to the MSBs of the four polarization components in the 270 DP-16QAM symbols. The bits are mapped to the LSBs of the four polarization components in 540 DP-16QAM symbols.

[0113] It should be noted that in the embodiment of the present application, in addition to the steps 101 to 103 described above, other operations may be performed between the outer code encoding and the inner code encoding. For example, at least one padding bit is added to the data stream after the outer code encoding, and the specific number of padding bits is subject to the actual application and is not limited here. For another example, after the padding bits are added, the data stream may be scrambled, and the specific scrambling method is subject to the actual application and is not limited here. For another example, after scrambling, the data stream may be convolutionally interleaved, and the specific convolutionally interleaved method is subject to the actual application and is not limited here.

[0114] The above introduces the data mapping method provided in the embodiment of the present application. It should be understood that in some possible scenarios, considering the potential need for the FEC solution to be compatible with 1.6T, 800G, 400G and other throughput rates and the problem of hardware implementation at ultra-high throughput rates, a multi-channel parallel data processing solution can also be proposed based on the aforementioned implementation column. Fig.11 FIG. 1 is a schematic diagram of an implementation of a multi-channel parallel data processor of the present application. Fig.11 As shown, first distribute the input data stream to obtain 4 data streams, and then Figure 3 The data processing method shown performs data processing on each data stream after distribution.

[0115] Fig.12 Schematic diagram of an implementation method of data distribution in the embodiment of this application. Fig.12As shown in FIG. 1 , firstly, continuous 4×119×10280 bits of data are obtained, and then four data frames are obtained by polling and distributing them according to the granularity of h bits. The bits in each data frame are arranged as 119 rows and 10280 columns. Four coded data frames can be obtained by performing outer code encoding on the four data frames respectively. Then, according to Figure 3 The following data processing is performed on each coded data frame in the manner shown. It should be understood that 10280% (4×h) = 0, for example, h = 1, 257, 514 or 1285. This solution can be well compatible with 1.6T, 800G, 400G and other throughput rates. As an example, when the input data frame is a 1.6T service, the data frame can be processed according to Fig.10 As another example, when the input data frame is an 800G service, the data frame can be distributed to 2 channels for processing, and the other 2 channels can be turned off to save power. As another example, when the input data frame is a 400G service, the data frame distribution can be omitted, and the data frame can be directly processed as follows: Figure 3 The data processing shown is turned off for the other 3 channels to save power.

[0116] Fig.13 FIG. 1 is a schematic diagram of a structure of a data mapping device in an embodiment of the present application. Fig.13 As shown, the data mapping device includes an acquisition unit 201, an encoding unit 202 and an interleaving mapping unit 203. The acquisition unit 201 is used to perform the operation of the above step 101, the encoding unit 202 is used to perform the operation of the above step 102, and the interleaving mapping unit 203 is used to perform the operation of the above step 103. It should be understood that the data mapping device provided by the present application can also be implemented in other ways. For example, the unit division in the above device is only a logical function division, and there may be other division methods in actual implementation, for example, multiple units or components can be combined or integrated into another system. In addition, the functional units in the various embodiments of the present application can be integrated into a processing unit, or can be independent physical units, or two or more functional units can be integrated into a processing unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units.

[0117] Fig.14 FIG. 2 is another structural diagram of the data mapping device in the embodiment of the present application. Fig.14 As shown, the data mapping device includes a processor 301 and a transceiver 302. The processor 301 and the transceiver 302 are connected to each other through a line. Specifically, the transceiver 302 is used to perform data transmission and reception operations, and the processor 301 is used to perform other operations except data transmission and reception. In a possible implementation, the processor 301 may include the above Fig.13The encoding unit 202 and the interleaving mapping unit 203 shown in the figure, the transceiver 302 includes the above Fig.13 The acquisition unit 201 is shown. Optionally, the data mapping device may further include a memory 303, wherein the memory 303 is used to store program instructions and data.

[0118] The embodiment of the present application also provides a chip. The chip integrates a circuit and one or more interfaces for implementing the functions of the above-mentioned processor 301. When the chip integrates a memory, the chip can complete the method steps of any one or more embodiments in the above-mentioned embodiments. When the chip does not integrate a memory, it can be connected to an external memory through an interface. The chip implements the actions performed by the sending end device or the receiving end device in the above-mentioned embodiment according to the program code stored in the external memory.

[0119] Finally, it should be noted that the above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A data mapping method, characterized in that: include: Acquire a first data stream that has been encoded by a first forward error correction (FEC); Performing a second FEC encoding on the first data stream to obtain a second data stream, the second data stream comprising L codewords subjected to the second FEC encoding, L being an integer multiple of 8, each of the codewords comprising n bits, and n being an odd number greater than 1; The L codewords are interleaved and mapped to obtain n×L / 8 dual-polarization DP-16QAM symbols, and any one of the I component in the X polarization direction, the Q component in the X polarization direction, the I component in the Y polarization direction, and the Q component in the Y polarization direction of each DP-16QAM symbol is obtained by mapping 2 bits in the L codewords, and each DP-16QAM is obtained by mapping 8 bits from 8 of the codewords respectively.

2. The method according to claim 1, characterized in that The L code words include L / 2 first-category code words and L / 2 second-category code words, each of which has bits are mapped to the high-order bits MSB of the four polarization components in the n×L / 8 DP-16QAM symbols, and each of the first codewords bits are mapped to the low-order bits LSB of the four polarization components in the n×L / 8 DP-16QAM symbols, and each of the second-category codewords bits are mapped to the MSBs of the four polarization components in the n×L / 8 DP-16QAM symbols, and each of the second type of codewords bits are mapped to the LSBs of the 4 polarization components in the n×L / 8 DP-16QAM symbols, where: Indicates rounding down. Indicates rounding up.

3. The method according to claim 1 or 2, characterized in that: The number of bits from any codeword among the 2×n×L / 8 bits included in any polarization component of the n×L / 8 DP-16QAM symbols is w, 4. The method according to any one of claims 1 to 3, characterized in that The number of bits of each codeword mapped to any polarization component in the n×L / 8 DP-16QAM symbols is r, 5. The method according to any one of claims 1 to 4, characterized in that Each consecutive L / 8 DP-16QAM symbols in the n×L / 8 DP-16QAM symbols are mapped by L bits respectively from the L codewords.

6. The method according to any one of claims 1 to 5, characterized in that By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word Bit mapping is obtained; in, represents the lth pulse amplitude modulation PAM4 symbol component of the I-path component in the X polarization direction among the n×L / 8 DP-16QAM symbols, represents the lth PAM4 symbol component of the Q path component in the X polarization direction among the n×L / 8 DP-16QAM symbols, represents the lth PAM4 symbol component of the I-path component in the Y polarization direction among the n×L / 8 DP-16QAM symbols, represents the lth PAM4 symbol component of the Q-path component in the Y polarization direction among the n×L / 8 DP-16QAM symbols, a%b means a modulo b, and a^b means the exclusive OR of a and b.

7. The method according to any one of claims 1 to 5, characterized in that By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word Bit mapping is obtained; in, represents the lth PAM4 symbol component of the I-path component in the X polarization direction among the n×L / 8 DP-16QAM symbols, represents the lth PAM4 symbol component of the Q path component in the X polarization direction among the n×L / 8 DP-16QAM symbols, represents the lth PAM4 symbol component of the I-path component in the Y polarization direction among the n×L / 8 DP-16QAM symbols, represents the lth PAM4 symbol component of the Q-path component in the Y polarization direction among the n×L / 8 DP-16QAM symbols, 8. The method according to any one of claims 1 to 7, characterized in that The number of information bits in the codeword is k=119, n=133, 135 or 137.

9. The method according to any one of claims 1 to 8, characterized in that The first FEC coding adopts staircase (512, 510) coding.

10. The method according to any one of claims 1 to 9, characterized in that The first data stream is bit-filled after being encoded by the first FEC, wherein the number of filled bits is greater than or equal to 1.

11. The method according to any one of claims 1 to 10, characterized in that The first data stream is also subjected to convolution interleaving after being encoded by the first FEC.

12. The method according to any one of claims 1 to 11, characterized in that Before acquiring the first data stream encoded by the first FEC, the method further includes: Performing data distribution on the input data stream to obtain 4 distribution data streams, wherein every 4 consecutive bits in the input data stream are distributed to the 4 distribution data streams respectively; The first FEC encoding is performed on each of the distribution data streams.

13. A data mapping device, characterized in that: The data mapping device comprises: an acquisition unit, an encoding unit and an interleaving mapping unit; The acquisition unit is used to: acquire a first data stream that has been encoded by a first forward error correction (FEC); The encoding unit is used to: perform second FEC encoding on the first data stream to obtain a second data stream, the second data stream includes L code words encoded by the second FEC, L is an integer multiple of 8, each of the code words includes n bits, and n is an odd number greater than 1; The interleaving and mapping unit is used to: interleave and map the L codewords to obtain n×L / 8 dual-polarization DP-16QAM symbols, wherein any one of the I component in the X polarization direction, the Q component in the X polarization direction, the I component in the Y polarization direction, and the Q component in the Y polarization direction of each DP-16QAM symbol is obtained by mapping 2 bits in the L codewords, and each DP-16QAM is obtained by mapping 8 bits from 8 of the codewords respectively.

14. The data mapping device according to claim 13, characterized in that: The L code words include L / 2 first-category code words and L / 2 second-category code words, each of which has bits are mapped to the high-order bits MSB of the four polarization components in the n×L / 8 DP-16QAM symbols, and each of the first codewords bits are mapped to the low-order bits LSB of the four polarization components in the n×L / 8 DP-16QAM symbols, and each of the second-category codewords bits are mapped to the MSBs of the four polarization components in the n×L / 8 DP-16QAM symbols, and each of the second type of codewords bits are mapped to the LSBs of the 4 polarization components in the n×L / 8 DP-16QAM symbols, where: Indicates rounding down. Indicates rounding up.

15. The data mapping device according to claim 13 or 14, characterized in that: The number of bits from any codeword among the 2×n×L / 8 bits included in any polarization component of the n×L / 8 DP-16QAM symbols is w, 16. The data mapping device according to any one of claims 13 to 15, characterized in that: The number of bits of each codeword mapped to any polarization component in the n×L / 8 DP-16QAM symbols is r, 17. The data mapping device according to any one of claims 13 to 16, characterized in that: Each consecutive L / 8 DP-16QAM symbols in the n×L / 8 DP-16QAM symbols are mapped by L bits respectively from the L codewords.

18. The data mapping device according to any one of claims 13 to 17, characterized in that: By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word Bit mapping is obtained; in, represents the lth pulse amplitude modulation PAM4 symbol component of the I-path component in the X polarization direction among the n×L / 8 DP-16QAM symbols, represents the lth PAM4 symbol component of the Q path component in the X polarization direction among the n×L / 8 DP-16QAM symbols, represents the lth PAM4 symbol component of the I-path component in the Y polarization direction among the n×L / 8 DP-16QAM symbols, represents the lth PAM4 symbol component of the Q-path component in the Y polarization direction among the n×L / 8 DP-16QAM symbols, a%b means a modulo b, and a^b means the exclusive OR of a and b.

19. The data mapping device according to any one of claims 13 to 17, characterized in that: By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word The bit mapping is obtained. By The code word bits and The code word Bit mapping is obtained; in, represents the lth PAM4 symbol component of the I-path component in the X polarization direction among the n×L / 8 DP-16QAM symbols, represents the lth PAM4 symbol component of the Q path component in the X polarization direction among the n×L / 8 DP-16QAM symbols, represents the lth PAM4 symbol component of the I-path component in the Y polarization direction among the n×L / 8 DP-16QAM symbols, represents the lth PAM4 symbol component of the Q-path component in the Y polarization direction among the n×L / 8 DP-16QAM symbols, 20. The data mapping device according to any one of claims 13 to 19, characterized in that: The number of information bits in the codeword is k=119, n=133, 135 or 137.

21. The data mapping device according to any one of claims 13 to 20, characterized in that: The first FEC coding adopts staircase (512, 510) coding.

22. The data mapping device according to any one of claims 13 to 21, characterized in that: The first data stream is bit-filled after being encoded by the first FEC, wherein the number of filled bits is greater than or equal to 1.

23. The data mapping device according to any one of claims 13 to 22, characterized in that: The first data stream is also subjected to convolution interleaving after being encoded by the first FEC.

24. The data mapping device according to any one of claims 13 to 23, characterized in that: The data mapping device further includes a processing unit, which is used to: Performing data distribution on the input data stream to obtain 4 distribution data streams, wherein every 4 consecutive bits in the input data stream are distributed to the 4 distribution data streams respectively; The first FEC encoding is performed on each of the distribution data streams.

25. A chip, characterized in that: The chip includes a processor and a memory, wherein the memory and the processor are connected to each other via a line, instructions are stored in the memory, and the processor is used to execute the method according to any one of claims 1 to 12.

Images