Image data processing method of chip, chip and vehicle

Abstract

The invention discloses an image data processing method of a chip, the chip and a vehicle, the method is applied to the chip, the chip comprises a plurality of hardware sets, the first hardware set comprises a first display control unit and a first display processing unit, and the second hardware set comprises a second display control unit and a second display processing unit. The method comprises the following steps: in response to a first cross-system data transmission instruction, controlling a first display processing unit through a first operating system of a first hardware set, and sending first image data to a second display control unit; performing fusion processing on the first image data and second image data sent by other image layer supply ends in a second hardware set through a second display control unit to obtain corresponding first target data; and putting the first target data to a display unit corresponding to the second data processing system for display. According to the method, the release effect of the image data of the chip is improved.

Description

Technical Field

[0001] The present application relates to the fields of chip design, manufacturing and application, and in particular to a chip image data processing method, a chip and a vehicle. Background Art

[0002] Chips used in various scenarios are often used to process image data. For example, when a chip used in a vehicle is in use, cross-system data transmission of images is often implemented inside the chip, that is, the image data is transferred from a data processing system inside the chip to another data processing system inside the chip. The data processing system is a series of hardware with a connection relationship. However, when performing cross-system data transmission of images, the transmission effect is poor due to the large amount of data transmitted and the high requirements for the software and hardware of data transmission. Although some current technical solutions use chip inter-core communication to transmit image data across systems, this method still relies on cross-domain communication. Once an abnormality occurs in the communication, related functions will also have problems. In addition, the shared memory solution used for inter-core communication may also involve complex memory management issues between the two systems, resulting in poor image data processing effects. Summary of the invention

[0003] The purpose of the embodiment of the present application is to provide a chip image data processing method, a chip and a vehicle. The method realizes efficient and accurate transmission and delivery of image data across data processing systems in the chip, and improves the delivery effect of the chip image data.

[0004] To achieve this purpose, an embodiment of the present application provides an image data processing method for a chip, which is applied to a chip, wherein the chip includes multiple hardware sets, wherein a first hardware set includes a first display control unit and a first display processing unit, and a second hardware set includes a second display control unit and a second display processing unit. The first display control unit, the second display processing unit, and other layer supply ends connected to the first display control unit form a first data processing system of the chip, and the second display control unit, the first display processing unit, and other layer supply ends connected to the second display control unit form a second data processing system of the chip. The method includes:

[0005] In response to a first cross-system data transfer instruction, controlling the first display processing unit through a first operating system of the first hardware set to send the first image data to the second display control unit, wherein the first cross-system data transfer instruction is an instruction to instruct image data transfer from the first data processing system to the second data processing system;

[0006] By means of the second display control unit, the first image data and the second image data sent by other layer supply terminals in the second hardware set are fused to obtain corresponding first target data;

[0007] The first target data is delivered to a display unit corresponding to the second data processing system for display through the second operating system of the second hardware assembly.

[0008] Optionally, the method further comprises:

[0009] In the case where the first data processing system pre-projects a screen to a display unit corresponding to the second data processing system, generating the first cross-system data transfer instruction based on the screen projection operation;

[0010] Based on the first cross-system data transfer instruction, the first display processing unit is determined from a plurality of hardware in the first hardware set.

[0011] Optionally, the method further comprises:

[0012] In response to a second cross-system data transfer instruction, controlling the second display processing unit through the second operating system to send the third image data to the first display control unit, wherein the second cross-system data transfer instruction is an instruction to instruct image data transfer from the second data processing system to the first data processing system;

[0013] By means of the first display control unit, the third image data and the fourth image data sent by other layer supply terminals in the first hardware set are fused to obtain corresponding second target data;

[0014] The second target data is delivered to a display unit corresponding to the first data processing system for display through the first operating system of the first hardware assembly.

[0015] Optionally, before sending the first image data to the second display control unit, the method further includes:

[0016] Acquire a plurality of first layers of the chip through the first display processing unit;

[0017] Based on the identification information of the first layer, stacking and sorting the plurality of the first layers;

[0018] The first layers after stacking and sorting are layer-fused to form the first image data.

[0019] Optionally, the first image data and the second image data sent by other layer supply terminals in the second hardware set are fused by the second display control unit to obtain corresponding first target data, including:

[0020] converting the first image data into a second layer of the second display control unit;

[0021] Based on the identification information of the plurality of second layers acquired by the second display control unit, the plurality of second layers are stacked and sorted;

[0022] The second layer after stacking and sorting is layer-fused, and the data after layer fusion is subjected to a time series generation operation to form the first target data.

[0023] Optionally, the first hardware set further includes other display processing units, and the other display processing units are located in other data processing systems. The method further includes:

[0024] In response to other cross-system data transfer instructions, the other display processing unit is controlled through the operating system corresponding to the other data processing system to send other image data to the display control unit corresponding to the other data processing system.

[0025] The present application embodiment provides a chip, including:

[0026] A first hardware set, including a first display control unit and a first display processing unit;

[0027] The second hardware set includes a second display control unit and a second display processing unit, wherein the first display control unit, the second display processing unit and other layer supply ends connected to the first display control unit form a first data processing system of the chip, and the second display control unit, the first display processing unit and other layer supply ends connected to the second display control unit form a second data processing system of the chip; wherein,

[0028] The first hardware set has a first operating system, and the first operating system is configured to: in response to a first cross-system data transfer instruction, control the first display processing unit to send the first image data to the second display control unit, wherein the first cross-system data transfer instruction is an instruction to instruct image data transfer from the first data processing system to the second data processing system;

[0029] The second display control unit is configured to: fuse the first image data with the second image data sent by other layer supply terminals in the second hardware set to obtain corresponding first target data;

[0030] The second hardware set has a second operating system, and the second operating system is configured to: deliver the first target data to a display unit corresponding to the second data processing system for display.

[0031] Optionally, the first hardware set is configured as follows:

[0032] In the case where the first data processing system pre-projects a screen to a display unit corresponding to the second data processing system, generating the first cross-system data transfer instruction based on the screen projection operation;

[0033] Based on the first cross-system data transfer instruction, the first display processing unit is determined from a plurality of layer supply ends of the first hardware set.

[0034] Optionally, the second hardware set is configured as follows:

[0035] In response to a second cross-system data transfer instruction, controlling the second display processing unit through the second operating system to send the third image data to the first display control unit, wherein the second cross-system data transfer instruction is an instruction to instruct image data transfer from the second data processing system to the first data processing system;

[0036] Correspondingly, the first display control unit is configured to: fuse the third image data with the fourth image data sent by other layer supply terminals in the first hardware set to obtain corresponding second target data;

[0037] The first operating system is configured to: deliver the second target data to a display unit corresponding to the first data processing system for display.

[0038] An embodiment of the present application also provides a vehicle equipped with the chip as described above, wherein the chip is capable of performing cross-system data transmission of images.

[0039] The image data processing method of the chip in the embodiment of the present application realizes efficient and accurate transmission and delivery of image data across data processing systems on the chip through the overlapping configuration of hardware in the chip's hardware set and hardware in the chip's data processing system, and improves the transmission and delivery effects of image data. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 A flowchart of the image data processing method of the chip according to an embodiment of the present application;

[0041] Figure 2 A flowchart of a first embodiment of the image data processing method of the present application embodiment;

[0042] Figure 3 This is a flowchart of a second embodiment of the image data processing method of the embodiment of the present application;

[0043] Figure 4 This is a flowchart of a third embodiment of the image data processing method of the present application;

[0044] Figure 5 For the embodiments of this application Figure 1 A flowchart of an embodiment of step S200;

[0045] Figure 6 A schematic diagram of the structural relationship between a display processing unit and a display control unit in a chip according to an embodiment of the present application;

[0046] Figure 7 A schematic diagram of the structure of a display processing unit in a chip according to an embodiment of the present application;

[0047] Figure 8 It is a schematic diagram of the structure of the display control unit in the chip of the embodiment of the present application.

[0048] Description of Reference Numerals

[0049] 10-first data processing system; 20-second data processing system DETAILED DESCRIPTION

[0050] Various aspects and features of the present application are described herein with reference to the accompanying drawings.

[0051] It should be understood that various modifications may be made to the embodiments of the present application. Therefore, the above description should not be considered as limiting, but only as an example of the embodiments. Other modifications within the scope and spirit of the present application will occur to those skilled in the art.

[0052] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the present application and, together with the general description of the present application given above and the detailed description of the embodiments given below, serve to explain the principles of the present application.

[0053] These and other characteristics of the present application will become apparent from the following description of a preferred form of embodiment given as a non-limiting example with reference to the accompanying drawings.

[0054] It should also be understood that although the present application has been described with reference to some specific examples, those skilled in the art will be able to readily implement many other equivalent forms of the present application.

[0055] The above and other aspects, features and advantages of the present application will become more apparent in view of the following detailed description when taken in conjunction with the accompanying drawings.

[0056] Specific embodiments of the present application are described hereinafter with reference to the accompanying drawings; however, it should be understood that the embodiments applied for are merely examples of the present application, which may be implemented in a variety of ways. Well-known and / or repeated functions and structures are not described in detail to avoid unnecessary or redundant details that obscure the present application. Therefore, the specific structural and functional details applied for herein are not intended to be limiting, but merely serve as a basis and representative basis for the claims to teach those skilled in the art to use the present application in a variety of ways with substantially any suitable detailed structure.

[0057] This specification may use the phrases "in one embodiment," "in another embodiment," "in yet another embodiment," or "in other embodiments," all of which may refer to one or more of the same or different embodiments according to the present application.

[0058] The image data processing method of a chip in an embodiment of the present application is applied to a chip, wherein the chip includes multiple hardware sets, wherein the first hardware set includes a first display control unit (DC1) and a first display processing unit (DP4), and the second hardware set includes a second display control unit (DC2) and a second display processing unit (DP2). Figure 6 As shown, the first display control unit (DC1), the second display processing unit (DP2) and other layer supply terminals (DP1) connected to the first display control unit (DC1) form the first data processing system 10 of the chip. The second display control unit (DC2), the first display processing unit (DP4) and other layer supply terminals (DP3) connected to the second display control unit (DC2) form the second data processing system 20 of the chip.

[0059] Specifically, the chip includes multiple hardware sets, and each hardware set can have its own operating system, such as the first hardware set has a first operating system, and the second hardware set has a second operating system. The first operating system and the second operating system can both deploy the hardware in their respective hardware sets to perform convenient and efficient operations. The first hardware set includes a first display control unit (DC1) and a first display processing unit (DP4). The first display processing unit (DP4) can obtain image layers from multiple layer supply ends, and fuse the obtained multiple layers and send them to the second display control unit (DC2) connected to it, while the second display control unit (DC2) is also connected to other layer supply ends (DP3), so that the image obtained from the first display processing unit (DP4) can be used as a layer and further fused with other obtained layers.

[0060] Specifically, in this embodiment, although the first display control unit (DC1) and the second display processing unit (DP2) are respectively in two different first hardware sets and second hardware sets, the first display control unit (DC1), the second display processing unit (DP2) and other layer supply ends (DP1) connected to the first display control unit (DC1) form a first data processing system of the chip. The components in the first data processing system 10 can be physically connected. Specifically, the second display processing unit (DP2) is connected to the first display control unit (DC1) and is a layer supply end of the first display control unit (DC1). The first display control unit (DC1) also has other layer supply ends (DP1), and the other layer supply ends (DP1) are also connected to the first display control unit (DC1). Therefore, the second display processing unit (DP2) and other layer supply ends (DP1) can send data to the first display control unit (DC1) efficiently and accurately through physical channels.

[0061] Similarly, the second display control unit (DC2), the first display processing unit (DP4) and other layer supply terminals (DP3) connected to the second display control unit (DC2) form the second data processing system 20 of the chip. The components in the second data processing system 20 can be physically connected. Specifically, the first display processing unit (DP4) is connected to the second display control unit (DC2) and is a layer supply terminal of the second display control unit (DC2). The second display control unit (DC2) also has other layer supply terminals (DP3), and the other layer supply terminals (DP3) are also connected to the second display control unit (DC2). Therefore, the first display processing unit (DP4) and other layer supply terminals (DP3) can send data to the first display control unit (DC1) efficiently and accurately through physical channels.

[0062] The following describes in detail the image data processing method of the chip based on the above structure of the chip and the accompanying drawings. Figure 1 Flow chart of the image data processing method of the chip in the embodiment of the present application, as shown in Figure 1 Shown and combined Figure 6 , the method comprises the following steps:

[0063] S100, in response to a first cross-system data transfer instruction, controlling the first display processing unit through the first operating system of the first hardware set, and sending the first image data to the second display control unit, wherein the first cross-system data transfer instruction is an instruction to transfer image data from the first data processing system 10 to the second data processing system 20.

[0064] Exemplarily, the cross-system data transfer instruction is an instruction to instruct image data to be transferred from one data processing system to another data processing system. The first cross-system data transfer instruction is an instruction to instruct image data to be transferred from the first data processing system 10 to the second data processing system 20. For example, if the image data of the first data processing system 10 needs to be delivered to the display unit (Display2) corresponding to the second data processing system 20 for display, the chip can generate a first cross-system data transfer instruction, and the first hardware set responds to the first cross-system data transfer instruction. It is determined that the hardware belonging to the first hardware set and in the second data processing system 20 is the first display processing unit (DP4). Furthermore, through the first operating system of the first hardware set, the first display processing unit (DP4) is controlled to send the first image data to the second display control unit (DC2).

[0065] In one embodiment, since the display unit (Display2) corresponding to the second data processing system 20 is connected to the second display control unit (DC2) in the second hardware set, the second operating system of the second hardware set can cooperate with the first operating system of the first hardware set to obtain the first image data sent by the first display processing unit (DP4) and send the first image data to the second display control unit (DC2).

[0066] S200: fusing the first image data with the second image data sent by other layer supply terminals in the second hardware set through the second display control unit to obtain corresponding first target data.

[0067] Exemplarily, the second display control unit (DC2) has multiple layer supply terminals including the first display processing unit (DP4), and the multiple layer supply terminals are physically connected to the second display control unit (DC2). The second display control unit (DC2) receives the first image data sent by the first display processing unit (DP4), and also receives at least one second image data sent by other layer supply terminals (DP3). The second display control unit (DC2) can use all the received image data as corresponding layers and perform fusion processing on the layers. For example, the layers are fused by the fusion device Alpha Blending to form the first target data, and the first target data can be image data that can be displayed.

[0068] S300: Through the second operating system of the second hardware assembly, the first target data is delivered to the display unit corresponding to the second data processing system 20 for display.

[0069] Exemplarily, the second display control unit (DC2) belongs to the second hardware set, and the second hardware set has a second operating system, and the second operating system can efficiently and conveniently operate the hardware in the second hardware set. In this embodiment, the second display control unit (DC2) can be controlled by the second operating system to display the formed first target data on the display unit (Display2) corresponding to the second data processing system 20. The display unit (Display2) is physically connected to the second display control unit (DC2), so the second display control unit (DC2) can be quickly delivered through the control of the second operating system. In this way, the first data processing system 10 is able to transfer image data to the second data processing system 20.

[0070] The image data processing method of the chip in the embodiment of the present application realizes efficient and accurate transmission and delivery of image data across data processing systems by overlapping the hardware in the chip's hardware set with the hardware in the chip's data processing system, thereby improving the image data transmission and delivery effects of the chip.

[0071] In one embodiment of the present application, Figure 2 As shown, the method further comprises the following steps:

[0072] S400, in a case where the first data processing system 10 performs a screen projection operation on a display unit corresponding to the second data processing system 20, the first cross-system data transfer instruction is generated based on the screen projection operation.

[0073] For example, if the first data processing system 10 performs a screen projection operation on the display unit (Display2) corresponding to the second data processing system 20, the chip will determine the source and projection destination of the corresponding image data based on the screen projection operation, that is, determine that the projection destination is the display unit (Display2) corresponding to the second data processing system 20. The chip will generate a first cross-system data transfer instruction.

[0074] S500: Determine the first display processing unit from a plurality of hardware in the first hardware set based on the first cross-system data transfer instruction.

[0075] Exemplarily, the first hardware set includes multiple hardware, among which the first display processing unit (DP4, DisplayProcessor4) is in the second data processing system 20, so that the chip can determine the identity of the second data processing system 20 and the hardware it contains based on the first cross-system data transfer instruction, and then determine that the first display processing unit (DP4, Display Processor4) belonging to the second data processing system 20 is the party that transmits the first image data, and then transmits the first image data to the second display control unit (DC2, Display Contoller2) through the first display processing unit.

[0076] In one embodiment of the present application, Figure 3 As shown, the method further comprises the following steps:

[0077] S600, in response to a second cross-system data transfer instruction, controlling the second display processing unit through the second operating system to send the third image data to the first display control unit, wherein the second cross-system data transfer instruction is an instruction to transfer image data from the second data processing system 20 to the first data processing system 10.

[0078] Exemplarily, similar to the above embodiment, the second data processing system 20 of the chip can also transfer image data to the first data processing system 10. The second cross-system data transfer instruction is an instruction to instruct the transfer of image data from the second data processing system 20 to the first data processing system 10. For example, if the image data of the second data processing system 20 needs to be placed on the display unit (Display1) corresponding to the first data processing system 10 for display, the chip can generate a second cross-system data transfer instruction, and the second hardware set responds to the second cross-system data transfer instruction. It is determined that the hardware belonging to the second hardware set and in the first data processing system 10 is the second display processing unit (DP2). Furthermore, through the second operating system (OS2) of the second hardware set, the second display processing unit (DP2) is controlled to send the third image data to the first display control unit (DC1, Display Contoller1).

[0079] In one embodiment, since the display unit (Display1) corresponding to the first data processing system 10 is connected to the first control unit in the first hardware set, the first operating system (OS1) of the first hardware set can cooperate with the second operating system (OS2) of the second hardware set to obtain the third image data sent by the second display processing unit (DP2) and send the third image data to the first display control unit (DC1).

[0080] S700: Through the first display control unit, the third image data and the fourth image data sent by other layer supply terminals in the first hardware set are merged to obtain corresponding second target data.

[0081] Exemplarily, the first display control unit (DC1) has multiple layer supply ends including a second display processing unit (DP2), and the multiple layer supply ends are physically connected to the first display control unit (DC1). The first display control unit (DC1) receives the third image data sent by the second display processing unit (DP2), and also receives at least one fourth image data sent by other layer supply ends (such as DP1). The first display control unit (DC1) can use all the received image data as corresponding layers and perform fusion processing on the layers. For example, the layers are fused through an Alpha Blending device to form second target data, and the second target data can be image data that can be displayed.

[0082] S800: Through the first operating system of the first hardware assembly, the second target data is delivered to the display unit corresponding to the first data processing system 10 for display.

[0083] Exemplarily, the first display control unit (DC1) belongs to the first hardware set, and the first hardware set has a first operating system (OS1), and the first operating system (OS1) can efficiently and conveniently operate the hardware in the first hardware set. In this embodiment, the first display control unit (DC1) can be controlled by the first operating system (OS1) to display the formed second target data on the display unit (Display1) corresponding to the first data processing system 10. The display unit (Display1) is physically connected to the first display control unit (DC1), so through the control of the first operating system (OS1), the first display control unit (DC1) can quickly realize the delivery. In this way, the second data processing system 20 is able to transfer image data to the first data processing system 10.

[0084] In one embodiment of the present application, before sending the first image data to the second display control unit, Figure 4 Shown and combined Figure 7 , the method further comprises the following steps:

[0085] S10: Acquire a plurality of first layers of the chip through the first display processing unit.

[0086] Exemplarily, the chip may send multiple layer data as respective first layers to the first display processing unit, and each first layer has identification information for identifying the properties of the corresponding first layer and the relative positional relationship between the first layers.

[0087] S20: Based on the identification information of the first layers, stack and sort the plurality of the first layers.

[0088] Exemplarily, the relative position relationship between the first layers can be determined based on the identification information of the first layers, that is, the stacking order between the first layers is clarified, so that the multiple first layers can be stacked and sorted. For example, the identification information of the first layers is Layer1, Layer2..., LayerN, Background. Therefore, based on the above identification information, all the first layers are stacked and sorted.

[0089] S30, performing layer fusion on the first layers after stacking and sorting to form the first image data.

[0090] For example, the first layers can be stacked and sorted by a stacker z-order, and then the layers are blended by an alpha blending device to form a complete first image data, and then the first image data is sent to the second display control unit.

[0091] In one embodiment of the present application, the first image data and the second image data sent by other layer supply terminals in the second hardware set are fused by the second display control unit to obtain corresponding first target data, such as Figure 5 Shown and combined Figure 8 , including the following steps:

[0092] S210: Convert the first image data into a second layer of the second display control unit.

[0093] Exemplarily, the second display control unit has multiple layer supply ends. After receiving the first image data, the second display control unit can convert it into the corresponding second layer. In addition, the second display control unit will also receive image data sent by other layer supply ends and also convert each image data into the corresponding second layer.

[0094] S220: Based on the identification information of the plurality of second layers acquired by the second display control unit, stack and sort the plurality of second layers.

[0095] Exemplarily, each second layer has identification information for identifying the attributes of the corresponding second layer and the relative position relationship between the second layers. The second display control unit determines the stacking order between the second layers based on the identification information of each second layer, and then stacks and sorts each second layer.

[0096] S230, performing layer fusion on the second layer after stacking and sorting, and performing a time series generation operation on the data after the layer fusion to form the first target data.

[0097] For example, the second layers can be stacked and sorted by stacker z-order, and then fused by alpha blending to form a complete second image data. Then, the timing controller (TimingController, TCON) is used to perform timing generation operation on the second image data to form the first target data, and then the first target data is sent to the display unit (Display2) corresponding to the second data processing system 20 for screen projection operation.

[0098] In one embodiment of the present application, the first hardware set further includes other display processing units, and the other display processing units are located in other data processing systems, and the method further includes:

[0099] In response to other cross-system data transfer instructions, the other display processing unit is controlled through the operating system corresponding to the other data processing system to send other image data to the display control unit corresponding to the other data processing system.

[0100] Exemplarily, in addition to the first data processing system 10 and the second data processing system 20, other data processing systems are also provided in the chip. If the first data processing system 10 needs to send other image data to other data processing systems of the chip across systems for screen projection operations, corresponding other cross-system data transfer instructions can be generated based on the screen projection operations. In response to other cross-system data transfer instructions, the chip controls other display processing units in other data processing systems through the operating systems corresponding to the other data processing systems, and sends other image data to the display control units corresponding to the other data processing systems. Thereby, the first data processing system 10 is enabled to perform cross-system image projection to other data processing systems of the chip.

[0101] The present application also provides a chip, such as Figure 6 As shown, including:

[0102] A first hardware set, including a first display control unit and a first display processing unit;

[0103] The second hardware set includes a second display control unit and a second display processing unit, wherein the first display control unit, the second display processing unit and other layer supply ends connected to the first display control unit form a first data processing system 10 of the chip, and the second display control unit, the first display processing unit and other layer supply ends connected to the second display control unit form a second data processing system 20 of the chip; wherein,

[0104] The first hardware set has a first operating system, and the first operating system is configured to: in response to a first cross-system data transfer instruction, control the first display processing unit to send the first image data to the second display control unit, wherein the first cross-system data transfer instruction is an instruction to instruct image data to be transferred from the first data processing system 10 to the second data processing system 20;

[0105] The second display control unit is configured to: fuse the first image data with the second image data sent by other layer supply terminals in the second hardware set to obtain corresponding first target data;

[0106] The second hardware set has a second operating system, and the second operating system is configured to: deliver the first target data to a display unit corresponding to the second data processing system 20 for display.

[0107] Exemplarily, the cross-system data transfer instruction is an instruction to instruct image data to be transferred from one data processing system to another data processing system. The first cross-system data transfer instruction is an instruction to instruct image data to be transferred from the first data processing system 10 to the second data processing system 20. For example, if the image data of the first data processing system 10 needs to be delivered to the display unit corresponding to the second data processing system 20 for display, the chip can generate a first cross-system data transfer instruction, and the first operating system responds to the first cross-system data transfer instruction to determine that the hardware belonging to the first hardware set and in the second data processing system 20 is the first display processing unit. Furthermore, through the first operating system of the first hardware set, the first display processing unit is controlled to send the first image data to the second display control unit.

[0108] In one embodiment, since the display unit corresponding to the second data processing system 20 is connected to the second display control unit in the second hardware set, the second operating system of the second hardware set can cooperate with the first operating system of the first hardware set to obtain the first image data sent by the first display processing unit and send the first image data to the second display control unit.

[0109] The second display control unit has multiple layer supply ends including the first display processing unit, and the multiple layer supply ends are physically connected to the second display control unit respectively. The second display control unit receives the first image data sent by the first display processing unit, and also receives at least one second image data sent by other layer supply ends. The second display control unit can use all the received image data as corresponding layers and perform fusion processing on the layers. For example, the layers are stacked and mixed to form the first target data, and the first target data can be image data that can be displayed.

[0110] The second display control unit belongs to the second hardware set, and the second hardware set has a second operating system, and the second operating system can efficiently and conveniently operate the hardware in the second hardware set. In this embodiment, the second operating system can display the formed first target data on the display unit corresponding to the second data processing system 20 by manipulating the second display control unit. The display unit is physically connected to the second display control unit, so the second display control unit can quickly realize the delivery through the control of the second operating system. Thereby realizing the transmission of image data from the first data processing system 10 to the second data processing system 20.

[0111] In one embodiment of the present application, the first hardware set is configured as follows:

[0112] In the case where the first data processing system 10 pre-projects a screen to a display unit corresponding to the second data processing system 20, generating the first cross-system data transfer instruction based on the screen projection operation;

[0113] Based on the first cross-system data transfer instruction, the first display processing unit is determined from a plurality of layer supply ends of the first hardware set.

[0114] For example, if the first data processing system 10 performs a screen projection operation on the display unit (Display2) corresponding to the second data processing system 20, the first hardware set will determine the source and projection destination of the corresponding image data based on the screen projection operation, that is, determine that the projection destination is the display unit (Display2) corresponding to the second data processing system 20. And a first cross-system data transfer instruction will be generated.

[0115] The first hardware set includes multiple hardware, among which the first display processing unit (DP4, Display Processor4) is in the second data processing system 20. The first hardware set can determine the identity of the second data processing system 20 and the hardware it contains based on the first cross-system data transfer instruction, and then determine that the first display processing unit (DP4, Display Processor4) belonging to the second data processing system 20 is the party that transmits the first image data, and then transmits the first image data to the second display control unit (DC2, Display Contoller2) through the first display processing unit.

[0116] In one embodiment of the present application, the second hardware set is configured as follows:

[0117] In response to a second cross-system data transfer instruction, controlling the second display processing unit through the second operating system to send the third image data to the first display control unit, wherein the second cross-system data transfer instruction is an instruction to instruct image data transfer from the second data processing system 20 to the first data processing system 10;

[0118] Exemplarily, similar to the above embodiment, the second data processing system 20 of the chip can also transfer image data to the first data processing system 10. The second cross-system data transfer instruction is an instruction to instruct the transfer of image data from the second data processing system 20 to the first data processing system 10. For example, if the image data of the second data processing system 20 needs to be delivered to the display unit corresponding to the first data processing system 10 for display, the chip can generate a second cross-system data transfer instruction, and the second hardware set responds to the second cross-system data transfer instruction. It is determined that the hardware belonging to the second hardware set and in the first data processing system 10 is the second display processing unit (DP2). Furthermore, through the second operating system (OS2) of the second hardware set, the second display processing unit (DP2) is controlled to send the third image data to the first display control unit (DC1, Display Contoller1).

[0119] In one embodiment, since the display unit corresponding to the first data processing system 10 is connected to the first control unit in the first hardware set, the first operating system (OS1) of the first hardware set can cooperate with the second operating system (OS2) of the second hardware set to obtain the third image data sent by the second display processing unit (DP2) and send the third image data to the first display control unit (DC1).

[0120] Correspondingly, the first display control unit is configured to: fuse the third image data with the fourth image data sent by other layer supply terminals in the first hardware set to obtain corresponding second target data;

[0121] The first operating system is configured to: deliver the second target data to a display unit corresponding to the first data processing system 10 for display.

[0122] Exemplarily, the first display control unit (DC1) has multiple layer supply terminals including the second display processing unit (DP2), and the multiple layer supply terminals are physically connected to the first display control unit (DC1). The first display control unit (DC1) receives the third image data sent by the second display processing unit (DP2), and also receives at least one fourth image data sent by other layer supply terminals. The first display control unit (DC1) can use all the received image data as corresponding layers and perform fusion processing on the layers. For example, the layers are stacked and mixed to form second target data, and the second target data can be image data that can be displayed.

[0123] The first display control unit (DC1) belongs to the first hardware set, and the first hardware set has a first operating system (OS1). The first operating system (OS1) can efficiently and conveniently operate the hardware in the first hardware set. In this embodiment, the first operating system (OS1) can display the formed second target data on the display unit (Display1) corresponding to the first data processing system 10 by manipulating the first display control unit (DC1). The display unit (Display1) is physically connected to the first display control unit (DC1), so that the first display control unit (DC1) can quickly realize the delivery through the control of the first operating system (OS1). In this way, the second data processing system 20 is able to transfer image data to the first data processing system 10.

[0124] An embodiment of the present application also provides a vehicle equipped with the chip as described above, wherein the chip is capable of transmitting image data within the chip across a data processing system within the chip.

[0125] An embodiment of the present application further provides an electronic device, as shown in the figure, comprising a processor and a memory, wherein the memory stores an executable program, and the memory executes the executable program to perform the steps of the method described above.

[0126] An embodiment of the present application further provides a storage medium, wherein the storage medium carries one or more computer programs, and when the one or more computer programs are executed by a processor, the steps of the method described above are implemented.

[0127] It should be understood that in the embodiments of the present application, the processor may be a central processing unit (CPU), and the processor may also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc.

[0128] It should also be understood that the memory mentioned in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM) and direct memory bus random access memory (Direct Rambus RAM, DR RAM).

[0129] It should be noted that when the processor is a general-purpose processor, DSP, ASIC, FPGA or other programmable logic device, discrete gate or transistor logic device, discrete hardware component, the memory (storage module) is integrated in the processor.

[0130] It should be noted that the memory described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0131] It should also be understood that the first, second, third, fourth and various numerical numbers involved in this document are only distinctions made for the convenience of description and are not intended to limit the scope of the present application.

[0132] It should be understood that the term "and / or" in this article is only a description of the association relationship of the associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0133] In the implementation process, each step of the above method can be completed by an integrated logic circuit of hardware in a processor or an instruction in the form of software. The steps of the method disclosed in conjunction with the embodiment of the present application can be directly embodied as a hardware processor for execution, or a combination of hardware and software modules in a processor for execution. The software module can be located in a storage medium mature in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in a memory, and the processor reads the information in the memory and completes the steps of the above method in conjunction with its hardware. To avoid repetition, it is not described in detail here.

[0134] In various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0135] Those skilled in the art will appreciate that the various illustrative logical blocks (ILBs) and steps described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or in a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0136] In the several embodiments provided in the present application, it should be understood that the disclosed methods and chips can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0137] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0138] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0139] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integration. The available medium can be a magnetic medium, (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state hard disk), etc.

[0140] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A chip image data processing method, characterized in that: Applied to a chip, the chip includes multiple hardware sets, wherein the first hardware set includes a first display control unit and a first display processing unit, the second hardware set includes a second display control unit and a second display processing unit, the first display control unit, the second display processing unit and other layer supply ends connected to the first display control unit form a first data processing system of the chip, the second display control unit, the first display processing unit and other layer supply ends connected to the second display control unit form a second data processing system of the chip, and the method includes: In response to a first cross-system data transfer instruction, controlling the first display processing unit through a first operating system of the first hardware set to send the first image data to the second display control unit, wherein the first cross-system data transfer instruction is an instruction to instruct image data transfer from the first data processing system to the second data processing system; By means of the second display control unit, the first image data and the second image data sent by other layer supply terminals in the second hardware set are fused to obtain corresponding first target data; The first target data is delivered to a display unit corresponding to the second data processing system for display through the second operating system of the second hardware assembly.

2. The chip image data processing method according to claim 1, characterized in that: The method further comprises: In the case where the first data processing system pre-projects a screen to a display unit corresponding to the second data processing system, generating the first cross-system data transfer instruction based on the screen projection operation; Based on the first cross-system data transfer instruction, the first display processing unit is determined from a plurality of hardware in the first hardware set.

3. The chip image data processing method according to claim 1, characterized in that: The method further comprises: In response to a second cross-system data transfer instruction, controlling the second display processing unit through the second operating system to send the third image data to the first display control unit, wherein the second cross-system data transfer instruction is an instruction to instruct image data transfer from the second data processing system to the first data processing system; By means of the first display control unit, the third image data and the fourth image data sent by other layer supply terminals in the first hardware set are fused to obtain corresponding second target data; The second target data is delivered to a display unit corresponding to the first data processing system for display through the first operating system of the first hardware assembly.

4. The chip image data processing method according to claim 1, characterized in that: Before sending the first image data to the second display control unit, the method further includes: Acquire a plurality of first layers of the chip through the first display processing unit; Based on the identification information of the first layer, stacking and sorting the plurality of the first layers; The first layers after stacking and sorting are layer-fused to form the first image data.

5. The chip image data processing method according to claim 1, characterized in that: The step of fusing the first image data with the second image data sent by other layer supply terminals in the second hardware set to obtain corresponding first target data includes: converting the first image data into a second layer of the second display control unit; Based on the identification information of the plurality of second layers acquired by the second display control unit, the plurality of second layers are stacked and sorted; The second layer after stacking and sorting is layer-fused, and the data after layer fusion is subjected to a time series generation operation to form the first target data.

6. The chip image data processing method according to claim 1, characterized in that: The first hardware set further includes other display processing units, and the other display processing units are located in other data processing systems. The method further includes: In response to other cross-system data transfer instructions, the other display processing unit is controlled through the operating system corresponding to the other data processing system to send other image data to the display control unit corresponding to the other data processing system.

7. A chip, characterized in that: include: A first hardware set, including a first display control unit and a first display processing unit; The second hardware set includes a second display control unit and a second display processing unit, wherein the first display control unit, the second display processing unit and other layer supply ends connected to the first display control unit form a first data processing system of the chip, and the second display control unit, the first display processing unit and other layer supply ends connected to the second display control unit form a second data processing system of the chip; wherein, The first hardware set has a first operating system, and the first operating system is configured to: in response to a first cross-system data transfer instruction, control the first display processing unit to send the first image data to the second display control unit, wherein the first cross-system data transfer instruction is an instruction to instruct image data transfer from the first data processing system to the second data processing system; The second display control unit is configured to: fuse the first image data with the second image data sent by other layer supply terminals in the second hardware set to obtain corresponding first target data; The second hardware set has a second operating system, and the second operating system is configured to: deliver the first target data to a display unit corresponding to the second data processing system for display.

8. The chip according to claim 7, characterized in that: The first hardware set is configured as follows: In the case where the first data processing system pre-projects a screen to a display unit corresponding to the second data processing system, generating the first cross-system data transfer instruction based on the screen projection operation; Based on the first cross-system data transfer instruction, the first display processing unit is determined from a plurality of layer supply terminals of the first hardware set.

9. The chip according to claim 7, characterized in that: The second hardware set is configured as follows: In response to a second cross-system data transfer instruction, controlling the second display processing unit through the second operating system to send the third image data to the first display control unit, wherein the second cross-system data transfer instruction is an instruction to instruct image data transfer from the second data processing system to the first data processing system; Correspondingly, the first display control unit is configured to: fuse the third image data with the fourth image data sent by other layer supply terminals in the first hardware set to obtain corresponding second target data; The first operating system is configured to: deliver the second target data to a display unit corresponding to the first data processing system for display.

10. A vehicle, characterized in that: The chip as claimed in claim 7 is installed, and the chip can perform cross-system data transmission of images.

Images