Methods, systems, apparatus, and articles of manufacture for monitoring heat exchangers and associated reservoirs

Abstract

Methods, systems, apparatus, and articles of manufacture for monitoring heat exchangers and associated reservoirs are disclosed. An example apparatus includes programmable circuitry to: detect a coolant level of a first reservoir based on an output of a sensor associated with the first reservoir, the first reservoir removably coupled to a second reservoir, the first reservoir to supply coolant to the second reservoir; predicting a characteristic associated with operation of a cooling device fluidly coupled to the second reservoir based on the coolant level; and causing an output to be presented at the user device based on the predicted characteristic.

Description

Technical Field

[0001] The present disclosure relates generally to liquid cooling systems for electronic components and, more particularly, to methods, systems, apparatus, and articles of manufacture for monitoring the manufacture of heat exchangers and associated reservoirs. Background Art

[0002] Due to the increasing need to address thermal management risks caused by increased thermal design power in high-performance systems (e.g., CPU and / or GPU servers in data centers, cloud computing, edge computing, etc.), the use of liquids to cool electronic components is being explored to gain greater benefits than traditional air cooling systems. More specifically, liquids have inherent advantages of higher specific heat (when boiling is not involved) and higher latent heat of vaporization (when boiling is involved) relative to air. BRIEF DESCRIPTION OF THE DRAWINGS

[0003] Figure 1 The diagrams illustrate one or more example environments in which the teachings of the present disclosure may be implemented.

[0004] Figure 2 The diagram illustrates at least one example of a data center for executing workloads utilizing disaggregated resources.

[0005] Figure 3 The diagram may be included in Figure 2 At least one example of a pod in a data center.

[0006] Figure 4 can be included in Figure 3 A perspective view of at least one example of a rack in a bay.

[0007] Figure 5 yes Figure 4 Side elevation of the rack.

[0008] Figure 6 yes Figure 4 A perspective view of a rack with a skid installed therein.

[0009] Figure 7 yes Figure 6 A block diagram of at least one example of a top side of a sled.

[0010] Figure 8 yes Figure 7 A block diagram of at least one example of a bottom side of a sled.

[0011] Fig. 9 It is available for Figure 2 A block diagram of at least one example of a computing sled for a data center.

[0012] Fig.10 yes Fig. 9 A top perspective view of at least one example of a computing sled.

[0013] Fig.11 It is available for Figure 2 A block diagram of at least one example of an accelerator sled for a data center.

[0014] Fig.12 yes Fig.11 A top perspective view of at least one example of an accelerator sled.

[0015] Fig.13 It is available for Figure 2 A block diagram of at least one example of a storage skid for a data center.

[0016] Fig.14 yes Fig.13 A top perspective view of at least one example of a storage skid.

[0017] Fig.15 It is available for Figure 2 A block diagram of at least one example of a storage skid for a data center.

[0018] Fig.16 Yes, you can Figure 2 A block diagram of a system established within a data center for executing workloads using managed nodes with disaggregated resources.

[0019] Fig.17 An example environment including example reservoir monitoring circuitry and example system monitoring circuitry for monitoring an example heat exchanger and an associated example reservoir is illustrated in accordance with the teachings of the present disclosure.

[0020] Fig.18A The diagram shows Fig.17 Detailed view of an example repository in the example repository.

[0021] Fig.18B yes Fig.18A A front view of an example coolant monitoring device.

[0022] Fig.19 The diagram shows that Fig.17 An example reservoir implemented together with an example heat exchanger.

[0023] Fig. 20 Figure 1 shows the implementation of the Fig.19 An example heat exchanger and an example reservoir.

[0024] Fig.21 yes Fig.17 A block diagram of an example implementation of an example storage monitoring circuit system.

[0025] Fig. 22 yes Fig.17 A block diagram of an example implementation of an example system monitoring circuit system.

[0026] Fig.23 The figure shows that Fig. 22 A first example diagram of example system monitoring circuitry generating and / or outputting.

[0027] Fig.24 The figure shows that Fig. 22 A second example graph of example system monitoring circuitry generated and / or output.

[0028] Fig.25 The figure shows that Fig. 22 A first example table of example system monitoring circuitry generated and / or output.

[0029] Fig.26 The figure shows that Fig. 22 A second example table of example system monitoring circuitry generated and / or output.

[0030] Fig.27A is a schematic illustration of a first example liquid cooling system of an example data center environment in which the examples disclosed herein may be implemented.

[0031] Fig.27B A second example liquid cooling system of an example data center environment is illustrated in which the examples disclosed herein may be implemented.

[0032] Fig.28A An example immersion tank is shown in which examples disclosed herein may be implemented.

[0033] Fig.28B The diagram shows Fig.28A Another example of an immersion tank.

[0034] Fig.29 It is a representation that can be performed, instantiated, and / or implemented by an example programmable circuit system to implement Fig.21 Example machine readable instructions and / or a flowchart of example operations of storage monitoring circuit systems.

[0035] Fig.30 It is a representation that can be performed, instantiated, and / or implemented by an example programmable circuit system to implement Fig. 22 Example machine readable instructions and / or a flow chart of example operations of system monitoring circuitry.

[0036] Fig.31 is a representation that can be executed, instantiated, and / or performed by a programmable circuit system to train and / or retrain Fig. 22A flowchart of example machine-readable instructions and / or example operations of one or more example machine learning models utilized by a system monitoring circuit system.

[0037] Fig.32 is comprised of being configured to execute, instantiate, and / or perform Fig.29 Example machine readable instructions and / or implementations Fig.29 Example operation to achieve Fig.21 Block diagram of an example processing platform for programmable circuitry of a storage monitoring circuit system.

[0038] Fig.33 is comprised of being configured to execute, instantiate, and / or perform Fig.30 and / or Fig.31 Example machine readable instructions and / or implementations Fig.30 and / or Fig.31 Example operation to achieve Fig. 22 Block diagram of an example processing platform for programmable circuitry of a system monitoring circuitry.

[0039] Fig.34 yes Fig.32 and / or Fig.33 A block diagram of an example implementation of a programmable circuit system.

[0040] Fig.35 yes Fig.32 and / or Fig.33 A block diagram of another example implementation of a programmable circuit system.

[0041] Fig.36 is a block diagram of an example software / firmware / instruction distribution platform (e.g., one or more servers) for distributing software, instructions and / or firmware (e.g., Fig.29 , Fig.30 and / or Fig.31 The invention relates to software, instructions, and / or firmware corresponding to example machine-readable instructions of the present invention that are distributed to client devices associated with end users and / or consumers (e.g., for licensing, sale, and / or use), retailers (e.g., for sale, resale, licensing, and / or sublicensing), and / or original equipment manufacturers (OEMs) (e.g., for inclusion in products to be distributed to, for example, retailers and / or other end users such as direct purchasing customers).

[0042] In general, throughout the (one or more) drawings and the attached written description, the same reference numerals will be used to refer to the same or similar parts. The drawings are not necessarily drawn to scale. Alternatively, the thickness of the layer or region may be exaggerated in the drawings. Although the drawings show layers and regions with clear lines and boundaries, some or all of these lines and / or boundaries may be idealized. In practice, boundaries and / or lines may be unobservable, mixed, and / or irregular.

[0043] As used in this patent, reciting that any component (e.g., a layer, film, portion, region, or plate) is in any way on (e.g., positioned on, located on, disposed on, or formed on, etc.) another component indicates that the referenced component is in contact with the other component, or that the referenced component is above the other component and one or more intermediate components are positioned between the referenced component and the other component.

[0044] As used herein, unless otherwise indicated, connection references (e.g., attached, coupled, connected, and joined) may include intermediate members between elements referenced by the connection reference and / or relative movement between those elements. Thus, connection references do not necessarily imply that two elements are directly connected and / or are in a fixed relationship to each other. As used herein, stating that any component is "in contact" with another component is defined to mean that there are no intermediate components between the two components.

[0045] Unless otherwise specifically stated, descriptors such as "first," "second," "third," and the like are used herein without in any way imposing or otherwise indicating any meaning of priority, physical order, arrangement in a list, and / or ordering in any manner, but are used merely as labels and / or arbitrary names to distinguish elements for ease of understanding of the disclosed examples. In some examples, the descriptor "first" may be used to refer to an element in a specific embodiment, while a different descriptor such as "second" or "third" may be used in the claims to refer to the same element. In such instances, it should be understood that such descriptors are used only to distinctively identify those elements in the context of this discussion (e.g., in the claims), which otherwise might, for example, share the same name in the context of this discussion.

[0046] As used herein, "approximately" and "about" modify their subject matter / values ​​to recognize the potential for variations that occur in real-world applications. For example, "approximately" and "about" may modify dimensions that may not be exact due to manufacturing tolerances and / or other real-world imperfections as would be understood by one of ordinary skill in the art. For example, "approximately" and "about" may indicate that such dimensions may be within a tolerance range of + / - 10%, unless otherwise specified in the following description.

[0047] As used herein, the phrase "communicate" (including variations thereof) encompasses direct communication and / or indirect communication through one or more intermediate components, and does not require direct physical (e.g., wired) communication and / or continuous communication, but additionally includes selective communication at periodic intervals, predetermined intervals, non-periodic intervals, and / or one-time events.

[0048] As used herein, "programmable circuitry" is defined as including (i) one or more special-purpose circuits (e.g., application specific circuits (ASICs)) that are configured to perform specific operation(s) and include one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors), and / or (ii) one or more general-purpose semiconductor-based circuits that can be programmed with instructions to perform specific function(s) and / or operation(s) and include one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors). Examples of programmable circuit systems include: a programmable microprocessor (such as a central processor unit (CPU)), which can execute a first instruction to perform one or more operations and / or functions; a field programmable gate array (FPGA), which can be programmed with a second instruction so that the configuration and / or construction of the FPGA instantiates one or more operations and / or functions corresponding to the first instruction; a graphics processor unit (GPU), which can execute a first instruction to perform one or more operations and / or functions; a digital signal processor (DSP), which can execute a first instruction to perform one or more operations and / or functions; an XPU; a network processing unit (NPU); one or more microcontrollers, which can execute a first instruction to perform one or more operations and / or functions; and / or an integrated circuit (such as an application specific integrated circuit (ASIC)). For example, the XPU may be implemented by a heterogeneous computing system that includes multiple types of programmable circuit systems (e.g., one or more FPGAs, one or more CPUs, one or more GPUs, one or more NPUs, one or more DSPs, etc., and / or any combination thereof) and orchestration technology (e.g., (one or more) application programming interfaces (APIs)), which may assign (one or more) computing tasks to any one (or several) of the multiple types of programmable circuit systems that are suitable and available for performing (one or more) computing tasks.

[0049] As used herein, an integrated circuit / circuitry is defined as one or more semiconductor packages containing one or more circuit elements, such as transistors, capacitors, inductors, resistors, current paths, diodes, etc. For example, an integrated circuit may be implemented as one or more of an ASIC, an FPGA, a chip, a microchip, a programmable circuit system, a semiconductor substrate coupling multiple circuit elements, a system on chip (SoC), etc. DETAILED DESCRIPTION

[0050] As described above, due to the increasing need to address the thermal management risks caused by the increase in thermal design power in high-performance systems (e.g., CPU and / or GPU servers in data centers, accelerators, artificial intelligence computing, machine learning computing, cloud computing, edge computing, etc.), the use of liquids to cool electronic components is being explored to obtain greater benefits than traditional air cooling systems. More specifically, relative to air, liquids have the inherent advantages of higher specific heat (when boiling is not involved) and higher latent heat of vaporization (when boiling is involved). In some instances, liquids can be used to indirectly cool electronic components by cooling a cold plate that is thermally coupled to (one or more) electronic components. An alternative approach is to immerse the electronic components directly in a cooling liquid. In direct immersion cooling, the liquid can be in direct contact with the electronic components to directly draw heat away from the electronic components. In order to enable the cooling liquid to be in direct contact with the electronic components, the cooling liquid is electrically insulating (e.g., a dielectric liquid).

[0051] Liquid cooling systems may involve at least one of single-phase cooling or two-phase cooling. As used herein, single-phase cooling (e.g., single-phase immersion cooling) means that a cooling fluid (sometimes also referred to herein as a cooling liquid or coolant) used to cool an electronic component removes heat from a heat source (e.g., an electronic component) without changing phase (e.g., without boiling and becoming steam). Such cooling fluids are referred to herein as single-phase cooling fluids, cooling liquids, or coolants. In contrast, as used herein, two-phase cooling (e.g., two-phase immersion cooling) means that a cooling fluid (in this case, a cooling liquid) vaporizes or boils from the heat generated by the electronic component to be cooled, thereby changing from a liquid phase to a gas phase. The gaseous vapor may then be condensed back to a liquid (e.g., via a condenser) to be used again in the cooling process. Such cooling fluids are referred to herein as two-phase cooling fluids, cooling liquids, or coolants. It is noteworthy that gases (e.g., air) may also be used to cool components, and therefore may also be referred to as cooling fluids and / or coolants. However, indirect cooling and immersion cooling typically involve at least one cooling liquid (which may or may not become a gas phase when used). Disclosed herein are example systems, apparatus, and associated methods for improving cooling systems and / or associated cooling processes.

[0052] In some environments (e.g., data centers), liquid assisted air cooling (LAAC) heat exchangers are used to dissipate heat from one or more electronic devices. In some cases, a reservoir (e.g., a coolant reservoir) is fluidly and / or operably coupled to a corresponding one of the heat exchangers to provide coolant thereto. In some such cases, evaporation of the coolant in the reservoir may occur due to a relatively large heat load and / or a relatively long cycle time of the heat exchanger. Additionally, loss of coolant may occur when a device (e.g., a cold plate) is connected to the heat exchanger and / or disconnected from the heat exchanger (e.g., via a quick disconnect fitting). Such evaporation and / or loss of coolant may result in pump failures and / or other anomalies associated with the heat exchanger, resulting in downtime in the operation of the heat exchanger to allow for repair and / or maintenance.

[0053] Typically, additional coolant is provided to the reservoir to reduce the risk of damage and / or failure of the heat exchanger due to low coolant levels. For example, additional coolant may be provided periodically by an operator and / or based on a visual inspection of the coolant level by the operator. However, given the variability of heat loads and resulting evaporation rates, it may be difficult for an operator to predict when the coolant level may drop below a threshold. As a result, low coolant levels are often not detected until after a pump failure and / or other hardware anomaly occurs, resulting in reactive maintenance to repair and / or replace one or more components of the heat exchanger.

[0054] The examples disclosed herein monitor and / or predict the performance of the example heat exchanger and the associated example storage. In the examples disclosed herein, a first example storage (e.g., a main storage) is fluidly coupled to a heat exchanger (e.g., a liquid cooling system, a LAAC heat exchanger, etc.), and a second example storage (e.g., a secondary storage) is fluidly and removably coupled to the main storage. In some examples, the first storage supplies a coolant (e.g., a fluid, a cooling fluid) to the heat exchanger for cooling one or more devices (e.g., a cold plate, a server rack, etc.), and the second storage supplies a coolant to the first storage over time based on monitoring and without operator intervention (e.g., periodically delivering fluid to initiate each delivery without user input). Thus, the examples disclosed herein maintain sufficient coolant levels at the heat exchanger to reduce the risk of pump failures and / or other hardware anomalies. Further, the examples disclosed herein enable the second storage to be refilled and / or replaced without stopping the operation of the heat exchanger, thereby reducing interruptions and / or downtime in the operation of the heat exchanger.

[0055] Additionally, examples disclosed herein implement an example monitoring system for monitoring and / or displaying a coolant level (e.g., fluid level) of a second reservoir. For example, one or more sensors may be operably coupled to the second reservoir to detect a coolant level. In some examples, based on a comparison of the detected coolant level with one or more coolant thresholds (e.g., fluid thresholds), the examples disclosed herein determine a state (e.g., condition) corresponding to the second reservoir. For example, the state may indicate whether the second reservoir is full, whether additional coolant should be provided in the second reservoir, and so on. In some examples, the sensor may indicate a coolant level from which a capacity (e.g., 75% of the reservoir capacity, 50% of the reservoir capacity, 25% of the reservoir capacity, and so on) may be derived, and the coolant threshold may be selected based on the size of the reservoir and / or the properties of one or more sensors. Some examples disclosed herein activate one or more indicators (e.g., light sources) based on the state. For example, when the second reservoir is full, the first light source may be activated, and when additional coolant should be provided in the second reservoir, the second light source (e.g., different from the first light source) may be activated. In some examples, the color of the activated light source(s) may indicate the status of the secondary reservoir (e.g., whether the coolant is to be refilled). In some examples, when the coolant level is low (e.g., below one or more thresholds), an alert is generated and / or presented to the user (e.g., via email, SMS, dashboard). In some such examples, the alert may include a location and / or identifier corresponding to the secondary reservoir and / or heat exchanger. Advantageously, by alerting the operator when the coolant level is low, the examples disclosed herein reduce the risk of damage due to insufficient coolant at the heat exchanger.

[0056] Further examples disclosed herein detect and / or predict one or more example anomalies associated with a heat exchanger and / or a coolant based on the execution of one or more example machine learning models. For example, the example programmable circuit system disclosed herein executes (one or more) machine learning models based on data associated with (one or more) heat exchangers and / or coolants (e.g., sensor data and / or user input information). In some examples, as a result of execution, the programmable circuit system outputs one or more example coolant anomalies (e.g., evaporation and / or overheating of the coolant, leakage of the coolant, reduced efficiency of the coolant, pressure drop of the coolant, etc.), one or more example hardware anomalies (e.g., pump failure, fan failure, airflow obstruction, fin damage, operating temperature exceeding a threshold, etc.), and / or service life (e.g., remaining useful life (RUL), remaining operating life) for the corresponding (one or more) heat exchangers detected and / or predicted. In some examples, the output of (one or more) machine learning models can be used to adjust one or more control parameters of the heat exchanger (e.g., fan speed, pump speed, coolant flow rate, etc.) to adjust its cooling performance.

[0057] Figure 1 The diagrams illustrate one or more example environments in which the teachings of the present disclosure may be implemented. Figure 1 The example environment(s) may include one or more central data centers 102. The central data centers 102 may store, for example, a large number of servers used by one or more organizations for data processing, storage, etc. Figure 1 As shown in FIG, the central data center(s) 102 include a plurality of immersion tank(s) 104 to facilitate cooling of servers and / or other electronic components stored at the central data center(s) 102. The immersion tank(s) 104 may provide single-phase cooling or two-phase cooling.

[0058] Figure 1 An example environment may be part of an edge computing system. For example, Figure 1An example environment may include an edge data center or micro data center 106. The edge data center(s) 106 may include, for example, a data center located at the base of a cellular tower. In some examples, the edge data center(s) 106 are located at or near the top of a cellular tower and / or other utility poles. The edge data center(s) 106 include corresponding housings that store server(s), wherein the server(s) may communicate with, for example, server(s) stored at the central data center(s) 102, client devices, and / or other computing devices in the edge network. An example housing of the edge data center(s) 106 may include a material forming one or more exterior surfaces that partially or completely protect the contents therein, wherein the protection may include weather protection, hazardous environment protection (e.g., EMI, vibration, extreme temperatures), and / or enable immersion in water. An example housing may include power circuitry for providing power for a fixed and / or portable implementation, such as an AC power input, a DC power input, (one or more) AC / DC or DC / AC converters, power regulators, transformers, charging circuitry, batteries, wired inputs, and / or wireless power inputs. As shown in FIG. Figure 1 As illustrated in , the edge data center(s) 106 may include immersion tank(s) 108 for storing server(s) and / or other electronic components(s) located at the edge data center(s) 106 .

[0059] Figure 1 Example environments (one or more) may include buildings 110 used for commercial and / or industrial purposes, which store information technology (IT) equipment in, for example, one or more rooms of the building (one or more) 110. For example, Figure 1 , the server(s) 112 may be stored with (e.g., in an opening of a slot of the rack 114) along with the server rack(s) 114 that support the server(s) 112. In some examples, the server(s) 112 located at the building 110 comprise an internal server(s) of an edge computing network, wherein the internal server(s) communicate with remote server(s) (e.g., server(s) at the edge data center(s) 106) and / or other computing device(s) within the edge network.

[0060] Figure 1The example environment(s) of illustrative embodiments include content delivery network (CDN) data center(s) 116. The example CDN data center(s) 116 include server(s) 118 that cache content, such as images, web pages, videos, etc., accessed via user devices. The server(s) 118 of the CDN data center 116 may be disposed in immersion cooling tank(s), such as the immersion tanks 104, 108 shown in relation to the data centers 102, 106.

[0061] In some instances, Figure 1 Example data centers 102, 106, 116, and / or building(s) 110 include servers and / or other electronic components that are cooled independently of immersion tanks (e.g., immersion tanks 104, 108) and / or associated immersion cooling systems. That is, in some examples, some or all of the servers and / or other electronic components in data centers 102, 106, 116, and / or building(s) 110 may be cooled by air and / or liquid coolant without immersing the servers and / or other electronic components therein. Thus, in some examples, Figure 1 The immersion tanks 104, 108 can be omitted. Further, Figure 1 The example data centers 102, 106, 116, and / or (one or more) buildings 110 may be combined with the following Figure 2-Figure 16 The example data center 200 described in further detail corresponds to, is implemented by, and / or is an adaptation of the example data center 200.

[0062] Although a certain number of cooling tanks and other components are shown, any number of such components may be present. In addition, the example cooling data centers and / or other structures or environments disclosed herein are not limited to Figure 1 For example, a structure containing the example cooling systems and / or components thereof disclosed herein may have an opening (such as a Figure 1 The size of the example data center(s) 106) may be sized to be smaller (e.g., a "doghouse" enclosure). For example, a structure containing the example cooling systems and / or components thereof disclosed herein may be sized such that the only access (e.g., access) to the interior of the structure is a port for service personnel to enter the structure. In some examples, a structure containing the example cooling systems and / or components thereof disclosed herein is sized such that only tools can enter the enclosure because the structure may be supported by, for example, a utility pole or radio tower, or a larger structure.

[0063] In addition to or as an alternative to the immersion tanks 104, 108, Figure 1 Any of the example environments may utilize one or more liquid cooling systems with cold plates to control the temperature of electronic devices / components in the example environments. Figure 17-28B Example liquid cooling systems and example cold plates are disclosed in further detail.

[0064] Figure 2 An example data center 200 is shown in which decomposed resources can collaboratively execute one or more workloads (e.g., applications on behalf of customers). The illustrated data center 200 includes multiple platforms 210, 220, 230, 240 (referred to herein as cabins), each of which includes one or more rack rows. Although the data center 200 is shown as having multiple cabins, in some examples, the data center 200 can be implemented as a single cabin. As described in more detail herein, a rack can accommodate multiple sleds. The sled can be primarily equipped with specific types of resources (e.g., memory devices, data storage devices, accelerator devices, general programmable circuit systems), that is, resources that can be logically coupled to form a combined node. Some such nodes can act as servers, for example. In an illustrative example, the sleds in cabins 210, 220, 230, 240 are connected to multiple cabin switches (e.g., switches that route data communications to the sleds in the cabin and from the sleds in the cabin). The pod switches are in turn connected to the spine switches 250, which switch communications between pods (e.g., pods 210, 220, 230, 240) in the data center 200. In some examples, the sleds can use Intel Omni-Path TM Technology and structure connection. In other examples, the sled can be connected to other structures, such as InfiniBand or Ethernet. As described in more detail herein, the resources within the sled in the data center 200 can be assigned to a group (referred to herein as a "managed node"), which contains resources from one or more sleds that are used to be jointly utilized in the execution of the workload. The workload can be executed as if the resources belonging to the managed nodes are located on the same sled. The resources in the managed nodes can belong to sleds belonging to different racks, and even belong to different cabins 210, 220, 230, 240. Thus, some resources of a single sled can be assigned to a managed node, while other resources of the same sled are assigned to different managed nodes (for example, a first programmable circuit system is assigned to a managed node, and a second programmable circuit system of the same sled is assigned to different managed nodes).

[0065] Data centers including disaggregated resources, such as data center 200, can be used in a variety of scenarios, such as enterprises, governments, cloud service providers, and communications service providers (e.g., telephone companies), and in a variety of sizes ranging from cloud service provider mega data centers consuming over 200,000 square feet to single or multi-rack installations for use in base stations.

[0066] In some examples, the decomposition of resources is achieved by using various sleds that mainly include a single type of resource (e.g., a computing sled that mainly includes computing resources, a memory sled that mainly includes memory resources). In this way, the decomposition of resources, and the selective allocation and deallocation of resources for forming the decomposition of managed nodes assigned to perform workloads improve the operation and resource use of the data center 200 relative to a typical data center. Such a typical data center includes a hyper-converged server, which contains computing, memory, storage, and possible additional resources in a single chassis. For example, since a given sled will mainly contain resources of the same specific type, the resources of this type can be upgraded independently of other resources. Additionally, since different resource types (programmable circuit systems, storage, accelerators, etc.) generally have different refresh rates, greater resource utilization and reduced total cost of ownership can be achieved. For example, a data center operator can upgrade the programmable circuit system that runs through the facility only by swapping out the computing sled. In such cases, accelerators and storage resources may not be upgraded simultaneously, but may be allowed to continue to operate until those resources are scheduled to perform their own refreshes. Resource utilization may also be increased. For example, if managed nodes are composed based on the requirements of the workloads that will run on them, there is a higher probability that the resources within the nodes will be fully utilized. Such utilization can allow more managed nodes to be run in a data center with a given set of resources, or allow a data center that is expected to run a given set of workloads to be built using fewer resources.

[0067] Reference now Figure 3In the illustrated example, the pod 210 includes a collection of rows 300, 310, 320, 330 of racks 340. Each of the racks 340 can accommodate a plurality of sleds (e.g., sixteen sleds) and provide power and data connections to the accommodated sleds, as described in more detail herein. In the illustrated example, the racks are connected to a plurality of pod switches 350, 360. The pod switch 350 includes a collection 352 of ports to which the sleds of the racks of the pod 210 are connected, and another collection 354 of ports that connect the pod 210 to the spine switch 250 to provide connectivity to other pods in the data center 200. Similarly, the pod switch 360 includes a collection 362 of ports to which the sleds of the racks of the pod 210 are connected, and a collection 364 of ports that connect the pod 210 to the spine switch 250. Thus, a certain amount of redundancy is provided to the pod 210 using a pair of switches 350, 360. For example, if any one of the switches 350, 360 fails, the sleds in the bay 210 can still maintain data communications with the rest of the data center 200 (e.g., sleds in other bays) through the other switch 350, 360. Furthermore, in the illustrative example, the switches 250, 350, 360 can be implemented as dual-mode optical switches capable of routing both Ethernet protocol communications carrying Internet Protocol (IP) packets and communications according to a second high-performance link layer protocol (e.g., PCI Express) via the optical signaling medium of the optical fabric.

[0068] It should be appreciated that any of the other bays 220, 230, 240 (as well as any additional bays of the data center 200) may be similarly configured to be Figure 3 Shown in and about Figure 3 The disclosed pod 210 may be configured to have similar components to the pod 210 (e.g., a given pod may have rows of racks that house multiple sleds as described above). Additionally, although two pod switches 350, 360 are shown, it should be understood that in other examples, a different number of pod switches may be present, thereby providing even more failover capabilities. In other examples, the pod switches may be configured to have similar components to the pod 210 (e.g., a given pod may have rows of racks that house multiple sleds as described above). Additionally, although two pod switches 350, 360 are shown, it should be understood that in other examples, a different number of pod switches may be present, thereby providing even more failover capabilities. Figure 2 and Figure 3 The rack row configuration shown in arranging the pods differently. For example, a pod may include a plurality of rack sets arranged radially, ie, the racks are equidistant from the central switch.

[0069] Figure 4-Figure 6 The figure shows an example rack 340 of the data center 200. As shown in the illustrated example, the rack 340 includes two elongated support columns 402, 404 arranged vertically. For example, when deployed, the elongated support columns 402, 404 can extend upward from the floor of the data center 200. The rack 340 also includes one or more horizontal pairs 410 of elongated support arms 412 (in Figure 4 404 ), which is configured to support a skid of the data center 200, as discussed below. One of a pair of elongated support arms 412 extends outwardly from the elongated support column 402, and the other elongated support arm 412 extends outwardly from the elongated support column 404.

[0070] In the illustrative example, at least some of the sleds of the data center 200 are chassisless sleds. That is, such sleds have a chassisless circuit board substrate on which physical resources (e.g., programmable circuit systems, memory, accelerators, storage devices, etc.) are mounted, as discussed in more detail below. Thus, the rack 340 is configured to receive a chassisless sled. For example, a given pair 410 of elongated support arms 412 defines a sled slot 420 of the rack 340 that is configured to receive a corresponding chassisless sled. To this end, the elongated support arm 412 includes a corresponding circuit board guide 430 that is configured to receive the chassisless circuit board substrate of the sled. The circuit board guide 430 is fixed to, or otherwise mounted to, the top side 432 of the corresponding elongated support arm 412. For example, in the illustrative example, the circuit board guide 430 is mounted at the distal end of the corresponding elongated support arm 412 relative to the corresponding elongated support column 402, 404. In order Figure 4-Figure 6 For clarity, not every circuit board guide 430 may be referenced in every figure. In some examples, at least some of the sleds include a chassis, and the rack 340 is adapted to receive the chassis.

[0071] The circuit board guide 430 includes inner walls defining a circuit board slot 480 that is configured to receive the chassis-less circuit board substrate of the sled 500 when the sled 500 is received in the corresponding sled slot 420 of the chassis 340. To this end, as in Figure 5 As shown in , a user (or robot) aligns the chassisless circuit board substrate of the illustrative chassisless sled 500 with the sled slot 420. The user or robot can then slide the chassisless circuit board substrate forward into the sled slot 420 so that each side edge 514 of the chassisless circuit board substrate is received in a corresponding circuit board slot 480 of the circuit board guides 430 of the pair 410 of elongated support arms 412 defining the corresponding sled slot 420, as shown in FIG. Figure 5. By having a robot-accessible and robot-operable sled including decomposed resources, different types of resources can be upgraded independently of each other and at their own optimized refresh rates. In addition, the sled is configured to blindly match power and data communication cables in the rack 340, thereby enhancing their ability to be quickly removed, upgraded, reinstalled and / or replaced. Thus, in some examples, the data center 200 can operate on the data center floor (e.g., perform workloads, perform maintenance and / or upgrades, etc.) without human involvement. In other examples, humans can facilitate one or more maintenance or upgrade operations in the data center 200.

[0072] It should be appreciated that the circuit board guide 430 is double-sided. That is, the circuit board guide 430 includes inner walls that define a circuit board slot 480 on each side of the circuit board guide 430. In this manner, the circuit board guide 430 can support a chassis-less circuit board substrate on either side. Thus, a single additional elongated support column can be added to the rack 340 to turn the rack 340 into a two-rack solution that can accommodate twice as many Figure 4. The illustrative rack 340 includes seven pairs 410 of elongated support arms 412 that define seven corresponding sled slots 420. The sled slots 420 are configured to receive and support corresponding sleds 500 as discussed above. In other examples, the rack 340 may include additional or fewer pairs 410 of elongated support arms 412 (i.e., additional or fewer sled slots 420). It should be appreciated that because the sled 500 is chassis-less, the sled 500 may have an overall height that is different from that of a typical server. Thus, in some examples, the height of a given sled slot 420 may be shorter than the height of a typical server (e.g., shorter than a single rank unit, referred to as "1U"). That is, the vertical distance between the pairs 410 of elongated support arms 412 may be less than a standard rack unit "1U". Additionally, due to the relatively reduced height of the sled slot 420, in some examples, the overall height of the rack 340 may be shorter than the height of a conventional rack housing. For example, in some examples, the elongated support columns 402, 404 may have a length of six feet or less. Likewise, in other examples, the bracket 340 may have different sizes. For example, in some examples, the vertical distance between the pairs 410 of the elongated support arms 412 may be greater than a standard rack unit "1U". In such examples, the increased vertical distance between the sleds allows a larger heat sink to be attached to the physical resource, and allows a larger fan to be used (e.g., in the fan array 470 described below) to cool the sled, which in turn allows the physical resource to operate at an increased power level. Further, it should be appreciated that the rack 340 does not include any walls, housings, etc. Instead, the rack 340 is a housingless rack open to the local environment. In some cases, in those instances where the racks 340 form row end racks in the data center 200 , an end plate may be attached to one of the elongated support columns 402 , 404 .

[0073] In some examples, various interconnects may be routed upward or downward through the elongated support columns 402, 404. To facilitate such routing, the elongated support columns 402, 404 include inner walls that define an interior chamber in which the interconnects may be located. The interconnects routed through the elongated support columns 402, 404 may be implemented as any type of interconnect, including, but not limited to, data or communication interconnects for providing a communication connection to the sled slot 420, power interconnects for providing power to the sled slot 420, and / or other types of interconnects.

[0074] In the illustrative example, the rack 340 includes a support platform on which a corresponding optical data connector (not shown) is mounted. Such an optical data connector is associated with a corresponding sled slot 420 and is configured to mate with an optical data connector of a corresponding sled 500 when the sled 500 is received in the corresponding sled slot 420. In some examples, the optical connection between components (e.g., sleds, racks, and switches) in the data center 200 is achieved by blind-mate optical connection. For example, a door on a given cable can prevent dust from contaminating the optical fiber within the cable. During the connection to the blind-mate optical connector mechanism, when the end of the cable approaches or enters the connector mechanism, the door is pushed open. Subsequently, the optical fiber inside the cable can enter the gel inside the connector mechanism, and the optical fiber of one cable is able to contact the optical fiber of another cable in the gel inside the connector mechanism.

[0075] The illustrative rack 340 also includes a fan array 470 coupled to the cross support arms of the rack 340. The fan array 470 includes one or more rows of cooling fans 472 aligned in a horizontal line between the elongated support columns 402, 404. In the illustrative example, the fan array 470 includes a row of cooling fans 472 for different sled slots 420 of the rack 340. As discussed above, in the illustrative example, the sled 500 does not include any onboard cooling system, and thus, the fan array 470 provides cooling for such sleds 500 received in the rack 340. In other examples, some or all of the sleds 500 may include an onboard cooling system. Further, in some examples, the sled 500 and / or the rack 340 may include and / or incorporate a liquid and / or immersion cooling system to facilitate cooling of (one or more) electronic components on the sled 500. In the illustrative example, the rack 340 also includes different power supplies associated with different ones of the sled slots 420. A given power supply is fixed to one of a pair 410 of elongated support arms 412 defining a corresponding sled slot 420. For example, the rack 340 may include a power supply coupled or fixed to each of the elongated support arms 412 extending from the elongated support column 402. The given power supply includes a power connector configured to mate with a power connector of the sled 500 when the sled 500 is received in the corresponding sled slot 420. In the illustrative example, the sled 500 does not include any onboard power supply, and thus, when mounted to the rack 340, the power supply provided in the rack 340 supplies power to the corresponding sled 500. A given power supply is configured to meet the power requirements of the sled with which it is associated, and the power requirements of different sleds may be different. Additionally, the power supplies provided in the rack 340 may operate independently of each other. That is, within a single rack, a first power supply that provides power to a computing sled may provide a power level different from a power level supplied by a second power supply that provides power to an accelerator sled. The power supply may be controllable at the sled level or the rack level and may be controlled locally by components on the associated sled or remotely such as by another sled or an orchestrator.

[0076] Reference now Figure 7 In the illustrative example, as discussed above, the sled 500 is configured to be installed in a corresponding rack 340 of the data center 200. In some examples, a given sled 500 may be optimized or otherwise configured to perform a specific task (such as a computing task, an acceleration task, a data storage task, etc.). For example, the sled 500 may be implemented as described below with respect to Fig. 9 and Fig.10 The computing sled 900 discussed below with respect to Fig.11 and Fig.12 The accelerator sled 1100 discussed below Fig.13 and Fig.14 The storage sled 1300 discussed above may be implemented as a sled optimized or otherwise configured to perform other specialized tasks (such as described below with respect to Fig.15 The memory sled 1500 discussed).

[0077] As discussed above, the illustrative sled 500 includes a chassisless circuit board substrate 702 that supports various physical resources (e.g., electrical components) mounted thereon. It should be appreciated that the circuit board substrate 702 is "chassisless" in that the sled 500 does not include a housing or enclosure. Instead, the chassisless circuit board substrate 702 is open to the local environment. The chassisless circuit board substrate 702 can be formed of any material capable of supporting the various electrical components mounted thereon. For example, in the illustrative example, the chassisless circuit board substrate 702 is formed of a FR-4 glass reinforced epoxy laminate. In other examples, other materials can be used to form the chassisless circuit board substrate 702.

[0078] As discussed in more detail below, the chassisless circuit board substrate 702 includes a number of features that improve thermal cooling characteristics of various electrical components mounted on the chassisless circuit board substrate 702. As discussed, the chassisless circuit board substrate 702 does not include a housing or enclosure, which can improve airflow over the electrical components of the sled 500 by reducing those structures that may impede airflow. For example, because the chassisless circuit board substrate 702 is not positioned in a separate housing or enclosure, there is no vertically arranged backplane (e.g., the backplane of a chassis) attached to the chassisless circuit board substrate 702 that can impede airflow across the electrical components. Additionally, the chassisless circuit board substrate 702 has a geometry that is configured to reduce the length of the airflow path across the electrical components mounted to the chassisless circuit board substrate 702. For example, the illustrative chassisless circuit board substrate 702 has a width 704 that is greater than a depth 706 of the chassisless circuit board substrate 702. In one specific example, the chassis-less circuit board substrate 702 has a width of about 21 inches and a depth of about 9 inches, compared to a typical server having a width of about 17 inches and a depth of about 39 inches. Thus, the airflow path 708 extending from the front edge 710 toward the rear edge 712 of the chassis-less circuit board substrate 702 has a shorter distance relative to a typical server, which can improve the thermal cooling characteristics of the sled 500. In addition, as discussed in more detail below, although not described herein, Figure 7, but in this example the various physical resources mounted to the chassisless circuit board substrate 702 are mounted in corresponding positions such that no two substantially heat generating electrical components are shadowed by each other. That is, two electrical components that do not generate significant heat during operation (i.e., greater than a nominal amount of heat sufficient to adversely affect the cooling of another electrical component) are mounted to the chassisless circuit board substrate 702 linearly aligned with each other along the direction of the airflow path 708 (i.e., in a direction extending from the front edge 710 toward the rear edge 712 of the chassisless circuit board substrate 702). When the electrical component(s) are cooled via a liquid (e.g., one-phase or two-phase cooling), the placement and / or structure of the features may be appropriately adjusted.

[0079] As discussed above, the illustrative sled 500 includes one or more physical resources 720 mounted to the top side 750 of the chassisless circuit board substrate 702. Figure 7 500, but it should be appreciated that in other examples, the sled 500 may include one, two, or more physical resources 720. The physical resources 720 may be implemented as any type of programmable circuitry, controller, or other computing circuitry capable of performing various tasks (such as computing functions) and / or controlling the functionality of the sled 500 depending on, for example, the type or intended functionality of the sled 500. For example, as discussed in more detail below, in examples where the sled 500 is implemented as a computing sled, the physical resources 720 may be implemented as high-performance processor circuitry; in examples where the sled 500 is implemented as an accelerator sled, the physical resources 720 may be implemented as accelerator coprocessor circuitry or circuitry; in examples where the sled 500 is implemented as a storage sled, the physical resources 720 may be implemented as a storage controller; or in examples where the sled 500 is implemented as a memory sled, the physical resources 720 may be implemented as a set of memory devices.

[0080] The sled 500 also includes one or more additional physical resources 730 mounted to the top side 750 of the chassisless circuit board substrate 702. In the illustrative example, as discussed in more detail below, the additional physical resources include a network interface controller (NIC). Depending on the type and function of the sled 500, in other examples, the physical resources 730 may include additional or other electrical components, circuits, and / or devices.

[0081] The physical resource 720 is communicatively coupled to the physical resource 730 via an input / output (I / O) subsystem 722. The I / O subsystem 722 can be implemented as circuitry and / or components for facilitating input / output operations of the physical resource 720, the physical resource 730, and / or other components of the sled 500. For example, the I / O subsystem 722 can be implemented as or otherwise include a memory controller hub, an input / output control hub, an integrated sensor hub, a firmware device, a communication link (e.g., a point-to-point link, a bus link, a line, a cable, a waveguide, an optical guide, a printed circuit board trace, etc.), and / or other components and subsystems for facilitating input / output operations. In an illustrative example, the I / O subsystem 722 is implemented as or otherwise includes a double data rate 4 (DDR4) data bus or a DDR5 data bus.

[0082] In some examples, the sled 500 may also include a resource-to-resource interconnect 724. The resource-to-resource interconnect 724 may be implemented as any type of communication interconnect capable of facilitating resource-to-resource communication. In an illustrative example, the resource-to-resource interconnect 724 is implemented as a high-speed point-to-point interconnect (e.g., faster than the I / O subsystem 722). For example, the resource-to-resource interconnect 724 may be implemented as a QuickPath Interconnect (QPI), an UltraPath Interconnect (UPI), or other high-speed point-to-point interconnect dedicated to resource-to-resource communication.

[0083] The sled 500 also includes a power connector 740 configured to mate with a corresponding power connector of the rack 340 when the sled 500 is installed in the corresponding rack 340. The sled 500 receives power from the power supply of the rack 340 via the power connector 740 to power the various electrical components of the sled 500. That is, the sled 500 does not include any local power source (i.e., on-board power supply) for providing power to the electrical components of the sled 500. Excluding a local or on-board power supply helps reduce the overall footprint of the chassisless circuit board substrate 702, which can increase thermal cooling characteristics of the various electrical components mounted on the chassisless circuit board substrate 702, as discussed above. In some examples, the voltage regulator is placed in a manner similar to the programmable circuit system 920 (see Fig. 9 ) directly opposite the bottom side 850 of the chassisless circuit board substrate 702 (see Figure 8) and routes power from the voltage regulator to the programmable circuitry 920 via vias extending through the circuit board substrate 702. Such a configuration provides an increased thermal budget, additional current and / or voltage, and better voltage control relative to a typical printed circuit board in which processor power is delivered from the voltage regulator in part through printed circuit traces.

[0084] In some examples, the sled 500 may also include mounting features 742 configured to interface with a mounting arm or other structure of the robot to facilitate placement of the sled 500 in the rack 340 by the robot. The mounting features 742 may be implemented as any type of physical structure that allows the robot to grip the sled 500 without damaging the chassisless circuit board substrate 702 or the electrical components mounted thereon. For example, in some examples, the mounting features 742 may be implemented as non-conductive pads attached to the chassisless circuit board substrate 702. In other examples, the mounting features may be implemented as brackets, straps, or other similar structures attached to the chassisless circuit board substrate 702. The specific number, shape, size, and / or composition of the mounting features 742 may depend on the design of the robot configured to manage the sled 500.

[0085] Reference now Figure 8 , in addition to the physical resources 730 mounted on the top side 750 of the chassisless circuit board substrate 702, the sled 500 also includes one or more memory devices 820 mounted to the bottom side 850 of the chassisless circuit board substrate 702. That is, the chassisless circuit board substrate 702 is implemented as a double-sided circuit board. The physical resources 720 are communicatively coupled to the memory devices 820 via the I / O subsystem 722. For example, the physical resources 720 and the memory devices 820 can be communicatively coupled by one or more vias extending through the chassisless circuit board substrate 702. In some examples, different ones of the physical resources 720 can be communicatively coupled to different sets of one or more memory devices 820. Alternatively, in other examples, different ones of the physical resources 720 can be communicatively coupled to the same ones of the memory devices 820.

[0086] The memory device 820 may be implemented as any type of memory device capable of storing data for the physical resource 720 during operation of the sled 500, such as any type of volatile memory (e.g., dynamic random access memory (DRAM), etc.) or non-volatile memory. Volatile memory may be a storage medium that requires power to maintain the state of the data stored by the medium. Non-limiting examples of volatile memory may include various types of random access memory (RAM), such as dynamic random access memory (DRAM) or static random access memory (SRAM). One specific type of DRAM that may be used in the memory module is synchronous dynamic random access memory (SDRAM). In a specific example, the DRAM of the memory component may conform to a standard promulgated by JEDEC, such as JESD79F for DDR SDRAM, JESD79-2F for DDR2 SDRAM, JESD79-3F for DDR3 SDRAM, JESD79-4A for DDR4 SDRAM, JESD209 for low power DDR (LPDDR), JESD209-2 for LPDDR2, JESD209-3 for LPDDR3, and JESD209-4 for LPDDR4. Such standards (and similar standards) may be referred to as DDR-based standards, and the communication interface of a storage device that implements such standards may be referred to as a DDR-based interface.

[0087] In one example, the memory device is a block addressable memory device, such as those based on NAND or NOR technology. The memory device may also include next generation non-volatile devices, such as Intel 3D XPoint TMmemory or other byte-addressable write-in-place nonvolatile memory devices. In one example, the memory device may be or may include a memory device using chalcogenide glass, a multi-threshold level NAND flash memory, a NOR flash memory, a single-level or multi-level phase change memory (PCM), a resistive memory, a nanowire memory, a ferroelectric transistor random access memory (FeTRAM), an antiferroelectric memory, a magnetoresistive random access memory (MRAM) including memristor technology, a resistive memory including a metal oxide substrate, an oxygen vacancy substrate and a conductive bridge random access memory (CB-RAM), or a spin transfer torque (STT)-MRAM, a device based on a spin electronic magnetic junction memory, a device based on a magnetic tunneling junction (MTJ), a device based on a DW (Domain Wall) and a SOT (Spin Orbit Transfer), a thyristor-based memory device, or a combination of any of the above or other memories. A memory device may refer to the die itself and / or to a packaged memory product. In some examples, a memory device may include a transistor-free stackable cross-point architecture where memory cells are located at the intersection of word lines and bit lines and are individually addressable and where bit storage is based on changes in bulk resistance.

[0088] Reference now Fig. 9 In some examples, the sled 500 may be implemented as a computing sled 900. The computing sled 900 is optimized or otherwise configured to perform computing tasks. As discussed above, the computing sled 900 may rely on other sleds (such as an acceleration sled and / or a storage sled) to perform such computing tasks. The computing sled 900 includes a processor similar to that described in the prior art. Fig. 9 The various physical resources (eg, electrical components) of the sled 500 are identified with the same reference numerals as described above. Figure 7 and Figure 8 The descriptions of such components provided are applicable to corresponding components of computing sled 900 and are not repeated herein for clarity of description of computing sled 900 .

[0089] In the illustrative computing sled 900, the physical resources 720 include programmable circuitry 920. Fig. 9 Only two blocks of programmable circuit system 920 are shown in FIG, but it should be appreciated that in other examples, computing sled 900 may include additional programmable circuit system 920. Illustratively, programmable circuit system 920 corresponds to high-performance processor circuit system 920 and may be configured to operate at a relatively high power rating. Although high-performance programmable circuit system 920 generates additional heat when operating at a higher power rating than typical processor circuit system (which operates at approximately 155-230W), the enhanced thermal cooling characteristics of chassis-free circuit board substrate 702 discussed above facilitate higher power operation. For example, in an illustrative example, programmable circuit system 920 is configured to operate at a power rating of at least 250W. In some examples, programmable circuit system 920 may be configured to operate at a power rating of at least 350W.

[0090] In some examples, computing sled 900 may also include programmable circuitry to programmable circuitry interconnect 942. Similar to resource to resource interconnect 724 of sled 500 discussed above, programmable circuitry to programmable circuitry interconnect 942 may be implemented as any type of communication interconnect capable of facilitating programmable circuitry to programmable circuitry interconnect 942 communication. In an illustrative example, programmable circuitry to programmable circuitry interconnect 942 is implemented as a high-speed point-to-point interconnect (e.g., faster than I / O subsystem 722). For example, programmable circuitry to programmable circuitry interconnect 942 may be implemented as a Quick Path Interconnect (QPI), an Ultra Path Interconnect (UPI), or other high-speed point-to-point interconnect dedicated for programmable circuitry to programmable circuitry communication.

[0091] The computing sled 900 also includes a communication circuit 930. The illustrative communication circuit 930 includes a network interface controller (NIC) 932, which may also be referred to as a host fabric interface (HFI). The NIC 932 may be implemented as or otherwise include any type of integrated circuit, discrete circuit, controller chip, chipset, plug-in board, daughter card, network interface card, or other device that can be used by the computing sled 900 to connect to another computing device (e.g., with other sleds 500). In some examples, the NIC 932 may be implemented as part of a system on a chip (SoC) that includes one or more processor circuits, or the NIC 932 may be included on a multi-chip package that also includes one or more processor circuits. In some examples, the NIC 932 may include a local processor circuit (not shown) and / or a local memory (not shown), both of which are located locally on the NIC 932. In such examples, the local processor circuit of the NIC 932 may be capable of performing one or more of the functions of the programmable circuit system 920. Additionally or alternatively, in such examples, the local memory of NIC 932 may be integrated into one or more components of the computing sled at the board level, socket level, chip level, and / or other level.

[0092] The communication circuit 930 is communicatively coupled to an optical data connector 934. The optical data connector 934 is configured to mate with a corresponding optical data connector of the rack 340 when the computing sled 900 is installed in the rack 340. Illustratively, the optical data connector 934 includes a plurality of optical fibers leading from a mating surface of the optical data connector 934 to an optical transceiver 936. The optical transceiver 936 is configured to convert incoming optical signals from the rack-side optical data connector into electrical signals, and to convert electrical signals into outgoing optical signals to the rack-side optical data connector. Although shown as forming part of the optical data connector 934 in the illustrative example, in other examples, the optical transceiver 936 may form part of the communication circuit 930.

[0093] In some examples, the computing sled 900 may also include an expansion connector 940. In such examples, the expansion connector 940 is configured to mate with a corresponding connector of an extended chassisless circuit board substrate to provide additional physical resources to the computing sled 900. The additional physical resources may be used, for example, by the programmable circuit system 920 during operation of the computing sled 900. The extended chassisless circuit board substrate may be substantially similar to the chassisless circuit board substrate 702 discussed above, and may include various electrical components mounted thereon. The specific electrical components mounted to the extended chassisless circuit board substrate may depend on the intended function of the extended chassisless circuit board substrate. For example, the extended chassisless circuit board substrate may provide additional computing resources, memory resources, and / or storage resources. Thus, the additional physical resources of the extended chassisless circuit board substrate may include, but are not limited to: processor circuit systems, memory devices, storage devices, and / or accelerator circuits, including, for example, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), security coprocessor circuits, graphics processing units (GPUs), machine learning circuits, or other dedicated processor circuits, controllers, devices, and / or circuits.

[0094] Reference now Fig.10 , an illustrative example of a computing sled 900 is shown. As shown, programmable circuitry 920, communication circuitry 930, and optical data connectors 934 are mounted to the top side 750 of the chassisless circuit board substrate 702. Any suitable attachment or mounting technique may be used to mount the physical resources of the computing sled 900 to the chassisless circuit board substrate 702. For example, various physical resources may be mounted in corresponding sockets (e.g., processor circuit sockets), holders, or brackets. In some cases, some of the electrical components may be mounted directly to the chassisless circuit board substrate 702 via soldering or similar techniques.

[0095] As discussed above, separate programmable circuitry 920 and communication circuitry 930 are mounted to top side 750 of chassisless circuit board substrate 702 such that no two heat generating electrical components are shadowed by each other. In the illustrative example, programmable circuitry 920 and communication circuitry 930 are mounted in corresponding locations on top side 750 of chassisless circuit board substrate 702 such that no two of those physical resources are linearly aligned with other physical resources along the direction of airflow path 708. It should be appreciated that although optical data connector 934 is aligned with communication circuitry 930, optical data connector 934 generates no heat or a nominal amount of heat during operation.

[0096] As discussed above with respect to the sled 500, the memory devices 820 of the computing sled 900 are mounted to the bottom side 850 of the chassisless circuit board substrate 702. While mounted to the bottom side 850, the memory devices 820 are communicatively coupled to the programmable circuitry 920 located on the top side 750 via the I / O subsystem 722. Because the chassisless circuit board substrate 702 is implemented as a double-sided circuit board, the memory devices 820 and the programmable circuitry 920 can be communicatively coupled through one or more vias, connectors, or other mechanisms extending through the chassisless circuit board substrate 702. In some examples, different programmable circuitry 920 (e.g., different processor circuitry) can be communicatively coupled to different sets of one or more memory devices 820. Alternatively, in other examples, different programmable circuitry 920 (e.g., different processor circuitry) can be communicatively coupled to the same memory device in the memory devices 820. In some examples, memory devices 820 may be mounted to one or more memory mezzanines on the bottom side of chassisless circuit board substrate 702 and may be interconnected with corresponding programmable circuitry 920 via a ball grid array.

[0097] Different programmable circuit systems 920 (e.g., different processor circuit systems) include corresponding heat sinks 950 secured thereto and / or are associated with corresponding heat sinks 950 secured thereto. Due to the mounting of the memory devices 820 to the bottom side 850 of the chassisless circuit board substrate 702 (and the vertical spacing of the sled 500 in the corresponding rack 340), the top side 750 of the chassisless circuit board substrate 702 includes additional "free" area or space that facilitates the use of heat sinks 950 having a larger size relative to conventional heat sinks used in typical servers. Additionally, due to the improved thermal cooling characteristics of the chassisless circuit board substrate 702, none of the programmable circuit system heat sinks 950 include a cooling fan attached thereto. That is, the heat sink 950 can be a fanless heat sink. In some examples, the heat sink 950 mounted on top of the programmable circuit system 920 can overlap with the heat sink attached to the communication circuit 930 in the direction of the airflow path 708 due to its increased size, as indicated by Fig.10 To indicate illustratively.

[0098] Reference now Fig.11 In some examples, the sled 500 can be implemented as an accelerator sled 1100. The accelerator sled 1100 is configured to perform specialized computing tasks, such as machine learning, encryption, hashing, or other computing-intensive tasks. In some examples, for example, the computing sled 900 can migrate tasks to the accelerator sled 1100 during operation. The accelerator sled 1100 includes a processor similar to that already described in Fig.11Various components of the sled 500 and / or the components of the computing sled 900 are identified using the same reference numerals. Figure 7 , Figure 8 and Fig. 9 The descriptions of such components provided are applicable to corresponding components of the accelerator sled 1100 and are not repeated herein for clarity of description of the accelerator sled 1100 .

[0099] In the illustrative accelerator sled 1100, the physical resources 720 include accelerator circuits 1120. Fig.11 Only two accelerator circuits 1120 are shown, but it should be appreciated that in other examples, the accelerator sled 1100 may include additional accelerator circuits 1120. For example, Fig.12 As shown in , the accelerator sled 1100 may include four accelerator circuits 1120. The accelerator circuits 1120 may be implemented as any type of processor circuitry, coprocessor circuitry, computational circuitry, or other device capable of performing computational or processing operations. For example, the accelerator circuits 1120 may be implemented as, for example, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a security coprocessor circuitry, a graphics processing unit (GPU), a neuromorphic processor unit, a quantum computer, a machine learning circuit, or other application specific processor circuitry, controller, device, and / or circuit.

[0100] In some examples, the accelerator sled 1100 may also include an accelerator-to-accelerator interconnect 1142. Similar to the resource-to-resource interconnect 724 of the sled 500 discussed above, the accelerator-to-accelerator interconnect 1142 may be implemented as any type of communication interconnect that can facilitate accelerator-to-accelerator communication. In an illustrative example, the accelerator-to-accelerator interconnect 1142 is implemented as a high-speed point-to-point interconnect (e.g., faster than the I / O subsystem 722). For example, the accelerator-to-accelerator interconnect 1142 may be implemented as a quick path interconnect (QPI), an ultrapath interconnect (UPI), or other high-speed point-to-point interconnects dedicated to programmable circuit system to programmable circuit system communication. In some examples, the accelerator circuit 1120 may be daisy-chained, wherein the primary accelerator circuit 1120 is connected to the NIC 932 and the memory 820 through the I / O subsystem 722, and the secondary accelerator circuit 1120 is connected to the NIC 932 and the memory 820 through the primary accelerator circuit 1120.

[0101] Reference now Fig.12, an illustrative example of an accelerator sled 1100 is shown. As discussed above, the accelerator circuit 1120, the communication circuit 930, and the optical data connector 934 are mounted to the top side 750 of the chassisless circuit board substrate 702. Likewise, as discussed above, each accelerator circuit 1120, and the communication circuit 930 are mounted to the top side 750 of the chassisless circuit board substrate 702 so that no two heat-generating electrical components are shadowed by each other. The memory device 820 of the accelerator sled 1100 is mounted to the bottom side 850 of the chassisless circuit board substrate 702, as discussed above with respect to the sled 500. Although mounted to the bottom side 850, the memory device 820 is communicatively coupled to the accelerator circuit 1120 located on the top side 750 via the I / O subsystem 722 (e.g., through vias). Further, the accelerator circuit 1120 may include and / or be associated with a heat sink 1150 that is larger than conventional heat sinks used in servers. Fig. 9 As discussed above with respect to heat sink 950 , heat sink 1150 may be larger than conventional heat sinks because the “free” area provided by memory resources 820 is located on the bottom side 850 of chassisless circuit board substrate 702 rather than on the top side 750 .

[0102] Reference now Fig.13 In some examples, the sled 500 may be implemented as a storage sled 1300. The storage sled 1300 is configured to store data in a data storage device 1350 local to the storage sled 1300. For example, during operation, the computing sled 900 or the accelerator sled 1100 may store data to and retrieve data from the data storage device 1350 of the storage sled 1300. The storage sled 1300 includes a storage device similar to that described in Fig.13 Various components of the sled 500 and / or the components of the computing sled 900 are identified using the same reference numerals. Figure 7 , Figure 8 and Fig. 9 The descriptions of such components provided are applicable to corresponding components of the storage sled 1300 and are not repeated herein for clarity of description of the storage sled 1300 .

[0103] In the illustrative storage sled 1300, the physical resources 720 include a storage controller 1320. Fig.13Only two storage controllers 1320 are shown in the embodiment of the present invention, but it should be appreciated that in other examples, the storage sled 1300 may include additional storage controllers 1320. The storage controllers 1320 may be implemented as any type of programmable circuitry, controller, or control circuit capable of controlling the storage and retrieval of data into the data storage device 1350 based on requests received via the communication circuit 930. In the illustrative example, the storage controllers 1320 are implemented as relatively low-power programmable circuitry or controllers. For example, in some examples, the storage controllers 1320 may be configured to operate at a rated power of approximately 75 watts.

[0104] In some examples, storage sled 1300 may also include a controller-to-controller interconnect 1342. Similar to resource-to-resource interconnect 724 of sled 500 discussed above, controller-to-controller interconnect 1342 may be implemented as any type of communication interconnect capable of facilitating controller-to-controller communication. In an illustrative example, controller-to-controller interconnect 1342 is implemented as a high-speed point-to-point interconnect (e.g., faster than I / O subsystem 722). For example, controller-to-controller interconnect 1342 may be implemented as a Quick Path Interconnect (QPI), an Ultra Path Interconnect (UPI), or other high-speed point-to-point interconnect dedicated to programmable circuit system to programmable circuit system communication.

[0105] Reference now Fig.14 , an illustrative example of a storage sled 1300 is shown. In the illustrative example, the data storage device 1350 is implemented as or otherwise includes a storage cage 1352 configured to accommodate one or more solid state drives (SSDs) 1354. To this end, the storage cage 1352 includes a plurality of mounting slots 1356 configured to receive corresponding solid state drives 1354. The mounting slots 1356 include a plurality of drive guides 1358 that cooperate to define access openings of corresponding mounting slots 1356. The storage cage 1352 is secured to the chassisless circuit board substrate 702 such that the access opening faces away from the chassisless circuit board substrate 702 (i.e., toward the front of the chassisless circuit board substrate 702). Thus, when the storage sled 1300 is mounted in the corresponding rack 340, the solid state drives 1354 are accessible. For example, the solid-state drives 1354 may be swapped out of a rack 340 (eg, via a robot) while the storage sleds 1300 remain installed in the corresponding rack 340 .

[0106] The storage cage 1352 illustratively includes sixteen mounting slots 1356 and is capable of mounting and storing sixteen solid-state drives 1354. In other examples, the storage cage 1352 can be configured to store additional or fewer solid-state drives 1354. Additionally, in the illustrative example, the solid-state drives are mounted vertically in the storage cage 1352, but in other examples, the solid-state drives can be mounted in the storage cage 1352 in different orientations. A given solid-state drive 1354 can be implemented as any type of data storage device capable of storing long-term data. To this end, the solid-state drive 1354 can include the volatile memory devices and non-volatile memory devices discussed above.

[0107] like Fig.14 , the storage controller 1320, the communication circuitry 930, and the optical data connectors 934 are illustratively mounted to the top side 750 of the chassisless circuit board substrate 702. Again, as discussed above, any suitable attachment or mounting technique may be used to mount the electrical components of the storage sled 1300 to the chassisless circuit board substrate 702, including, for example, sockets (e.g., processor circuit sockets), retainers, brackets, solder connections, and / or other mounting or securing techniques.

[0108] As discussed above, the respective memory controllers 1320, and the communication circuits 930 are mounted to the top side 750 of the chassisless circuit board substrate 702 such that no two heat generating electrical components are shadowed by each other. For example, the memory controllers 1320 and the communication circuits 930 are mounted in corresponding positions on the top side 750 of the chassisless circuit board substrate 702 such that no two of those electrical components are linearly aligned with each other along the direction of the airflow path 708.

[0109] As discussed above with respect to sled 500, memory device 820 (not shown) of storage sled 1300 Fig.14 ) is mounted to the bottom side 850 (not shown) of the chassisless circuit board substrate 702 Fig.14). Although mounted to the bottom side 850, the memory device 820 is communicatively coupled to the storage controller 1320 located on the top side 750 via the I / O subsystem 722. Likewise, because the chassisless circuit board substrate 702 is implemented as a double-sided circuit board, the memory device 820 and the storage controller 1320 can be communicatively coupled through one or more vias, connectors, or other mechanisms extending through the chassisless circuit board substrate 702. The storage controller 1320 includes a heat sink 1370 secured thereto and / or is associated with a heat sink 1370 secured thereto. As discussed above, due to the improved thermal cooling characteristics of the chassisless circuit board substrate 702 of the storage sled 1300, none of the heat sinks 1370 include a cooling fan attached thereto. That is, the heat sink 1370 can be a fanless heat sink.

[0110] Reference now Fig.15 In some examples, the sled 500 may be implemented as a memory sled 1500. The memory sled 1500 is optimized or otherwise configured to provide other sleds 500 (e.g., compute sled 900, accelerator sled 1100, etc.) with access to a pool of memory local to the storage sled 1300 (e.g., in two or more sets 1530, 1532 of memory devices 820). For example, during operation, the compute sled 900 or accelerator sled 1100 may remotely write to and / or read from one or more of the memory sets 1530, 1532 of the memory sled 1500 using a logical address space mapped to physical addresses in the memory sets 1530, 1532. The memory sled 1500 includes a processor similar to that described in the prior art. Fig.15 Various components of the sled 500 and / or the components of the computing sled 900 are identified using the same reference numerals. Figure 7 , Figure 8 and Fig. 9 The descriptions of such components provided are applicable to corresponding components of the memory sled 1500 and are not repeated herein for clarity of description of the memory sled 1500 .

[0111] In the illustrative memory sled 1500, the physical resources 720 include a memory controller 1520. Fig.15Only two memory controllers 1520 are shown in FIG. 1 , but it should be appreciated that in other examples, the memory sled 1500 may include additional memory controllers 1520. The memory controllers 1520 may be implemented as any type of programmable circuitry, controller, or control circuit capable of controlling the writing and reading of data into the memory sets 1530, 1532 based on requests received via the communication circuit 930. In the illustrative example, the memory controllers 1520 connect to the corresponding memory sets 1530, 1532 to write to and read from the memory devices 820 (not shown) within the corresponding memory sets 1530, 1532, and implement any permissions (e.g., read, write, etc.) associated with the sled 500 that has sent a request to the memory sled 1500 to perform a memory access operation (e.g., read or write).

[0112] In some examples, the memory sled 1500 may also include a controller-to-controller interconnect 1542. Similar to the resource-to-resource interconnect 724 of the sled 500 discussed above, the controller-to-controller interconnect 1542 may be implemented as any type of communication interconnect capable of facilitating controller-to-controller communication. In an illustrative example, the controller-to-controller interconnect 1542 is implemented as a high-speed point-to-point interconnect (e.g., faster than the I / O subsystem 722). For example, the controller-to-controller interconnect 1542 may be implemented as a quick path interconnect (QPI), an ultrapath interconnect (UPI), or other high-speed point-to-point interconnect dedicated to programmable circuit system to programmable circuit system communication. Thus, in some examples, the memory controller 1520 may access the memory within the memory set 1532 associated with another memory controller 1520 through the controller-to-controller interconnect 1542. In some examples, the scalable memory controller is composed of multiple smaller memory controllers (referred to herein as "chiplets") on a memory sled (e.g., the memory sled 1500). The chiplets can be interconnected (e.g., using EMIB (Embedded Multi-Die Interconnect Bridge) technology). The combined chiplet memory controller can scale to a relatively large number of memory controllers and I / O ports (e.g., up to 16 memory channels). In some examples, the memory controller 1520 can implement memory interleaving (e.g., one memory address is mapped to memory set 1530, the next memory address is mapped to memory set 1532, and a third address is mapped to memory set 1530, etc.). The interleaving can be managed within the memory controller 1520, or from a CPU socket (e.g., of the compute sled 900) across a network link to the memory sets 1530, 1532, and can improve latency associated with performing memory access operations compared to accessing consecutive memory addresses from the same memory device.

[0113] Further, in some examples, the memory sled 1500 can be connected to one or more other sleds 500 (e.g., in the same rack 340 or an adjacent rack 340) via waveguides using a waveguide connector 1580. In the illustrative example, the waveguide is a 74 mm waveguide that provides 16 Rx (i.e., receive) channels and 16 Tx (i.e., transmit) channels. In the illustrative example, the different channels are 16 GHz or 32 GHz. In other examples, the frequencies can be different. Using waveguides can provide high throughput access to a memory pool (e.g., memory collections 1530, 1532) to another sled (e.g., a sled 500 in the same rack 340 or an adjacent rack 340 as the memory sled 1500) without adding load to the optical data connector 934.

[0114] Reference now Fig.16, a system for executing one or more workloads (e.g., applications) may be implemented according to data center 200. In an illustrative example, system 1610 includes an orchestrator server 1620, which may be implemented as a managed node including a computing device (e.g., programmable circuit system 920 on computing sled 900) executing management software (e.g., a cloud operating environment such as OpenStack), the orchestrator server 1620 being communicatively coupled to a plurality of sleds 500, including a number of computing sleds 1630 (e.g., similar to computing sled 900), a memory sled 1640 (e.g., similar to memory sled 1500), an accelerator sled 1650 (e.g., similar to accelerator sled 1100), and a storage sled 1660 (e.g., similar to storage sled 1300). One or more of sleds 1630, 1640, 1650, 1660 may be grouped into managed nodes 1670, such as by orchestrator server 1620, to collectively execute workloads (e.g., applications 1632 executed in virtual machines or in containers). Managed nodes 1670 may be implemented as an assembly of physical resources 720 (such as programmable circuitry 920, memory resources 820, accelerator circuits 1120, or data storage devices 1350) from the same or different sleds 500. Further, managed nodes may be established, defined, or "spun up" by orchestrator server 1620 when a workload is assigned to the managed node or at any other time, and may exist regardless of whether any workload is currently assigned to the managed node. In an illustrative example, orchestrator server 1620 may selectively allocate and / or deallocate physical resources 720 from sleds 500 and / or add or remove one or more sleds 500 to or from managed node 1670 based on quality of service (QoS) targets (e.g., target throughput, target latency, target instructions per second, etc.) associated with a service level agreement for a workload (e.g., application 1632). In doing so, orchestrator server 1620 may receive telemetry data indicating performance conditions (e.g., throughput, latency, instructions per second, etc.) of different sleds in sleds 500 of managed node 1670 and compare the telemetry data with the quality of service targets to determine whether the quality of service targets are met. Orchestrator server 1620 may additionally determine whether one or more physical resources may be deallocated from managed node 1670 while still meeting the QoS targets, thereby freeing those physical resources for use in another managed node (e.g., to execute a different workload). Alternatively, if the QoS goals are not currently being met, orchestrator server 1620 can determine to dynamically allocate additional physical resources to assist in the execution of the workload (eg, application 1632 ) while the workload is executing.Similarly, if orchestrator server 1620 determines that deallocating the physical resources will cause the QoS objectives to still be met, then orchestrator server 1620 can determine to dynamically deallocate the physical resources from the managed node.

[0115] Additionally, in some examples, orchestrator server 1620 may identify trends in resource utilization of workloads (e.g., application 1632), such as by identifying phases of workload (e.g., application 1632) execution (e.g., time periods during which different operations with different resource utilization characteristics are executed) and proactively identifying available resources in data center 200 and allocating them to managed nodes 1670 (e.g., within a predefined time period starting at the associated phase). In some examples, orchestrator server 1620 may model performance based on various latencies and allocation schemes to align work placement between compute sleds and other resources (e.g., accelerator sleds, memory sleds, storage sleds) in data center 200. For example, orchestrator server 1620 may utilize a model that considers the performance of resources on sled 500 (e.g., FPGA performance, memory access latency, etc.) and the performance of paths through the network to reach the resources (e.g., FPGA) (e.g., congestion, latency, bandwidth). Thus, orchestrator server 1620 can determine which resource(s) should be used with which workloads based on the total latency associated with the different potential resource(s) available in data center 200 (e.g., latency associated with the performance of the resources themselves, in addition to latency associated with the path through the network between the compute sled executing the workload and sled 500 on which the resources are located).

[0116] In some examples, orchestrator server 1620 can use telemetry data (e.g., temperature, fan speed, etc.) reported from sled 500 to generate a map of thermal generation in data center 200, and allocate resources to managed nodes based on the map and predicted heat generation associated with different workloads to maintain target temperature and heat distribution in data center 200. Additionally or alternatively, in some examples, orchestrator server 1620 can organize the received telemetry data into a hierarchical model indicating relationships between managed nodes (e.g., spatial relationships such as the physical location of resources of managed nodes within data center 200, and / or functional relationships such as grouping of managed nodes by customers served by managed nodes, types of functions typically performed by managed nodes, managed nodes that typically share or exchange workloads with each other, etc.). Based on differences in physical location and resources in managed nodes, a given workload can exhibit different resource utilization (e.g., causing different internal temperatures, using different percentages of programmable circuitry or memory capacity) across resources of different managed nodes. Orchestrator server 1620 can determine these differences based on telemetry data stored in the hierarchy model and incorporate these differences into predictions of future resource utilization of the workload if the workload is reassigned from one managed node to another managed node to accurately balance resource utilization in data center 200. In some examples, orchestrator server 1620 can identify patterns in resource utilization phases of workloads and use these patterns to predict future resource utilization of workloads.

[0117] To reduce the computational load on orchestrator server 1620 and the data transmission load on the network, in some examples, orchestrator server 1620 can send self-test information to sleds 500 to enable a given sled 500 to locally (e.g., on that sled 500) determine whether telemetry data generated by that sled 500 satisfies one or more conditions (e.g., available capacity that satisfies a predefined threshold, temperature that satisfies a predefined threshold, etc.). The given sled 500 can then report a simplified result (e.g., yes or no) back to orchestrator server 1620, which can utilize the simplified result when determining resource allocations to managed nodes.

[0118] Fig.17 An example environment 1700 is shown including an example reservoir monitoring circuitry 1702 and an example system monitoring circuitry 1704 for monitoring an example heat exchanger 1706 and associated example reservoirs 1708, 1710 in accordance with the teachings of the present disclosure. Fig.17In the illustrated example of , the heat exchanger 1706 is a liquid air assisted cooling (LAAC) system that utilizes coolant from a first reservoir 1708 and / or a second reservoir 1710 to cool one or more electronic components (e.g., heat sinks). In this example, the heat exchanger 1706 is fluidly coupled to an example cold plate 1712 via a first tube (e.g., supply tube) 1714 and a second tube (e.g., return tube) 1716. In this example, fittings (e.g., quick disconnect fittings) 1718 are implemented along the first tube 1714 and the second tube 1716 to facilitate coupling and / or decoupling of a device (e.g., a cold plate) to the heat exchanger 1706.

[0119] exist Fig.17 1708. In the example of FIG. 1708, a pump 1720 is fluidly and / or operably coupled to the first reservoir 1708. In operation, the pump 1720 circulates coolant from the first reservoir 1708 to the cold plate 1712 via the first tube 1714, and circulates coolant from the cold plate 1712 to the heat exchanger 1706 via the second tube 1716. In this example, as the coolant passes through and / or across the cold plate 1712, the coolant extracts heat from one or more electronic components operably coupled to the cold plate 1712. The heated coolant is returned to the heat exchanger 1706 via the second tube 1716, where it can be air cooled by operation of one or more fans 1722 of the heat exchanger 1706 before returning to the first reservoir 1708.

[0120] In some examples, coolant loss may occur during operation of the heat exchanger 1706. For example, a relatively high heat load from one or more electronic components coupled to the cold plate 1712 may cause evaporation of the coolant over time. In some examples, loss of coolant may occur when a device (e.g., the cold plate 1712) is connected to and / or disconnected from the heat exchanger 1706 at the fitting 1718. For example, some coolant may remain in the portion of the tubes 1714, 1716 that are disconnected from the heat exchanger 1706 at the fitting 1718, thereby reducing the amount of coolant available for the heat exchanger 1706. Additionally or alternatively, leakage of coolant may occur along the tubes 1714, 1716 and / or between components of the heat exchanger 1706. In some examples, such loss of coolant may cause the coolant level in the first reservoir 1708 to be less than a threshold value. As a result, failure and / or damage to one or more components of the pump 1720 and / or the heat exchanger 1706 may occur.

[0121] exist Fig.17In the illustrated example of the example second reservoir 1710 is fluidly coupled to the first reservoir 1708 to provide and / or supply additional coolant to the first reservoir 1708 when a loss of coolant occurs. The second reservoir 1710 can deliver additional coolant to the first reservoir without user intervention. For example, the second reservoir 1710 is coupled (e.g., fluidly coupled) to the top of the first reservoir 1708 via an example fitting (e.g., a quick disconnect fitting) 1724, where gravity causes coolant to flow from the second reservoir 1710 to the first reservoir 1708 via the fitting 1724. In some examples, the automatic flow of coolant from the second reservoir 1710 to the first reservoir 1708 ensures that the first reservoir 1708 remains full of coolant during operation of the heat exchanger 1706 (e.g., the amount of coolant in the first reservoir 1708 satisfies a threshold capacity of the first reservoir 1708), thereby reducing the risk of damage to the heat exchanger 1706 due to insufficient coolant levels in the first reservoir 1708.

[0122] In some examples, the coolant level of the coolant in the second reservoir 1710 may vary over time as coolant from the second reservoir 1710 is provided to the first reservoir 1708. In some examples, the loss of coolant in the second reservoir 1710 necessitates additional coolant to be provided to the second reservoir 1710. For example, an example cap 1726 is removably coupled to the second reservoir 1710, and the cap 1726 may be removed to enable refilling of the second reservoir 1710 with coolant. Additionally or alternatively, the second reservoir 1710 may be decoupled from the first reservoir 1708 at the fitting 1724 (e.g., removed from the first reservoir 1708), and may be refilled at a second location before being recoupled to the first reservoir 1708. In some examples, because the second reservoir 1710 is separated (e.g., fluidly decoupled) from the example closed-loop flow path of the coolant (e.g., including the first reservoir 1708, the tubes 1714, 1716, the cold plate 1712, and the heat exchanger 1706), the second reservoir 1710 can be refilled during operation of the heat exchanger 1706 (e.g., without stopping operation of the heat exchanger 1706). Therefore, the examples disclosed herein can reduce downtime in the operation of the heat exchanger 1706.

[0123] exist Fig.17In an example of the present invention, one or more sensors 1728 are operably coupled to the second reservoir 1710 to detect a coolant level (e.g., volume, height, etc.) of the coolant in the second reservoir 1710. The sensor(s) 1728 may include, for example, a level sensor such as a float switch, an ultrasonic level sensor, a radar level sensor, a pressure sensor, a capacitive or contact sensor, etc. In some examples, the sensor 1728 is communicatively coupled to the reservoir monitoring circuitry 1702 and / or the system monitoring circuitry 1704 to provide outputs thereto, wherein the outputs correspond to sensor data representing the coolant level detected in the second reservoir 1710. Further, an example indicator 1730 is coupled to the second reservoir 1710 to indicate the coolant level and / or the status of the second reservoir 1710 to an operator. For example, the indicator 1730 can indicate whether the coolant level in the second reservoir 1710 is satisfactory (e.g., greater than or equal to a first example threshold level), low (e.g., less than the first threshold level and greater than or equal to a second example threshold level, and / or less than the second threshold level and greater than or equal to a third example threshold level), or very low (e.g., less than a third threshold level). In this example, the indicator 1730 includes one or more example light sources 1732 that illuminate based on the status and / or coolant level. In some examples, different types of indicators (e.g., audio indicators, displays presenting text, etc.) may be used in addition or alternatively.

[0124] exist Fig.17 In the illustrated example of , the reservoir monitoring circuit system 1702 monitors the state and / or coolant level of the second reservoir 1710. For example, the reservoir monitoring circuit system 1702 obtains sensor data corresponding to the output from the sensor 1728 and determines the coolant level in the second reservoir 1710 based on the sensor data. In some examples, based on an evaluation of the coolant level relative to one or more thresholds (e.g., a first threshold level, a second threshold level, and / or a third threshold level), the reservoir monitoring circuit system 1702 determines the state of the second reservoir 1710 (e.g., whether the coolant level in the second reservoir 1710 is satisfactory, low, and / or very low). In some examples, the reservoir monitoring circuit system 1702 is communicatively and / or operably coupled to the indicator 1730, and the reservoir monitoring circuit system 1702 controls and / or adjusts the indicator 1730 based on the detected coolant level and / or state of the second reservoir 1710. For example, reservoir monitoring circuitry 1702 may activate and / or deactivate light source(s) in light sources 1732 to indicate coolant level and / or status to an operator.

[0125] In some examples, the storage monitoring circuit system 1702 generates (one or more) alarms and / or causes (one or more) alarms to be presented to the operator. (One or more) alarms may include (one or more) visual alarms, (one or more) audio alarms, etc. For example, the storage monitoring circuit system 1702 may generate an alarm in response to determining that the coolant level in the second storage 1710 is low and / or very low. In some examples, the storage monitoring circuit system 1702 may generate an alarm periodically (e.g., at a frequency selected by the operator). In some examples, the alarm may include a status, a coolant level, a location (e.g., a grid location, a geographic location) of the second storage 1710, and / or an identifier associated with the second storage 1710. In some examples, the alarm indicates the amount of coolant missing in the second storage 1710, and / or includes instructions for locating and / or accessing the second storage 1710. In some examples, the reservoir monitoring circuitry 1702 outputs an alert for presentation (e.g., display) at an example user device (e.g., computer, mobile device, etc.) 1734 of an operator, wherein the user device 1734 is communicatively coupled to the reservoir monitoring circuitry 1702 via an example network 1736. In some examples, by alerting the operator when it is necessary to refill the second reservoir 1710, the reservoir monitoring circuitry 1702 can reduce the frequency with which the operator manually refills and / or checks the second reservoir 1710.

[0126] exist Fig.17 In some examples, the storage monitoring circuitry 1702 is communicatively coupled to the example system monitoring circuitry 1704 via the network 1736. In some examples, the storage monitoring circuitry 1702 provides example storage information to the system monitoring circuitry 1704 via the network 1736, wherein the storage information includes a coolant level, status, location, and / or identifier associated with the second storage 1710. In some examples, the storage monitoring circuitry 1702 may be coupled to one or more additional devices (e.g., other user devices, cloud-based devices) via the network 1736. In some such examples, the storage monitoring circuitry 1702 may provide the alert and / or storage information to the additional device(s) for presentation and / or storage thereon.

[0127] Although in Fig.17In the example environment 1700 of FIG. 1 , one heat exchanger 1706 and one second reservoir 1710 are shown, but some environments (e.g., data centers) implement example systems including multiple heat exchangers 1706 and / or multiple second reservoirs 1710. In some such examples, the reservoir monitoring circuit system 1702 obtains sensor data for each of the heat exchangers 1706 in the system to monitor its coolant level. Additionally or alternatively, multiple instances of the reservoir monitoring circuit system 1702 can be used to monitor the coolant level for one or more corresponding heat exchangers 1706.

[0128] For some systems that implement a relatively large number (e.g., hundreds, thousands, etc.) of heat exchangers, it may be difficult and / or impractical for an operator to manually inspect and / or monitor the performance of individual (one or more) of the heat exchangers. Fig.17 In the illustrated example, the system monitoring circuit system 1704 can monitor and / or predict including Fig.17 1706 and / or a plurality of second storages 1710. For example, based on storage information from one or more instances of the storage monitoring circuit system 1702, and / or based on (one or more) user inputs provided to the user device 1734, the system monitoring circuit system 1704 can detect and / or predict example anomalies associated with the coolant and / or the heat exchanger 1706, and / or can predict the remaining useful life (RUL) of the heat exchanger 1706. For example, the coolant anomaly may include evaporation and / or overheating of the coolant, leakage of the coolant, reduced efficiency of the coolant, pressure drop of the coolant, corrosion of equipment associated with the coolant, etc. In some examples, the hardware anomaly may include pump failure, fan failure, airflow obstruction, fin damage, operating temperature exceeding a threshold, etc. In some examples, the RUL represents the duration that (one or more) of the heat exchangers 1706 can operate until maintenance and / or replacement of (one or more) of the heat exchangers 1706 is expected.

[0129] In some examples, the system monitoring circuit system 1704 predicts an anomaly and / or RUL based on execution of one or more example models (e.g., a machine learning model) trained based on historical data (e.g., past (one or more) user inputs and / or past storage information). In some examples, the system monitoring circuit system 1704 outputs the predicted anomaly and / or RUL for presentation to an operator to facilitate maintenance of the heat exchanger 1706. Additionally or alternatively, the system monitoring circuit system 1704 may cause one or more control parameters (e.g., fan speed, pump speed, coolant flow rate, etc.) associated with the heat exchanger 1706 to be adjusted (e.g., in an effort to extend the RUL or mitigate the effects of an expired RUL) based on the predicted anomaly and / or RUL. The operations of the storage monitoring circuit system 1702 and the system monitoring circuit system 1704 are described below in conjunction with each other. Fig.21 and Fig. 22 Described in further detail.

[0130] Fig.18A The diagram shows Fig.17 A second example storage 1710. Fig.18A In the illustrated example of , the second reservoir 1710 is detached from the first reservoir 1708 at the accessory 1724 and / or disconnected from the first reservoir 1708 at the accessory 1724. In some examples, the second reservoir 1710 can be detached from the first reservoir 1708 to enable the second reservoir 1710 to be refilled at a second location and / or to enable the second reservoir 1710 to be exchanged with a different reservoir (e.g., a full reservoir). In this example, the accessory 1724 includes a plug 1802, which is positioned at a surface 1804 of the second reservoir 1710 proximate to the first reservoir 1708 when the second reservoir 1710 is coupled to the first reservoir 1708. The accessory 1724 includes a socket 1806 positioned at the surface 1808 of the first reservoir 1708, wherein the plug 1802 is mated to the socket 1806. In the illustrated example, wall 1810 is coupled to surface 1808 of the first reservoir 1708 opposite surface 1804 of the second reservoir 1710 and / or is integrally formed on surface 1808 of the first reservoir 1708 to capture and / or contain excess fluid that may escape from the second reservoir 1710 (e.g., during coupling and / or decoupling of the first reservoir 1708 and the second reservoir 1710).

[0131] exist Fig.18AIn the example of FIG. 1 , the example indicator 1730 and the example sensors 1728 (e.g., including the first example sensor 1728A, the second example sensor 1728B, and the third example sensor 1728C) define a coolant monitoring device 1812 implemented at the second reservoir 1710. In this example, the coolant monitoring device 1812 is positioned in the opening 1814 of the cover 1726 of the second reservoir 1710 such that the sensor 1728 extends into the second reservoir 1710. In some examples, the coolant monitoring device 1812 can be removed from the cover 1726 to enable refilling of the second reservoir 1710 via the opening 1814.

[0132] exist Fig.18A In the illustrated example of , sensor 1728 detects whether the coolant level in the second reservoir 1710 meets the corresponding threshold level. The threshold level can be represented by the extension amount of sensor 1728 in the second reservoir 1710. For example, the first sensor 1728A corresponds to a first threshold level, the second sensor 1728B corresponds to a second threshold level (e.g., less than the first threshold level), and the third sensor 1728C corresponds to a third threshold level (e.g., less than the first threshold level and the second threshold level). In this example, the first threshold level corresponds to 75% of the capacity of the second reservoir 1710, the second threshold level corresponds to 50% of the capacity of the second reservoir 1710, and the third threshold level corresponds to 25% of the capacity of the second reservoir 1710. In some examples, at least one of the threshold levels may be different (e.g., 90%, 80%, 10%, etc.). In some examples, the threshold level is selected based on at least one of the following: Fig.17 The expected heat dissipation rate of the heat exchanger 1706, the expected evaporation rate of the coolant, the number of heat exchangers and / or cold plates associated with the second reservoir 1710, or the expected life of the heat exchanger 1706.

[0133] In this example, the second storage 1710 includes a mark 1816 for visually indicating the corresponding threshold level in the threshold levels to the operator. For example, the first example mark 1816A indicates the first threshold level, the second example mark 1816B indicates the second threshold level, and the third example mark 1816C indicates the third threshold level. In this example, the mark 1816 includes a ring of different colors positioned at the corresponding threshold level. In some examples, the mark 1816 can be different (e.g., text and / or other labels indicating the corresponding threshold level).

[0134] In operation, sensor 1728 is Fig.17The reservoir monitoring circuit system 1702 outputs one or more signals to indicate the detected coolant level in the second reservoir 1710. For example, when the coolant level is at or above the first threshold level, the coolant contacts the first sensor 1728A, thereby triggering the first sensor 1728A to send a first example signal to the reservoir monitoring circuit system 1702. In some examples, when the coolant level drops below the first threshold level, the coolant does not contact the first sensor 1728A, so that the first sensor 1728A does not send the first signal to the reservoir monitoring circuit system 1702 (e.g., and / or sends an alternative signal). Similarly, in some examples, when the coolant is at or above the second threshold level (e.g., in contact with the second sensor 1728B), the second sensor 1728B sends the second example signal to the reservoir monitoring circuit system 1702, and when the coolant is below the second threshold level (e.g., not in contact with the second sensor 1728B), the second sensor 1728B does not send the second signal (e.g., and / or sends an alternative signal). Further, when the coolant is at or above a third threshold level (e.g., in contact with the third sensor 1728C), the third sensor 1728C sends a third example signal to the reservoir monitoring circuit system 1702, and when the coolant is below the third threshold level (e.g., not in contact with the third sensor 1728C), the third sensor 1728C does not send the third signal (e.g., and / or sends an alternative signal).

[0135] Although three sensors 1728 are used in this example, a different number of sensors and / or corresponding thresholds may be used instead. In some examples, different types of sensors may be used to detect the coolant level in the second reservoir 1710 by, for example, measuring the distance between the sensor and the coolant. In some such examples, the sensor may provide a signal indicating a measured value of the coolant level (e.g., instead of providing a binary response indicating whether the coolant has reached a particular threshold level).

[0136] Fig.18B The diagram shows Fig.18A A front view of an example coolant monitoring device 1812. Fig.18B In the illustrated example, the coolant monitoring device 1812 includes a threaded portion 1818 for removably coupling the coolant monitoring device 1812 to Fig.18A In the illustrated example, the indicator 1730 includes a first example light source 1732A, a second example light source 1732B, and a third example light source 1732C for indicating Fig.17 and / or Fig.18AThe state of the coolant in the second reservoir 1710. For example, different colors of the light sources 1732 can be associated with different states of the coolant. In some examples, the first light source 1732A has a first color (e.g., green) indicating a first state (e.g., a satisfactory coolant level), the second light source 1732B has a second color (e.g., yellow) indicating a second state (e.g., a low coolant level), and the third light source 1732C has a third color (e.g., red) indicating a third state (e.g., a very low coolant level). In some examples, one or more different colors (e.g., instead of green, yellow, and / or red) can be used instead for the light sources 1732, and / or one or more of the light sources 1732 can be omitted. In some examples, in addition to or instead of one or more of the light sources 1732, the indicator 1730 may include a display for presenting information (e.g., coolant level, state, etc.) to an operator. Additionally or alternatively, the indicator 1730 may include a speaker for emitting audio representing the information.

[0137] Fig.19 The diagram shows that Fig.17 Different example sizes of the second reservoir 1710 implemented together with the first example reservoir 1708 of the example heat exchanger 1706. Fig.17 The heat exchanger 1706 shown in FIG. Fig.19 The heat exchanger 1706 in the illustrated example is fluidly and / or operably coupled to a plurality of example cold plates 1712A, 1712B to circulate a coolant therethrough. In this example, a supply tube 1902 directs coolant from a first reservoir 1708 to the cold plates 1712A, 1712B. In some examples, the supply tube 1902 includes a first example tee fitting 1904 at which the coolant from the supply tube 1902 is separated into a first supply path 1906 to the first cold plate 1712A and a second supply path 1908 to the second cold plate 1712B. Conversely, the coolant flows from the cold plates 1712A, 1712B along respective first return paths 1910 and second return paths 1912 to a second example tee fitting 1914 implemented on an example return tube 1916. In some examples, coolant from return pipe 1916 flows through heat exchanger 1706 and is cooled before being recirculated through cold plates 1712A, 1712B. Although two cold plates 1712A, 1712B are used in this example, heat exchanger 1706 can be fluidly and / or operatively coupled to any number (e.g., one, two, three, or more, etc.) of cold plates to provide cooling thereto.

[0138] exist Fig.19In the illustrated example of the second reservoir 1710, the second reservoir 1710 can be implemented using one of a first example reservoir body 1920A having a first volume, a second example reservoir body 1920B having a second volume (e.g., greater than the first volume), or a third example reservoir body 1920C having a third volume (e.g., greater than the first volume and the second volume). In some examples, the example coolant monitoring device 1812 and / or the cover 1726 can be transferred between the reservoir bodies 1920. In some examples, the volume of the second reservoir 1710 can be selected based on the expected heat load of the heat exchanger 1706, the number of cold plates 1712 fluidly and / or operably coupled to the heat exchanger 1706, the expected evaporation rate of the coolant, etc.

[0139] Fig. 20 The figure shows the implementation on the example chassis 2002 Fig.19 The example heat exchanger 1706 and the example reservoirs 1708, 1710 in FIG. Fig. 20 In the illustrated example of , chassis 2002 includes a first example cold plate 1712A and a second example cold plate 1712B coupled thereto, and heat exchanger 1706 is fluidly and / or operably coupled to cold plates 1712A, 1712B to facilitate cooling thereof. In some examples, the cooling capacity of heat exchanger 1706 is based on the number of fans 1722 implemented by heat exchanger 1706. For example, when heat exchanger 1706 includes Fig. 20 When four fans 1722 are shown in FIG. 1 , heat exchanger 1706 can cool a threshold amount (eg, up to 1.3 kilowatts) of package power. In some examples, the number of cold plates 1712 to be cooled by heat exchanger 1706 is selected based on their cooling capabilities.

[0140] Fig.21 It is used for monitoring Fig.17 A second example of a coolant level in the reservoir 1710, Fig.17 A block diagram of an example implementation of an example storage monitoring circuit system 1702 is shown. Fig.21 The storage monitoring circuit system 1702 of can be instantiated by programmable circuit system such as a central processing unit (CPU) executing the first instruction (e.g., creating an instance of the storage monitoring circuit system 1702, causing to be the storage monitoring circuit system 1702 for any period of time, concretizing the storage monitoring circuit system 1702, realizing the storage monitoring circuit system 1702, etc.). Additionally or alternatively, Fig.21The storage monitoring circuit system 1702 may be instantiated by (i) an application specific integrated circuit (ASIC) and / or (ii) a field programmable gate array (FPGA) constructed and / or configured to perform operations corresponding to the first instruction in response to the execution of the second instruction (e.g., creating an instance of the storage monitoring circuit system 1702, making it the storage monitoring circuit system 1702 for any period of time, concretizing the storage monitoring circuit system 1702, implementing the storage monitoring circuit system 1702, etc.). It should be understood that Fig.21 Some or all of the circuitry of can thus be instantiated at the same or different times. For example, Fig.21 Some or all of the circuitry of may be instantiated in one or more threads that execute concurrently on hardware and / or sequentially on hardware. Furthermore, in some examples, Fig.21 Some or all of the circuit systems may be implemented by microprocessor circuit systems executing instructions and / or FPGA circuit systems performing operations to implement one or more virtual machines and / or containers.

[0141] exist Fig.21 In the illustrated example, the storage monitoring circuit system 1702 includes an example sensor interface circuit system 2102, an example state determination circuit system 2104, an example alarm generation circuit system 2106, an example indicator control circuit system 2108, an example communication circuit system 2110, and an example storage database 2112.

[0142] The example storage database 2112 stores data utilized and / or obtained by the storage monitoring circuit system 1702 . Fig.21 The example storage database 2112 is implemented by any memory, storage device, and / or storage disk for storing data, such as, for example, flash memory, magnetic media, optical media, solid-state memory, (one or more) hard drives, (one or more) thumb drives, etc. In addition, the data stored in the example storage database 2112 can be in any data format, such as, for example, binary data, comma-delimited data, tab-delimited data, structured query language (SQL) structures, etc. Although in the illustrated example, the example storage database 2112 is illustrated as a single device, the example storage database 2112 and / or any other data storage device described herein can be implemented by any number and / or (one or more) types of memory.

[0143] Fig.21 The sensor interface circuit system 2102 obtains and / or accesses Fig.17 , Fig.18A and / or Fig.18BExample sensor data 2114 corresponding to the output of one or more example sensors in the example sensors 1728 of the example sensors 1728. For example, the sensor data 2114 may include a first example signal from the first sensor 1728A, a second example signal from the second sensor 1728B, and / or a third example signal from the third sensor 1728C. In some examples, the first signal indicates that the coolant level in the second reservoir 1710 is at or above the first example threshold, the second signal indicates that the coolant level is at or above the second example threshold, and the third signal indicates that the coolant level is at or above the third example threshold. In some examples, the sensor data 2114 includes measurements from one or more additional sensors operably coupled to the second reservoir 1710, wherein the measurements indicate the coolant level detected in the second reservoir 1710 (e.g., without reference to (one or more) of the thresholds). In some examples, the sensor interface circuit system 2102 provides the sensor data 2114 to the example storage database 2112 for storage therein. In some examples, the sensor interface circuit system 2102 is instantiated and / or configured by the programmable circuit system executing the sensor interface circuit system instructions to perform functions such as Fig.29 Operations similar to those represented by the (one or more) flowcharts.

[0144] Fig.21The state determination circuit system 2104 determines an example state associated with the second reservoir 1710 and / or the coolant therein. For example, based on the sensor data 2114, the state determination circuit system 2104 determines whether the coolant level in the second reservoir 1710 is satisfactory, low, or very low. In some examples, the state determination circuit system 2104 determines that the coolant level is satisfactory (e.g., at or above a first threshold level) in response to the sensor interface circuit system 2102 receiving at least a first signal from the first sensor 1728A. In some examples, the state determination circuit system 2104 determines that the coolant level is low (e.g., below the first threshold level and at or above at least one of the second threshold level or the third threshold level) in response to the sensor interface circuit system 2102 not receiving the first signal from the first sensor 1728A and receiving at least a third signal from the third sensor 1728C. Additionally, the state determination circuitry 2104 determines that the coolant level is at or above the second threshold in response to the sensor interface circuitry 2102 receiving the second signal from the second sensor 1728B, and determines that the coolant level is below the second threshold in response to the sensor interface circuitry 2102 not receiving the second signal. In some examples, the state determination circuitry 2104 determines that the coolant level is extremely low (e.g., below a third threshold level) in response to the sensor interface circuitry 2102 not receiving the third signal from the third sensor 1728C (and not receiving signals from the other sensors 1728A, 1728B).

[0145] In some examples, when the sensor data 2114 is a measurement representing a detected coolant level (e.g., without reference to (one or more) of the threshold levels), the threshold levels are preprogrammed in the state determination circuit system 2104, and the state determination circuit system 2104 determines the state by comparing the measurement to the threshold level. For example, the state determination circuit system 2104 determines that the coolant level is satisfactory in response to determining that the measurement satisfies (e.g., is greater than or equal to) a first threshold level. In some examples, the state determination circuit system 2104 determines that the coolant level is low in response to determining that the measurement satisfies a third threshold level but does not satisfy the first threshold level. In some examples, the state determination circuit system 2104 determines that the coolant level is extremely low in response to determining that the measurement does not satisfy the third threshold level. In some examples, the state determination circuit system 2104 provides the determined state to the storage database 2112 for storage therein. In some examples, the state determination circuit system 2104 is instantiated by a programmable circuit system executing state determination circuit system instructions and / or is configured to perform operations such as by Fig.29Operations similar to those represented by the (one or more) flowcharts.

[0146] Fig.21 The indicator control circuit system 2108 controls and / or adjusts based on the determined state Fig.17 , Fig.18A and / or Fig.18B 1730. For example, in response to the state determination circuit system 2104 determining that the coolant level is satisfactory, the indicator control circuit system 2108 activates (e.g., turns on) the first light source 1732A, and deactivates (e.g., turns off) and / or inactivates the second light source 1732B and the third light source 1732C. In some examples, in response to the state determination circuit system 2104 determining that the coolant level is low, the indicator control circuit system 2108 activates the second light source 1732B, and deactivates and / or inactivates the first light source 1732A and the third light source 1732C. In some examples, in response to the state determination circuit system 2104 determining that the coolant level is extremely low, the indicator control circuit system 2108 activates the third light source 1732C, and deactivates and / or inactivates the first light source 1732A and the second light source 1732B. In some examples, indicator control circuitry 2108 can adjust the frequency of light emitted from light sources 1732A, 1732B, 1732C. For example, indicator control circuitry 2108 can cause (one or more) of light sources 1732 to periodically flash (e.g., when the coolant level is below the second threshold and / or the third threshold).

[0147] In some examples, when the indicator 1730 includes a display, the indicator control circuit system 2108 can cause the indicator 1730 to present text on the display, where the text indicates the status, the coolant level, instructions for refilling the second reservoir 1710, etc. In some examples, when the indicator 1730 includes a speaker, the indicator control circuit system 2108 can cause the indicator 1730 to emit an audio signal when the coolant level is low and / or very low. In some examples, the indicator control circuit system 2108 is instantiated by the programmable circuit system executing the indicator control circuit system instructions and / or is configured to perform operations such as by Fig.29 Operations similar to those represented by the (one or more) flowcharts.

[0148] Fig.21 The alarm generation circuit system 2106 generates one or more example alarms 2116 and / or causes presentation of one or more example alarms 2116 based on the state of the coolant in the second reservoir 1710. Fig.21In the illustrated example of FIG. 1 , the (one or more) alarms 2116 can notify the operator when a refill of the second reservoir 1710 should be performed and / or can provide information associated with the second reservoir 1710 (e.g., status, coolant level, etc.). In some examples, the (one or more) alarms 2116 are output for use in Fig.17 1734. For example, the alert(s) 2116 may include an email and / or SMS message to the user device 1734, and / or the alert(s) 2116 may be presented on a dashboard of the user device 1734. In some examples, the alert generation circuitry 2106 generates and / or outputs the alert(s) 2116 in response to the state determination circuitry 2104 determining that the coolant level in the second reservoir 1710 is low and / or very low. In some examples, the alert generation circuitry 2106 generates and / or outputs the alert(s) 2116 periodically (e.g., every hour, every day, etc.) at a frequency selected by the operator.

[0149] In some examples, the (one or more) alarms 2116 include the coolant level in the second reservoir 1710, and / or the status of the coolant (e.g., satisfactory, low, very low, etc.). In some examples, the (one or more) alarms 2116 include the date and / or time when the (one or more) alarms 2116 are generated. In some examples, the (one or more) alarms 2116 include identification information corresponding to the second reservoir 1710 and / or the associated heat exchanger 1706. For example, the identification information may include an identifier and / or a geographic location (e.g., grid coordinates, global positioning system (GPS) coordinates, etc.) corresponding to the second reservoir 1710 and / or the heat exchanger 1706. In some examples, the (one or more) alarms 2116 include instructions on how to locate and / or service the second reservoir 1710 and / or the heat exchanger 1706. For example, the (one or more) alarms 2116 may include a map for guiding an operator to the location of the second reservoir 1710, instructions on how much coolant to add to the second reservoir 1710, etc. In some examples, the alarm generation circuitry 2106 is instantiated and / or configured by programmable circuitry executing alarm generation circuitry instructions to perform functions such as Fig.29 Operations similar to those represented by the (one or more) flowcharts.

[0150] Fig.21 The communication circuit system 2110 generates example storage information 2118 and / or provides the example storage information 2118 to Fig.17 Example system monitoring circuit system 1704. For example, communication circuit system 2110 via Fig.17 The network 1736 is communicatively coupled to the system monitoring circuit system 1704 for monitoring and / or predicting the implementation Fig.17 The storage information 2118 includes the coolant level and / or the state of the coolant in the second storage 1710, the date and / or time associated with the coolant level and / or state, an identifier and / or location associated with the second storage 1710 and / or the heat exchanger 1706, etc. In some examples, the communication circuit system 2110 provides the storage information 2118 periodically (e.g., daily, weekly, etc.) and / or in response to a request from the system monitoring circuit system 1704. In some examples, the communication circuit system 2110 provides the storage information 2118 to the storage database 2112 for storage therein. In some examples, the communication circuit system 2110 is instantiated by the programmable circuit system executing the communication circuit system instructions and / or is configured to implement functions such as those performed by Fig.29 Operations similar to those represented by the (one or more) flowcharts.

[0151] Fig. 22 yes Fig.17 for monitoring and / or predicting an example heat exchanger (e.g., including Fig.17 A block diagram of an example implementation of an example system monitoring circuitry 1704 for performance of an example system that monitors heat exchangers 1706 . Fig. 22 System monitoring circuitry 1704 may be instantiated by programmable circuitry such as a central processing unit (CPU) executing a first instruction (e.g., creating an instance of system monitoring circuitry 1704, causing system monitoring circuitry 1704 to be present for any length of time, concretizing system monitoring circuitry 1704, implementing system monitoring circuitry 1704, etc.). Additionally or alternatively, Fig. 22 The system monitoring circuit system 1704 may be instantiated by (i) an application specific integrated circuit (ASIC) and / or (ii) a field programmable gate array (FPGA) constructed and / or configured to perform operations corresponding to the first instruction in response to the execution of the second instruction (e.g., creating an instance of the system monitoring circuit system 1704, making it the system monitoring circuit system 1704 for any period of time, concretizing the system monitoring circuit system 1704, implementing the system monitoring circuit system 1704, etc.). It should be understood that Fig. 22 Some or all of the circuitry of can thus be instantiated at the same or different times. For example, Fig. 22 Some or all of the circuitry of may be instantiated in one or more threads that execute concurrently on hardware and / or sequentially on hardware. Furthermore, in some examples, Fig. 22Some or all of the circuit systems may be implemented by microprocessor circuit systems executing instructions and / or FPGA circuit systems performing operations to implement one or more virtual machines and / or containers.

[0152] exist Fig. 22 In the illustrated example, the example system monitoring circuit system 1704 includes an example input interface circuit system 2202, an example model training circuit system 2204, an example coolant anomaly detection circuit system 2206, an example hardware anomaly detection circuit system 2208, an example RUL prediction circuit system 2210, an example cluster analysis circuit system 2212, an example output generation circuit system 2214, an example control and regulation circuit system 2216, and an example system database 2218.

[0153] The example system database 2218 stores data utilized and / or obtained by the system monitoring circuitry 1704 . Fig. 22 The example system database 2218 is implemented by any memory, storage device, and / or storage disk for storing data, such as, for example, flash memory, magnetic media, optical media, solid-state memory, hard drive(s), thumb drive(s), etc. In addition, the data stored in the example system database 2218 may be in any data format, such as, for example, binary data, comma-delimited data, tab-delimited data, structured query language (SQL) structures, etc. Although in the illustrated example, the example system database 2218 is illustrated as a single device, the example system database 2218 and / or any other data storage device described herein may be implemented by any number and / or type(s) of memories.

[0154] The example input interface circuitry 2202 obtains and / or accesses example data to be used by the system monitoring circuitry 1704 to monitor and / or predict the performance of one or more heat exchangers 1706 in an example environment (e.g., a data center). Fig. 22 In the illustrated example, the input interface circuit system 2202 is from Fig.17 and / or Fig.21 The example storage monitoring circuit system 1702 obtains and / or accesses example storage information 2118. In some examples, the storage information 2118 includes coolant level and / or status, a timestamp associated with the coolant level and / or status, and an identifier and / or location corresponding to one or more heat exchangers 1706 included in the example environment. In this example, the input interface circuit system 2202 obtains and / or accesses the coolant level and / or status of the coolant by the operator via the coolant level and / or status of the coolant. Fig.17(One or more) example user inputs 2220 provided by example user device 1734. In some examples, an operator may indicate, via (one or more) user inputs 2220, information obtained based on a manual and / or visual inspection of (one or more) heat exchangers in heat exchanger 1706. For example, (one or more) user inputs 2220 may include coolant levels observed at (one or more) heat exchangers in heat exchanger 1706, anomalies observed at (one or more) heat exchangers in heat exchanger 1706, and the like. In some examples, input interface circuit system 2202 provides storage information 2118 and / or (one or more) user inputs 2220 to system database 2218 for storage therein. In some examples, input interface circuit system 2202 is instantiated and / or configured to perform operations such as those performed by programmable circuit system executing input interface circuit system instructions. Fig.30 Operations similar to those represented by the (one or more) flowcharts.

[0155] The example model training circuitry 2204 generates, trains, and / or retrains one or more example machine learning models used by the system monitoring circuitry 1704. For example, the model training circuitry 2204 generates and / or trains at least one of an example coolant anomaly detection model, an example hardware anomaly detection model, or an example RUL prediction model. Fig. 22 In the example of , model training circuitry 2204 is shown as being implemented by system monitoring circuitry 1704, but model training circuitry 2204 may be implemented by circuitry different from system monitoring circuitry 1704. In such an example, the model(s) generated and / or trained by model training circuitry 2204 may be accessed by system monitoring circuitry 1704 via a database (e.g., system database 2218).

[0156] In some examples, model training circuitry 2204 performs training of one or more machine learning models (e.g., neural networks, linear regression models, etc.) based on example training data. Fig. 22In an example of , the training data may be stored in the system database 2218 and may include a labeled data set based on historical data collected for (one or more) of the heat exchangers 1706 and / or for one or more past heat exchangers. For example, the training data may include sensor data previously collected for (one or more) of the heat exchangers 1706, wherein the sensor data may indicate a coolant level, a coolant pressure, an operating temperature, a heat flux cooled by the heat exchanger 1706, and / or a heat exchanger 1706 pump operating efficiency at a corresponding point in time. Further, the training data includes labels indicating the type(s) of anomalies (e.g., a coolant anomaly and / or a hardware anomaly) observed at the heat exchanger 1706 at the corresponding point in time. For example, when an operator performs a manual and / or visual inspection of (one or more) heat exchangers in heat exchanger 1706, the operator may provide (one or more) user inputs 2220 indicating the type(s) of abnormalities observed at (one or more) heat exchangers in heat exchanger 1706, and the (one or more) user inputs 2220 are used to generate corresponding labels.

[0157] In some examples, the model training circuit system 2204 subdivides the training data into a training data set and a validation data set. For example, a first portion (e.g., 80%) of the training data can be used as a training data set for training (one or more) machine learning models, and a second portion (e.g., 20%) of the training data can be used as a validation data set for validating (one or more) machine learning models. In some examples, the model training circuit system 2204 trains (one or more) machine learning models by correlating historical data (e.g., coolant levels, coolant pressures, operating temperatures, etc. at the heat exchanger 1706 at different points in time) with corresponding (one or more) types of anomalies observed in the training data, and adjusts one or more parameters of (one or more) machine learning models based on the correlation.

[0158] In some examples, during the training of the coolant anomaly detection model, the model training circuit system 2204 determines the correlation between the historical data and the (one or more) types of coolant anomalies observed at different time points. For example, the coolant anomaly may include evaporation and / or overheating of the coolant, leakage of the coolant, reduced efficiency of the coolant, pressure drop of the coolant, corrosion of equipment associated with the coolant, etc. In some examples, the model training circuit system 2204 adjusts the (one or more) parameters of the coolant anomaly detection model based on the correlation so that the coolant anomaly detection model, when executed, outputs possible (one or more) coolant anomaly types and / or (one or more) coolant anomaly scores for (one or more) heat exchangers in the heat exchanger 1706. For example, when the coolant anomaly detection model is executed based on the storage information 2118 corresponding to a specific heat exchanger in the heat exchanger 1706, the coolant anomaly detection model outputs possible and / or expected one or more coolant anomaly types for the specific heat exchanger 1706. In some examples, when no coolant anomaly is expected for heat exchanger 1706, the coolant anomaly detection model outputs an indication that the operation of heat exchanger 1706 is as expected or expected (e.g., without anomaly). Additionally or alternatively, as a result of execution, the coolant anomaly detection model may output a coolant anomaly score for the corresponding heat exchanger 1706. For example, for a corresponding (one or more) coolant anomaly in the coolant anomaly outputted by (one or more) of the heat exchangers in heat exchanger 1706, the coolant anomaly detection model outputs (one or more) coolant anomaly scores indicating the likelihood of the corresponding (one or more) coolant anomaly in the coolant anomaly occurring. In some examples, a reduction in the coolant level for (one or more) of the heat exchangers in heat exchanger 1706 results in an increase in the coolant anomaly score for (one or more) of the heat exchangers in heat exchanger 1706.

[0159] Similarly, during the training of the hardware anomaly detection model, the model training circuit system 2204 determines the correlation between the historical data and the type (one or more) of hardware anomalies observed at different points in time. For example, the hardware anomaly may include a pump failure, a fan failure, a fin damage, an airflow obstruction, an operating temperature of the heat exchanger 1706 exceeding a threshold, etc. In some examples, the model training circuit system 2204 adjusts the (one or more) parameters of the hardware anomaly detection model based on the correlation so that when executed, the hardware anomaly detection model outputs possible (one or more) hardware anomaly types and / or (one or more) hardware anomaly scores for (one or more) heat exchangers in the heat exchanger 1706. In some examples, (one or more) hardware anomaly scores indicate the possibility of (one or more) hardware anomaly types for the corresponding (one or more) heat exchangers 1706. In some examples, when no hardware anomaly is expected and / or detected for the heat exchanger 1706, the hardware anomaly detection model outputs an indication that the operation of the heat exchanger 1706 is as expected or expected (e.g., no anomaly).

[0160] In some examples, the RUL prediction model is a predictive linear regression model trained to predict the RUL of the corresponding heat exchanger 1706, where the RUL represents the duration (e.g., in days, weeks, etc.) of operation as expected or expected for the corresponding heat exchanger 1706 before repair and / or replacement is necessary (e.g., in the absence of faults and / or anomalies). In some examples, a different type of model may be used (e.g., in place of a linear regression model). In some examples, during the training of the RUL prediction model, the model training circuit system 2204 determines the correlation between the heat exchanger parameters (e.g., coolant level, operating time, pump operating efficiency, duration of use, thermal deflection cooled, etc.) of the past heat exchangers represented in the training data and the corresponding duration of normal operation of the past heat exchangers before undergoing repair and / or replacement. In some examples, the model training circuit system 2204 adjusts the (one or more) parameters of the RUL prediction model based on the correlation so that the RUL prediction model, when executed, outputs the predicted RUL for the corresponding (one or more) heat exchangers in the heat exchangers 1706.

[0161] In some examples, the model training circuit system 2204 verifies (one or more) machine learning models based on a second portion of the training data (e.g., a validation data set). For example, the model training circuit system 2204 evaluates (one or more) machine learning models based on the validation data set. For example, the model training circuit system 2204 determines an example coolant anomaly by providing historical data from the validation data set as input to the trained (one or more) coolant anomaly detection model. In some examples, the model training circuit system 2204 determines an example hardware anomaly by providing historical data from the validation data set as input to the trained (one or more) hardware anomaly detection model. In some examples, the model training circuit system 2204 determines an example RUL by providing historical data from the validation data set as input to the trained (one or more) RUL prediction model. In some examples, the model training circuit system 2204 compares the determined parameters (e.g., the determined coolant anomaly, the determined hardware anomaly, and / or the determined RUL) with corresponding reference parameters (e.g., reference coolant anomaly, reference hardware anomaly, and / or reference RUL) from the validation data set.

[0162] In some examples, the model training circuit system 2204 determines whether the determined parameter meets the accuracy threshold by comparing the determined parameter with the corresponding reference parameter from the validation data set. For example, when the determined parameter correctly predicts less than a threshold percentage of the corresponding reference parameter (e.g., less than 90% of the corresponding reference parameter, less than 95% of the corresponding reference parameter, etc.), the model training circuit system 2204 determines that the determined parameter does not meet the accuracy threshold. Conversely, when the determined parameter correctly predicts at least a threshold percentage of the corresponding reference parameter (e.g., at least 90%, at least 95%, etc.), the model training circuit system 2204 determines that the determined parameter meets the accuracy threshold. In some examples, when the determined parameter does not meet the accuracy threshold, the model training circuit system 2204 retrains (one or more) machine learning models. In some examples, when the determined parameter meets the accuracy threshold, the model training circuit system 2204 stores the trained (one or more) machine learning models in the system database 2218 for use by the system monitoring circuit system 1704. In some examples, model training circuit system 2204 is instantiated by programmable circuit system executing model training circuit system instructions and / or is configured to perform operations such as Fig.30 and / or Fig.31 Operations similar to those represented by the (one or more) flowcharts.

[0163] Artificial intelligence (AI) (including machine learning (ML), deep learning (DL) and / or other artificial machine-driven logic) enables machines (e.g., computers, logic circuits, etc.) to process input data using a model to generate outputs based on patterns and / or associations previously learned by the model through a training process. For example, a model can be trained with data to recognize patterns and / or associations, and such patterns and / or associations are followed when processing input data so that (one or more) other inputs result in (one or more) outputs consistent with the recognized patterns and / or associations.

[0164] There are many different types of machine learning models and / or machine learning architectures. In the examples disclosed herein, a machine learning model based on an isolation forest algorithm is used. However, other types of supervised and / or unsupervised machine learning models (e.g., convolutional neural networks (CNNs), linear regression, etc.) may be used in addition or alternatively.

[0165] In the examples disclosed herein, the isolation forest algorithm is an unsupervised machine learning algorithm for anomaly detection. In some examples, the isolation forest algorithm constructs a binary tree based on a randomly selected segmentation from a data feature provided as an input. Anomalies can be identified based on multiple segmentations to isolate the selected data points from the remaining data points in the data set. For example, anomalies are identified as (one or more) data points that require less segmentation in the data point (e.g., compared to the remaining data points of the data point) to isolate (one or more) data points in the data point from the remaining data points in the data point, and thus are different from the remaining data points in the data point. In some examples disclosed herein, a random forest algorithm can be used, wherein the random forest algorithm is a supervised machine learning algorithm. In some examples, the random forest algorithm generates a decision tree based on a random subset of the training data and / or a random subset of features, and outputs a prediction based on a combination of the results from the decision tree. Although the isolation forest and / or random forest algorithm can be used for (one or more) machine learning models in the machine learning model disclosed herein, different types of machine learning models can be used instead.

[0166] In general, implementing an ML / AI system involves two phases: a learning / training phase and an inference phase. In the learning / training phase, a training algorithm is used to train the model to operate according to patterns and / or associations based on, for example, training data. In general, the model includes internal parameters that guide how input data is transformed into output data, such as by a series of nodes and connections within the model. Additionally, hyperparameters are used as part of the training process to control how learning is performed (e.g., learning rate, number of layers to be used in the machine learning model, etc.). Hyperparameters are defined as training parameters that are determined before initiating the training process.

[0167] Different types of training can be performed based on the type and / or expected output of the ML / AI model. For example, supervised training uses inputs and corresponding expected (e.g., labeled) outputs to select parameters for the ML / AI model that reduce model error (e.g., by iterating over combinations of selected parameters). As used herein, labeling refers to the expected output of the machine learning model (e.g., classification, expected output value, etc.). Alternatively, unsupervised training (e.g., for deep learning, subsets of machine learning, etc.) involves selecting parameters for the ML / AI model from inferring patterns from the inputs (e.g., without the benefit of expected (e.g., labeled) outputs).

[0168] In some examples disclosed herein, unsupervised training is used to train the ML / AI model. However, any other training algorithm may be used in addition or alternatively. In some examples disclosed herein, training is performed until a target accuracy level (e.g., >95%) is reached. Training is performed using hyperparameters that control how learning is performed (e.g., learning rate, number of layers to be used in the machine learning model, etc.). In some examples, pre-trained (one or more) models are used. In some examples, retraining may be performed. Such retraining may be performed in response to poor crop residue detection, for example, due to, for example, low ambient lighting.

[0169] Training is performed using training data. In some examples disclosed herein, the training data is derived from historical data labeled with associated anomalies (e.g., coolant anomalies and / or hardware anomalies) and / or a threshold number (e.g., hundreds, thousands) of observed RULs. Labeling can be applied to the training data by an operator, wherein the labeling includes identifying one or more anomalies associated with (one or more) of the heat exchangers represented in the training data.

[0170] Once training is complete, the model is deployed to serve as an executable construct that processes inputs and provides outputs based on the network of nodes and connections defined in the model. In the examples disclosed herein, the model(s) are stored in the system database 2218. Fig. 22 The system monitoring circuit system 1704 is used to execute (one or more) models.

[0171] Once trained, the deployed model can be operated in the inference phase to process data. In the inference phase, the data to be analyzed (e.g., real-time data) is input to the model, and the model executes to create an output. The inference phase can be thought of as the AI ​​"thinking" to generate output based on what it has learned from training (e.g., by executing the model to apply the learned patterns and / or associations to real-time data). In some examples, the input data undergoes preprocessing before being used as input to the machine learning model. In addition, in some examples, the output data may undergo post-processing after it is generated by the AI ​​model to transform the output into a useful result (e.g., a display of data, instructions to be executed by the machine, etc.).

[0172] In some examples, the output of the deployed model can be captured and provided as feedback. By analyzing the feedback, the accuracy of the deployed model can be determined. If the feedback indicates that the accuracy of the deployed model is below a threshold or other criteria, the feedback and updated training data sets, hyperparameters, etc. can be used to trigger training of the updated model to generate an updated deployed model.

[0173] refer to Fig. 22, the coolant anomaly detection circuit system 2206 detects and / or predicts a coolant anomaly associated with (one or more) of the heat exchangers 1706. For example, the coolant anomaly detection circuit system 2206 executes a trained coolant anomaly detection model based on the storage information 2118 for the heat exchanger 1706, wherein the storage information 2118 includes past and / or current coolant levels, coolant pressures, operating temperatures, etc. As a result of the execution, the coolant anomaly detection circuit system 2206 outputs a type of coolant anomaly detected for the corresponding (one or more) of the heat exchangers 1706 (e.g., evaporation and / or overheating of the coolant, leakage of the coolant, reduced efficiency of the coolant, pressure drop of the coolant, corrosion of equipment associated with the coolant, etc.). In some examples, based on the execution, the coolant anomaly detection circuit system 2206 outputs a coolant anomaly score for the corresponding heat exchanger 1706. In some examples, the coolant anomaly detection circuit system 2206 provides the output of the coolant anomaly detection model (e.g., the detected coolant anomaly and / or the coolant anomaly score for the corresponding heat exchanger in the heat exchanger 1706) to the system database 2218 for storage therein. In some examples, the coolant anomaly detection circuit system 2206 is instantiated by the programmable circuit system executing the coolant anomaly detection circuit system instructions and / or is configured to perform functions such as by Fig.30 Operations similar to those represented by the (one or more) flowcharts.

[0174] Fig. 22The hardware anomaly detection circuit system 2208 detects and / or predicts hardware anomalies associated with (one or more) heat exchangers in the heat exchangers 1706. For example, the hardware anomaly detection circuit system 2208 executes the trained (one or more) hardware anomaly detection model based on the storage information 2118 for the heat exchanger 1706, wherein the storage information 2118 includes past and / or current coolant levels, coolant pressures, operating temperatures, etc. As a result of the execution, the hardware anomaly detection circuit system 2208 outputs an example hardware anomaly type detected for the corresponding (one or more) heat exchangers in the heat exchangers 1706 (e.g., pump failure, fan failure, fin damage, airflow obstruction, operating temperature above a threshold, etc.). In some examples, based on the execution, the hardware anomaly detection circuit system 2208 outputs an example hardware anomaly score for the corresponding heat exchanger 1706. In some examples, hardware anomaly detection circuit system 2208 provides the output of the hardware anomaly detection model (e.g., the detected hardware anomaly and / or the hardware anomaly score for the corresponding heat exchanger in heat exchanger 1706) to system database 2218 for storage therein. In some examples, hardware anomaly detection circuit system 2208 is instantiated by programmable circuit system executing hardware anomaly detection circuit system instructions and / or is configured to perform operations such as by Fig.30 Operations similar to those represented by the (one or more) flowcharts.

[0175] Fig. 22 The RUL prediction circuitry 2210 predicts the RUL for the heat exchanger(s) in the heat exchangers 1706. For example, the RUL prediction circuitry 2210 executes the trained RUL prediction model(s) based on the storage information 2118 for the heat exchangers 1706, wherein the storage information 2118 includes past and / or current coolant levels, coolant pressures, operating temperatures, pump operating efficiencies, heat fluxes through the heat exchangers 1706, elapsed duration of use, etc. As a result of the execution, the RUL prediction circuitry 2210 outputs a predicted RUL (e.g., in units of hours, days, weeks, etc.) for the corresponding heat exchanger(s) in the heat exchangers 1706 (e.g., the predicted duration that the corresponding heat exchanger(s) in the heat exchangers 1706 will be in normal operation before repair and / or replacement is necessary). In some examples, RUL prediction circuitry 2210 provides the output of the RUL prediction model (e.g., the predicted RUL of (one or more) heat exchangers in heat exchanger 1706) to system database 2218 for storage therein. In some examples, RUL prediction circuitry 2210 is instantiated by programmable circuitry executing RUL prediction circuitry instructions and / or is configured to perform functions such as those specified by Fig.30Operations similar to those represented by the (one or more) flowcharts.

[0176] Fig. 22 The cluster analysis circuit system 2212 of the heat exchanger 1706 identifies and / or analyzes one or more clusters (e.g., groups) of the heat exchangers 1706 based on the storage information 2118 and / or based on the output of the (one or more) machine learning models. For example, the cluster analysis circuit system 2212 analyzes the coolant level pattern for the heat exchanger 1706 represented in the storage information 2118, and groups the (one or more) heat exchangers in the (one or more) heat exchangers 1706 based on the similarity of the coolant level pattern. In some examples, the cluster analysis circuit system 2212 groups the (one or more) heat exchangers in the (one or more) heat exchangers 1706 that correspond to a specific coolant anomaly type, a hardware anomaly type, and / or a predicted RUL range. In some examples, the clusters of the heat exchangers 1706 can be identified and / or presented to an operator to facilitate maintenance of the heat exchanger 1706. For example, based on the cluster(s), the operator may identify heat exchanger(s) in heat exchangers 1706 that have similar anomalies and / or irregularities in corresponding coolant level patterns, and the operator may proactively repair the identified heat exchanger(s) in heat exchangers 1706 to reduce the anomalies and / or irregularities. Additionally or alternatively, Fig. 22 The control adjustment circuit system 2216 can cause one or more control parameters for the heat exchanger(s) in the identified cluster in the heat exchanger 1706 to be adjusted based on the abnormality type and / or coolant level pattern observed for the identified cluster. In some examples, the cluster analysis circuit system 2212 is instantiated by the programmable circuit system executing the cluster analysis circuit system instructions and / or is configured to perform operations such as those performed by Fig.30 Operations similar to those represented by the (one or more) flowcharts.

[0177] Fig. 22The control regulation circuit system 2216 causes one or more example control parameters of the heat exchanger 1706 to be adjusted. For example, the control parameters may include a fan speed, a pump speed, and / or a coolant flow rate of the heat exchanger 1706. In some examples, the control regulation circuit system 2216 causes (one or more) control parameters to be adjusted based on the output from one or more machine learning models generated by the model training circuit system 2204. In some examples, the machine learning model is trained based on (one or more) correlations between the control parameters (e.g., fan speed, pump speed, etc.) and the cooling performance of the heat exchanger 1706. In some examples, the control regulation circuit system 2216 executes (one or more) machine learning models based on the storage information 2118 and / or the detected and / or predicted values ​​(e.g., anomaly type, anomaly score, etc.) to output one or more control parameter values. In some examples, the control regulation circuit system 2216 transmits one or more control signals to the fan, pump, and / or other components of the heat exchanger 1706 to adjust (one or more) control parameters based on (one or more) control parameter values. In some examples, the control regulation circuit system 2216 transmits (one or more) control signals, and (one or more) control parameters are adjusted accordingly without user intervention. In some examples, the control regulation circuit system 2216 outputs (one or more) alerts and / or (one or more) recommendations for presentation to prompt the user to provide (one or more) inputs to initiate or facilitate (one or more) adjustments to (one or more) control parameters. In some examples, the control regulation circuit system 2216 is instantiated and / or configured by programmable circuit system executing control regulation circuit system instructions to perform operations such as those performed by Fig.30 Operations similar to those represented by the (one or more) flowcharts.

[0178] Fig. 22 The output generation circuit system 2214 outputs example display information 2222 for presentation to an operator (e.g., Fig. 22 1734). Fig. 22In the illustrated example of , the display information 2222 may include one or more example tables and / or example graphs to represent the storage information 2118 and / or one or more characteristics predicted and / or detected for the heat exchanger 1706 (e.g., coolant anomalies, hardware anomalies, anomaly scores, RUL, etc.). For example, the display information 2222 may include (one or more) identifiers, (one or more) locations, (one or more) coolant levels, (one or more) coolant anomaly types, (one or more) hardware anomaly types, and / or (one or more) anomaly scores associated with (one or more) heat exchangers in the heat exchanger 1706. In some examples, the display information 2222 is presented at the user device 1734 using at least one of an email, an SMS message, or a dashboard at the user device 1734. The following description is provided in conjunction with Figure 23-Figure 26 Further describing example graphs and / or tables that may be generated and / or output by output generation circuitry 2214. In some examples, output generation circuitry 2214 is instantiated and / or configured by programmable circuitry executing output generation circuitry instructions to perform operations such as those performed by Fig.30 Operations similar to those represented by the (one or more) flowcharts.

[0179] Fig.23 The figure shows that Fig. 22 The first example graph 2300 is generated and / or output by the example output generation circuit system 2214. Fig.23 In the illustrated example of , the first graph 2300 represents example coolant anomaly types detected and / or predicted at corresponding locations (e.g., grid locations) of the heat exchanger 1706 (e.g., in a data center). In this example, the first graph 2300 includes an example marker 2302 that represents the location of the heat exchanger 1706 relative to a first example axis (e.g., an x-axis, a horizontal axis) 2304 and a second example axis (e.g., a y-axis, a vertical axis) 2306.

[0180] exist Fig.23In the illustrated example of the present invention, different marks (e.g., having different sizes, shapes, colors, etc.) in the marks 2302 are used to represent corresponding coolant anomaly types detected and / or predicted for the heat exchanger 1706. For example, the first example mark 2302A corresponds to the first (one or more) heat exchangers in the heat exchanger 1706 that operate as expected or expected (e.g., no coolant anomaly is detected), the second example mark 2302B corresponds to the second (one or more) heat exchangers in the heat exchanger 1706 at which evaporation and / or overheating of the coolant is detected, the third example mark 2302C corresponds to the third (one or more) heat exchangers in the heat exchanger 1706 at which a leak of the coolant is detected, and the fourth example mark 2302D corresponds to the third (one or more) heat exchangers in the heat exchanger 1706 at which a leak of the coolant is detected. 2302E corresponds to the fifth heat exchanger(s) in heat exchangers 1706 at which a pressure drop of the coolant was detected, the sixth example marker 2302F corresponds to the sixth heat exchanger(s) in heat exchangers 1706 at which corrosion was detected, and the seventh example marker 2302G corresponds to the seventh heat exchanger(s) in heat exchangers 1706 at which an unknown coolant anomaly was detected. In some examples, when Fig.17 When the system monitoring circuit system 1704 detects a low coolant level, but the storage information 2118 associated with the seventh (one or more) heat exchangers in the heat exchanger 1706 does not correspond to any coolant abnormality (e.g., leak, pressure drop, evaporation, etc.) in the known coolant abnormalities, an unknown coolant abnormality is detected. In some examples, when the unknown coolant abnormality is detected, the operator can manually check the seventh (one or more) heat exchangers in the heat exchanger 1706 to identify and / or classify the type of abnormality (e.g., cause, source) at the (one or more) heat exchangers 1706. In some examples, the operator can indicate the abnormality type to the system monitoring circuit system 1704 via (one or more) user inputs 2220. In some such examples, when the storage information 2118 for the heat exchanger(s) in heat exchanger 1706 corresponds to the storage information 2118 for the seventh heat exchanger(s) in heat exchanger 1706, the indicated anomaly type may be used to train and / or retrain the machine learning model(s) (e.g., coolant anomaly detection model(s), hardware anomaly detection model(s), etc.) in the machine learning model to make predictions for the indicated anomaly type for the heat exchanger(s) in heat exchanger 1706.

[0181] In some examples, one or more additional labels may be included in first graph 2300 to indicate one or more additional coolant anomaly types. In some examples, one or more of labels 2302 and / or coolant anomaly types may be omitted from first graph 2300. In some examples, first graph 2300 may be output for presentation in Fig.17 on user device 1734 to facilitate an operator to monitor and / or maintain (one or more) heat exchangers in heat exchanger 1706.

[0182] Fig.24 The figure shows that Fig. 22 A second example graph 2400 is generated and / or output by the example output generation circuitry 2214. Fig.24 In the illustrated example of , the second graph 2400 represents example hardware anomaly types detected and / or predicted at corresponding locations (e.g., grid locations) of the heat exchanger 1706. In this example, the second graph 2400 includes example markers 2402 that represent the locations of the heat exchanger 1706 relative to a first example axis (e.g., an x-axis, a horizontal axis) 2404 and a second example axis (e.g., a y-axis, a vertical axis) 2406.

[0183] exist Fig.24 In the illustrated example, different marks (eg, having different sizes, shapes, colors, etc.) in marks 2402 are used to represent corresponding hardware anomaly types detected and / or predicted for heat exchanger 1706 . For example, the first example marker 2402A corresponds to a first (one or more) heat exchanger in the heat exchanger 1706 operating as expected or intended (e.g., no hardware anomaly is detected), the second example marker 2402B corresponds to a second (one or more) heat exchanger in the heat exchanger 1706 at which a pump failure is detected, the third example marker 2402C corresponds to a third (one or more) heat exchanger in the heat exchanger 1706 at which a fan failure is detected, the fourth example marker 2402D corresponds to a fourth (one or more) heat exchanger in the heat exchanger 1706 at which airflow obstruction and / or fin damage is detected, the fifth example marker 2402E corresponds to a fifth (one or more) heat exchanger in the heat exchanger 1706 at which a high operating temperature due to a pump failure and / or a fan failure is detected, and the sixth example marker 2402F corresponds to a sixth (one or more) heat exchanger in the heat exchanger 1706 at which an unknown hardware anomaly is detected.

[0184] In some examples, one or more additional labels can be included in the second graph 2400 to indicate one or more additional hardware exception types. In some examples, one or more of the labels 2402 and / or the hardware exception types can be omitted from the second graph 2400. In some examples, the second graph 2400 can be output for presentation in Fig.17 on user device 1734 to facilitate an operator to monitor and / or maintain (one or more) heat exchangers in heat exchanger 1706.

[0185] Fig.25 The figure shows that Fig. 22 The example output generation circuit system 2214 generates and / or outputs a first example table 2500. Fig.25 In the illustrated example of , the first table 2500 represents the storage information 2118 and / or other coolant abnormality information (eg, coolant abnormality type, coolant abnormality score, etc.) associated with a corresponding heat exchanger in the heat exchangers 1706. Fig.25 In the illustrated example, the first table 2500 includes a first example column 2502 representing example identifiers associated with certain of the heat exchangers 1706, a second example column 2504 representing example locations (e.g., grid locations) of the corresponding heat exchangers 1706, a third example column 2506 representing example coolant levels (e.g., expressed as a percentage of coolant capacity) of the corresponding heat exchangers 1706, a fourth example column 2508 representing example coolant states (e.g., satisfactory, low, or very low) of the corresponding heat exchangers 1706, a fifth example column 2510 representing an example date on which storage information 2118 for the corresponding heat exchanger 1706 was determined and / or obtained, a sixth example column 2512 representing example coolant anomaly scores for the corresponding heat exchangers 1706, and a seventh example column 2514 representing example coolant anomaly types for the corresponding heat exchangers 1706.

[0186] In some examples, the first table 2500 may include one or more additional columns that represent, for example, example hardware anomaly scores and / or example hardware anomaly types corresponding to the heat exchanger 1706. In some examples, one or more of the columns 2502, 2504, 2506, 2508, 2510, 2512, 2514 may be omitted. In some examples, the first table 2500 may be output for presentation in Fig.17 on user device 1734 to facilitate an operator to monitor and / or maintain (one or more) heat exchangers in heat exchanger 1706.

[0187] Fig.26 The figure shows that Fig. 22The example output generation circuit system 2214 generates and / or outputs a second example table 2600. Fig.26 In the illustrated example of , the second table 2600 represents the storage information 2118 and / or predicted RUL for a corresponding heat exchanger in the heat exchangers 1706 . In this example, the second table 2600 includes a first example column 2602 representing an example identifier associated with a heat exchanger in the heat exchangers 1706, a second example column 2604 representing a first example grid position (e.g., an x-coordinate) of the corresponding heat exchanger 1706, a third example column 2606 representing a second example grid position (e.g., a y-coordinate) of the corresponding heat exchanger 1706, a fourth example column 2608 representing an example coolant level (e.g., expressed as a proportion of the coolant capacity) of the corresponding heat exchanger 1706, a fifth example column 2610 representing an example coolant state (e.g., satisfactory, low, or very low) of the corresponding heat exchanger 1706, a sixth example column 2612 representing an example date and / or time at which storage information 2118 for the corresponding heat exchanger 1706 is determined and / or obtained, and a seventh example column 2614 representing a predicted RUL (e.g., in days) for the corresponding heat exchanger 1706.

[0188] In some examples, the second table 2600 may include one or more additional columns that represent, for example, an example coolant anomaly score, an example hardware anomaly score, an example coolant anomaly type, and / or an example hardware anomaly type for the corresponding heat exchanger 1706. In some examples, one or more of the columns 2602, 2604, 2606, 2608, 2610, 2612, 2614 may be omitted. In some examples, the second table 2600 may be output for presentation on a computer. Fig.17 on user device 1734 to facilitate an operator to monitor and / or maintain (one or more) heat exchangers in heat exchanger 1706.

[0189] Fig.27A is a schematic illustration of a first example liquid cooling system 2700 of an example data center environment in which the examples disclosed herein may be implemented. Fig.27A In the illustrated example of , a first liquid cooling system 2700 includes an example cooling distribution unit (CDU) 2702 fluidly coupled to an example cooling tower 2704. In this example, CDU 2702 is an in-row CDU fluidly and / or operatively coupled to an example row 2706, which includes a plurality of example racks (e.g., server racks, liquid cooling racks) 2708 to be cooled using a fluid (e.g., coolant) from CDU 2702. Fig.27AIn the example of , row 2706 includes ten racks 2708. In some examples, a different number of racks (e.g., less than ten, greater than ten) may be used instead. Fig.27A One row 2706 is shown in FIG, but in some examples, CDU 2702 may be fluidly coupled to multiple rows of racks 2708.

[0190] In operation, the cooling tower 2704 provides fluid to the CDU 2702 along a first example supply line 2710, where the fluid is provided at a first temperature. In some examples, the CDU 2702 directs the fluid to (one or more) of the racks 2708 along a second example supply line 2712. In such examples, the fluid cools the (one or more) electronic devices (e.g., draws heat away from the (one or more) electronic devices) as the fluid passes through and / or across one or more electronic devices included in the rack 2708. In some examples, the heated fluid from the rack 2708 is returned to the CDU 2702 along a first example return line 2714, where the heated fluid is at a second temperature greater than the first temperature. In some examples, the CDU 2702 provides the heated fluid to the cooling tower via a second example return line 2716, and the heated fluid can be cooled (e.g., back to the first temperature) at the cooling tower 2704 before returning to the CDU 2702.

[0191] exist Fig.27A In the illustrated example of the first reservoir 1708, the first reservoir 1708 is fluidly coupled to the CDU 2702 to provide and / or store fluid to be used by the CDU 2702. Further, the example second reservoir 1710 is fluidly coupled to the first reservoir 1708 to provide fluid in the event of a loss of coolant in the first reservoir 1708 (e.g., due to evaporation, leakage, etc.). As described above, the example coolant monitoring device 1812 can be operably coupled to the second reservoir 1710 to detect and / or indicate a coolant level in the second reservoir 1710. Additionally or alternatively, the coolant monitoring device 1812 can provide the detected coolant level to the Fig.21 The storage monitoring circuit system 1702 and / or Fig. 22 The system monitoring circuit system 1704 is used to monitor and / or predict abnormalities associated with the CDU 2702 (e.g., coolant abnormalities and / or hardware abnormalities).

[0192] Fig.27B A second example liquid cooling system 2720 of an example data center environment is shown in which the examples disclosed herein may be implemented. Fig.27A In contrast to the first liquid cooling system 2700, Fig.27BThe second liquid cooling system 2720 includes a plurality of example CDUs (e.g., in-rack CDUs) 2722A, 2722B that are fluidically and / or operably coupled to respective racks in the racks 2708A, 2708B. In this example, the cooling tower 2704 provides fluid to the CDUs 2722A, 2722B via example supply lines 2724, and the CDUs 2722A, 2722B circulate the fluid through the respective racks 2708A, 2708B to cool one or more electronic components therein. In some examples, the heated fluid from the racks 2708A, 2708B is returned to the cooling tower 2704 via example return lines 2726.

[0193] exist Fig.27B In the example of , the first example reservoir 1708A, 1708B is fluidly coupled to the respective CDU 2722A, 2722B to store fluid from and / or supply fluid to the CDU 2722A, 2722B. In this example, the second example reservoir 1710A, 1710B is fluidly coupled to the respective reservoir 1708A, 1708B, and the example coolant monitoring device 1812A, 1812B is operably coupled to the respective reservoir 1710A, 1710B to detect and / or indicate the coolant level therein. Fig.27B In the example of FIG. 1 , one of CDUs 2722, one of first reservoirs 1708, one of second reservoirs 1710, and one of coolant monitoring devices 1812 are implemented on corresponding racks in racks 2708. In some examples, one or more of CDUs 2722, one or more of first reservoirs 1708, one or more of second reservoirs 1710, and / or one or more of coolant monitoring devices 1812 can be used for multiple racks in racks 2708.

[0194] Fig.28A The figure illustrates an example immersion tank (e.g., an immersion cooling tank) 2800 in which the examples disclosed herein may be implemented. In some examples, the immersion tank 2800 may be used to cool one or more devices (e.g., electronic devices and / or components) 2802 immersed in a fluid (e.g., water, coolant, etc.) 2804 contained in the immersion tank 2800. In some examples, single-phase cooling may be used, in which the fluid 2804 does not change phase (e.g., remains in a liquid phase) as heat is drawn away from the device 2802. Conversely, in some examples, two-phase cooling may be used, in which the heat generated by the device 2802 causes the fluid 2804 to change phase from a liquid phase to a vapor phase. Fig.28AIn the example of , an example condenser (e.g., condenser coil) 2806 is positioned in the immersion tank 2800 to enable cooling and / or condensation of the vaporized fluid 2804. For example, an example coolant is provided to the condenser 2806 at an example inlet 2808, and the coolant flows through an example coil 2810 in the condenser 2806 before exiting the immersion tank 2800 and flowing to an example heat exchanger (e.g., heat exchanger 1706) operably coupled to the condenser 2806. As the coolant flows through the coil 2810, the coolant extracts heat from the vaporized fluid 2804 to enable the fluid 2804 to return to a liquid phase.

[0195] In some examples, the level of fluid 2804 in immersion tank 2800 decreases over time due to vaporization and / or evaporation of the fluid. Fig.28A In the illustrated example of the present invention, the second reservoir 1710 and the associated coolant monitoring device 1812 are implemented on the immersion tank 2800 to supply additional fluid thereto. In some examples, the immersion tank 2800 includes a first fluid level sensor 2812 for detecting whether the fluid in the immersion tank 2800 is below a first example fluid level (e.g., a low fluid level) and a second fluid level sensor 2814 for detecting whether the liquid in the immersion tank 2800 is below a second example fluid level (e.g., an extremely low fluid level). In some examples, when the fluid level is below the low fluid level and / or the extremely low fluid level, the second reservoir 1710 supplies additional fluid to the immersion tank 2800. For example, one or more of the fluid level sensors 2812, 2814 may be operably and / or communicatively coupled to an example valve 2816 implemented between the second reservoir 1710 and the immersion tank 2800. In some examples, when the fluid level is below a low fluid level and / or a critically low fluid level, valve 2816 may be opened (e.g., based on example signals from one or more of the fluid level sensors 2812, 2814) to enable fluid to flow from second reservoir 1710 to immersion tank 2800. Conversely, when the fluid level is at or above a low fluid level and / or a critically low fluid level, valve 2816 may be closed to restrict and / or prevent fluid from flowing from second reservoir 1718 to immersion tank 2800.

[0196] Fig.28B The diagram shows Fig.28A Example immersion tank 2800, wherein the second reservoir 1710 is coupled to the immersion tank 2800 Fig.28A28. In the example, the second reservoir 1710 is fluidically coupled to the fluid 2804 in the immersion tank 2800 via an example conduit (e.g., tube) 2822. In the example, the conduit 2822 extends from the top 2820 of the immersion tank 2800 to a location of the immersion tank 2800 at or below the first fluid level sensor 2812. In some examples, the length and / or location of the conduit 2822 can be different. For example, the conduit 2822 can extend to a location of the immersion tank 2800 at or below the second fluid level sensor 2812, at the bottom 2824 of the immersion tank 2800, and so on.

[0197] In some examples, storage monitoring circuit system 1702 includes means for obtaining sensor data. For example, the means for obtaining sensor data can be implemented by sensor interface circuit system 2102. In some examples, sensor interface circuit system 2102 can be implemented by, for example, Fig.32 2102 can be instantiated by a programmable circuit system such as the example programmable circuit system 3212 of . For example, the sensor interface circuit system 2102 can be instantiated by Fig.34 The example microprocessor 3400 performs operations such as those performed by Fig.29 In some examples, the sensor interface circuit system 2102 may be instantiated by a hardware logic circuit system, which may be an ASIC, an XPU, or a processor configured and / or constructed to perform operations corresponding to the machine-readable instructions. Fig.35 FPGA circuit system 3500 is implemented. Additionally or alternatively, sensor interface circuit system 2102 can be instantiated by any other combination of hardware, software and / or firmware. For example, sensor interface circuit system 2102 can be implemented by at least one or more hardware circuits (e.g., processor circuit system, discrete and / or integrated analog and / or digital circuit system, FPGA, ASIC, XPU, comparator, operational amplifier (operational-amplifier, op-amp), logic circuit, etc.) configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are also applicable.

[0198] In some examples, storage monitoring circuit system 1702 includes means for determining a state. For example, means for determining a state may be implemented by state determination circuit system 2104. In some examples, state determination circuit system 2104 may be implemented by, for example, Fig.32For example, the state determination circuit system 2104 may be instantiated by a programmable circuit system such as the example programmable circuit system 3212 of FIG. Fig.34 The example microprocessor 3400 performs operations such as those performed by Fig.29 In some examples, the state determination circuit system 2104 may be instantiated by a hardware logic circuit system, which may be an ASIC, an XPU, or a processor configured and / or constructed to perform operations corresponding to the machine-readable instructions. Fig.35 The state determination circuit system 2104 may be implemented by any other combination of hardware, software, and / or firmware. Additionally or alternatively, the state determination circuit system 2104 may be instantiated by any other combination of hardware, software, and / or firmware. For example, the state determination circuit system 2104 may be implemented by at least one or more hardware circuits (e.g., processor circuit systems, discrete and / or integrated analog and / or digital circuit systems, FPGAs, ASICs, XPUs, comparators, operational amplifiers (op-amps), logic circuits, etc.) configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are also applicable.

[0199] In some examples, storage monitoring circuit system 1702 includes means for generating an alarm. For example, means for generating an alarm can be implemented by alarm generation circuit system 2106. In some examples, alarm generation circuit system 2106 can be implemented by, for example, Fig.32 For example, the alarm generating circuit system 2106 may be instantiated by a programmable circuit system such as the example programmable circuit system 3212 of FIG. Fig.34 The example microprocessor 3400 performs operations such as those performed by Fig.29 In some examples, the alarm generation circuit system 2106 may be instantiated by hardware logic circuit system, which may be an ASIC, XPU or other processor configured and / or constructed to perform operations corresponding to the machine-readable instructions. Fig.35FPGA circuit system 3500 is implemented. Additionally or alternatively, alarm generation circuit system 2106 can be instantiated by any other combination of hardware, software, and / or firmware. For example, alarm generation circuit system 2106 can be implemented by at least one or more hardware circuits (e.g., processor circuit system, discrete and / or integrated analog and / or digital circuit system, FPGA, ASIC, XPU, comparator, operational amplifier (op-amp), logic circuit, etc.) configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are also applicable.

[0200] In some examples, storage monitoring circuit system 1702 includes means for controlling an indicator. For example, the means for controlling an indicator can be implemented by indicator control circuit system 2108. In some examples, indicator control circuit system 2108 can be implemented by, for example, Fig.32 2108 can be instantiated by a programmable circuit system such as the example programmable circuit system 3212 of . For example, the indicator control circuit system 2108 can be Fig.34 The example microprocessor 3400 performs operations such as those performed by Fig.29 In some examples, the indicator control circuit system 2108 may be instantiated by a hardware logic circuit system, which may be an ASIC, an XPU, or a processor configured and / or constructed to perform operations corresponding to the machine-readable instructions. Fig.35 Indicator control circuit system 2108 may be implemented by any other combination of hardware, software, and / or firmware. Indicator control circuit system 2108 may be implemented by FPGA circuit system 3500. Additionally or alternatively, indicator control circuit system 2108 may be instantiated by any other combination of hardware, software, and / or firmware. For example, indicator control circuit system 2108 may be implemented by at least one or more hardware circuits (e.g., processor circuit system, discrete and / or integrated analog and / or digital circuit system, FPGA, ASIC, XPU, comparator, operational amplifier (op-amp), logic circuit, etc.) configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are also applicable.

[0201] In some examples, storage monitoring circuit system 1702 includes means for communication. For example, means for communication can be implemented by communication circuit system 2110. In some examples, communication circuit system 2110 can be implemented by, for example, Fig.32 For example, communication circuit system 2110 may be implemented by programmable circuit system such as example programmable circuit system 3212 of FIG. Fig.34 The example microprocessor 3400 performs operations such as those performed by Fig.29 In some examples, the communication circuit system 2110 may be instantiated by a hardware logic circuit system, which may be an ASIC, an XPU, or a processor configured and / or constructed to perform operations corresponding to the machine-readable instructions. Fig.35 The communication circuit system 2110 is implemented by the FPGA circuit system 3500 of the present invention. Additionally or alternatively, the communication circuit system 2110 can be instantiated by any other combination of hardware, software and / or firmware. For example, the communication circuit system 2110 can be implemented by at least one or more hardware circuits (e.g., processor circuit system, discrete and / or integrated analog and / or digital circuit system, FPGA, ASIC, XPU, comparator, operational amplifier (op-amp), logic circuit, etc.) configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are also applicable.

[0202] In some examples, system monitoring circuitry 1704 includes means for obtaining input. For example, means for obtaining input may be implemented by input interface circuitry 2202. In some examples, input interface circuitry 2202 may be implemented by, for example, Fig.33 3312. For example, input interface circuitry 2202 may be implemented by Fig.34 The example microprocessor 3400 performs operations such as those performed by Fig.30 In some examples, the input interface circuit system 2202 may be instantiated by a hardware logic circuit system, which may be an ASIC, an XPU, or a processor configured and / or constructed to perform operations corresponding to the machine-readable instructions. Fig.35 FPGA circuit system 3500 is implemented. Additionally or alternatively, input interface circuit system 2202 can be instantiated by any other combination of hardware, software and / or firmware. For example, input interface circuit system 2202 can be implemented by at least one or more hardware circuits (e.g., processor circuit system, discrete and / or integrated analog and / or digital circuit system, FPGA, ASIC, XPU, comparator, operational amplifier (op-amp), logic circuit, etc.) configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are also applicable.

[0203] In some examples, system monitoring circuitry 1704 includes means for training. For example, means for training may be implemented by model training circuitry 2204. In some examples, model training circuitry 2204 may be implemented by, for example, Fig.33 The model training circuit system 2204 may be instantiated by a programmable circuit system such as the example programmable circuit system 3312 of . For example, the model training circuit system 2204 may be instantiated by Fig.34 The example microprocessor 3400 performs operations such as those performed by Fig.31 In some examples, the model training circuit system 2204 may be instantiated by a hardware logic circuit system, which may be an ASIC, XPU, or other processor configured and / or constructed to perform operations corresponding to the machine-readable instructions. Fig.35 FPGA circuit system 3500 is implemented. Additionally or alternatively, model training circuit system 2204 can be instantiated by any other combination of hardware, software and / or firmware. For example, model training circuit system 2204 can be implemented by at least one or more hardware circuits (e.g., processor circuit system, discrete and / or integrated analog and / or digital circuit system, FPGA, ASIC, XPU, comparator, operational amplifier (op-amp), logic circuit, etc.) configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are also applicable.

[0204] In some examples, the system monitoring circuit system 1704 includes a device for detecting a coolant anomaly. For example, the device for detecting a coolant anomaly can be implemented by a coolant anomaly detection circuit system 2206. In some examples, the coolant anomaly detection circuit system 2206 can be implemented by a device such as Fig.33 For example, the coolant anomaly detection circuit system 2206 may be instantiated by a programmable circuit system such as the example programmable circuit system 3312 of FIG. Fig.34 The example microprocessor 3400 performs operations such as those performed by Fig.30 In some examples, the coolant anomaly detection circuit system 2206 may be instantiated by a hardware logic circuit system, which may be an ASIC, an XPU, or a processor configured and / or constructed to perform operations corresponding to the machine-readable instructions. Fig.35FPGA circuit system 3500 is implemented. Additionally or alternatively, the coolant anomaly detection circuit system 2206 can be instantiated by any other combination of hardware, software and / or firmware. For example, the coolant anomaly detection circuit system 2206 can be implemented by at least one or more hardware circuits (e.g., processor circuit system, discrete and / or integrated analog and / or digital circuit system, FPGA, ASIC, XPU, comparator, operational amplifier (op-amp), logic circuit, etc.) configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are also applicable.

[0205] In some examples, system monitoring circuitry 1704 includes means for detecting hardware anomalies. For example, means for detecting hardware anomalies may be implemented by hardware anomaly detection circuitry 2208. In some examples, hardware anomaly detection circuitry 2208 may be implemented by, for example, Fig.33 For example, the hardware anomaly detection circuit system 2208 may be instantiated by a programmable circuit system such as the example programmable circuit system 3312 of FIG. Fig.34 The example microprocessor 3400 performs operations such as those performed by Fig.30 In some examples, the hardware anomaly detection circuit system 2208 may be instantiated by a hardware logic circuit system, which may be an ASIC, an XPU, or a processor configured and / or constructed to perform operations corresponding to the machine-readable instructions. Fig.35 FPGA circuit system 3500 is implemented. Additionally or alternatively, hardware anomaly detection circuit system 2208 can be instantiated by any other combination of hardware, software and / or firmware. For example, hardware anomaly detection circuit system 2208 can be implemented by at least one or more hardware circuits (e.g., processor circuit system, discrete and / or integrated analog and / or digital circuit system, FPGA, ASIC, XPU, comparator, operational amplifier (op-amp), logic circuit, etc.) configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are also applicable.

[0206] In some examples, system monitoring circuitry 1704 includes means for predicting. For example, means for predicting may be implemented by RUL prediction circuitry 2210. In some examples, RUL prediction circuitry 2210 may be implemented by, for example, Fig.33For example, RUL prediction circuit system 2210 may be instantiated by programmable circuit system such as example programmable circuit system 3312 of Fig.34 The example microprocessor 3400 performs operations such as those performed by Fig.30 In some examples, the RUL prediction circuit system 2210 may be instantiated by a hardware logic circuit system, which may be an ASIC, an XPU, or a processor configured and / or constructed to perform operations corresponding to the machine-readable instructions. Fig.35 The FPGA circuit system 3500 is implemented. Additionally or alternatively, the RUL prediction circuit system 2210 can be instantiated by any other combination of hardware, software and / or firmware. For example, the RUL prediction circuit system 2210 can be implemented by at least one or more hardware circuits (e.g., processor circuit systems, discrete and / or integrated analog and / or digital circuit systems, FPGAs, ASICs, XPUs, comparators, operational amplifiers (op-amps), logic circuits, etc.) configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are also applicable.

[0207] In some examples, system monitoring circuitry 1704 includes means for analyzing. For example, means for analyzing may be implemented by cluster analysis circuitry 2212. In some examples, cluster analysis circuitry 2212 may be implemented by, for example, Fig.33 For example, the cluster analysis circuit system 2212 may be instantiated by a programmable circuit system such as the example programmable circuit system 3312 of FIG. Fig.34 The example microprocessor 3400 performs operations such as those performed by Fig.30 In some examples, cluster analysis circuit system 2212 may be instantiated by hardware logic circuit system, which may be an ASIC, XPU or other processor configured and / or constructed to perform operations corresponding to machine-readable instructions. Fig.35The cluster analysis circuit system 2212 is implemented by the FPGA circuit system 3500. Additionally or alternatively, the cluster analysis circuit system 2212 can be instantiated by any other combination of hardware, software and / or firmware. For example, the cluster analysis circuit system 2212 can be implemented by at least one or more hardware circuits (e.g., processor circuit systems, discrete and / or integrated analog and / or digital circuit systems, FPGAs, ASICs, XPUs, comparators, operational amplifiers (op-amps), logic circuits, etc.) configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are also applicable.

[0208] In some examples, system monitoring circuitry 1704 includes means for generating an output. For example, means for generating an output may be implemented by output generating circuitry 2214. In some examples, output generating circuitry 2214 may be implemented by, for example, Fig.33 For example, output generation circuit system 2214 may be instantiated by programmable circuit system such as example programmable circuit system 3312 of FIG. Fig.34 The example microprocessor 3400 performs operations such as those performed by Fig.30 In some examples, output generation circuit system 2214 may be instantiated by hardware logic circuit system, which may be an ASIC, XPU or other processor configured and / or constructed to perform operations corresponding to the machine-readable instructions. Fig.35 FPGA circuit system 3500 is implemented. Additionally or alternatively, output generation circuit system 2214 can be instantiated by any other combination of hardware, software and / or firmware. For example, output generation circuit system 2214 can be implemented by at least one or more hardware circuits (e.g., processor circuit system, discrete and / or integrated analog and / or digital circuit system, FPGA, ASIC, XPU, comparator, operational amplifier (op-amp), logic circuit, etc.) configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are also applicable.

[0209] In some examples, system monitoring circuitry 1704 includes means for regulating. For example, means for regulating may be implemented by control and regulation circuitry 2216. In some examples, control and regulation circuitry 2216 may be implemented by, for example, Fig.33 The control regulation circuit system 2216 may be instantiated by a programmable circuit system such as the example programmable circuit system 3312 of FIG. Fig.34The example microprocessor 3400 performs operations such as those performed by Fig.30 In some examples, the control and regulation circuit system 2216 may be instantiated by a hardware logic circuit system, which may be an ASIC, XPU, or other processor configured and / or constructed to perform operations corresponding to the machine-readable instructions. Fig.35 FPGA circuit system 3500 is implemented. Additionally or alternatively, control and regulation circuit system 2216 can be instantiated by any other combination of hardware, software and / or firmware. For example, control and regulation circuit system 2216 can be implemented by at least one or more hardware circuits (e.g., processor circuit system, discrete and / or integrated analog and / or digital circuit system, FPGA, ASIC, XPU, comparator, operational amplifier (op-amp), logic circuit, etc.) configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other structures are also applicable.

[0210] Despite Fig.21 The figure shows the implementation Fig.17 1702, but Fig.21 One or more of the elements, processes, and / or devices illustrated in the examples may be combined, split, rearranged, omitted, eliminated, and / or implemented in any other manner. Further, the example sensor interface circuit system 2102, the example state determination circuit system 2104, the example alarm generation circuit system 2106, the example indicator control circuit system 2108, the example communication circuit system 2110, the example storage database 2112, and / or (more generally) Fig.21The example storage monitoring circuit system 1702 can be implemented by hardware alone, or by hardware in combination with software and / or firmware. Thus, for example, any of the following can be implemented by programmable circuit systems in combination with machine-readable instructions (e.g., firmware or software), processor circuit systems, (one or more) analog circuits, (one or more) digital circuits, (one or more) logic circuits, (one or more) programmable processors, (one or more) programmable microcontrollers, (one or more) graphics processing units ((one or more) GPUs), (one or more) digital signal processors ((one or more) DSPs), (one or more) ASICs, (one or more) programmable logic devices ((one or more) PLDs), and / or (one or more) field programmable logic devices ((one or more) FPLDs) such as FPGAs: example sensor interface circuit systems 2102, example state determination circuit systems 2104, example alarm generation circuit systems 2106, example indicator control circuit systems 2108, example communication circuit systems 2110, example storage databases 2112, and / or (more generally) example storage monitoring circuit systems 1702. Further, Fig.21 Example storage monitoring circuitry 1702 may include in addition to or in lieu of Fig.21 The invention may include one or more of those elements, processes and / or devices illustrated in the figure, and / or may include more than one of any or all of the elements, processes and devices illustrated in the figure.

[0211] Despite Fig. 22 The figure shows the implementation Fig.17 The example embodiment of the system monitoring circuit system 1704, but Fig. 22 One or more of the elements, processes and / or devices illustrated in the example may be combined, divided, rearranged, omitted, eliminated and / or implemented in any other manner. Further, the example input interface circuit system 2202, the example model training circuit system 2204, the example coolant anomaly detection circuit system 2206, the example hardware anomaly detection circuit system 2208, the example RUL prediction circuit system 2210, the example cluster analysis circuit system 2212, the example output generation circuit system 2214, the example control regulation circuit system 2216, the example system database 2218, and / or (more generally) Fig. 22The example system monitoring circuitry 1704 may be implemented in hardware alone, or in hardware in combination with software and / or firmware. Thus, for example, any of the following may be implemented by programmable circuitry in combination with machine-readable instructions (e.g., firmware or software), processor circuitry, analog circuit(s), digital circuit(s), logic circuit(s), programmable processor(s), programmable microcontroller(s), graphics processing unit(s) (GPU(s), digital signal processor(s) (DSP(s), ASIC(s), programmable logic device(s) (PLD(s), and / or field programmable logic device(s) such as FPGA (FPLD(s)): example input interface circuitry 2202, example model training circuitry 2204, example coolant anomaly detection circuitry 2206, example hardware anomaly detection circuitry 2208, example RUL prediction circuitry 2210, example cluster analysis circuitry 2212, example output generation circuitry 2214, example control regulation circuitry 2216, example system database 2218, and / or (more generally) example system monitoring circuitry 1704. Further, Fig. 22 Example system monitoring circuitry 1704 may include in addition to or in lieu of Fig. 22 The invention may include one or more of those elements, processes and / or devices illustrated in the figure, and / or may include more than one of any or all of the elements, processes and devices illustrated in the figure.

[0212] Represents that can be executed by programmable circuitry to implement and / or instantiate Fig.21 The storage monitoring circuit system 1702 and / or Fig. 22 Example machine-readable instructions, and / or representations of system monitoring circuitry 1704 that may be executed by programmable circuitry to implement and / or instantiate Fig.21 The storage monitoring circuit system 1702 and / or Fig. 22 A flowchart of example operations of the system monitoring circuitry 1704 is provided in Fig.29 , Fig.30 and / or Fig.31 The machine-readable instructions may be one or more executable programs or (one or more) parts of one or more executable programs for execution by a programmable circuit system, such as the following in conjunction with Fig.32 The programmable circuit system 3212 shown in the example processor platform 3200 discussed below and / or in conjunction with Fig.33The programmable circuit system 3312 shown in the example processor platform 3300 discussed, and / or may be used in conjunction with the following Fig.34 and / or Fig.35 One or more functions or (one or more) parts of functions performed by the example programmable circuit system (e.g., FPGA) discussed. In some examples, machine-readable instructions cause operations, tasks, etc. to be performed and / or executed in an automated manner in the real world. As used herein, "automated" means without human involvement.

[0213] The program may be embodied in instructions (e.g., software and / or firmware) stored on one or more non-transitory computer-readable and / or machine-readable storage media, such as cache memory, magnetic storage devices or disks (e.g., floppy disks, hard disk drives (HDD), etc.), optical storage devices or disks (e.g., Blu-ray disks, compact disks (CD), digital versatile disks (DVD), etc.), redundant arrays of independent disks (RAID), registers, ROM, solid-state drives (SSD), SSD memory, non-volatile memory (e.g., electrically erasable programmable read-only memory (EEPROM), flash memory, etc.), volatile memory (e.g., any type of random access memory (RAM), etc.), and / or any other storage device or storage disk. The instructions of the non-transitory computer-readable and / or machine-readable medium may be programmed and / or executed by a programmable circuit system located in one or more hardware devices, but the entire program and / or portions thereof may alternatively be executed and / or instantiated by one or more hardware devices other than the programmable circuit system, and / or embodied in dedicated hardware. The machine-readable instructions may be distributed across multiple hardware devices and / or executed by two or more hardware devices (e.g., a server and a client hardware device). For example, the client hardware device may be implemented by an endpoint client hardware device (e.g., a hardware device associated with a human and / or machine user) or an intermediate client hardware device gateway (e.g., a radio access network (RAN)) that may facilitate communication between a server and an endpoint client hardware device. Similarly, a non-transitory computer-readable storage medium may include one or more media. Further, although reference is made to Fig.29 , Fig.30 and / or Fig.31The flowchart(s) illustrated in the describe example procedures, but many other methods of implementing the example storage monitoring circuit system 1702 and / or system monitoring circuit system 1704 may alternatively be used. For example, the execution order of the blocks in the flowchart(s) may be changed, and / or some of the blocks described may be changed, eliminated, or combined. Additionally or alternatively, any or all of the blocks in the flowchart may be implemented by one or more hardware circuits (e.g., processor circuit systems, discrete and / or integrated analog and / or digital circuit systems, FPGAs, ASICs, comparators, operational amplifiers (op-amps), logic circuits, etc.) configured to perform corresponding operations without executing software or firmware. The programmable circuit system may be distributed at different network locations and / or located locally at one or more hardware devices (e.g., a single-core processor (e.g., a single-core CPU), a multi-core processor (e.g., a multi-core CPU, an XPU, etc.)). For example, the programmable circuit system can be a CPU and / or FPGA located in the same package (e.g., the same integrated circuit (IC) package, or in two or more separate housings), one or more processors in a single machine, multiple processors distributed across multiple servers in a server rack, multiple processors distributed across one or more server racks, etc., and / or any (one or more) combinations thereof.

[0214] The machine-readable instructions described herein can be stored in one or more formats of a compressed format, an encrypted format, a segmented format, a compiled format, an executable format, an encapsulated format, etc. The machine-readable instructions described herein can be stored as data (e.g., computer-readable data, machine-readable data, one or more bits (e.g., one or more computer-readable bits, one or more machine-readable bits, etc.), a bitstream (e.g., a computer-readable bitstream, a machine-readable bitstream, etc.), etc.) or a data structure that can be used to create, manufacture and / or generate machine-executable instructions (e.g., as (one or more) parts of instructions, codes, code representations, etc.). For example, the machine-readable instructions can be segmented and stored on one or more storage devices, disks, and / or computing devices (e.g., servers) located at the same or different locations in a network or a collection of networks (e.g., in the cloud, in an edge device, etc.). The machine-readable instructions may require one or more of installation, modification, adaptation, update, combination, supplementation, configuration, decryption, decompression, unpacking, distribution, redistribution, compilation, etc., so that they are directly readable, interpretable, and / or executable by a computing device and / or other machine. For example, machine-readable instructions may be stored in multiple portions that are individually compressed, encrypted, and / or stored on separate computing devices, wherein the portions, when decrypted, decompressed, and / or combined, form a set of computer-executable instructions and / or machine-executable instructions that implement one or more functions and / or operations that may together form a program such as the program described herein.

[0215] In another example, the machine-readable instructions may be stored in a state in which they can be read by the programmable circuit system, but require the addition of a library (e.g., a dynamic link library (DLL)), a software development kit (SDK), an application programming interface (API), etc., in order to execute the machine-readable instructions on a particular computing device or other device. In another example, the machine-readable instructions and / or the corresponding (one or more) programs may need to be configured (e.g., stored settings, input data, recorded network addresses, etc.) before they can be executed in whole or in part. Thus, as used herein, a machine-readable, computer-readable and / or machine-readable medium may include instructions and / or (one or more) programs, regardless of the specific format or state of the machine-readable instructions and / or (one or more) programs.

[0216] The machine-readable instructions described herein may be represented by any past, present, or future instruction language, scripting language, programming language, etc. For example, the machine-readable instructions may be represented using any of the following languages: C, C++, Java, C#, Perl, Python, JavaScript, HyperText Markup Language (HTML), Structured Query Language (SQL), Swift, etc.

[0217] As mentioned above, Fig.29 , Fig.30 , and / or Fig.31 The example operations of can be implemented using executable instructions (e.g., computer-readable and / or machine-readable instructions) stored on one or more non-transient computer-readable and / or machine-readable media. As used herein, the terms non-transient computer-readable medium, non-transient computer-readable storage medium, non-transient machine-readable medium, and / or non-transient machine-readable storage medium are explicitly defined to include any type of computer-readable storage device and / or storage disk, and are defined to exclude propagation signals and exclude transmission media. Examples of such non-transient computer-readable media, non-transient computer-readable storage media, non-transient machine-readable media, and / or non-transient machine-readable storage media include optical storage devices, magnetic storage devices, HDDs, flash memory, read-only memory (ROM), CDs, DVDs, caches, any type of RAM, registers, and / or any other storage device or storage disk in which information is stored for any duration (e.g., for an extended period of time, permanently, during a brief instance, during temporary buffering and / or information caching). As used herein, the terms "non-transitory computer-readable storage device" and "non-transitory machine-readable storage device" are defined to include any physical (mechanical, magnetic, and / or electrical) hardware for retaining information for a period of time but excluding propagating signals and excluding transmission media. Examples of non-transitory computer-readable storage devices and / or non-transitory machine-readable storage devices include any type of random access memory, any type of read-only memory, solid-state memory, flash memory, optical disks, magnetic disks, disk drives, and / or redundant array of independent disks (RAID) systems. As used herein, the term "device" refers to a physical structure such as mechanical and / or electrical equipment, hardware, and / or circuitry that may or may not be configured by computer-readable instructions, machine-readable instructions, etc., and / or is manufactured to execute computer-readable instructions, machine-readable instructions, etc.

[0218] "Include" and "comprising" (and all forms and tenses thereof) are used herein as open-ended terms. Thus, whenever a claim uses any form of "include" or "comprising" (e.g., includes, comprises, includes, contains, has, etc.) as a preamble or in any type of claim recitation, it should be understood that additional elements, items, etc. may be present without falling outside the scope of the corresponding claim or recitation. As used herein, when the phrase "at least" is used as a transitional term, such as in the preamble of a claim, it is open-ended in the same manner as the terms "include" and "comprising" are open-ended. The term "and / or" when used, for example, in a form such as A, B, and / or C, refers to any combination or subset of A, B, C, such as (1) A alone, (2) B alone, (3) C alone, (4) A and B, (5) A and C, (6) B and C, or (7) A and B and C. As used herein in the context of describing structures, components, items, objects, and / or things, the phrase “at least one of A and B” is intended to refer to implementations that include any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. Similarly, as used herein in the context of describing structures, components, items, objects, and / or things, the phrase “at least one of A or B” is intended to refer to implementations that include any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. As used herein in the context of describing the execution or performance of a process, instruction, action, activity, etc., the phrase “at least one of A and B” is intended to refer to implementations that include any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. Similarly, as used herein in the context of describing the implementation or execution of a process, instruction, action, activity, etc., the phrase "at least one of A or B" is intended to refer to an implementation that includes any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B.

[0219] As used herein, singular references (e.g., "a," "an," "first," "second," etc.) do not exclude plural reference. As used herein, the terms "a," "an" and "an" refer to one or more of the objects. The terms "a" (or "an"), "one or more," and "at least one" are used interchangeably herein. Furthermore, although listed separately, multiple devices, elements or actions may be implemented by, for example, the same entity or object. Additionally, although individual features may be included in different examples or claims, these features may possibly be combined, and the inclusion in different examples or claims does not imply that a combination of features is not feasible and / or not advantageous.

[0220] Fig.29 It means that it can be executed, instantiated, and / or implemented by a programmable circuit system to implement Fig.21 A flowchart of example machine readable instructions and / or example operations 2900 of the example storage monitoring circuit system 1702 is provided. Fig.29 The example machine readable instructions and / or example operations 2900 begin at block 2902 where the example storage monitoring circuit system 1702 obtains information related to Fig.17 , Fig.18A , Fig.18B , Fig.19 , Fig. 20 , Fig.27A , Fig.27B , Fig.28A and / or Fig.28B The example sensor data 2114 associated with one or more second storages 1710. For example, Fig.21 The example sensor interface circuit system 2102 obtains sensor data 2114 corresponding to the output of one or more example sensors in the example sensor 1728 implemented in the (one or more) second reservoirs 1710. In some examples, the sensor data 2114 represents the coolant level at the corresponding (one or more) second reservoirs 1710.

[0221] At block 2904, the example reservoir monitoring circuitry 1702 determines example location(s) and / or example identifier(s) corresponding to the second reservoir(s) 1710. For example, the sensor interface circuitry 2102 determines location(s) (e.g., grid locations, grid coordinates) and / or identifier(s) corresponding to one or more of the heat exchangers 1706 associated with the second reservoir(s) 1710. In some examples, the sensor interface circuitry 2102 causes storage of the location(s) and / or identifier(s) associated with the sensor data 2114 obtained for the second reservoir(s) 1710.

[0222] At block 2906, the example reservoir monitoring circuitry 1702 selects and / or adjusts one or more example thresholds (e.g., (one or more) coolant level thresholds) for evaluating the coolant level at the (one or more) second reservoirs 1710. For example, the example state determination circuitry 2104 selects and / or adjusts the (one or more) thresholds based on (one or more) user inputs. In some examples, the threshold is a percentage of the coolant capacity of the (one or more) second reservoirs 1710. In some examples, the threshold is used to determine whether the coolant level in the (one or more) second reservoirs 1710 is satisfactory, low, or very low. In some examples, the (one or more) thresholds are based on the expected heat dissipation at the (one or more) heat exchangers 1706, the expected evaporation rate of the coolant, the number of heat exchangers 1706 implemented in the example system, the expected life of the (one or more) heat exchangers 1706, etc.

[0223] At block 2908, the example reservoir monitoring circuitry 1702 determines the coolant level(s) at the second reservoir(s) 1710 based on the sensor data 2114. For example, the state determination circuitry 2104 determines the coolant level(s) based on one or more signals from the sensor(s) 1728, wherein the signal(s) indicate a measured value (e.g., a percentage of coolant capacity, a height) of the coolant level(s) at the second reservoir(s) 1710. Additionally or alternatively, the signal(s) indicate whether the coolant level(s) at the second reservoir(s) 1710 satisfies the threshold(s) for the corresponding sensor(s) in the sensor(s) 1728. In some examples, when sensor data 2114 includes signal(s) from sensor(s) in sensor 1728, state determination circuit system 2104 determines that coolant level(s) are at or above threshold(s) in thresholds, and when sensor data 2114 does not include signal(s) from sensor(s) in sensor 1728, state determination circuit system 2104 determines that coolant level(s) are below threshold(s) in thresholds.

[0224] At block 2910, the example reservoir monitoring circuitry 1702 determines the state(s) of the second reservoir(s) 1710 by comparing the coolant level(s) to the threshold(s). For example, the state determination circuitry 2104 determines whether the coolant level(s) at the second reservoir(s) 1710 is satisfactory, low, or very low based on the comparison. In some examples, when the coolant level(s) meets (e.g., is at or above) the first example threshold, the state determination circuitry 2104 determines that the coolant level(s) is satisfactory. In some examples, when the coolant level(s) meets (e.g., is at or above) the second example threshold but does not meet (e.g., is below) the first threshold, the state determination circuitry 2104 determines that the coolant level(s) is low. In some examples, when the coolant level(s) does not meet (e.g., is below) the second threshold and / or the third example threshold, the state determination circuitry 2104 determines that the coolant level(s) is very low.

[0225] At block 2912, the example reservoir monitoring circuit system 1702 activates one or more of the example light sources (e.g., indicators) 1732 based on the determined state(s). For example, when the state(s) indicate that the coolant level(s) is satisfactory, the example indicator control circuit system 2108 activates the first light source 1732A, and does not activate (e.g., and / or deactivates) the second light source 1732B and the third light source 1732C. In some examples, when the state(s) indicate that the coolant level(s) is low, the indicator control circuit system 2108 activates the second light source 1732B and does not activate (e.g., and / or deactivates) the first light source 1732A and the third light source 1732C. In some examples, when the state(s) indicate that the coolant level(s) is extremely low, the indicator control circuit system 2108 activates the third light source 1732C and does not activate (e.g., and / or deactivates) the first light source 1732A and the second light source 1732B.

[0226] At block 2914, the example reservoir monitoring circuitry 1702 determines whether the coolant level(s) are low and / or critically low. For example, in response to the state determination circuitry 2104 determining that the coolant level(s) are low and / or critically low (e.g., block 2914 returns a “YES” result), control proceeds to block 2916. Alternatively, in response to the state determination circuitry 2104 determining that the coolant level(s) are not low and / or critically low (e.g., block 2914 returns a “NO” result), control proceeds to block 2918.

[0227] At block 2916, the example reservoir monitoring circuitry 1702 generates and / or outputs one or more example alerts 2116. For example, the example alert generation circuitry 2106 generates alert(s) 2116 that include coolant level(s), status(es), date(s) and / or time(s) at which the alert(s) were generated, identifier(s) and / or location(s), etc. associated with the second reservoir(s) 1710. In some examples, the alert generation circuitry 2106 outputs the alert(s) 2116 for presentation on the example user device 1734 (e.g., as an email, SMS message, and / or dashboard on the user device 1734).

[0228] At block 2918, the example storage monitoring circuitry 1702 transmits Fig.21 Example storage information 2118, and / or causing Fig.21 For example, the example communication circuit system 2110 causes storage of the storage information 2118 in the example storage database 2112, wherein the storage information 2118 includes (one or more) coolant levels and / or (one or more) states of the coolant in the second storage 1710, (one or more) dates and / or (one or more) times associated with the (one or more) coolant levels, (one or more) identifiers and / or (one or more) locations associated with the second storage 1710, etc. Additionally or alternatively, the communication circuit system 2110 transmits the storage information 2118 to Fig. 22 The example system monitoring circuitry 1704 in is used to detect and / or predict anomalies and / or performance associated with (one or more) heat exchangers 1706.

[0229] At block 2920, the example reservoir monitoring circuitry 1702 determines whether to continue monitoring. For example, when additional sensor data is obtained from the example sensor(s) 1728, the sensor interface circuitry 2102 determines to continue monitoring. In response to the sensor interface circuitry 2102 determining to continue monitoring (e.g., block 2920 returns a “yes” result), control returns to block 2902. Alternatively, in response to the sensor interface circuitry 2102 determining not to continue monitoring (e.g., block 2920 returns a “no” result), control ends.

[0230] Fig.30 It means that it can be executed, instantiated, and / or implemented by a programmable circuit system to implement Fig. 221704 and / or a flowchart of example operations 3000 of the example system monitoring circuitry 1704. Fig.30 The example machine readable instructions and / or example operations 3000 begin at block 3002 where the example system monitoring circuitry 1704 obtains Fig. 22 Example user input(s) 2220 in . For example, Fig. 22 The example input interface circuit system 2202 obtains the input signal from the operator via Fig.17 Example user device 1734 provides (one or more) user inputs 2220. In some examples, (one or more) user inputs 2220 may include coolant levels observed at one (or more) heat exchangers in heat exchangers 1706, anomalies observed at one (or more) heat exchangers in heat exchangers 1706, and the like.

[0231] At block 3004, the example system monitoring circuitry 1704 obtains Fig.17 , Fig.18A , Fig.18B , Fig.19 , Fig. 20 , Fig.27A , Fig.27B , Fig.28A and / or Fig.28B The example storage information 2118 associated with one or more of the example second storage 1710. For example, the input interface circuit system 2202 receives Fig.21 The example storage monitoring circuit system 1702 obtains storage information 2118, wherein the storage information 2118 includes (one or more) coolant levels and / or (one or more) states of the coolant in (one or more) second storages 1710, (one or more) dates and / or (one or more) times associated with the (one or more) coolant levels, (one or more) identifiers and / or (one or more) locations associated with (one or more) second storages 1710, etc.

[0232] At block 3006, the example system monitoring circuitry 1704 detects the coolant anomaly based on the coolant anomaly detection model(s) (e.g., as combined with Fig.311706) to detect and / or predict an example coolant anomaly. For example, the example coolant anomaly detection circuit system 2206 executes (one or more) coolant anomaly detection models based on the storage information 2118, and based on the execution, outputs one or more coolant anomalies detected and / or predicted for the corresponding (one or more) heat exchangers in the heat exchanger 1706. In some examples, the coolant anomaly includes evaporation and / or overheating of the coolant, leakage of the coolant, reduced efficiency of the coolant, pressure drop of the coolant, corrosion of equipment associated with the coolant, etc. Additionally or alternatively, as a result of the execution of the (one or more) coolant anomaly detection models, the coolant anomaly detection circuit system 2206 can output (one or more) coolant anomaly scores corresponding to (one or more) heat exchangers in the heat exchanger 1706. In some examples, the coolant anomaly score indicates the likelihood of a coolant anomaly occurring for the corresponding (one or more) heat exchangers in the heat exchanger 1706.

[0233] At block 3008, the example system monitoring circuitry 1704 detects and / or predicts an example hardware anomaly based on the hardware anomaly detection model(s). For example, the example hardware anomaly detection circuitry 2208 executes the hardware anomaly detection model(s) based on the storage information 2118, and based on the execution, outputs one or more hardware anomalies detected and / or predicted for the corresponding heat exchanger(s) in the heat exchanger 1706. In some examples, the hardware anomaly includes a pump failure, a fan failure, a fin damage, an airflow obstruction, an operating temperature of the heat exchanger 1706 above a threshold, etc. Additionally or alternatively, as a result of the execution of the hardware anomaly detection model(s), the hardware anomaly detection circuitry 2208 may output a hardware anomaly score(s) corresponding to the heat exchanger(s) in the heat exchanger 1706. In some examples, the hardware anomaly score indicates the likelihood of a hardware anomaly occurring for the corresponding heat exchanger(s) in the heat exchanger 1706.

[0234] At block 3010, the example system monitoring circuitry 1704 detects and / or predicts an example RUL of the heat exchanger(s) 1706 based on the RUL prediction model(s). For example, the example RUL prediction circuitry 2210 executes the RUL prediction model(s) based on the storage information 2118, and based on the execution, outputs a RUL for a corresponding heat exchanger(s) in the heat exchangers 1706. In some examples, the RUL(s) represent a duration(s) that the heat exchanger(s) in the heat exchangers 1706 can operate until the heat exchanger(s) in the heat exchangers 1706 are expected to be repaired and / or replaced.

[0235] At block 3012, the example system monitoring circuitry 1704 categorizes the heat exchangers 1706 based on, for example, anomalies, behaviors, etc. For example, the example cluster analysis circuitry 2212 identifies cluster(s) by analyzing coolant level patterns for the heat exchangers 1706 represented in the storage information 2118, and groups the heat exchanger(s) in the heat exchanger(s) 1706 based on similarities in the coolant level patterns. In some examples, the cluster analysis circuitry 2212 identifies cluster(s) in the heat exchanger(s) 1706 that correspond to specific coolant anomaly types, hardware anomaly types, and / or predicted RUL ranges.

[0236] At block 3014, the example system monitoring circuit system 1704 generates (one or more) example outputs based on one or more detected and / or predicted values ​​and / or characteristics. For example, the example output generation circuit system 2214 generates and / or outputs example display information 2222 including one or more example tables and / or example graphs to represent the storage information 2118 and / or one or more characteristics predicted and / or detected for the heat exchanger 1706 (e.g., coolant anomaly, hardware anomaly, anomaly score, RUL, etc.). In some examples, the display information 2222 may include (one or more) identifiers, (one or more) locations, (one or more) coolant levels, (one or more) coolant anomaly types, (one or more) hardware anomaly types, and / or (one or more) anomaly scores associated with (one or more) heat exchangers in the heat exchanger 1706. In some examples, the output generation circuit system 2214 outputs the display information 2222 for presentation by the user device 1734.

[0237] At block 3016, the example system monitoring circuitry 1704 causes one or more control parameters to be adjusted based on the output(s). For example, the example control adjustment circuitry 2216 causes the control parameter(s) (e.g., including fan speed, pump speed, and / or coolant flow rate of the heat exchanger 1706) to be adjusted based on the control signal(s) sent to the corresponding heat exchanger(s) in the heat exchanger 1706, the fan 1722, the pump 1720, etc. In some examples, the control adjustment circuitry 2216 adjusts and / or selects the control parameters based on the storage information 2118 and / or detected and / or predicted characteristics for the heat exchanger(s) in the heat exchanger 1706 (e.g., coolant anomalies, hardware anomalies, anomaly scores, etc.).

[0238] At block 3018, the example system monitoring circuitry 1704 determines whether to continue monitoring. For example, the input interface circuitry 2202 determines to continue monitoring when additional (one or more) user inputs and / or additional storage information are obtained from the example storage monitoring circuitry 1702. In response to the input interface circuitry 2202 determining to continue monitoring (e.g., block 3018 returns a "yes" result), control returns to block 3002. Alternatively, in response to the input interface circuitry 2202 determining not to continue monitoring (e.g., block 3018 returns a "no" result), control ends.

[0239] Fig.31 is a representation that can be executed, instantiated, and / or performed by a programmable circuit system to train and / or retrain Fig. 22 A flowchart of example machine readable instructions and / or example operations 3100 for utilizing one or more example machine learning models of the system monitoring circuit system 1704. Fig.31 The example instruction 3100 is Fig. 22 When the model training circuit system 2204 is executed, it generates one or more machine learning models (e.g., (one or more) coolant anomaly detection models, (one or more) hardware anomaly detection models, (one or more) RUL prediction models, etc.) that can be distributed to other computing systems (such as the coolant anomaly detection circuit system 2206, the hardware anomaly detection circuit system 2208, and / or the RUL prediction circuit system 2210 in the example system monitoring circuit system 1704).

[0240] Fig.31 The example machine readable instructions and / or example operations 3100 begin at block 3102 where, Fig. 22 The example system monitoring circuit system 1704 accesses the example training data. For example, Fig. 22 The model training circuit system 2204 can access the model stored in Fig.21 An example repository database 2112 and / or Fig. 22 The training data in the example system database 2218 of . In some examples, the training data may include historical data indicating the coolant level, coolant pressure, operating temperature, heat flux cooled by the heat exchanger 1706, pump operating efficiency of the heat exchanger 1706, etc. at corresponding points in time.

[0241] At block 3104, the example system monitoring circuitry 1704 labels the training data with indications of anomalies and / or other characteristics observed for the heat exchanger 1706. For example, the model training circuitry 2204 labels the training data with labels indicating the type(s) of anomalies (e.g., coolant anomalies and / or hardware anomalies) observed at the heat exchanger 1706 at corresponding points in time. In some examples, the labels are generated based on user input from an operator performing a manual and / or visual inspection of the heat exchanger 1706.

[0242] At box 3106, the example system monitoring circuit system 1704 uses supervised and / or unsupervised learning to train (one or more) machine learning models. For example, the model training circuit system 2204 trains (one or more) machine learning models based on the marked training data. As a result of the training, at least one of the following items is generated at box 3108: (one or more) coolant anomaly detection model, (one or more) hardware anomaly detection model, or (one or more) RUL prediction model. In some examples, (one or more) coolant anomaly detection models are trained to output coolant anomalies (e.g., evaporation and / or overheating of coolant, leakage of coolant, reduced efficiency of coolant, pressure drop of coolant, corrosion of equipment associated with coolant, etc.) and / or coolant anomaly scores for heat exchanger 1706. In some examples, (one or more) hardware anomaly detection models are trained to output hardware anomalies (e.g., pump failure, fan failure, airflow obstruction, fin damage, operating temperature exceeds a threshold, etc.) and / or hardware anomaly scores for heat exchanger 1706. In some examples, the RUL prediction model(s) are trained to output a predicted RUL for the heat exchanger 1706 (eg, in units of days, weeks, months, etc.).

[0243] In some examples, the coolant anomaly detection model(s), the hardware anomaly detection model(s), and / or the RUL prediction model(s) may be stored in Fig. 22 in the system database 2218 for use by Fig. 22The coolant anomaly detection circuit system 2206, the hardware anomaly detection circuit system 2208 and / or the RUL prediction circuit system 2210 are accessed. When no additional training (eg, retraining) is to be performed (block 3110), Fig.31 Example instruction 3100 ends.

[0244] Fig.32 is constructed to execute and / or instantiate Fig.29 Example machine readable instructions and / or example operations to implement Fig.21 1702 of the storage monitoring circuit system 1702. The programmable circuit system platform 3200 can be, for example, a server, a personal computer, a workstation, a self-learning machine (e.g., a neural network), a mobile device (e.g., a cellular phone, a smart phone, an iPad, etc.). TM , a tablet such as a laptop computer, a personal digital assistant (PDA), an Internet appliance, a DVD player, a CD player, a digital video recorder, a Blu-ray player, a game console, a personal video recorder, a set-top box, a head-mounted device (e.g., an augmented reality (AR) head-mounted device, a virtual reality (VR) head-mounted device, etc.) or other wearable device, or any other type of computing and / or electronic device.

[0245] The programmable circuit system platform 3200 of the illustrated example includes a programmable circuit system 3212. The programmable circuit system 3212 of the illustrated example is hardware. For example, the programmable circuit system 3212 can be implemented by one or more integrated circuits, logic circuits, FPGAs, microprocessors, CPUs, GPUs, DSPs, and / or microcontrollers from any desired series or manufacturer. The programmable circuit system 3212 can be implemented by one or more semiconductor-based (e.g., silicon-based) devices. In this example, the programmable circuit system 3212 implements the example sensor interface circuit system 2102, the example state determination circuit system 2104, the example alarm generation circuit system 2106, the example indicator control circuit system 2108, the example communication circuit system 2110, and the example storage database 2112.

[0246] The programmable circuit system 3212 of the illustrated example includes a local memory 3213 (e.g., cache, register, etc.). The programmable circuit system 3212 of the illustrated example communicates with main memories 3214, 3216 including a volatile memory 3214 and a non-volatile memory 3216 via a bus 3218. The volatile memory 3214 may be composed of a synchronous dynamic random access memory (SDRAM), a dynamic random access memory (DRAM), Dynamic Random Access Memory (DRAM) Dynamic Random Access Memory, ) and / or any other type of RAM device. The non-volatile memory 3216 may be implemented by flash memory and / or any other desired type of memory device. Access to the main memory 3214, 3216 of the illustrated example is controlled by a memory controller 3217. In some examples, the memory controller 3217 may be implemented by one or more integrated circuits, logic circuits, microcontrollers, or any other type of circuitry from any desired family or manufacturer to manage the flow of data to and from the main memory 3214, 3216.

[0247] The programmable circuit system platform 3200 of the illustrated example also includes an interface circuit system 3220. The interface circuit system 3220 can be implemented by hardware according to any type of interface standard, such as an Ethernet interface, a universal serial bus (USB) interface, a Bluetooth interface, or a 3200 interface. interface, a near field communication (NFC) interface, a peripheral component interconnect (PCI) interface and / or a peripheral component interconnect Express (PCIe) interface.

[0248] In the illustrated example, one or more input devices 3222 are connected to the interface circuitry 3220. The input device(s) 3222 permit a user (e.g., a human user, a machine user, etc.) to input data and / or commands into the programmable circuitry 3212. The input device(s) 3222 may be implemented by, for example, an audio sensor, a microphone, a camera (still or video), a keyboard, buttons, a mouse, a touch screen, a trackpad, a trackball, an iso-mouse device, and / or a speech recognition system.

[0249] One or more output devices 3224 are also connected to the interface circuit system 3220 of the illustrated example. The (one or more) output devices 3224 can be implemented, for example, by a display device (e.g., a light emitting diode (LED), an organic light emitting diode (OLED), a liquid crystal display (LCD), a cathode ray tube (CRT) display, an in-place switching (IPS) display, a touch screen, etc.), a tactile output device, a printer, and / or a speaker. Thus, the interface circuit system 3220 of the illustrated example typically includes a graphics driver card, a graphics driver chip, and / or a graphics processor circuit system such as a GPU.

[0250] The interface circuitry 3220 of the illustrated example also includes communication devices such as transmitters, receivers, transceivers, modems, residential gateways, wireless access points, and / or network interfaces to facilitate data exchange with external machines (e.g., any kind of computing device) over the network 3226. Communications may be through, for example, an Ethernet connection, a digital subscriber line (DSL) connection, a telephone line connection, a coaxial cable system, a satellite system, a line-to-line wireless system, a line-to-line wireless system, a cellular telephone system, an optical connection, etc.

[0251] The programmable circuit system platform 3200 of the illustrated example also includes one or more mass storage disks or devices 3228 for storing firmware, software, and / or data. Examples of such mass storage disks or devices 3228 include magnetic storage devices (e.g., floppy disks, drives, HDDs, etc.), optical storage devices (e.g., Blu-ray disks, CDs, DVDs, etc.), RAID systems, and / or solid-state storage disks or devices (such as flash memory devices and / or SSDs).

[0252] Can be Fig.29 The machine-readable instructions 3232 implemented by the machine-readable instructions may be stored in a mass storage device 3228, in a volatile memory 3214, in a non-volatile memory 3216, and / or on at least one removable non-transitory computer-readable storage medium such as a CD or DVD.

[0253] Fig.33 is constructed to execute and / or instantiate Fig.30 and / or Fig.31 Example machine readable instructions and / or example operations to implement Fig. 221704. The programmable circuit system platform 3300 can be, for example, a server, a personal computer, a workstation, a self-learning machine (e.g., a neural network), a mobile device (e.g., a cellular phone, a smart phone, an iPad, etc.). TM , a tablet such as a iPod, a personal digital assistant (PDA), an Internet appliance, a DVD player, a CD player, a digital video recorder, a Blu-ray player, a game console, a personal video recorder, a set-top box, a head-mounted device (e.g., an augmented reality (AR) head-mounted device, a virtual reality (VR) head-mounted device, etc.) or other wearable device, or any other type of computing and / or electronic device.

[0254] The programmable circuit system platform 3300 of the illustrated example includes a programmable circuit system 3312. The programmable circuit system 3312 of the illustrated example is hardware. For example, the programmable circuit system 3312 can be implemented by one or more integrated circuits, logic circuits, FPGAs, microprocessors, CPUs, GPUs, DSPs and / or microcontrollers from any desired series or manufacturer. The programmable circuit system 3312 can be implemented by one or more semiconductor-based (e.g., silicon-based) devices. In this example, the programmable circuit system 3312 implements an example input interface circuit system 2202, an example model training circuit system 2204, an example coolant anomaly detection circuit system 2206, an example hardware anomaly detection circuit system 2208, an example RUL prediction circuit system 2210, an example cluster analysis circuit system 2212, an example output generation circuit system 2214, an example control regulation circuit system 2216, and an example system database 2218.

[0255] The programmable circuit system 3312 of the illustrated example includes a local memory 3313 (e.g., cache, register, etc.). The programmable circuit system 3312 of the illustrated example communicates with main memories 3314, 3316 including a volatile memory 3314 and a non-volatile memory 3316 via a bus 3318. The volatile memory 3314 may be composed of a synchronous dynamic random access memory (SDRAM), a dynamic random access memory (DRAM), Dynamic Random Access Memory The non-volatile memory 3316 may be implemented by flash memory and / or any other desired type of memory device. Access to the main memory 3314, 3316 of the illustrated example is controlled by a memory controller 3317. In some examples, the memory controller 3317 may be implemented by one or more integrated circuits, logic circuits, microcontrollers, or any other type of circuitry from any desired family or manufacturer to manage the flow of data to and from the main memory 3314, 3316.

[0256] The programmable circuit system platform 3300 of the illustrated example also includes an interface circuit system 3320. The interface circuit system 3320 can be implemented by hardware according to any type of interface standard, such as an Ethernet interface, a universal serial bus (USB) interface, interface, a near field communication (NFC) interface, a peripheral component interconnect (PCI) interface, and / or a peripheral component interconnect express (PCIe) interface.

[0257] In the illustrated example, one or more input devices 3322 are connected to the interface circuitry 3320. The input device(s) 3322 permit a user (e.g., a human user, a machine user, etc.) to input data and / or commands into the programmable circuitry 3312. The input device(s) 3322 may be implemented by, for example, an audio sensor, a microphone, a camera (still or video), a keyboard, buttons, a mouse, a touch screen, a trackpad, a trackball, an iso-mouse device, and / or a speech recognition system.

[0258] One or more output devices 3324 are also connected to the interface circuit system 3320 of the illustrated example. The output device(s) 3324 may be implemented, for example, by a display device (e.g., a light emitting diode (LED), an organic light emitting diode (OLED), a liquid crystal display (LCD), a cathode ray tube (CRT) display, an in-plane switching (IPS) display, a touch screen, etc.), a tactile output device, a printer, and / or a speaker. Thus, the interface circuit system 3320 of the illustrated example typically includes a graphics driver card, a graphics driver chip, and / or a graphics processor circuit system such as a GPU.

[0259] The interface circuitry 3320 of the illustrated example also includes communication devices such as transmitters, receivers, transceivers, modems, residential gateways, wireless access points, and / or network interfaces to facilitate data exchange with external machines (e.g., any kind of computing device) over the network 3326. Communications may be through, for example, an Ethernet connection, a digital subscriber line (DSL) connection, a telephone line connection, a coaxial cable system, a satellite system, a line-of-sight wireless system, a line-of-sight wireless system, a cellular telephone system, an optical connection, etc.

[0260] The programmable circuit system platform 3300 of the illustrated example also includes one or more mass storage disks or devices 3328 for storing firmware, software and / or data. Examples of such mass storage disks or devices 3328 include magnetic storage devices (e.g., floppy disks, drives, HDDs, etc.), optical storage devices (e.g., Blu-ray disks, CDs, DVDs, etc.), RAID systems, and / or solid-state storage disks or devices (such as flash memory devices and / or SSDs).

[0261] Can be Fig.30 and / or Fig.31 The machine-readable instructions 3332 implemented by the machine-readable instructions may be stored in a mass storage device 3328, in a volatile memory 3314, in a non-volatile memory 3316, and / or on at least one removable non-transitory computer-readable storage medium such as a CD or DVD.

[0262] Fig.34 yes Fig.32 The programmable circuit system 3212 and / or Fig.33 3312 is a block diagram of an example implementation of an example programmable circuit system 3312. In this example, Fig.32 The programmable circuit system 3212 and / or Fig.33 The programmable circuit system 3312 is implemented by the microprocessor 3400. For example, the microprocessor 3400 may be a general-purpose microprocessor (eg, a general-purpose microprocessor circuit system). The microprocessor 3400 executes Fig.29 , Fig.30 and / or Fig.31 Some or all of the machine readable instructions of the flowchart to effectively Fig.21 and / or Fig. 22 The circuit system is instantiated as logic circuits for performing operations corresponding to those machine-readable instructions. In some such examples, Fig.21 and / or Fig. 22The circuit system is instantiated by the hardware circuits of the microprocessor 3400 in combination with machine-readable instructions. For example, the microprocessor 3400 can be implemented by a multi-core hardware circuit system (such as a CPU, DSP, GPU, XPU, etc.). Although it may include any number of example cores 3402 (for example, 1 core), the microprocessor 3400 of this example is a multi-core semiconductor device including N cores. The cores 3402 of the microprocessor 3400 can operate independently, or can cooperate to execute machine-readable instructions. For example, the machine code corresponding to a firmware program, an embedded software program, or a software program can be executed by one of the cores in the core 3402, or can be executed by multiple cores in the core 3402 at the same or different times. In some examples, the machine code corresponding to the firmware program, the embedded software program, or the software program is divided into threads and executed in parallel by two or more cores in the core 3402. The software program can be executed in parallel by Fig.29 , Fig.30 and / or Fig.31 The flowcharts may correspond to part or all of the machine-readable instructions and / or operations.

[0263] The core 3402 can communicate via a first example bus 3404. In some examples, the first bus 3404 can be implemented by a communication bus for communication associated with (one or more) cores in the core 3402. For example, the first bus 3404 can be implemented by at least one of an Inter-Integrated Circuit (I2C) bus, a Serial Peripheral Interface (SPI) bus, a PCI bus, or a PCIe bus. Additionally or alternatively, the first bus 3404 can be implemented by any other type of computing or electrical bus. The core 3402 can obtain data, instructions, and / or signals from one or more external devices via an example interface circuit system 3406. The core 3402 can output data, instructions, and / or signals to one or more external devices via the interface circuit system 3406. Although the core 3402 of this example includes an example local memory 3420 (e.g., a first level (Level 1, L1) cache, which can be divided into an L1 data cache and an L1 instruction cache), the microprocessor 3400 also includes an example shared memory 3410 (e.g., a second level (L2) cache) that can be shared by the cores for high-speed access to data and / or instructions. Data and / or instructions can be transferred (e.g., shared) by writing to and / or reading from the shared memory 3410. The local memory 3420 and shared memory 3410 of each core in the core 3402 can be a plurality of levels of cache memory and main memory (e.g., Fig.32Main memory 3214, 3216 and / or Fig.33 3314, 3316). Typically, memory at higher levels in the hierarchy exhibits lower access times and has smaller storage capacity than memory at lower levels. Changes to each level of the cache hierarchy are managed (e.g., coordinated) by a cache coherence policy.

[0264] Each core 3402 may be referred to as a CPU, DSP, GPU, etc., or any other type of hardware circuit system. Each core 3402 includes a control unit circuit system 3414, an arithmetic and logic (AL) circuit system (sometimes referred to as an ALU) 3416, a plurality of registers 3418, a local memory 3420, and a second example bus 3422. Other structures may exist. For example, each core 3402 may include a vector unit circuit system, a single instruction multiple data (SIMD) unit circuit system, a load / store unit (LSU) circuit system, a branch / jump unit circuit system, a floating-point unit (FPU) circuit system, etc. The control unit circuit system 3414 includes a semiconductor-based circuit configured to control (e.g., coordinate) data movement within the corresponding core 3402. The AL circuit system 3416 includes a semiconductor-based circuit configured to perform one or more mathematical and / or logical operations on data within the corresponding core 3402. Some examples of AL circuit system 3416 perform integer-based operations. In other examples, AL circuit system 3416 also performs floating-point operations. In still other examples, AL circuit system 3416 may include a first AL circuit system that performs integer-based operations and a second AL circuit system that performs floating-point operations. In some examples, AL circuit system 3416 may be referred to as an Arithmetic Logic Unit (ALU).

[0265] Registers 3418 are semiconductor-based structures for storing data and / or instructions (such as the results of one or more of the operations performed by the AL circuit system 3416 of the corresponding core 3402). For example, registers 3418 may include vector register(s), SIMD register(s), general register(s), flag register(s), segment register(s), machine-specific register(s), instruction pointer register(s), control register(s), debug register(s), memory management register(s), machine check register(s), etc. Registers 3418 may be stored as follows: Fig.34 . Alternatively, registers 3418 may be organized in any other arrangement, format, or structure (such as by being distributed throughout core 3402) to shorten access time. Second bus 3422 may be implemented by at least one of an I2C bus, an SPI bus, a PCI bus, or a PCIe bus.

[0266] Each core 3402 and / or (more generally) microprocessor 3400 may include additional and / or alternative structures to those shown and described above. For example, there may be one or more clock circuits, one or more power supplies, one or more power gates, one or more cache home agents (CHA), one or more converged / common mesh stops (CMS), one or more shifters (e.g., (one or more) barrel shifters), and / or other circuit systems. Microprocessor 3400 is a semiconductor device that is manufactured to include many transistors connected to each other to implement the structures described above in one or more integrated circuits (ICs) contained in one or more packages.

[0267] The microprocessor 3400 may include one or more accelerators (e.g., acceleration circuit systems, hardware accelerators, etc.), and / or collaborate with one or more accelerators (e.g., acceleration circuit systems, hardware accelerators, etc.). In some examples, the accelerator is implemented by a logic circuit system, so that certain tasks can be performed faster and / or more efficiently than can be performed by a general-purpose processor. Examples of accelerators include ASICs and FPGAs, such as those discussed herein. GPUs, DSPs, and / or other programmable devices may also be accelerators. The accelerator may be onboard the microprocessor 3400, in the same chip package as the microprocessor 3400, and / or in one or more packages separate from the microprocessor 3400.

[0268] Fig.35 yes Fig.32 The programmable circuit system 3212 and / or Fig.33 3312 is a block diagram of another example implementation of a programmable circuit system 3312. In this example, the programmable circuit systems 3212, 3312 are implemented by FPGA circuit system 3500. For example, FPGA circuit system 3500 can be implemented by an FPGA. For example, FPGA circuit system 3500 can be used to perform operations that would otherwise be performed by Fig.34 However, once configured, FPGA circuit system 3500 instantiates the operations and / or functions corresponding to the machine-readable instructions in hardware, and is thereby generally capable of performing these operations / functions faster than if these operations / functions could be performed by a general-purpose microprocessor executing corresponding software.

[0269] More specifically, Fig.34 The microprocessor 3400 (the microprocessor 3400 is a general-purpose device that can be programmed to perform the Fig.29 , Fig.30 and / or Fig.31 In contrast, some or all of the machine-readable instructions represented by the flowchart(s) of the computer program product, but whose interconnections and logic circuitry are fixed once manufactured, Fig.35 The example FPGA circuit system 3500 includes such interconnections and logic circuit systems: these interconnections and logic circuit systems can be configured, structured, programmed and / or interconnected in different ways after manufacturing to instantiate, for example, Fig.29 , Fig.30 and / or Fig.31 The FPGA circuit system 3500 may be thought of as an array of logic gates, interconnects, and switches. The switches may be programmed to change how the logic gates are interconnected by the interconnects, effectively forming one or more dedicated logic circuits (unless and until the FPGA circuit system 3500 is reprogrammed). The configured logic circuits enable the logic gates to cooperate in different ways, thereby performing different operations on the data received by the input circuit system. These operations may be performed by Fig.29 , Fig.30 and / or Fig.31 3500 may correspond to some or all of the instructions (e.g., software and / or firmware) represented by the (one or more) flowcharts of the FPGA circuit system 3500. Thus, the FPGA circuit system 3500 may be configured and / or constructed to effectively communicate with Fig.29 , Fig.30 and / or Fig.31Some or all of the operations / functions corresponding to the machine-readable instructions of the (one or more) flowcharts are instantiated as dedicated logic circuits to perform the operations / functions corresponding to those software instructions in a dedicated manner similar to an ASIC. Fig.29 , Fig.30 and / or Fig.31 FPGA circuit system 3500 can perform the same operations / functions faster than corresponding operations / functions in some or all of the machine-readable instructions.

[0270] exist Fig.35 In the example, the FPGA circuit system 3500 is configured and / or constructed in response to being programmed (and / or reprogrammed one or more times) based on a binary file. In some examples, a binary file can be compiled and / or generated based on instructions in a hardware description language (HDL) such as Lucid, Very High Speed ​​Integrated Circuit (VHSIC) Hardware Description Language (VHSIC Hardware Description Language, VHDL), or Verilog. For example, a user (e.g., a human user, a machine user, etc.) can write code or a program corresponding to one or more operations / functions in HDL; the code / program can be translated into a low-level language as needed; and the code / program (e.g., code / program in a low-level language) can be converted into a binary file (e.g., by a compiler, a software application, etc.). In some examples, Fig.35 The FPGA circuit system 3500 can access and / or load the binary file to make Fig.35 The FPGA circuit system 3500 is configured and / or constructed to perform one or more operations / functions. For example, a binary file can be composed of a bit stream (e.g., one or more computer-readable bits, one or more machine-readable bits, etc.), data (e.g., computer-readable data, machine-readable data, etc.), and / or Fig.35 The FPGA circuit system 3500 accesses the machine-readable instructions to implement the Fig.35 The FPGA circuit system 3500 or (one or more) parts thereof are configured and / or constructed.

[0271] In some examples, the binary file is compiled, generated, converted, and / or otherwise output from a unified software platform for programming the FPGA. For example, the unified software platform can translate a first instruction (e.g., code or program) corresponding to one or more operations / functions in a high-level language (e.g., C, C++, Python, etc.) into a second instruction, which corresponds to one or more operations / functions in the form of an HDL. In some such examples, the binary file is compiled, generated, and / or otherwise output from the unified software platform based on the second instruction. In some examples, Fig.35 The FPGA circuit system 3500 can access and / or load the binary file to make Fig.35 The FPGA circuit system 3500 is configured and / or constructed to perform one or more operations / functions. For example, a binary file can be composed of a bit stream (e.g., one or more computer-readable bits, one or more machine-readable bits, etc.), data (e.g., computer-readable data, machine-readable data, etc.), and / or Fig.35 The FPGA circuit system 3500 accesses the machine-readable instructions to implement the Fig.35 The FPGA circuit system 3500 or (one or more) parts thereof are configured and / or constructed.

[0272] Fig.35 The FPGA circuit system 3500 includes an example input / output (I / O) circuit system 3502, which is used to obtain data from and / or output data to the example configuration circuit system 3504 and / or external hardware 3506. For example, the configuration circuit system 3504 can be implemented by an interface circuit system that can obtain a binary file for configuring the FPGA circuit system 3500 or (one or more) parts thereof, and the binary file can be implemented by a bitstream, data and / or machine-readable instructions. In some such examples, the configuration circuit system 3504 can obtain the binary file from a user, a machine (for example, a hardware circuit system (for example, a programmable or dedicated circuit system) that can implement an artificial intelligence / machine learning (AI / ML) model to generate a binary file), etc., and / or any (one or more) combinations thereof. In some examples, the external hardware 3506 can be implemented by an external hardware circuit system. For example, the external hardware 3506 can be implemented by Fig.34 It is implemented by the microprocessor 3400.

[0273] FPGA circuitry 3500 also includes an array of example logic gate circuitry 3508, a plurality of example configurable interconnects 3510, and example storage circuitry 3512. Logic gate circuitry 3508 and configurable interconnects 3510 can be configured to instantiate a Fig.29 , Fig.30 and / or Fig.31 One or more operations / functions corresponding to at least some of the machine-readable instructions and / or other desired operations. Fig.35 The logic gate circuit system 3508 shown in is manufactured in blocks or groups. Each block includes a semiconductor-based electrical structure that can be configured into a logic circuit. In some examples, the electrical structure includes a logic gate (e.g., an AND gate, an OR gate, a NOR gate, etc.) that provides a basic building block for a logic circuit. An electrically controllable switch (e.g., a transistor) is present in each logic gate circuit system in the logic gate circuit system 3508 so that the configuration of the electrical structure and / or logic gate can form a circuit to perform the desired operation / function. The logic gate circuit system 3508 may include other electrical structures (such as a look-up table (LUT), a register (e.g., a flip-flop or latch), a multiplexer, etc.).

[0274] The configurable interconnect 3510 of the illustrated example is a conductive path, trace, via, etc., which may include an electrically controllable switch (e.g., a transistor) whose state can be changed by programming (e.g., using an HDL instruction language) to activate or deactivate one or more connections between one or more logic gate circuit systems in the logic gate circuit system 3508 to program the desired logic circuit.

[0275] The storage circuit system 3512 of the illustrated example is configured to store (one or more) results of one or more operations performed by the corresponding logic gates. The storage circuit system 3512 can be implemented by registers, etc. In the illustrated example, the storage circuit system 3512 is distributed between the logic gate circuit system 3508 to facilitate access and increase execution speed.

[0276] Fig.35The example FPGA circuit system 3500 also includes an example dedicated operation circuit system 3514. In this example, the dedicated operation circuit system 3514 includes a dedicated circuit system 3516, which can be called to implement common functions, thereby avoiding the need to program those functions on site. Examples of such dedicated circuit systems 3516 include memory (e.g., DRAM) controller circuit systems, PCIe controller circuit systems, clock circuit systems, transceiver circuit systems, memory, and multiplier-accumulator circuit systems. There may be other types of dedicated circuit systems. In some examples, the FPGA circuit system 3500 may also include an example general-purpose programmable circuit system 3518, such as an example CPU 3520 and / or an example DSP 3522. There may be additionally or alternatively other general-purpose programmable circuit systems 3518 that can be programmed to perform other operations, such as GPUs, XPUs, etc.

[0277] although Fig.34 and Fig.35 The diagram shows Fig.32 The programmable circuit system 3212 and / or Fig.33 Two example implementations of programmable circuit system 3312 are shown, but many other implementations are contemplated. For example, the FPGA circuit system may include an onboard CPU (such as Fig.34 One or more of the example CPUs 3520). Therefore, Fig.32 The programmable circuit system 3212 may additionally be configured by combining at least Fig.34 An example microprocessor 3400 and Fig.35 In some such hybrid examples, Fig.34 One or more cores 3402 may execute Fig.29 , Fig.30 and / or Fig.31 a first portion of the machine-readable instructions represented by the flowchart(s) to perform a first operation(s) / function(s), Fig.35 The FPGA circuit system 3500 can be configured and / or constructed to implement Fig.29 , Fig.30 and / or Fig.31 The second (one or more) operations / (one or more) functions corresponding to the second portion of the machine-readable instructions represented by the flowchart of the present invention, and / or the ASIC can be configured and / or constructed to perform the same as the ... Fig.29 , Fig.30 and / or Fig.31 The third portion of the machine-readable instructions represented by the flowchart corresponds to a third(s) operation / (s) function.

[0278] It should be understood that Fig.21 and / or Fig. 22 Some or all of the circuitry of can thus be instantiated at the same or different times. For example, Fig.34 The same and / or different (one or more) portions of the microprocessor 3400 can be programmed to execute (one or more) portions of the machine-readable instructions at the same and / or different times. In some examples, Fig.35 The same and / or different (one or more) portions of the FPGA circuit system 3500 can be configured and / or constructed to perform operations / functions corresponding to (one or more) portions of the machine-readable instructions at the same and / or different times.

[0279] In some examples, Fig.21 and / or Fig. 22 Some or all of the circuitry of may be instantiated in one or more threads that execute, for example, concurrently and / or sequentially. Fig.34 The microprocessor 3400 can execute machine-readable instructions in one or more threads that are executed concurrently and / or sequentially. In some examples, Fig.35 The FPGA circuit system 3500 can be configured and / or constructed to implement operations / functions concurrently and / or sequentially. In addition, in some examples, Fig.21 and / or Fig. 22 Some or all of the circuitry in the Fig.34 The microprocessor 3400 is implemented within one or more virtual machines and / or containers.

[0280] In some examples, programmable circuit systems 3212, 3312 can be in one or more packages. For example, Fig.34 The microprocessor 3400 and / or Fig.35 FPGA circuit system 3500 can be in one or more packages. In some examples, the XPU can be implemented by programmable circuit system 3212, 3312, which can be in one or more packages. For example, the XPU can include a CPU in one package (e.g., Fig.34 Microprocessor 3400, Fig.35 CPU3520, etc.), a DSP in another package (e.g., Fig.35 DSP 3522 in another package), a GPU in yet another package, and an FPGA in yet another package (e.g., Fig.35 FPGA circuit system 3500).

[0281] exist Fig.36 The diagram shows how to convert Fig.32Example machine readable instructions 3232 and / or Fig.33 332 to other hardware devices (e.g., hardware devices owned and / or operated by a third party from the owner and / or operator of the software distribution platform). The example software distribution platform 3605 can be implemented by any computer server, data facility, cloud service, etc. that is capable of storing software and delivering software to other computing devices. The third party can be a customer of the entity that owns and / or operates the software distribution platform 3605. For example, the entity that owns and / or operates the software distribution platform 3605 can be a software (such as, Fig.32 Example machine readable instructions 3232 and / or Fig.33 The third party may be a consumer, user, retailer, OEM, etc. who purchases and / or licenses the software for use and / or resale and / or sublicensing. In the illustrated example, the software distribution platform 3605 includes one or more servers and one or more storage devices. The storage device stores the machine-readable instructions 3232, 3332, which can be used with the machine-readable instructions 3232, 3332 as described above. Fig.29 , Fig.30 and / or Fig.31 The example software distribution platform 3605 server or servers may correspond to the example machine-readable instructions 3232, 3332. The example network 3610 may correspond to any one or more of the Internet and / or any of the example networks described above. In some examples, as part of a business transaction, the one or more servers transmit the software to the requestor in response to the request. Payment for the delivery, sale, and / or license of the software may be handled by one or more servers of the software distribution platform and / or by a third-party payment entity. The server enables a purchaser and / or licensor to download the machine-readable instructions 3232, 3332 from the software distribution platform 3605. For example, the software (which may be Fig.29 , Fig.30 and / or Fig.31 ) can be downloaded to the example programmable circuit system platform 3200, which is used to execute the machine-readable instructions 3232, 3332 to implement the storage monitoring circuit system 1702 and / or the system monitoring circuit system 1704. In some examples, one or more servers of the software distribution platform 3605 periodically provide, transmit and / or force the software (e.g., Fig.32 Example machine readable instructions 3232 of, and / or Fig.33The example machine readable instructions 3332 of the embodiment of the present invention are to ensure that improvements, patches, updates, etc. are distributed and applied to the software at the end-user device. Although referred to as software above, the distributed "software" may alternatively be firmware.

[0282] It should be appreciated from the foregoing that example systems, devices, articles, and methods for monitoring and / or predicting the performance of an example heat exchanger and / or one or more example reservoirs associated therewith have been disclosed. In the examples disclosed herein, a first example reservoir is fluidly and / or operably coupled to an example heat exchanger, and a second example reservoir is fluidly coupled to the first reservoir to supply coolant thereto without user involvement. Thus, the examples disclosed herein maintain sufficient coolant levels at the heat exchanger to reduce the risk of damage to the heat exchanger due to insufficient coolant levels. In further examples disclosed herein, an example programmable circuit system detects the coolant level in the second reservoir based on the output of a sensor, and alerts an operator when the coolant level does not meet one or more example thresholds. Additionally or alternatively, the programmable circuit system may detect and / or predict an anomaly (e.g., a coolant anomaly and / or a hardware anomaly) associated with (one or more) heat exchangers based on the execution of one or more machine learning models. Advantageously, the disclosed systems, apparatus, articles, and methods improve the efficiency of cooling computing device(s) by dynamically supplying coolant to one or more heat exchangers and / or alerting an operator when low coolant levels and / or other anomalies are detected for the heat exchanger(s), and thereby prevent computing device overheating, reduce maintenance issues at the heat exchanger(s), etc. The disclosed systems, apparatus, articles, and methods accordingly relate to one or more improvements in the operation of a machine such as a computer or other electronic and / or mechanical device.

[0283] Example methods, devices, systems, and articles of manufacture for monitoring heat exchangers and associated storage are disclosed herein. Further examples and combinations thereof include the following:

[0284] Example 1 includes a device comprising a memory, instructions, and a programmable circuit system, the programmable circuit system being used to execute the instructions to perform the following operations: detecting a coolant level of a first reservoir based on an output of a sensor associated with the first reservoir, the first reservoir being removably coupled to a second reservoir, the first reservoir being used to supply coolant to the second reservoir; predicting a characteristic associated with operation of a cooling device fluidly coupled to the second reservoir based on the coolant level; and causing an output to be presented at a user device based on the predicted characteristic.

[0285] Example 2 includes an apparatus as in Example 1, wherein the programmable circuit system is used to execute a machine learning model to predict the characteristic, and the coolant level defines an input to the machine learning model.

[0286] Example 3 includes the apparatus of Example 1, wherein the cooling device comprises a liquid assisted air cooling (LAAC) heat exchanger, an in-row cooling distribution unit (CDU), an in-rack CDU, or an immersion tank.

[0287] Example 4 includes the apparatus of Example 1, wherein the predicted characteristic corresponds to at least one of: a coolant anomaly associated with the coolant, a hardware anomaly associated with the cooling device, or a remaining useful life of the cooling device.

[0288] Example 5 includes the apparatus of Example 4, wherein the coolant abnormality includes at least one of: evaporation of the coolant, overheating of the coolant, leakage of the coolant, or pressure drop of the coolant.

[0289] Example 6 includes the apparatus of Example 4, wherein the hardware anomaly comprises at least one of a pump failure, a fan failure, an airflow obstruction, a fin damage, or an operating temperature associated with the cooling device above a threshold.

[0290] Example 7 includes the apparatus of Example 6, wherein the programmable circuit system is to cause one or more of the following to be adjusted in response to the hardware anomaly: a fan speed, a pump speed, or a coolant flow rate.

[0291] Example 8 includes an apparatus as in Example 1, wherein the programmable circuit system is used to cause an output to be displayed at a user device, the output comprising at least one of: an identifier associated with the cooling device, a location of the cooling device, a coolant level, or a predicted characteristic.

[0292] Example 9 includes a non-transitory computer-readable medium comprising instructions that, when executed, cause a programmable circuit system to perform at least the following operations: detecting a property of a coolant in a first reservoir based on an output of a sensor associated with the first reservoir, the first reservoir being removably coupled to a second reservoir, the first reservoir being used to provide coolant to the second reservoir; detecting an anomaly associated with a cooling device fluidly coupled to the second reservoir based on the coolant property; and causing a control parameter of the cooling device to be adjusted in response to detection of the anomaly.

[0293] Example 10 includes the non-transitory computer readable medium of Example 9, wherein the cooling device corresponds to at least one of: a liquid assisted air cooling (LAAC) heat exchanger, an in-row cooling distribution unit (CDU), an in-rack CDU, or an immersion tank.

[0294] Example 11 includes the non-transitory computer readable medium of Example 9, wherein the instructions cause the programmable circuit system to predict a remaining useful life of the cooling device.

[0295] Example 12 includes the non-transitory computer readable medium of Example 11, wherein the anomaly is associated with one or more of: (a) a coolant provided to the cooling device via the first reservoir; or (b) hardware associated with the cooling device.

[0296] Example 13 includes the non-transitory computer readable medium of Example 12, wherein the anomaly indicates one or more of: evaporation of the coolant, overheating of the coolant, leakage of the coolant, or pressure associated with the coolant.

[0297] Example 14 includes the non-transitory computer readable medium of Example 12, wherein the anomaly comprises at least one of a pump failure, a fan failure, an airflow obstruction, a fin damage, or an operating temperature associated with the cooling device exceeding a threshold.

[0298] Example 15 includes the non-transitory computer readable medium of Example 9, wherein the instructions cause the programmable circuit system to cause one or more of the following to be adjusted: a fan speed, a pump speed, or a coolant flow rate associated with the cooling device.

[0299] Example 16 includes a non-transitory computer-readable medium as in Example 9, wherein the instructions cause the programmable circuit system to output display information for presentation at a user device, the display information including at least one of: an identifier associated with the cooling device, a location of the cooling device, a coolant property, or an anomaly.

[0300] Example 17 includes a non-transitory computer-readable medium as in Example 9, wherein the cooling device is a first cooling device in a data center, the anomaly is a first anomaly, the control parameter is a first control parameter, and the instructions cause the programmable circuit system to: detect a second anomaly associated with a second cooling device in the data center; define a cluster including the first cooling device and the second cooling device based on the first anomaly and the second anomaly; and cause a second control parameter of the second cooling device to be adjusted based on the cluster.

[0301] Example 18 includes a system comprising: a first reservoir fluidly coupled to a heat exchanger; a second reservoir removably coupled to the first reservoir, the second reservoir being used to supply fluid to the first reservoir; a sensor operably coupled to the second reservoir, the sensor being used to generate an output indicating a fluid level of the fluid in the second reservoir; and a programmable circuit system for determining a state of the second reservoir based on the output and causing an indicator to illuminate based on the state.

[0302] Example 19 includes the system of Example 18, wherein the second reservoir is used to supply fluid to the first reservoir based on the output during operation of the heat exchanger.

[0303] Example 20 includes a system as in Example 18, wherein the indicator includes a first light source and a second light source, and the programmable circuit system is used to: in response to determining that the fluid level meets the threshold, activate the first light source but not activate the second light source, and in response to determining that the fluid level does not meet the threshold, activate the second light source but not activate the first light source.

[0304] Example 21 includes the system of Example 20, wherein the programmable circuit system is used to generate an alarm in response to determining that the fluid level does not meet the threshold value, and causes the alarm to be presented at one or more of the second reservoir or the user device.

[0305] Example 22 includes the system of Example 21, wherein the alarm includes a status, and at least one of a location of the heat exchanger or an identifier associated with the heat exchanger.

[0306] Example 23 includes the system of Example 18, wherein the sensor is carried by a cap removably coupled to the second reservoir.

[0307] Example 24 includes the system of Example 23, wherein the cover includes an indicator.

[0308] Example 25 includes a system as in Example 18, wherein the sensor is a first sensor at least partially disposed in a second reservoir, and the system further includes a second sensor at least partially disposed in the second reservoir, the first sensor being associated with a first fluid level threshold, and the second sensor being associated with a second fluid level threshold.

[0309] The attached claims are hereby incorporated into the present detailed description by this reference. Although certain example systems, devices, articles, and methods have been disclosed herein, the scope of coverage of this patent is not limited thereto. On the contrary, this patent covers all systems, devices, articles, and methods that fairly fall within the scope of the claims of this patent.

Claims

1. A device, comprising: Memory; instruction; as well as A programmable circuit system, wherein the programmable circuit system is configured to execute the instruction to perform the following operations: detecting a coolant level of a first reservoir based on an output of a sensor associated with the first reservoir, the first reservoir being removably coupled to a second reservoir, the first reservoir being operable to supply coolant to the second reservoir; predicting a characteristic associated with operation of a cooling device fluidly coupled to the second reservoir based on the coolant level; as well as An output is caused to be presented at a user device based on the predicted characteristic.

2. The device according to claim 1, wherein: The programmable circuit system is used to execute a machine learning model to predict the characteristic, and the coolant level defines an input to the machine learning model.

3. The device according to any one of claims 1 or 2, wherein: The cooling equipment includes a liquid-assisted air cooling (LAAC) heat exchanger, an in-row cooling distribution unit (CDU), an in-rack CDU, or an immersion tank.

4. The device according to any one of claims 1 or 2, wherein: The predicted characteristic corresponds to at least one of: a coolant anomaly associated with the coolant, a hardware anomaly associated with the cooling device, or a remaining useful life of the cooling device.

5. The device according to claim 4, wherein: The coolant abnormality includes at least one of the following: evaporation of the coolant, overheating of the coolant, leakage of the coolant, or pressure drop of the coolant.

6. The device according to claim 4, wherein: The hardware anomaly includes at least one of a pump failure, a fan failure, an airflow obstruction, a fin damage, or an operating temperature associated with the cooling device being above a threshold.

7. The device according to claim 6, wherein: The programmable circuitry is to cause one or more of the following to be adjusted in response to the hardware anomaly: a fan speed, a pump speed, or a coolant flow rate.

8. The device according to any one of claims 1 or 2, wherein: The programmable circuitry is to cause the output to be displayed at the user device, the output comprising at least one of: an identifier associated with the cooling device, a location of the cooling device, the coolant level, or the predicted characteristic.

9. A method comprising: detecting a property of coolant in a first reservoir based on an output of a sensor associated with the first reservoir, the first reservoir being removably coupled to a second reservoir, the first reservoir being operable to provide coolant to the second reservoir; detecting an anomaly associated with a cooling device fluidly coupled to the second reservoir based on the coolant property; as well as A control parameter of the cooling device is adjusted in response to the detection of the anomaly.

10. The method of claim 9, further comprising: The remaining useful life of the cooling device is predicted.

11. The method according to any one of claims 9 or 10, wherein: The anomaly is associated with one or more of: (a) coolant provided to the cooling device via the first reservoir; or (b) hardware associated with the cooling device.

12. The method of claim 11, wherein: The anomaly indicates one or more of: evaporation of the coolant, overheating of the coolant, leakage of the coolant, pressure associated with the coolant, pump failure, fan failure, airflow obstruction, fin damage, or an operating temperature associated with the cooling device exceeding a threshold.

13. The method of any one of claims 9 or 10, further comprising: One or more of the following is caused to be adjusted: a fan speed, a pump speed, or a coolant flow rate associated with the cooling device.

14. The method of any one of claims 9 or 10, further comprising: Display information is output for presentation at a user device, the display information comprising at least one of: an identifier associated with the cooling device, a location of the cooling device, the coolant property, or the anomaly.

15. The method according to any one of claims 9 or 10, wherein: The cooling device is a first cooling device in a data center, the anomaly is a first anomaly, the control parameter is a first control parameter, and the method further comprises: detecting a second anomaly associated with a second cooling device in the data center; defining a cluster including the first cooling device and the second cooling device based on the first anomaly and the second anomaly; and Such that a second control parameter of the second cooling device is adjusted based on the clustering.

16. A system, comprising: a first reservoir fluidly coupled to a heat exchanger; a second reservoir removably coupled to the first reservoir, the second reservoir for supplying fluid to the first reservoir; a sensor operatively coupled to the second reservoir, the sensor for generating an output indicative of a fluid level of the fluid in the second reservoir; as well as A programmable circuit system for: determining a state of the second reservoir based on the output; and An indicator is caused to illuminate based on the status.

17. The system of claim 16, wherein: The second reservoir is for supplying the fluid to the first reservoir based on the output during operation of the heat exchanger.

18. The system of any one of claims 16 or 17, wherein: The indicator includes a first light source and a second light source, and the programmable circuit system is used to: In response to determining that the fluid level satisfies a threshold, activating the first light source but not activating the second light source; and In response to determining that the fluid level does not satisfy the threshold, the second light source is activated but the first light source is not activated.

19. The system of claim 18, wherein: The programmable circuit system is used to: generating an alarm in response to determining that the fluid level does not satisfy the threshold; and The alert is caused to be presented at one or more of the second repository or a user device.

20. The system of claim 19, wherein: The alert includes the status and at least one of a location of the heat exchanger or an identifier associated with the heat exchanger.

21. The system of any one of claims 16 or 17, wherein: The sensor is carried by a cover removably coupled to the second reservoir.

22. The system of claim 21, wherein: The cover includes the indicator.

23. The system of any one of claims 16 or 17, wherein: The sensor is a first sensor disposed at least partially in the second reservoir, and the system further includes a second sensor disposed at least partially in the second reservoir, the first sensor being associated with a first fluid level threshold, and the second sensor being associated with a second fluid level threshold.

24. A machine-readable medium comprising code which, when executed, causes a machine to perform the method of any one of claims 9 to 15.

25. An apparatus comprising means for performing the method of any one of claims 9-15.

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