ROF photodiode and manufacturing method thereof

Abstract

The embodiment of the invention provides an ROF photodiode and a manufacturing method thereof, and belongs to the technical field of photoelectric detection. The ROF photodiode comprises a substrate silicon layer; the insulating layer is arranged on the upper surface of the substrate silicon layer and is provided with at least one groove; the top silicon layer is arranged on the upper surface of the insulating layer and extends downwards to be filled into the groove; the intrinsic absorption layer is arranged on the upper surface of the top silicon layer and is used for receiving and detecting an optical signal emitted by the optical fiber; wherein the groove penetrates to the upper surface of the substrate silicon layer, and the top silicon layer is in contact with the substrate silicon layer by filling the groove with the top silicon layer. According to the ROF photodiode, contact and communication between the top silicon layer and the substrate silicon layer are achieved through the insulating layer with the grooves, accumulated heat is efficiently dissipated through the substrate silicon layer, and the ROF photodiode is prevented from being overheated and burnt under high-intensity optical signals.

Description

Technical Field

[0001] The invention belongs to the technical field of photoelectric detection, and in particular relates to a ROF photodiode and a manufacturing method thereof. Background Art

[0002] The rapid development of large-capacity radio-over-fiber (ROF) technology has brought higher challenges to the performance of photodetectors (such as photodiodes). The Gaussian beam emitted through the optical fiber will form photogenerated carriers in the light absorption layer of the photodiode. Driven by the built-in electric field and the bias electric field, the photogenerated carriers (including electron carriers and hole carriers) drift to the two electrodes of the photodiode respectively, thereby generating photocurrent. Since the photodiode has a certain bias voltage when working, a certain thermal effect is generated in the light absorption layer of the photodiode. This thermal effect will increase with the increase of the incident light power intensity. When the thermal effect continues to accumulate and the temperature inside the photodiode exceeds the junction temperature, the photodiode will be burned.

[0003] At present, conventional photodiodes are usually made based on silicon-on-insulator (SOI) materials. The SOI wafer includes a substrate silicon layer, an insulating layer and a top silicon layer in sequence, and then a light absorption layer is grown on the top silicon layer. Taking the commonly used germanium structure absorption layer as an example, the thermal conductivity coefficient of the germanium material is 0.4~0.6W / cm·K, which is lower than the thermal conductivity coefficient of silicon, and the heat transfer rate is slow. Due to the existence of an insulating layer under the germanium structure, its thermal conductivity coefficient is 0.014W / cm·K, and the heat transfer rate is even slower, forming a thermal conduction barrier layer, resulting in continuous accumulation of heat in the germanium structure, seriously affecting the overall heat dissipation efficiency of the photodiode. At the same time, with the increasing intensity of the optical signal output by the optical fiber, the photodiode structure based on the SOI wafer is obviously no longer able to adapt to the current and future larger-capacity optical wireless communication equipment.

[0004] In view of this, a new type of ROF photodiode and its preparation method are needed to improve its thermal conductivity and avoid the problem of super-junction temperature burning caused by heat accumulation when the optical fiber outputs high-power and ultra-high-power optical signals. Summary of the invention

[0005] In order to solve at least one aspect of the above problems and defects in the prior art, the embodiments of the present invention provide a ROF photodiode and a manufacturing method thereof, which realizes the contact and communication between the top silicon layer and the substrate silicon layer through an insulating layer with a groove, and efficiently dissipates the accumulated heat through the substrate silicon layer, thereby preventing the ROF photodiode from overheating and burning under high-intensity optical signals. The technical solution is as follows:

[0006] According to one aspect of the present invention, a ROF photodiode is provided. The ROF photodiode comprises:

[0007] substrate silicon layer;

[0008] An insulating layer, disposed on the upper surface of the substrate silicon layer and having at least one groove;

[0009] A top silicon layer is disposed on the upper surface of the insulating layer and extends downward to fill the interior of the trench;

[0010] An intrinsic absorption layer is disposed on the upper surface of the top silicon layer and is used to receive and detect the optical signal emitted from the optical fiber;

[0011] The grooves penetrate to the upper surface of the substrate silicon layer, and the top silicon layer contacts the substrate silicon layer by filling the grooves.

[0012] In some embodiments, specifically, the insulating layer includes at least one groove formed around the central axis of the light beam emitted from the optical fiber and at least one insulating portion; each groove of the at least one groove is spaced apart from each insulating portion of the at least one insulating portion.

[0013] In some embodiments, specifically, the number of at least one insulating portion is N, where N is an integer greater than or equal to 2; at the center of the upper surface of the substrate silicon layer, a first insulating portion is formed around the central axis and a first groove is formed around the first insulating portion; at the edge of the upper surface of the substrate silicon layer, an Nth insulating portion is formed around the central axis.

[0014] In some embodiments, further, when the number of at least one insulating portion is greater than two and the number of at least one groove is greater than one, the first groove has the largest average width; the average widths of other grooves gradually decrease away from the central axis; the average width ranges from 5 to 50 μm.

[0015] In some embodiments, specifically, the number of at least one insulating portion is N, where N is an integer greater than or equal to 2; the number of at least one groove is greater than one; a first groove is formed around a central axis at the center of the upper surface of the substrate silicon layer and a first insulating portion is formed around the first groove; an Nth insulating portion is formed around the central axis at the edge of the upper surface of the substrate silicon layer. The first groove has the largest average width; the average widths of the other grooves that are successively away from the central axis decrease successively; the average width ranges from 5 to 50 μm.

[0016] In some embodiments, specifically, the number of at least one insulating portion is one, and the number of at least one groove is one; the insulating layer includes a first groove formed around the central axis and a first insulating portion formed around the first groove; the first insulating portion is arranged at the edge of the upper surface of the substrate silicon layer.

[0017] In some embodiments, at least one insulating portion of the insulating layer has at least one fracture groove; the fracture groove penetrates to the upper surface of the substrate silicon layer; the top silicon layer extends downward to fill the interior of the fracture groove and contact the substrate silicon layer.

[0018] In some embodiments, the planar shape of the insulating layer is any one of a circle, an ellipse, a semicircle, a semi-ellipse, an arc surface, a sector surface, a square, a diamond, and a rectangle.

[0019] In some embodiments, the intrinsic absorption layer is a germanium structure; the upper surface of the intrinsic absorption layer is covered with a photosensitive surface, and the photosensitive surface is an anti-reflection film for receiving and detecting the wavelength of the optical signal emitted by the optical fiber.

[0020] In some embodiments, a first electrode lead-out metal is disposed on the top silicon layer; a second electrode lead-out metal is disposed on the intrinsic absorption layer; and the first electrode lead-out metal and the second electrode lead-out metal form a PN junction.

[0021] According to another aspect of the present invention, another ROF photodiode is provided. The ROF photodiode comprises:

[0022] A substrate silicon layer, wherein the substrate silicon layer is a high-resistance silicon wafer;

[0023] a top silicon layer formed in a groove on an upper surface of the substrate silicon layer;

[0024] The intrinsic absorption layer based on the germanium structure is arranged on the upper surface of the top silicon layer and is used for receiving and detecting the optical signal emitted by the optical fiber.

[0025] According to another aspect of the present invention, a method for manufacturing a ROF photodiode is provided, which is used to manufacture the ROF photodiode described in the above aspects.

[0026] When an SOI wafer is used as the substrate structure of the ROF photodiode, the steps of the manufacturing method include:

[0027] Using SOI wafer to prepare substrate silicon layer and insulating layer;

[0028] Before growing the top silicon layer, etching at least one trench in the insulating layer by a trench etching process;

[0029] Filling at least one trench and planarizing to form a top silicon layer by a silicon epitaxial process;

[0030] Forming a P-type heavily doped region or an N-type heavily doped region on the upper surface of the top silicon layer through photolithography, ion implantation and annealing processes;

[0031] Growing an intrinsic absorption layer based on a germanium structure on a P-type heavily doped region or an N-type heavily doped region by selective epitaxial growth;

[0032] By photolithography, ion implantation and annealing processes, a local N-type heavily doped region or a local P-type heavily doped region with a preset doping depth is formed on the upper surface of the intrinsic absorption layer;

[0033] An anti-reflection film for receiving and detecting the wavelength of an optical signal is covered on the upper surface of the intrinsic absorption layer to form a photosensitive surface;

[0034] After the passivation layer is grown and the electrode contact hole is etched, the metal layer is grown to form a first electrode lead metal on the upper surface of the top silicon layer, and a second electrode lead metal is formed on the upper surface of a local N-type heavily doped region or a local P-type heavily doped region of the intrinsic absorption layer.

[0035] When a high-resistance silicon wafer is used as the substrate structure of the ROF photodiode, the steps of the manufacturing method include:

[0036] Using a high-resistance silicon wafer to prepare a substrate silicon layer;

[0037] By photolithography, ion implantation and annealing processes, a P-type heavily doped region or an N-type heavily doped region with a preset depth is formed below the upper surface of the substrate silicon layer to obtain a top silicon layer;

[0038] Growing an intrinsic absorption layer based on a germanium structure on a P-type heavily doped region or an N-type heavily doped region by selective epitaxial growth;

[0039] By photolithography, ion implantation and annealing processes, a local N-type heavily doped region or a local P-type heavily doped region with a preset doping depth is formed on the upper surface of the intrinsic absorption layer;

[0040] An anti-reflection film for receiving and detecting the wavelength of an optical signal is covered on the upper surface of the intrinsic absorption layer to form a photosensitive surface;

[0041] After the passivation layer is grown and the electrode contact hole is etched, the metal layer is grown to form a first electrode lead metal on the upper surface of the top silicon layer, and a second electrode lead metal is formed on the upper surface of a local N-type heavily doped region or a local P-type heavily doped region of the intrinsic absorption layer.

[0042] In some embodiments, the thickness of the substrate silicon layer ranges from 650 to 850 μm, and the resistance value ranges from 1 k to 10 kΩ·cm; the thickness of the top silicon layer ranges from 0.05 to 0.65 μm.

[0043] In some embodiments, the peak doping concentration of the P-type heavily doped region or the N-type heavily doped region is in the range of 5×10 18 ~5×10 20 / cm 3 The intrinsic absorption layer uses an in-situ doping process, and the in-situ doping P-type doping concentration or N-type doping concentration ranges from 1×10 14 ~1×1017 / cm 3 , and the thickness of the intrinsic absorption layer ranges from 0.5 to 2.0 μm.

[0044] In some embodiments, the preset doping depth of the local N-type heavily doped region or the local P-type heavily doped region is in the range of 0.1-0.3 μm.

[0045] In some embodiments, when the ROF photodiode has an insulating layer, the thickness of the insulating layer is in a range of 0.5 to 4.5 μm, and the average width of the at least one trench formed by etching is in a range of 5 to 50 μm.

[0046] The ROF photodiode and the manufacturing method thereof provided by the embodiments of the present invention have at least one or part of the following advantages:

[0047] (1) The ROF photodiode and the manufacturing method thereof provided by the embodiments of the present invention etch a groove in the insulating layer of the SOI wafer so that the top silicon above it is filled into the groove and connected with the substrate silicon layer below it, thereby avoiding heat accumulation in the upper functional layer caused by the extremely low thermal conductivity of the insulating layer, and directly achieving rapid heat dissipation through silicon, thereby preventing the ROF photodiode from overheating and burning;

[0048] (2) The ROF photodiode and the manufacturing method thereof provided by the embodiments of the present invention directly form a top silicon layer and an intrinsic absorption layer on a high-resistance silicon wafer, so that the heat accumulated in the top silicon layer and the intrinsic absorption layer no longer passes through an insulating layer with an extremely low thermal conductivity coefficient but directly passes through silicon to achieve rapid heat dissipation, thereby preventing the ROF photodiode from overheating and burning;

[0049] (3) The ROF photodiode and the manufacturing method thereof provided in the embodiments of the present invention optimize the design of the insulating layer groove according to the output light intensity of the optical fiber, so that the ROF photodiode obtains better heat conduction conditions, improves the heat dissipation efficiency, and enhances its working stability;

[0050] (4) The ROF photodiode and the manufacturing method thereof provided in the embodiments of the present invention use a conventional trench etching process to form an insulating layer with a trench, and use a conventional silicon epitaxial growth process to connect the top silicon with the substrate silicon. The process is simple and easy to process and scale, thereby reducing the production cost of the ROF photodiode.

[0051] (5) The ROF photodiode and its manufacturing method provided in the embodiments of the present invention improve the overall heat dissipation performance of the ROF photodiode by optimizing the design of the insulating layer groove according to the optical fiber output light intensity, so that it can adapt to high-intensity and ultra-high-intensity optical fiber output light signals, thereby expanding its application range. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] These and / or other aspects and advantages of the present invention will become apparent and readily understood from the following description of preferred embodiments in conjunction with the accompanying drawings, in which:

[0053] Figure 1 is a schematic cross-sectional structural diagram of a ROF photodiode according to a first embodiment of the present invention;

[0054] Figure 2 for Figure 1 A top view of an insulating layer structure of a ROF photodiode shown before growing a top silicon layer;

[0055] Figure 3 for Figure 1 A top view of another insulating layer structure of a ROF photodiode shown before growing a top silicon layer;

[0056] Figure 4 is a schematic cross-sectional structural diagram of a ROF photodiode according to a second embodiment of the present invention;

[0057] Figure 5 for Figure 4 A top view of an insulating layer structure of a ROF photodiode shown before growing a top silicon layer;

[0058] Figure 6 for Figure 4 A top view of another insulating layer structure of a ROF photodiode shown before growing a top silicon layer;

[0059] Figure 7 is a schematic cross-sectional structural diagram of a ROF photodiode according to a third embodiment of the present invention;

[0060] Figure 8 FIG. 4 is a schematic cross-sectional structural diagram of a ROF photodiode according to a fourth embodiment of the present invention. DETAILED DESCRIPTION

[0061] The technical solution of the present invention is further specifically described below by examples and in conjunction with the accompanying drawings. In the specification, the same or similar reference numerals indicate the same or similar components. The following description of the embodiments of the present invention with reference to the accompanying drawings is intended to explain the overall inventive concept of the present invention and should not be construed as a limitation of the present invention.

[0062] In the following, the terms "first", "second", "third", etc. are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first", "second", "third", etc. may explicitly or implicitly include one or more of the features.

[0063] At present, most ROF photodiodes are manufactured based on silicon-on-insulator (SOI) materials. The SOI wafer usually includes three main structural layers, namely, substrate silicon, insulating oxide layer and top silicon from the bottom layer upward. The absorption layer (such as the intrinsic layer of the germanium structure) used to receive and detect the optical signal emitted by the optical fiber is formed on the upper surface of the top silicon of the SOI wafer through the process of epitaxial growth of the germanium structure.

[0064] When the high-intensity optical signal emitted by the optical fiber passes through the absorption layer, the heat will accumulate continuously due to the thermal effect caused by the transfer of light energy. The accumulated heat needs to be quickly transferred to the outside of the SOI wafer (such as the outer edge of the package, the shell, etc.) to ensure timely heat dissipation, otherwise the continuous accumulation of heat will cause the ROF photodiode to continue to heat up. Once the temperature inside the ROF photodiode exceeds the junction temperature, it is very easy to burn out.

[0065] Through the structure of the SOI wafer, it can be found that although the thermal conductivity of silicon can reach 1.5W / cm·K, the thermal conductivity of germanium in the absorption layer, for example, is only 0.4~0.6W / cm·K, and the thermal conductivity of the insulating oxide layer sandwiched between the top silicon and the substrate silicon is even lower, only 0.014W / cm·K. In other words, in the process of heat transfer from the heat accumulated in the absorption layer to the SOI wafer layer by layer, on the one hand, the heat conduction efficiency within its own layer is not high, and on the other hand, due to the extremely low thermal conductivity of the insulating oxide layer, the heat transfer is further hindered, and the insulating oxide layer forms a thermal resistance layer. Even if there is a substrate silicon with good thermal conductivity underneath, it is impossible to dissipate the heat quickly and in time. It can be expected that when large-capacity optical wireless communication technology continues to develop and the optical power of the optical signal emitted by the optical fiber continues to increase, the existing structure of the ROF photodiode will obviously not be able to meet the demand.

[0066] Therefore, according to one aspect of the present invention, a new type of ROF photodiode is proposed, and the following embodiments optimize the structure of the ROF photodiode from two improvement directions.

[0067] One direction is to improve the structure of the insulating oxide layer in the existing SOI wafer, by providing a groove structure in the insulating oxide layer so that the top silicon above the insulating oxide layer and the substrate silicon below it are partially in contact with each other to form a connected structure, thereby increasing the ratio of heat dissipation through silicon. For details, see the first embodiment, the second embodiment and the third embodiment below.

[0068] Another direction is to use a high-resistance silicon wafer as the substrate for epitaxially growing the absorption layer, and the absorption layer is directly grown on the high-resistance silicon wafer. The difference from the SOI wafer is that there is no insulating oxide layer, so the heat transfer process will not be hindered and slowed down by the insulating oxide layer. See the fourth embodiment below for details.

[0069] First embodiment

[0070] See also Figure 1-Figure 2 , shows a cross-sectional structure of a ROF photodiode 100 using a SOI wafer as a substrate. The ROF photodiode 100 includes a substrate silicon layer 110, an insulating layer 120, a top silicon layer 130 and an intrinsic absorption layer 140 from bottom to top.

[0071] Specifically, an insulating layer 120 is disposed on the upper surface of the substrate silicon layer 110, and the insulating layer 120 has at least one groove (eg Figure 1 The top silicon layer 130 is disposed on the upper surface of the insulating layer 120 and extends downward to fill the inside of the groove. The intrinsic absorption layer 140 is disposed on the upper surface of the top silicon layer 130 to receive and detect the optical signal emitted by the optical fiber. The groove passes through the upper surface of the substrate silicon layer 110, and the top silicon layer 130 contacts the substrate silicon layer 110 by filling the groove.

[0072] In one example, the insulating layer 120 further includes at least one groove (eg, Figure 1 The first groove 1201 shown) and at least one insulating portion (eg Figure 1 The insulating layer 120 is a first insulating portion 121 as shown. Each trench of the at least one trench is spaced apart from each insulating portion of the at least one insulating portion. Alternatively, the insulating layer 120 may be made of conventional insulating materials in SOI wafers, such as silicon oxide, silicon nitride, etc.

[0073] In one example, alternatively, before growing the top silicon layer 130, the insulating layer 120 completely covering the upper surface of the substrate silicon layer 110 is etched to form a groove that meets the requirements. The design requirements for the grooves may include, but are not limited to, for example, the number of grooves, the groove width of each groove, and different groove positions corresponding to different grooves. Figure 1 and Figure 2 A specific example is shown to illustrate the specific arrangement of the insulating portion and the trench in the insulating layer 120 .

[0074] Of course, those skilled in the art will appreciate that the structure of the SOI wafer, the structure of the intrinsic absorption layer 140, the planar shape of the ROF photodiode 100, and the number and structure of the insulating portions and trenches in the insulating layer 120 are not limited to the above. Figure 1 and Figure 2 Therefore, this example is only an illustrative example, and those skilled in the art can perform targeted optimization design according to the actual working performance, light signal distribution and thermal effect distribution of the ROF photodiode 100, and it should not be understood as a limitation of the present invention.

[0075] In one example, combining Figure 1 and Figure 2 As shown, illustratively, the planar shape of the SOI wafer is circular, and the grooves and insulating portions designed in the insulating layer 120 are symmetrically arranged about the central axis (the center of the ROF photodiode 100, that is, the center of the optical fiber emitting the optical signal).

[0076] First, a portion of the insulating layer 120 at the center of the ROF photodiode 100 is retained to form a first insulating portion 121. Then, a first trench 1201 is formed by trench etching with an average width d1 around the first insulating portion 121. Another portion of the insulating layer 120 around the first trench 1201 is retained to form a second insulating portion 122, and then a second trench 1202 is formed by trench etching with an average width d2 around the second insulating portion 122. Finally, the remaining insulating layer 120 located at the edge of the upper surface of the substrate silicon layer 110 forms a third insulating portion 123. That is, the insulating layer 120 at this time has three insulating portions and two trenches.

[0077] In one example, considering that the high-intensity optical signal emitted by the optical fiber usually presents a Gaussian beam distribution shape, the optical power density is highest at the center of the ROF photodiode 100, and then the optical power density decreases as it approaches the edge of the SOI wafer. Therefore, the ROF photodiode 100 will generate more photogenerated carriers at the center position (i.e., near the center axis) of the received Gaussian beam, and thus most of the heat is concentrated at the center position. Therefore, in order to effectively connect the top silicon layer 130 and the substrate silicon layer 110 through the groove to improve the heat diffusion efficiency, during the etching process, the closer the groove is to the center of the ROF photodiode 100, the larger the average width of the groove. Conversely, the smaller the average width of the groove. Figure 1 As shown, the first groove 1201 is closer to the center of the optical signal than the second groove 1202, so the corresponding average width is d1>d2. In this way, the central area of ​​the ROF photodiode 100 has a larger contact area between the top silicon layer 130 and the substrate silicon layer 110, which is more conducive to heat dissipation.

[0078] In one example, if Figure 2 As shown, taking the insulating layer 120 having a circular planar shape as an example, the overall shape of the first insulating portion 121, the first groove 1201, the second insulating portion 122, the second groove 1202 and the third insulating portion 123 formed around the center (i.e., the center axis) of the ROF photodiode 100 presents a concentric ring shape around the first insulating portion 121 at the center.

[0079] In one example, alternatively, the planar shape of the insulating layer 120 may be Figure 2In addition to the circle shown, planar shapes such as ellipse, semicircle, semi-ellipse, arc surface, fan-shaped surface, square, diamond and rectangle can also be used according to the actual performance requirements or design requirements of the ROF photodiode 100. At the same time, in order to ensure the uniformity of heat conduction, preferably, the center of the optical fiber emitting the light signal, that is, the center of the ROF photodiode is used as the central axis, and the grooves and the insulating parts are symmetrically arranged. For example, if the planar structure of the insulating layer 120 is an ellipse, then according to the above-mentioned groove design scheme, an elliptical concentric ring structure around the central axis will be formed. Other planar shapes can also produce similar structural distributions, which will not be repeated here.

[0080] In one example, alternatively, the trench and / or insulating portion formed in the insulating layer 120 may also be an asymmetric structure. Figure 2 Taking the circular ring-shaped groove as an example, the groove can also be a partial circular ring, that is, only a part of the circular ring is etched to form the groove. Those skilled in the art can understand that the alternative design schemes here are mainly adjusted and designed according to the generation and accumulation of thermal effects of the ROF photodiode 100 in actual work. For example, in some cases, when heat accumulates significantly in a certain area, it can be considered to preferentially open the contact channel between the top silicon layer 130 and the substrate silicon layer 110 through the groove here. This example only provides some illustrative examples, and those skilled in the art should not be understood as a limitation of the present invention.

[0081] In one example, see Figure 3 , for example, in order to further achieve efficient and targeted heat dissipation, Figure 2 On the basis of the trench structure shown in FIG. 1 , an etched trench is further added in the insulating portion. Specifically, as Figure 3 As shown, at least one fracture groove (such as the fracture groove 1221 shown in the figure) is provided on at least one insulating portion of the insulating layer 120. The fracture groove is the same as the groove that has been provided, and also needs to penetrate to the upper surface of the substrate silicon layer 110, so that the top silicon layer 130 extends downward to fill the inside of the fracture groove and contact the substrate silicon layer 110.

[0082] In one example, combining Figure 2 and Figure 3 Alternatively, in the completed Figure 2After the circular ring structure of the insulating layer 120 is formed, the insulating part is interrupted and the fracture grooves are etched. Specifically, the second insulating part 122 is interrupted and six first fracture grooves 1221 are etched. The third insulating part 123 is interrupted and six second fracture grooves 1231 are etched. Alternatively, the interruption position on each insulating part, the number of etched fracture grooves, whether the fracture grooves are symmetrically distributed, etc. can be determined according to the distribution of thermal effect aggregation. Preferably, the interruption position on the third insulating part 123 is staggered from the position of the first fracture groove 1221. Finally, the following is formed. Figure 3 The insulating layer 120 is shown as a circular island. Meanwhile, a relatively large insulating area is still reserved at the edge of the insulating layer 120 to reduce parasitic capacitance. This example only provides some illustrative examples, and those skilled in the art should not be understood as a limitation of the present invention.

[0083] In one example, since the purpose of setting the grooves is to leave space so that the top silicon layer 130 above contacts the substrate silicon layer 110 below, a more efficient heat conduction channel is formed at the position where the two contact. Therefore, the number of grooves is greater than or equal to one, that is, at least one groove must be set to satisfy the requirement of leaving a heat conduction channel. Then, the number of insulating parts separated by the grooves needs to be greater than or equal to two accordingly, that is, when one groove is set, two insulating parts are formed, and when two grooves are set, three insulating parts are formed, and so on. The specific number of grooves set is related to the specific structural size of the ROF photodiode 100, the intensity of the light signal reception, and the distribution of thermal effects, so it needs to be specifically designed according to the actual situation. This example only provides some illustrative examples, and those skilled in the art should not be understood as a limitation of the present invention.

[0084] In one example, further, when the number of insulating portions is greater than two and the number of grooves is greater than one, that is, when two, three or more grooves are etched on the insulating layer 120, the groove closest to the central axis (e.g. Figure 1 The first groove 1201) in the photodiode 100 has the largest average width. At the same time, the average widths of the other grooves that are successively away from the central axis decrease successively. Alternatively, the average width of the etched grooves ranges from 5 to 50 μm; preferably, the average width ranges from 10 to 30 μm. Similar to the setting of the number of grooves, the actual average width of the grooves needs to be designed according to the actual situation of the ROF photodiode 100. For example, it needs to be determined based on the balance design of the heat generated by the Gaussian light beam emitted by the optical fiber after entering the SOI wafer and the heat dissipation effect (heat diffusion efficiency) of each functional layer of the SOI wafer. This example only provides some illustrative examples, and those skilled in the art should not be understood as a limitation of the present invention.

[0085] In one example, alternatively, a portion of the insulating layer 120 is retained at the edge of the SOI wafer, that is, at the edge of the upper surface of the substrate silicon layer 110 , for example Figure 1 In other words, no matter how the inside of the insulating layer 120 is divided, such as setting one groove or two grooves or more grooves, a portion of the insulating portion forming the outermost edge is retained at the edge. Such a configuration helps to reduce the parasitic capacitance of the ROF photodiode 100 (usually the parasitic capacitance is generated between the electrode lead metal 142 of the intrinsic absorption layer 140 and the substrate silicon layer 110). Reducing the parasitic capacitance can effectively maintain the high bandwidth characteristics of the ROF photodiode 100, thereby balancing the heat dissipation performance and working performance of the ROF photodiode 100.

[0086] In one example, after etching the insulating layer 120 to form a trench that meets the requirements, the top silicon layer 130 and the intrinsic absorption layer 140 are continuously formed by an epitaxial growth process.

[0087] In one example, specifically, Figure 1 As shown, the first trench 1201 and the second trench 1202 in the insulating layer 120 are completely filled by a silicon epitaxial growth process and then planarized to finally form a top silicon layer 130. Thus, the top silicon layer 130 and the substrate silicon layer 110 are connected through the silicon filled in the first trench 1201 and the second trench 1202.

[0088] In one example, specifically, a P-type heavily doped region is formed on the top silicon layer 130 through photolithography, ion implantation and annealing processes for later generating the intrinsic absorption layer 140, and the peak value of the P-type doping concentration is in the range of 5×10 18 ~5×10 20 / cm 3 .

[0089] In one example, further, a selective epitaxial growth process is used to grow an intrinsic absorption layer 140 on the P-type heavily doped region of the top silicon layer 130. Alternatively, a germanium structure is used as the intrinsic absorption layer 140 in the first embodiment and subsequent embodiments. Preferably, the germanium structure growth region needs to cover the region of the insulating layer 120 having the groove. For example Figure 1 As shown, the outermost groove (away from the central axis) of the insulating layer 120 is the second groove 1202, so the bottom surface area or bottom surface region of the intrinsic absorption layer 140 should be greater than or equal to the plane area or plane region where the second groove 1202 is located. Such a setting can ensure that all grooves can be used to improve the heat conduction efficiency.

[0090] In one example, alternatively, the thickness of the intrinsic absorption layer 140 is in the range of 0.5 to 2.0 μm. Further alternatively, an in-situ doping process may be used to form a P-type doping region, and the P-type uniform doping concentration range is 1×10 14 ~1×10 17 / cm 3 .

[0091] In one example, further, a local N-type heavily doped region 141 is formed on the upper surface of the intrinsic absorption layer 140 through photolithography, ion implantation and annealing processes. Alternatively, the range of the N-type doping concentration peak is 5×10 18 ~5×10 20 / cm 3 , and the doping depth range is 0.1~0.3μm.

[0092] In one example, further, the photosensitive surface (upper surface) of the N-type heavily doped region 141 is covered with an anti-reflection film structure for detecting the wavelength of the optical signal to complete the production of the intrinsic absorption layer 140 .

[0093] Those skilled in the art will understand that the material used for the intrinsic absorption layer and its thickness, the ion doping concentration selected when performing the P-type or N-type doping process, the doping depth and other parameters can be specifically set according to the actual ROF photodiode 100, as long as the performance requirements of optical signal reception and detection and good heat dissipation effect are achieved (for example, the continuous operating temperature of the ROF photodiode 100 does not exceed the junction temperature or is controlled within a temperature rated range with optimal comprehensive performance, etc.).

[0094] In one example, after the substrate silicon layer 110, the insulating layer 120 with grooves, the top silicon layer 130 and the intrinsic absorption layer 140 are fabricated layer by layer, the first electrode lead metal 131 is grown on the top silicon layer 130, and the second electrode lead metal 142 is grown on the intrinsic absorption layer 140 of the germanium structure, respectively, to form a PN junction for metal interconnection conduction in the packaging process. Alternatively, the first electrode lead metal 131 and the second electrode lead metal 142 can be formed by a process flow of growing a passivation layer, etching an electrode contact hole, and then growing a metal layer.

[0095] In one example, alternatively, when forming a PN junction, N-type doping and P-type doping can be interchanged, so that the polarity of the metal electrode of the PN junction is also interchanged. That is to say, in the process flow of ion implantation and ion doping involved in the above description, the area where P-type doping is performed can also be N-type doped, then relatively, the original N-type doped area needs to be P-type doped, and the polarity of the metal electrode of the formed PN junction is interchanged. For example, Figure 1In the embodiment, the contact surface between the top silicon layer 130 and the intrinsic absorption layer 140 may be P-type doped, and the photosensitive surface of the intrinsic absorption layer 140 may be N-type doped, forming a PN junction. Alternatively, the contact surface between the top silicon layer 130 and the intrinsic absorption layer 140 may be N-type doped, and the photosensitive surface of the intrinsic absorption layer 140 may be P-type doped, forming a PN junction.

[0096] Second embodiment

[0097] See also Figure 4-Figure 5 , shows the cross-sectional structure of another ROF photodiode 200 using an SOI wafer as a substrate. The ROF photodiode 200 includes a substrate silicon layer 210, an insulating layer 220, a top silicon layer 230 and an intrinsic absorption layer 240 from bottom to top. Except that the design scheme of the grooves in the insulating layer 220 is different from that of the first embodiment, the structures, parameters and manufacturing processes of the other functional layers, as well as the first electrode lead metal 231 and the second electrode lead metal 242 forming the PN junction are the same as those of the first embodiment, or can be designed using a similar scheme, which will not be repeated here.

[0098] As described in the first embodiment, most of the heat accumulated by the thermal effect in the ROF photodiode 200 is distributed in the central axis area. Therefore, in order to further improve the heat dissipation effect of the insulating layer 120, in the second embodiment, a first groove 2201 is first formed at the central axis by groove etching. In this way, after the high-intensity light signal emitted by the optical fiber enters the intrinsic absorption layer 240, most of the heat accumulated in the central area of ​​the ROF photodiode 200 can be directly dissipated quickly through the first groove 2201 during the downward conduction process.

[0099] In one example, specifically, in conjunction with Figure 4 and Figure 5 As shown, illustratively, the planar shape of the SOI wafer is circular, and the grooves and insulating portions designed in the insulating layer 220 are symmetrically arranged about the central axis (the center of the ROF photodiode 200, that is, the center of the optical fiber emitting the optical signal).

[0100] First, a first groove 2201 is formed at the central axis by groove etching, and the average width of the first groove 2201 is d3. Then, a portion of the insulating layer 220 is retained around the first groove 2201 to form a first insulating portion 221. The second groove 2202 is formed by groove etching with an average width of d4 around the first insulating portion 221. Another portion of the insulating layer 220 around the second groove 2202 is retained to form a second insulating portion 222, and then the third groove 2203 is formed by groove etching with an average width of d5 around the second insulating portion 222. Finally, the remaining insulating layer 220 located at the edge of the upper surface of the substrate silicon layer 210 forms a third insulating portion 223. That is to say, the insulating layer 220 at this time has three grooves and three insulating portions.

[0101] In one example, similar to the first embodiment, during the etching process, the closer the groove is to the center of the ROF photodiode 200, the larger the average width of the groove. Conversely, the smaller the average width of the groove is. Figure 4 As shown, the first groove 2201 is closer to the center of the optical signal than the second groove 2202 and the third groove 2203, so the corresponding average widths are d3>d4>d5. In this way, the central area of ​​the ROF photodiode 200 has a larger connection contact area between the top silicon layer 230 and the substrate silicon layer 210, which is more conducive to heat dissipation.

[0102] In one example, if Figure 5 As shown, taking the insulating layer 220 with a circular planar shape as an example, the overall shape of the first groove 2201, the first insulating part 221, the second groove 2202, the second insulating part 222, the third groove 2203 and the third insulating part 223 formed around the center (i.e., the central axis) of the ROF photodiode 200 presents a concentric ring shape around the central axis.

[0103] In one example, see Figure 6 , for example, in order to further achieve efficient and targeted heat dissipation, Figure 5 On the basis of the trench structure shown in FIG. 1 , an etched trench is further added in the insulating portion. Specifically, as Figure 6 As shown, at least one fracture groove (for example, the fracture groove 2211 provided on the first insulation part 221 shown in the figure) is provided on at least one insulation part of the insulation layer 220. The fracture groove is the same as the groove that has been provided, and also needs to penetrate to the upper surface of the substrate silicon layer 210, so that the top silicon layer 230 extends downward to fill the inside of the fracture groove and contact the substrate silicon layer 210.

[0104] In one example, combining Figure 5 and Figure 6 Alternatively, in the completed Figure 5After the circular ring structure of the insulating layer 220 is formed, the insulating part is interrupted and fracture grooves are etched. Specifically, the first insulating part 221 is interrupted and six first fracture grooves 2211 are etched. The second insulating part 222 is interrupted and six second fracture grooves 2221 are etched. Finally, the third insulating part 223 is interrupted and six third fracture grooves 2231 are etched. Alternatively, the interruption position on each insulating part, the number of etched fracture grooves, whether the fracture grooves are symmetrically distributed, etc. can be determined according to the thermal effect aggregation distribution. Preferably, the interruption position on the second insulating part 222 is staggered with the position of the first fracture groove 2211, and the interruption position on the third insulating part 223 is staggered with the position of the second fracture groove 2221. Finally, the following is formed. Figure 6 The insulating layer 220 is shown as a circular island. Meanwhile, a relatively large insulating area is still reserved at the edge of the insulating layer 220 to reduce parasitic capacitance.

[0105] The alternative solutions or parameters and structures that need to be precisely designed according to the actual situation in the above examples of the second embodiment can be set with reference to the description of the relevant contents in the first embodiment. For example, the insulating layer 220 can have a plane with various shapes, the layout of the grooves or the broken grooves can be symmetrical or asymmetrical, and the formation process and formation position of the PN junction can be set with reference to the first embodiment, which will not be repeated here.

[0106] Third embodiment

[0107] See also Figure 7 , shows a cross-sectional structure of another ROF photodiode 300 using an SOI wafer as a substrate. The ROF photodiode 300 includes a substrate silicon layer 310, an insulating layer 320, a top silicon layer 330 and an intrinsic absorption layer 340 from bottom to top. Except that the design scheme of the grooves in the insulating layer 320 is different from that of the first embodiment and the second embodiment, the structures, parameters and manufacturing processes of the other functional layers and the first electrode lead metal 331 and the second electrode lead metal 342 forming the PN junction are the same as those of the first embodiment or the second embodiment, or can be designed using a similar scheme, which will not be repeated here.

[0108] In one example, if Figure 7As shown, specifically, the design of the insulating portion and the groove in the insulating layer 320 of the ROF photodiode 300 can be understood as an extreme case of the second embodiment. Similarly, taking the insulating layer 320 with a circular planar shape as an example, only one groove located at the central axis (the first groove 3201 in the figure) and an insulating portion (the first insulating portion 321 in the figure) surrounding the groove and located at the edge of the insulating layer 320 are provided. At this time, there is no insulating portion below the bottom surface area of ​​the intrinsic absorption layer 340, that is, the thermal resistance effect of the insulating portion in this area can be completely eliminated, and the top silicon layer 330 and the substrate silicon layer 310 are completely in contact and connected in this area, and efficient heat dissipation is achieved directly through silicon thermal conduction.

[0109] In one example, similar to the first and second embodiments, a breaking position may be further arranged on the first insulating portion 321 and breaking grooves of a required number and size may be etched (not shown).

[0110] Similarly, the alternative solutions in the above examples of the third embodiment or the parameters and structures that need to be precisely designed according to actual conditions can be set with reference to the description of the relevant contents in the first embodiment and / or the second embodiment, and will not be repeated here.

[0111] Fourth embodiment

[0112] See also Figure 8 , shows a cross-sectional structure of a ROF photodiode 400 in another conceptual direction, that is, a high-resistance silicon wafer is used instead of an SOI wafer as a substrate structure, and its intrinsic absorption layer 440 is directly formed on the upper surface of the high-resistance silicon wafer.

[0113] In one example, specifically, the ROF photodiode 400 includes: a substrate silicon layer 410 using a high-resistance silicon wafer, a top silicon layer 430 formed in a groove on the upper surface of the substrate silicon layer 410, and an intrinsic absorption layer 440 based on a germanium structure formed on the upper surface of the top silicon layer 430. At the same time, a first electrode lead-out metal 431 is grown on the top silicon layer 430, and a second electrode lead-out metal 442 is grown on the germanium structure intrinsic absorption layer 440 to form a PN junction for metal interconnection conduction in the packaging process.

[0114] Except for not providing an insulating layer, the structures, parameters and manufacturing processes of other functional layers can refer to the first embodiment, the second embodiment and the third embodiment. The same or similar schemes can be used for design, which will not be described in detail here.

[0115] According to another aspect of the present invention, a method for manufacturing a ROF photodiode is also proposed. The method can be used to manufacture the above embodiments and the ROF photodiodes equivalent to the above embodiments. Specifically, the method includes the following main steps, including a method for manufacturing a ROF photodiode using an SOI wafer and a method for manufacturing a ROF photodiode using a high-resistance silicon wafer.

[0116] When an SOI wafer is used as a substrate structure, for example, the ROF photodiode 100 of the first embodiment, the ROF photodiode 200 of the second embodiment, and the ROF photodiode 300 of the third embodiment are manufactured. The ROF photodiode 100 of the first embodiment is used as an example for description. The specific steps of the manufacturing method include:

[0117] Using SOI wafer to prepare substrate silicon layer 110 and insulating layer 120;

[0118] Before growing the top silicon layer 130, at least one trench is etched in the insulating layer 120 by a trench etching process;

[0119] Fill at least one trench by silicon epitaxial process and planarize to form a top silicon layer 130;

[0120] A P-type heavily doped region or an N-type heavily doped region is formed on the upper surface of the top silicon layer 130 by photolithography, ion implantation and annealing processes;

[0121] By selective epitaxial growth, an intrinsic absorption layer 140 based on a germanium structure is grown on the P-type heavily doped region or the N-type heavily doped region;

[0122] By photolithography, ion implantation and annealing processes, a local N-type heavily doped region 141 or a local P-type heavily doped region 141 with a preset doping depth is formed on the upper surface of the intrinsic absorption layer 140 ;

[0123] The upper surface of the intrinsic absorption layer 140 is covered with an anti-reflection film for receiving and detecting the wavelength of the optical signal to form a photosensitive surface;

[0124] After the passivation layer is grown and the electrode contact hole is etched, the metal layer is grown to form a first electrode lead metal 131 on the upper surface of the top silicon layer 130 , and a second electrode lead metal 142 is formed on the upper surface of the local N-type heavily doped region 141 or the local P-type heavily doped region 141 of the intrinsic absorption layer 140 .

[0125] When a high-resistance silicon wafer is used as the substrate structure (ROF photodiode 400 of the fourth embodiment), the manufacturing method specifically includes the following steps:

[0126] Using a high-resistance silicon wafer to prepare a substrate silicon layer 410;

[0127] By photolithography, ion implantation and annealing processes, a P-type heavily doped region or an N-type heavily doped region with a preset depth is formed below the upper surface of the substrate silicon layer 410 to obtain a top silicon layer 430;

[0128] By selective epitaxial growth, an intrinsic absorption layer 440 based on a germanium structure is grown on the P-type heavily doped region or the N-type heavily doped region (i.e., the upper surface of the top silicon layer 430);

[0129] By photolithography, ion implantation and annealing processes, a local N-type heavily doped region 441 or a local P-type heavily doped region 441 with a preset doping depth is formed on the upper surface of the intrinsic absorption layer 440 based on the germanium structure;

[0130] An anti-reflection film for receiving and detecting the wavelength of an optical signal is covered on the upper surface of the intrinsic absorption layer 440 based on the germanium structure to form a photosensitive surface;

[0131] After the passivation layer is grown and the electrode contact hole is etched, the metal layer is grown to form a first electrode lead metal 431 on the upper surface of the top silicon layer 430, and a second electrode lead metal 442 is formed on the upper surface of a local N-type heavily doped region 441 or a local P-type heavily doped region 441 of the intrinsic absorption layer 440 based on the germanium structure.

[0132] In one example, the specific structural parameter ranges of the ROF photodiode 100, ROF photodiode 200, ROF photodiode 300 and ROF photodiode 400 applicable to the aforementioned embodiments are set as follows (taking the ROF photodiode 100 of the first embodiment as an example):

[0133] The thickness of the substrate silicon layer 110 is in the range of 650 to 850 μm, and the resistance value is in the range of 1 k to 10 kΩ·cm;

[0134] The thickness of the top silicon layer 130 ranges from 0.05 to 0.65 μm;

[0135] The peak value of the doping concentration of the P-type heavily doped region or the N-type heavily doped region on the upper surface of the top silicon layer 130 is in the range of 5×10 18 ~5×10 20 / cm 3 ;

[0136] The intrinsic absorption layer 140 is doped using an in-situ doping process, and the in-situ doping P-type doping concentration or N-type doping concentration ranges from 1×10 14 ~1×10 17 / cm 3 , the thickness of the intrinsic absorption layer 140 is in the range of 0.5 to 2.0 μm;

[0137] The preset doping depth of the local N-type heavily doped region or the local P-type heavily doped region on the upper surface of the intrinsic absorption layer 140 is in the range of 0.1 to 0.3 μm;

[0138] When the ROF photodiode has an insulating layer (eg, insulating layer 120 of ROF photodiode 100, insulating layer 220 of ROF photodiode 200, and insulating layer 320 of ROF photodiode 300), the thickness of the insulating layer ranges from 0.5 to 4.5 μm, and the average width of at least one groove formed by etching ranges from 5 to 50 μm.

[0139] In one example, taking the ROF photodiode 100 as an example, preferably, the thickness of the substrate silicon layer 110 of the SOI wafer is in the range of 700 to 800 μm, and a further preferred thickness is 750 μm.

[0140] In one example, when an SOI wafer is used as the substrate structure, taking the ROF photodiode 100 as an example, preferably, the thickness of the insulating layer 120 is in the range of 1 to 3 μm, and a further preferred thickness is 2 μm.

[0141] In one example, preferably, the thickness of the top silicon layer (applicable to, for example, the top silicon layer 130 of the ROF photodiode 100 using an SOI wafer, and also applicable to the top silicon layer 430 of the ROF photodiode 400 using a high-resistance silicon wafer) is in the range of 0.1 to 0.5 μm.

[0142] Those skilled in the art can understand that the specific structural parameters, manufacturing process parameters and trench layout design in the insulating layer of the ROF photodiode in the above embodiments need to be specifically set according to the actual ROF photodiode product. In principle, as long as the performance requirements of optical signal reception and detection and a better heat dissipation effect are achieved (for example, the continuous operating temperature of the ROF photodiode does not exceed the junction temperature or is controlled within a rated temperature range with the best comprehensive performance, etc.), it will be sufficient. The above embodiments and their respective examples only provide some illustrative examples, and those skilled in the art should not be understood as a limitation of the present invention.

[0143] The ROF photodiode and the manufacturing method thereof provided by the embodiments of the present invention have at least one or part of the following advantages:

[0144] (1) The ROF photodiode and the manufacturing method thereof provided by the embodiments of the present invention etch a groove in the insulating layer of the SOI wafer so that the top silicon above it is filled into the groove and connected with the substrate silicon layer below it, thereby avoiding heat accumulation in the upper functional layer caused by the extremely low thermal conductivity of the insulating layer, and directly achieving rapid heat dissipation through silicon, thereby preventing the ROF photodiode from overheating and burning;

[0145] (2) The ROF photodiode and the manufacturing method thereof provided by the embodiments of the present invention directly form a top silicon layer and an intrinsic absorption layer on a high-resistance silicon wafer, so that the heat accumulated in the top silicon layer and the intrinsic absorption layer no longer passes through an insulating layer with an extremely low thermal conductivity coefficient but directly passes through silicon to achieve rapid heat dissipation, thereby preventing the ROF photodiode from overheating and burning;

[0146] (3) The ROF photodiode and the manufacturing method thereof provided in the embodiments of the present invention optimize the design of the insulating layer groove according to the output light intensity of the optical fiber, so that the ROF photodiode obtains better heat conduction conditions, improves the heat dissipation efficiency, and enhances its working stability;

[0147] (4) The ROF photodiode and the manufacturing method thereof provided in the embodiments of the present invention use a conventional trench etching process to form an insulating layer with a trench, and use a conventional silicon epitaxial growth process to connect the top silicon with the substrate silicon. The process is simple and easy to process and scale, thereby reducing the production cost of the ROF photodiode.

[0148] (5) The ROF photodiode and its manufacturing method provided in the embodiments of the present invention improve the overall heat dissipation performance of the ROF photodiode by optimizing the design of the insulating layer groove according to the optical fiber output light intensity, so that it can adapt to high-intensity and ultra-high-intensity optical fiber output light signals, thereby expanding its application range.

[0149] Although some embodiments of the present general inventive concept have been shown and described, it will be appreciated by those skilled in the art that changes may be made to these embodiments without departing from the principles and spirit of the present general inventive concept, the scope of which is defined by the claims and their equivalents.

Claims

1. A ROF photodiode, characterized in that: The ROF photodiode comprises: substrate silicon layer; An insulating layer, the insulating layer is disposed on the upper surface of the substrate silicon layer and has at least one groove; A top silicon layer, the top silicon layer is disposed on the upper surface of the insulating layer and extends downward to fill the interior of the trench; An intrinsic absorption layer, the intrinsic absorption layer is arranged on the upper surface of the top silicon layer, and is used for receiving and detecting the optical signal emitted by the optical fiber; The groove penetrates to the upper surface of the substrate silicon layer, and the top silicon layer contacts the substrate silicon layer by filling the groove.

2. The ROF photodiode according to claim 1, characterized in that: The insulating layer includes at least one groove and at least one insulating portion formed around the central axis of the light beam emitted from the optical fiber; Each of the at least one trench is spaced apart from each of the at least one insulating portion.

3. The ROF photodiode according to claim 2, characterized in that: The number of the at least one insulating portion is N, where N is an integer greater than or equal to 2; At the center of the upper surface of the substrate silicon layer, a first insulating portion is formed around the central axis and a first trench is formed around the first insulating portion; Forming an Nth insulating portion around the central axis at an edge of the upper surface of the substrate silicon layer; When the number of the at least one insulating portion is greater than two and the number of the at least one trench is greater than one, The first groove has a maximum average width; The average widths of the other grooves that are successively farther away from the central axis decrease successively; The average width is in the range of 5 to 50 μm.

4. The ROF photodiode according to claim 2, characterized in that: The number of the at least one insulating portion is N, where N is an integer greater than or equal to 2; The number of the at least one groove is greater than one; At the center of the upper surface of the substrate silicon layer, a first trench is formed around the central axis and a first insulating portion is formed around the first trench; Forming an Nth insulating portion around the central axis at an edge of the upper surface of the substrate silicon layer; The first groove has a maximum average width; The average widths of the other grooves that are successively farther away from the central axis decrease successively; The average width is in the range of 5 to 50 μm.

5. The ROF photodiode according to claim 2, characterized in that: The number of the at least one insulating portion is one, and the number of the at least one groove is one; The insulating layer includes a first groove formed around the central axis and a first insulating portion formed around the first groove; The first insulating portion is disposed at an edge of an upper surface of the substrate silicon layer.

6. The ROF photodiode according to any one of claims 2 to 5, characterized in that: At least one insulating portion of the insulating layer has at least one fracture groove; The fracture groove penetrates to the upper surface of the substrate silicon layer; The top silicon layer extends downward to fill the interior of the fracture trench and contacts the substrate silicon layer.

7. The ROF photodiode according to claim 6, characterized in that: The planar shape of the insulating layer is any one of a circle, an ellipse, a semicircle, a semi-ellipse, an arc surface, a sector surface, a square, a rhombus and a rectangle.

8. The ROF photodiode according to claim 7, characterized in that: The intrinsic absorption layer is a germanium structure; The upper surface of the intrinsic absorption layer is covered with a photosensitive surface, and the photosensitive surface is an anti-reflection film, which is used to receive and detect the wavelength of the optical signal emitted by the optical fiber.

9. The ROF photodiode according to claim 8, characterized in that: Disposing a first electrode lead metal on the top silicon layer; Disposing a second electrode lead metal on the intrinsic absorption layer; The first electrode lead-out metal and the second electrode lead-out metal form a PN junction.

10. A ROF photodiode, characterized in that: The ROF photodiode comprises: A substrate silicon layer, wherein the substrate silicon layer is a high-resistance silicon wafer; a top silicon layer, the top silicon layer being formed in a groove on an upper surface of the substrate silicon layer; The intrinsic absorption layer based on the germanium structure is arranged on the upper surface of the top silicon layer and is used for receiving and detecting the optical signal emitted by the optical fiber.

11. A method for manufacturing a ROF photodiode, for manufacturing the ROF photodiode according to any one of claims 1 to 9, characterized in that: The steps of the manufacturing method include: Using SOI wafer to prepare substrate silicon layer and insulating layer; Before growing the top silicon layer, etching at least one trench in the insulating layer by a trench etching process; Filling the at least one trench by a silicon epitaxial process and planarizing to form a top silicon layer; Forming a P-type heavily doped region or an N-type heavily doped region on the upper surface of the top silicon layer by photolithography, ion implantation and annealing processes; Growing an intrinsic absorption layer based on a germanium structure on a P-type heavily doped region or an N-type heavily doped region by selective epitaxial growth; By means of photolithography, ion implantation and annealing processes, a local N-type heavily doped region or a local P-type heavily doped region with a preset doping depth is formed on the upper surface of the intrinsic absorption layer; An anti-reflection film for receiving and detecting the wavelength of an optical signal is covered on the upper surface of the intrinsic absorption layer to form a photosensitive surface; After the passivation layer is grown and the electrode contact hole is etched, the metal layer is grown to form a first electrode lead metal on the upper surface of the top silicon layer, and a second electrode lead metal is formed on the upper surface of the local N-type heavily doped area or the local P-type heavily doped area of ​​the intrinsic absorption layer.

12. A method for manufacturing a ROF photodiode, for manufacturing the ROF photodiode according to claim 10, characterized in that: The steps of the manufacturing method include: Using a high-resistance silicon wafer to prepare a substrate silicon layer; By photolithography, ion implantation and annealing processes, a P-type heavily doped region or an N-type heavily doped region with a preset depth is formed below the upper surface of the substrate silicon layer to obtain a top silicon layer; Growing an intrinsic absorption layer based on a germanium structure on a P-type heavily doped region or an N-type heavily doped region by selective epitaxial growth; By means of photolithography, ion implantation and annealing processes, a local N-type heavily doped region or a local P-type heavily doped region having a preset doping depth is formed on the upper surface of the intrinsic absorption layer based on the germanium structure; An anti-reflection film for receiving and detecting the wavelength of an optical signal is covered on the upper surface of the intrinsic absorption layer based on the germanium structure to form a photosensitive surface; After the passivation layer is grown and the electrode contact hole is etched, the metal layer is grown to form a first electrode lead metal on the upper surface of the top silicon layer, and a second electrode lead metal is formed on the upper surface of the local N-type heavily doped area or the local P-type heavily doped area of ​​the germanium structure-based intrinsic absorption layer.

13. The manufacturing method according to claim 11 or 12, characterized in that: The thickness of the substrate silicon layer is in the range of 650 to 850 μm, and the resistance value is in the range of 1 k to 10 kΩ·cm; The thickness of the top silicon layer ranges from 0.05 to 0.65 μm; The peak value range of the doping concentration of the P-type heavily doped region or the N-type heavily doped region is 5×10 18 ~5×10 20 / cm 3 ; The intrinsic absorption layer uses an in-situ doping process, and the range of the in-situ doping P-type doping concentration or N-type doping concentration is 1×10 14 ~1×10 17 / cm 3 , the thickness of the intrinsic absorption layer is in the range of 0.5 to 2.0 μm; The preset doping depth of the local N-type heavily doped region or the local P-type heavily doped region is in the range of 0.1 to 0.3 μm; When the ROF photodiode has an insulating layer, the thickness of the insulating layer is in the range of 0.5 to 4.5 μm, and the average width of the at least one trench formed by etching is in the range of 5 to 50 μm.

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