Solar cell, preparation method thereof and power utilization device
By forming a polishing groove area on the passivation contact layer of the solar cell and forming a local suede structure with the mask layer, the problem of reducing the filling factor and not significantly improving the conversion efficiency in the traditional IBC cell structure is solved, and higher filling factor and conversion efficiency are achieved.
Patent Information
- Application Number
- CN202311244698.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-25
- Publication Date
- 2025-03-28
AI Technical Summary
On the basis of increasing the open circuit voltage and short circuit current, traditional IBC battery structure still has the problem of reducing the filling factor and not significantly improving the conversion efficiency.
By forming a polished groove area on the passivation contact layer and using the mask layer to form a local suede structure in the polished groove area, the preparation method and preparation parameters are defined to match the polished surface and suede structure, and the filling factor and conversion efficiency of the solar cell are improved.
On the basis of ensuring the gain of open circuit voltage and short circuit current, the filling factor and conversion efficiency of solar cells are significantly improved.
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Figure CN119730435A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of battery technology, and in particular to a solar cell and a preparation method thereof, and an electrical device. Background Art
[0002] The emitter and surface field structure of traditional crystalline silicon solar cells are generally located on both sides of the cell, and the corresponding positive and negative metal electrodes are also located on the positive and negative surfaces of the cell to collect holes and electrons separated from photogenerated carriers. At the same time, the presence of metal grid lines on the front side causes certain shading losses to the cell, resulting in a reduction in the short-circuit current of the cell. On the one hand, in order to allow solar cells to collect more photogenerated carriers, and on the other hand, to avoid the loss of metal semiconductor contact resistance on the front side, the all-back electrode contact cell (IBC cell) has no main grid on the front side, and the positive and negative electrodes are both on the back side of the cell, so there is no need to consider the front metal contact, which can optimize the cell performance to the greatest extent. Based on the type of silicon wafer, IBC cells are divided into P-type and N-type. Although P-type silicon wafers do not have the high tolerance of N-type silicon wafers, they will still occupy a large proportion of production in the future based on their price advantage and large inventory. With the development of tunneling oxide passivation contact (TOPCon) technology and HJT technology, the use of TOPCon cell structure to obtain p-type IBC cells has also received great attention.
[0003] However, the traditional IBC battery structure with a velvet surface on the front and a polished laser area on the back has greatly improved open circuit voltage and short circuit current compared to the battery structure with velvet surfaces on the front / back laser areas. However, there is still a problem of reduced fill factor, and the battery conversion efficiency has not been significantly improved. Summary of the invention
[0004] Based on this, the present application provides a solar cell and a preparation method thereof, and an electrical device, wherein the solar cell can ensure the gain of open circuit voltage and short circuit current and further improve the cell fill factor and conversion efficiency.
[0005] The present application provides a method for preparing a solar cell, comprising the following steps:
[0006] providing a substrate having a first surface and a second surface opposite to the first surface;
[0007] forming a passivation contact layer on the first surface, removing a portion of the passivation contact layer until the substrate is exposed, and preparing a prefabricated structure having a groove, wherein the width of the groove is 180 μm to 250 μm;
[0008] Polishing the surface of the groove to form a mask layer material on the first surface, and removing part of the mask layer material on the surface of the groove to prepare a structure to be textured with a mask layer;
[0009] After performing texturing treatment on the structure to be texturized, removing the mask layer;
[0010] The conditions for removing part of the mask layer material on the surface of the groove include: laser processing, with a laser spot diameter of 15 μm to 45 μm.
[0011] In one of the embodiments, the conditions for removing part of the mask layer material on the surface of the groove include: the laser rated power is 15w-45w, the laser frequency is 300KHz-850KHz, and the virtual-real ratio is 0.2:0.55-0.3:0.5.
[0012] In one embodiment, the texturing treatment conditions include: placing in a texturing liquid for texturing, the texturing liquid includes 1% to 8% of a monobasic strong base, 0.1% to 3% of a texturing additive and 89% to 98% of a first solvent by mass percentage, the texturing time is 300s to 650s, and the texturing temperature is 70°C to 85°C;
[0013] Optionally, the monobasic strong base includes one or more of sodium hydroxide and potassium hydroxide.
[0014] In one embodiment, the conditions for removing the mask layer include: placing in an acid wash solution for treatment, wherein the acid wash solution includes 5% to 18% hydrofluoric acid, 4% to 12% hydrochloric acid and 70% to 91% of a second solvent in mass percentage.
[0015] In one of the embodiments, the width of the groove is 190 μm to 210 μm, and the diameter of the laser spot is 20 μm to 40 μm.
[0016] In one embodiment, the passivation contact layer includes a stacked tunneling oxide layer and a doped polysilicon layer, and the tunneling oxide layer faces a side of the substrate.
[0017] In one embodiment, after removing the mask layer, the method further includes: forming a first passivation layer on the first surface and forming a second passivation layer on the second surface.
[0018] In one embodiment, the material of the first passivation layer and the material of the second passivation layer independently include one or more of aluminum oxide, silicon nitride and silicon oxynitride.
[0019] The present application also provides a solar cell, which is manufactured according to the above-mentioned manufacturing method.
[0020] Furthermore, the present application also provides an electrical device, comprising the solar cell as described above as a power source.
[0021] In the above-mentioned solar energy preparation method, after a polished groove area is formed on the passivation contact layer, a local velvet structure is further formed in the polished groove area using a mask layer, and the preparation method and preparation parameters of the local velvet structure are further limited. The coordination between the polished surface in the groove structure and the velvet structure is utilized to achieve the further improvement of the fill factor and conversion efficiency of the solar cell on the basis of ensuring the gain of the open circuit voltage and the short circuit current. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] Figure 1 A method for preparing a solar cell for the present application;
[0023] Figure 2 In the process of preparing solar cells for this application; a top view of the side of the substrate with the groove after texturing and pickling;
[0024] Explanation of the reference numerals: 100: substrate; 110: passivation contact layer; 1101: tunneling oxide layer; 1102: doped polysilicon layer; 1103: phosphosilicate glass layer; 120: mask layer material; 1201: first mask layer material; 1202: second mask layer material; 1203: third mask layer material; 1204: fourth mask layer material; 121: mask layer; 130: first passivation layer; 1301: first aluminum oxide layer; 1302: first silicon nitride layer; 1401: second aluminum oxide layer; 1402: second silicon nitride layer; (a) doped polysilicon; (b) laser zone; (c) texturing zone. DETAILED DESCRIPTION
[0025] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the disclosure of the present application more thorough and comprehensive.
[0026] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the invention, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined. In the description of the present application, the meaning of "several" is at least one, such as one, two, etc., unless otherwise clearly and specifically defined.
[0027] The words "preferably", "more preferably" and the like in this application refer to embodiments of the present application that may provide certain beneficial effects in certain circumstances. However, other embodiments may also be preferred under the same circumstances or in other circumstances. In addition, the statement of one or more preferred embodiments does not imply that other embodiments are not available, nor is it intended to exclude other embodiments from the scope of this application.
[0028] When a numerical range is disclosed herein, the above range is considered to be continuous and includes the minimum and maximum values of the range, as well as every value between such minimum and maximum values. Further, when a range refers to an integer, every integer between the minimum and maximum values of the range is included. In addition, when multiple ranges are provided to describe features or characteristics, the ranges can be combined. In other words, unless otherwise indicated, all ranges disclosed herein should be understood to include any and all subranges included therein.
[0029] When describing positional relationships, unless otherwise specified, when an element such as a layer, film, or substrate is referred to as being "on" another film layer, it can be directly on the other film layer or there can be an intermediate film layer. Further, when a layer is referred to as being "under" another layer, it can be directly below or there can be one or more intermediate layers. It is also understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or there can be one or more intermediate layers.
[0030] Where “including,” “having,” and “comprising” are used herein, it is intended to cover a non-exclusive inclusion, and another component may also be added unless explicit limiting terms such as “only,” “consisting of,” etc. are used.
[0031] Unless mentioned to the contrary, terms in the singular may include plural forms and should not be construed as being one in number.
[0032] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art to which the present application belongs. The terms used herein in the specification of the present application are only for the purpose of describing specific embodiments and are not intended to limit the present application. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.
[0033] The present application provides a method for preparing a solar cell, comprising the following steps:
[0034] providing a substrate having a first surface and a second surface opposite to the first surface;
[0035] A passivation contact layer is formed on the first surface, and a portion of the passivation contact layer is removed until the substrate is exposed, so as to prepare a prefabricated structure having a groove, wherein the width of the groove is 180 μm to 250 μm;
[0036] Polishing the surface of the groove to form a mask layer material on the first surface, removing part of the mask layer material on the surface of the groove to prepare a structure to be textured with a mask layer;
[0037] After texturing the structure to be texturized, the mask layer is removed;
[0038] The conditions for removing part of the mask layer material on the surface of the groove include: laser processing, and a laser spot diameter of 15 μm to 45 μm.
[0039] Furthermore, a portion of the passivation contact layer is removed by laser to expose the substrate to form a groove, the width of the groove is 190 μm to 210 μm, specifically, the width of the groove can be but is not limited to 190 μm, 195 μm, 200 μm, 205 μm or 210 μm.
[0040] In a specific example, the material of the mask layer includes one or more of silicon oxide, silicon nitride and silicon oxynitride. Preferably, the material of the mask layer includes silicon oxide. Further, the method of forming silicon oxide may be, but is not limited to, one or more of thermal oxidation, chemical vapor deposition and phosphorus expansion. It can be understood that thermal oxidation includes dry oxygen and wet oxygen.
[0041] Preferably, the method of forming silicon oxide as a mask layer comprises phosphorus expansion, specifically, the preparation is carried out under reaction conditions including a reaction temperature of 500° C. to 800° C., a reaction time of 2000 s to 4000 s, and a reaction pressure of 700 mbar to -1024 mbar.
[0042] Specifically, the conditions for forming silicon oxide include a reaction temperature of but not limited to 500°C, 600°C, 700°C or 800°C, a reaction time of but not limited to 2000s, 2500s, 3000s, 3500s or 4000s, and a reaction pressure of but not limited to 700mbar, 750mbar, 800mbar, 850mbar, 900mbar, 950mbar, 1000mbar or 1024mbar.
[0043] In a specific example, the conditions for removing part of the mask layer material on the surface of the groove include: the laser rated power is 15W-45W, the laser frequency is 300KHz-850KHz, and the virtual-real ratio is 0.2:0.55-0.3:0.5.
[0044] Furthermore, the conditions for removing part of the mask layer material on the groove surface include: laser rated power of 20W-40W, laser frequency of 350KHz-800KHz, laser spot diameter of 20μm-40μm, and virtual-real ratio of 0.2:0.55-0.3:0.5.
[0045] Specifically, the rated power of the laser can be but is not limited to 20w, 25w, 30w, 35w or 40w, the laser frequency can be but is not limited to 350KHz, 400KHz, 450KHz, 500KHz, 550KHz, 600KHz, 650KHz, 700KHz, 750KHz or 800KHz, the virtual-to-real ratio can be but is not limited to 0.2:0.5, 0.2:0.55, 0.25:0.5, 0.25:0.55, 0.3:0.5 or 0.3:0.55, and the laser spot diameter can be but is not limited to 20μm, 25μm, 30μm, 35μm or 40μm.
[0046] In a specific example, the conditions for the texturing treatment include: the texturing liquid includes 1% to 8% of a monobasic strong base, 0.1% to 3% of a texturing additive and 89% to 98% of a first solvent in mass percentage, the texturing time is 300s to 650s, and the texturing temperature is 70°C to 85°C.
[0047] Optionally, the monobasic strong base includes one or more of sodium hydroxide and potassium hydroxide. Preferably, the monobasic strong base includes sodium hydroxide.
[0048] Furthermore, the conditions for the texturing treatment include: the texturing liquid includes, by mass percentage, 1% to 5% of a monobasic strong base, 0.1% to 2% of a texturing additive and 93% to 98% of a first solvent, the texturing time is 300s to 650s, and the texturing temperature is 72°C to 84°C.
[0049] Furthermore, the texturing time may be but is not limited to 300s, 350s, 400s, 450s, 500s, 550s, 600s or 650s, and the texturing temperature may be but is not limited to 72°C, 74°C, 76°C, 78°C, 80°C, 82°C or 84°C.
[0050] In a specific example, the polishing conditions include: polishing time 300s to 500s, polishing temperature 70°C to 90°C, and the polishing liquid includes 1% to 5% of a monobasic strong base, 0.01% to 0.5% of a polishing additive, and 94.5% to 98.5% of water in terms of mass percentage.
[0051] In a specific example, the conditions for removing the mask layer include: placing in an acid wash solution for treatment, wherein the acid wash solution includes, by mass percentage, 5% to 18% hydrofluoric acid, 4% to 12% hydrochloric acid, and 70% to 91% of a second solvent.
[0052] Furthermore, the condition for removing the mask layer also includes placing the film in the pickling solution for treatment for 150s to 300s. Specifically, the treatment time in the pickling solution may be but is not limited to 150s, 200s, 250s or 300s.
[0053] In a specific example, the first solvent and the second solvent each independently include water, and preferably the first solvent and the second solvent are deionized water.
[0054] In a specific example, the passivation contact layer includes a stacked tunnel oxide layer and a doped polysilicon layer, wherein the tunnel oxide layer faces a side of the substrate.
[0055] Furthermore, the thickness of the tunnel oxide layer is 1.2 nm to 2.0 nm, and the thickness of the doped polysilicon layer is 110 nm to 230 nm.
[0056] Specifically, the thickness of the tunnel oxide layer may be, but is not limited to, 1.2 nm, 1.3 nm, 1.4 nm, 1.5 nm, 1.6 nm, 1.7 nm, 1.8 nm, 1.9 nm or 2 nm.
[0057] Furthermore, the thickness of the doped polysilicon layer may be, but is not limited to, 110 nm, 130 nm, 150 nm, 170 nm, 190 nm, 210 nm or 230 nm.
[0058] It can be understood that when a portion of the passivation contact layer is removed to expose the substrate and a prefabricated structure with a groove is prepared, the tunneling oxide layer and the doped polysilicon layer are removed along the laser processing direction, and the substrate with a thickness of 1nm to 10nm is also removed. Furthermore, the depth of the groove is 112nm to 234nm.
[0059] In a specific example, after removing the mask layer, the method further includes: forming a first passivation layer on a side of the substrate close to the groove and forming a second passivation layer on a side of the substrate away from the groove.
[0060] In a specific example, the material of the first passivation layer and the material of the second passivation layer each independently include one or more of aluminum oxide, silicon nitride and silicon oxynitride.
[0061] Preferably, the material of the first passivation layer and the material of the second passivation layer independently include aluminum oxide and silicon nitride. The thickness of the material of the first passivation layer and the second passivation layer independently ranges from 2nm to 200nm. Further, the material of the first passivation layer and the second passivation layer independently include: an aluminum oxide layer with a thickness of 2nm to 10nm and a silicon nitride layer with a thickness of 60nm to 180nm.
[0062] Specifically, the thickness of the aluminum oxide layer may be, but is not limited to, 2 nm, 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, or 10 nm. The thickness of the silicon nitride layer may be, but is not limited to, 60 nm, 80 nm, 100 nm, 120 nm, 130 nm, 140 nm, 160 nm, or 180 nm.
[0063] Further, the method of forming the first passivation layer and the second passivation layer includes one or more of NCD and plasma enhanced chemical vapor deposition (PECVD).
[0064] In the above-mentioned solar energy preparation method, after a polished groove area is formed on the passivation contact layer, a local velvet structure is further formed in the polished groove area using a mask layer, and the preparation method and preparation parameters of the local velvet structure are further limited. The coordination between the polished surface in the groove structure and the velvet structure is utilized to achieve the further improvement of the fill factor and conversion efficiency of the solar cell on the basis of ensuring the gain of the open circuit voltage and the short circuit current.
[0065] Understandably, if Figure 1 The following is a method for preparing a solar cell provided by the present application:
[0066] A passivation contact layer 110 is formed on the first surface of the substrate 100, wherein the passivation contact layer 110 includes a tunneling oxide layer 1101 and a doped polysilicon layer 1102 formed on the substrate in sequence, wherein a phosphosilicate glass layer (PSG layer) 1103 is generated when the doped polysilicon layer 1102 is prepared.
[0067] A portion of the phosphosilicate glass layer 1103 and the passivation contact layer 110 are removed until the substrate 100 is exposed, thereby preparing a prefabricated structure with a groove.
[0068] The surface of the groove is polished and a mask layer material 120 is formed on the first surface, including a first mask layer material 1201 formed on the doped polysilicon layer 1102, a second mask layer material 1202 formed on the groove of the substrate 100, and a third mask layer material 1203 generated on the second surface of the substrate 100. It can be understood that due to the single insert, both sides of the substrate have mask layer materials.
[0069] A portion of the second mask layer material 1202 on the surface of the groove is removed, and the third mask layer material 1203 generated on the second surface of the substrate is removed to prepare a structure to be textured having a mask layer 121, wherein the mask layer 121 includes the first mask layer material 1201 and the fourth mask layer material 1204 remaining in the groove.
[0070] The structure to be textured with the mask layer 121 is textured, and the mask layer 121 and the remaining phosphosilicate glass layer 1103 are removed.
[0071] A first passivation layer 130 is formed on the doped polysilicon layer 1102 , wherein the first passivation layer 130 includes a first aluminum oxide layer 1301 and a first silicon nitride layer 1302 .
[0072] A second passivation layer 140 is formed on the second surface of the substrate 100 , ie, on the side away from the groove. The second passivation layer 140 includes a second aluminum oxide layer 1401 and a second silicon nitride layer 1402 .
[0073] Understandably, Figure 2 In the process of preparing solar cells, a top view of the grooved side of the substrate after texturing and pickling is shown. The two sides are (a) doped polysilicon, and the middle rectangle except the central circle is the (b) laser area. It can be understood that the laser area is the polishing surface, and the area within the central circle is the (c) texturing area.
[0074] The present application also provides a solar cell, which is manufactured according to the above-mentioned manufacturing method.
[0075] Furthermore, the present application also provides an electrical device, comprising the solar cell as described above as a power source.
[0076] It can be understood that the above-mentioned electrical devices may include but are not limited to transformers, reactors, capacitors, combined electrical appliances, circuit breakers, mutual inductors, lightning arresters, coupling capacitors, transmission lines, power cables, grounding devices, generators, phase regulators, motors, closed busbars and thyristors.
[0077] The following specific examples are provided to further illustrate the solar cell and the preparation method thereof of the present application. Unless otherwise specified, the raw materials involved in the following specific implementation methods can all be commercially available.
[0078] Example 1
[0079] This embodiment provides a method for preparing a solar cell, comprising the following steps:
[0080] (1) growing a passivation contact layer on the first surface of the substrate silicon wafer, specifically, sequentially growing a 1.5 nm tunneling oxide layer and a 210 nm doped polysilicon layer on the first surface of the silicon wafer;
[0081] (2) using laser to remove part of the passivation contact layer with a depth of 213 nm to prepare a prefabricated structure with a groove, the width of the groove being 200 μm;
[0082] (3) polishing the surface of the groove, wherein the polishing conditions are as follows: polishing time 400 seconds, polishing temperature 80° C., the composition of the polishing liquid is 3.5% by mass of monobasic alkali, 0.1% of polishing additive and 96.4% of water, and silicon oxide is formed on the first surface as a mask layer material, wherein the conditions for growing silicon oxide include placing the silicon wafer in a phosphorus expansion tube to grow a double-sided silicon oxide layer, the temperature is set to 800° C., the time is 4000 seconds, and the pressure is 1024 mbar;
[0083] (4) laser windowing is performed on the grooves, and the conditions include a laser rated power of 40 W, a frequency of 800 KHz, a spot size of 40 μm, and a virtual-real ratio of 0.3:0.5 to remove part of the second mask layer material on the surface, and use chain HF to remove the silicon oxide layer formed on the second surface of the substrate silicon wafer to prepare a structure to be textured with a mask layer;
[0084] (5) The etched silicon wafer is placed in a texturing machine, the reaction temperature is 82°C, the reaction time is 600s, the texturing agent comprises 5% NaOH, 0.3% texturing additive and 94.7% deionized water by weight, after post-alkaline washing, it is pickled in an acid washing solution, the acid washing solution comprises 15% HF, 10% HCl and 75% deionized water by weight, the reaction time is 300s, the structure to be texturized with a mask layer is texturized, and the mask layer is removed;
[0085] (6) forming a first passivation layer on the doped polysilicon layer, wherein the first passivation layer includes a first aluminum oxide layer and a first silicon nitride layer, specifically comprising sequentially inserting the silicon wafer into NCD and PECVD to grow aluminum oxide and silicon nitride, wherein the thickness of the aluminum oxide is 10 nm and the thickness of the silicon nitride is 180 nm;
[0086] A second passivation layer is formed on the side of the substrate away from the groove, and the second passivation layer includes a second aluminum oxide layer and a second silicon nitride layer. Specifically, the silicon wafer enters NCD and PECVD to grow aluminum oxide and silicon nitride in sequence, wherein the thickness of the aluminum oxide is 10nm and the thickness of the silicon nitride is 130nm.
[0087] Embodiment 2:
[0088] The difference between this embodiment and embodiment 1 is that:
[0089] Step (3), the conditions for growing silicon oxide include placing the silicon wafer into a phosphorus expansion tube to grow a double-sided silicon oxide layer, the temperature is set to 500° C., the time is 2000 s, and the pressure is 700 mbar;
[0090] Step (4), laser windowing the groove, the conditions include laser rated power of 20W, frequency of 350KHz, spot size of 20μm, virtual-real ratio of 0.2:0.55;
[0091] Step (5), placing the etched silicon wafer into a texturing machine, the reaction temperature is 74° C., the reaction time is 350 seconds, the texturing agent comprises, by mass percentage, 1.3% NaOH, 1.5% texturing additive and 97.2% deionized water; pickling treatment is performed in an acid pickling solution, the acid pickling solution comprises, by mass percentage, 8% HF, 4.5% HCl and 87.5% deionized water, and the reaction time is 150 seconds;
[0092] Step (6), conditions for forming the first passivation layer: after cleaning, the silicon wafer enters NCD and PECVD to grow aluminum oxide and silicon nitride in sequence, with the thickness of aluminum oxide being 2nm and the thickness of silicon nitride being 60nm.
[0093] Example 3
[0094] The difference between this embodiment and embodiment 1 is that:
[0095] Step (3), the conditions for growing silicon oxide include placing the silicon wafer into a phosphorus expansion tube to grow a double-sided silicon oxide layer, the temperature is set to 700° C., the time is 3000 s, and the pressure is 900 mbar;
[0096] Step (4), laser windowing the groove, the conditions include laser rated power of 30W, frequency of 600KHz, spot size of 30μm, virtual-real ratio of 0.25:0.5;
[0097] Step (5), placing the etched silicon wafer into a texturing machine, the reaction temperature is 78° C., the reaction time is 400 s, the texturing agent comprises, by mass percentage, 3% NaOH, 1% texturing additive and 94% deionized water; pickling treatment is performed in an acid pickling solution, the acid pickling solution comprises, by mass percentage, 10% HF, 7% HCl and 83% deionized water, and the reaction time is 250 s;
[0098] Step (6), conditions for forming the first passivation layer: after cleaning, the silicon wafer enters NCD and PECVD to grow aluminum oxide and silicon nitride in turn, with the aluminum oxide thickness being 6nm and the silicon nitride thickness being 120nm.
[0099] Example 4
[0100] The difference between the present embodiment 4 and the embodiment 1 is that the width of the groove formed by removing part of the passivation contact layer by laser is 220 μm.
[0101] Comparative Example 1
[0102] The difference between this comparative example and Example 1 is that the laser windowing and texturing treatment are not performed on the grooves.
[0103] Step (3), the conditions for growing silicon oxide include placing the silicon wafer into a phosphorus expansion tube to grow a double-sided silicon oxide layer, the temperature is set to 800° C., the time is 4000 s, and the pressure is 1024 mbar;
[0104] Step (5), cleaning the silicon wafer after silicon oxide growth with HF acid, wherein the composition of the acid cleaning solution includes 15% HF and 85% deionized water by mass percentage, and the reaction time is 300 seconds;
[0105] Step (6), the cleaned silicon wafer is sequentially put into NCD and PECVD to grow aluminum oxide and silicon nitride, with the aluminum oxide thickness being 10nm and the silicon nitride thickness being 180nm.
[0106] Comparative Example 2
[0107] The difference between this comparative example and Example 1 is that the laser windowing and texturing treatment are not performed on the grooves.
[0108] Step (3), the conditions for growing silicon oxide include placing the silicon wafer into a phosphorus expansion tube to grow a double-sided silicon oxide layer, the temperature is set to 500° C., the time is 2000 s, and the pressure is 700 mbar;
[0109] Step (5), cleaning the silicon wafer after silicon oxide growth with HF acid, wherein the composition of the acid cleaning solution includes 8% HF and 92% deionized water by mass percentage, and the reaction time is 150s;
[0110] Step (6), the cleaned silicon wafer is sequentially put into NCD and PECVD to grow aluminum oxide and silicon nitride, with the thickness of aluminum oxide being 2nm and the thickness of silicon nitride being 60nm.
[0111] Test results:
[0112] After 3 batch experiments, the efficiency (Eta), short circuit current (Isc), open circuit voltage (Uoc) and fill factor (FF) of the final silicon wafer product cell were tracked, as shown in the table below.
[0113] Eta % Uoc(V) Isc(A) FF Example 1 23.70 0.7049 13.643 81.34 Example 2 23.70 0.7052 13.642 81.33 Example 3 23.75 0.7054 13.648 81.43 Example 4 23.69 0.7038 13.647 81.42 Comparative Example 1 23.01 0.7063 13.651 78.78 Comparative Example 2 23.06 0.7058 13.649 79.01
[0114] It can be seen from the above table that the efficiency Eta of the embodiment is improved by 0.63% to 0.74% compared with the comparative example. Although there is a slight loss in opening pressure and short flow, the nearly 3% gain in filling factor FF has greatly improved Eta.
[0115] It can be seen that by optimizing the above-mentioned solar energy preparation method, after forming a polished groove area on the passivation contact layer, a local velvet structure is further formed in the polished groove area using a mask layer, and the preparation method and preparation parameters of the local velvet structure are further limited. By utilizing the coordination between the polished surface in the groove structure and the velvet structure, the fill factor and conversion efficiency of the solar cell are further improved while ensuring the gain of the open circuit voltage and the short circuit current.
[0116] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art to which the present application belongs. The terms used herein in the specification of the present application are only for the purpose of describing specific embodiments and are not intended to limit the present application. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.
[0117] The technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0118] The above-described embodiments only express several implementation methods of the present application, which is convenient for understanding the technical solutions of the present application in detail, but cannot be understood as limiting the scope of protection of the patent application. It should be pointed out that for ordinary technicians in this field, without departing from the concept of the present application, several modifications and improvements can be made, which all belong to the scope of protection of the present application. It should be understood that the technical solutions obtained by those skilled in the art through logical analysis, reasoning or limited experiments on the basis of the technical solutions provided in the present application are all within the scope of protection of the claims attached to the present application. Therefore, the scope of protection of the patent of this application shall be based on the contents of the attached claims, and the description can be used to interpret the contents of the claims.
Claims
1. A method for preparing a solar cell, characterized in that: The following steps are involved: providing a substrate having a first surface and a second surface opposite to the first surface; forming a passivation contact layer on the first surface, removing a portion of the passivation contact layer until the substrate is exposed, and preparing a prefabricated structure having a groove, wherein the width of the groove is 180 μm to 250 μm; Polishing the surface of the groove to form a mask layer material on the first surface, removing part of the mask layer material on the surface of the groove to prepare a structure to be textured with a mask layer; After performing texturing treatment on the structure to be texturized, removing the mask layer; The conditions for removing part of the mask layer material on the surface of the groove include: laser processing, with a laser spot diameter of 15 μm to 45 μm.
2. The method for preparing a solar cell according to claim 1, characterized in that: The conditions for removing part of the mask layer material on the surface of the groove include: the laser rated power is 15w-45w, the laser frequency is 300KHz-850KHz, and the virtual-real ratio is 0.2:0.55-0.3:0.
5.
3. The method for preparing a solar cell according to claim 1, wherein: The texturing treatment conditions include: placing in a texturing liquid for texturing, wherein the texturing liquid includes 1% to 8% of a monobasic strong base, 0.1% to 3% of a texturing additive and 89% to 98% of a first solvent by mass percentage, the texturing time is 300s to 650s, and the texturing temperature is 70°C to 85°C; Optionally, the monobasic strong base includes one or more of sodium hydroxide and potassium hydroxide.
4. The method for preparing a solar cell according to claim 1, wherein: The conditions for removing the mask layer include: placing in an acid wash solution for treatment, wherein the acid wash solution includes 5% to 18% hydrofluoric acid, 4% to 12% hydrochloric acid and 70% to 91% of a second solvent in terms of mass percentage.
5. The method for preparing a solar cell according to claim 1, wherein: The width of the groove is 190 μm to 210 μm, and the diameter of the laser spot is 20 μm to 40 μm.
6. The method for preparing a solar cell according to claim 1, characterized in that: The passivation contact layer includes a stacked tunneling oxide layer and a doped polysilicon layer, wherein the tunneling oxide layer faces a side of the substrate.
7. The method for preparing a solar cell according to any one of claims 1 to 6, characterized in that: After removing the mask layer, the method further includes: forming a first passivation layer on the first surface and forming a second passivation layer on the second surface.
8. The method for preparing a solar cell according to claim 7, characterized in that: The material of the first passivation layer and the material of the second passivation layer each independently include one or more of aluminum oxide, silicon nitride and silicon oxynitride.
9. A solar cell, characterized in that: Prepared according to the preparation method according to any one of claims 1 to 8.
10. An electrical device, characterized in that: The solar cell according to claim 9 is included as a power source.