Flexible multi-junction solar cell and manufacturing method thereof

Abstract

The invention relates to the technical field of solar cell structures, in particular to a flexible multi-junction solar cell and a manufacturing method thereof. The flexible multi-junction solar cell comprises a PI film, a bonding metal layer, a back metal layer, an ohmic contact metal layer, a DBR reflecting layer, an epitaxial layer structure, an antireflection film and an N electrode. According to the flexible multi-junction solar cell, the GaAs substrate is firstly used, the sapphire substrate is used in the middle, the PI film is finally used as the final substrate, the mode of overturning the epitaxial wafer twice is adopted, the process is simple, and the problems that the consumption of precious metal is large due to multiple times of metal bonding, and the performance of the epitaxial wafer is affected due to high temperature of the evaporation and thermal stripping film process can be solved; germanium materials are saved, and cost is low; the PI film is used as the cell substrate, the weight is light, the mechanical strength is high, the cell substrate can be bent, and the design requirement of a solar cell array on a spacecraft can be met.

Description

Technical Field

[0001] The present invention relates to the technical field of solar cell structures, and in particular to a flexible multi-junction solar cell and a manufacturing method thereof. Background Art

[0002] At present, the conventional structure of multi-junction solar cells for space is GaInP / GaAs / Ge triple junction structure, which has the advantages of lattice matching, high conversion efficiency of grown materials, and good radiation resistance. In existing solar cells, germanium materials as substrates account for more than 95%, and due to the high density of germanium materials, large usage and the fact that germanium is a rare metal material, the solar cell arrays on spacecraft are not only expensive but also heavy. Although the thickness of the germanium substrate is set to about 150μm in the process of making solar cells in order to reduce weight, this thickness makes the battery device weak in strength and very easy to break. Special attention should be paid to shock protection during the production process, and due to the characteristics of germanium itself, the device cannot be bent, which greatly limits the design of solar cell arrays. In addition, although some devices use PI (polyimide) flexible materials, most of them use multiple GaAs substrates or "sandwich" metal bonding manufacturing solutions. These manufacturing solutions need to consume a large amount of precious metals to achieve good bonding effects. This is not only costly, but also requires the use of thermal release films as temporary protection or temporary substrate support during the manufacturing process. Thermal release films are relatively soft and not resistant to high-temperature corrosion. Therefore, they are easily corroded or dissolved in subsequent processes such as metal evaporation and high-temperature annealing, affecting chip manufacturing. Summary of the invention

[0003] In view of the deficiencies of the prior art, the present invention provides a flexible multi-junction solar cell and a method for manufacturing the same, which can effectively solve the problems of high manufacturing cost, poor mechanical strength and inability to be bent of the prior art solar cells.

[0004] The present invention provides a method for manufacturing a flexible multi-junction solar cell, comprising the following steps: S1. Growing an epitaxial layer structure on a GaAs substrate, which includes an etching stop layer, a GaAs contact layer, a subcell structure and a tunnel junction; S2. Fabricate a DBR reflective layer and a metal layer on the surface of the epitaxial wafer and realize ohmic contact; S3. Deposit a Si3N4 sacrificial layer and a SiO2 bonding layer, CMP polish (chemical mechanical polishing), bond with a sapphire substrate after activation, and remove the original GaAs substrate; S4. After flipping the epitaxial wafer, the front chip process is carried out; S5. Using temporary bonding technology, the epitaxial layer is bonded to the temporary substrate, and the sapphire substrate and the remaining Si3N4 sacrificial layer and SiO2 bonding layer are removed using LLO technology (laser lift-off technology); S6. After flipping the epitaxial wafer, the epitaxial wafer is bonded to the PI film using indium gold bonding technology, and the debonding process of the temporary bonding is completed at the same time; S7. Clean the remaining bonding glue on the surface and form battery chips after wafer cutting.

[0005] The present invention first uses a GaAs substrate, then a sapphire substrate, and finally a PI film as the final substrate. The epitaxial wafer is flipped twice, and the process is simple. The problem of multiple metal bonding with large consumption of precious metals, high temperature of evaporation and thermal stripping film processes affecting the performance of the epitaxial wafer can be avoided. At the same time, the indium gold low-temperature bonding technology is used to transfer the epitaxial wafer to the flexible PI film. The advantages of PI with low density and thinness can be used to greatly reduce the weight of the battery array in the spacecraft assembly. In addition, the present invention does not use a germanium substrate, saves germanium materials, and has low cost. The PI film is used as the battery substrate, which is light in weight, has high mechanical strength and can be bent, and can meet the design requirements of the solar cell array on the spacecraft.

[0006] Furthermore, in the above technical solution S1, the material of the corrosion stop layer is InGaP or AlInP; the subcell structure is a three-junction cell, including a GaInP subcell, a GaAs subcell, and an InGaAs subcell; and the tunnel junction is GaAs / AlGaAs or GaAs / GaInP. The present invention adopts a GaInP / GaAs / InGaAs three-junction solar cell structure, which has more reasonable spectrum partitioning, higher conversion efficiency, and retains the advantages of conventional germanium substrate solar cells with good temperature coefficient and strong radiation resistance, and has lower cost.

[0007] Furthermore, in the above technical solution S2, the DBR reflective layer is deposited by electron beam evaporation, and the DBR reflective layer is formed by alternating and cyclic deposition of high refractive index material and low refractive index material, the number of cyclic logarithms is 6 pairs to 16 pairs, the high refractive index material is any one of TiO2, Ta2O5, and ZnO, and the low refractive index material is any one of MgF2, SiO2, and Al2O3; the total thickness of the DBR reflective layer is 0.9μ±0.05m. Preferably, the combination of TiO2 / SiO2 has a cyclic logarithm of 8 pairs.

[0008] Furthermore, in the above technical solution, a periodically arranged through-hole pattern is made on the DBR reflective layer; the diameter of the through-hole pattern is 10±0.5 μm, and the spacing between the through-holes is 30±2 μm; the periodic arrangement is a matrix arrangement or a honeycomb arrangement.

[0009] Furthermore, in the above technical solution S2, the method for making the back metal layer is: first evaporate the ohmic contact metal layer, and then evaporate the back metal layer; the ohmic contact metal layer is AuBe alloy or AuZn alloy or other metals that can form ohmic contact with InGaAs material; the back metal layers are Ti / Pd / Ag / Pd / Au in sequence, wherein the thickness of Ti is 100±5nm, the thickness of the first layer of Pd is 100±5nm, the thickness of Ag is 2±0.1μm, the thickness of the second layer of Pd is 50±2nm, and the thickness of Au is 500±10nm. In this technical solution, Ti is used as a diffusion barrier layer, the first layer of Pd mainly has an adhesion effect to prevent stratification between Ti and Ag, Ag is an electrode metal, and the second layer of Pd has a barrier effect to prevent mutual diffusion of Ag and Au on the surface, and the electrode has good stability.

[0010] Furthermore, in the above technical solution S3, the thickness of the Si3N4 sacrificial layer is 500±10nm; the thickness of the SiO2 bonding layer is 2±0.1μm; and the bonding conditions are: pressure 12000kgf, temperature 150°C, vacuum 1E-02torr, and hold for 10min.

[0011] Furthermore, in the above technical solution S5, before bonding, a temporary bonding glue with a thickness of 5μm-6μm is spin-coated on the surface of the epitaxial layer and the temporary substrate, and baked at 120°C for 5 minutes; the bonding conditions are: pressure 120kgf, temperature 100°C, vacuum 1E-02torr, maintained for 15 minutes; the temporary substrate is any one of sapphire, silicon wafer, and glass wafer.

[0012] Furthermore, in the above technical solution S6, before bonding, a bonding metal layer is first deposited on the PI film, the metal layer in contact with the PI film is Cr, and the outermost layer is In; during bonding, the metal surface of the epitaxial wafer is bonded to the bonding metal layer, and the bonding conditions are: pressure 7000kgf-9000kgf, temperature is divided into three stages, the first stage is 120°C, holding time 5min, the second stage is 180°C, holding time 10min, and the third stage is 100°C, holding time 5min.

[0013] The present invention also provides a flexible multi-junction solar cell made by the above-mentioned manufacturing method, wherein the hollow flexible multi-junction solar cell includes a PI film, a bonding metal layer, a back metal layer, an ohmic contact metal layer, a DBR reflective layer, an epitaxial wafer, an anti-reflection film, and an N electrode.

[0014] Compared with the prior art, the present invention has the following beneficial effects: 1. The present invention is optimized in terms of manufacturing process and adopts a more reliable secondary flipping solution. During the first flip, SiO2 is used as the bonding layer material, and sapphire is used as the intermediate temporary substrate. The SiO2 activated bonding strength is large, and the sapphire substrate has stable physical and chemical properties and can withstand high vacuum, various acid and alkali, and various high-temperature processes, and has good compatibility with existing production lines. At the same time, the sapphire substrate has high flatness and is very friendly to photolithography and etching processes. In this step of substrate transfer, no precious metal is used as the bonding layer metal, and the bonding layer is made by PECVD deposition, which further reduces the cost. During the second flip of the epitaxial layer, temporary bonding technology is used to bond the wafer and the temporary substrate together with temporary bonding glue, and laser stripping technology is used to strip the original sapphire substrate. At this step, most of the chip processes have been completed, and then Au-In bonding technology is used to bond the PI film to the epitaxial layer bonded by the temporary glue. This step uses a small amount of gold and cheap In metal, and the overall cost is low. At the same time, the temperature used for Au-In bonding is just the temperature for the temporary bonding glue to debond. The temporary substrate can be debonded and removed while PI bonding is being performed, eliminating the step of removing the temporary substrate, and the process is simple.

[0015] 2. The present invention is a multi-junction solar cell structure, which adopts a GaInP / GaAs / InGaAs structure, has reasonable spectrum partitioning, high conversion efficiency, and retains the advantages of conventional germanium substrate solar cells with good temperature coefficient and strong radiation resistance.

[0016] 3. The present invention uses PI film as the final substrate of the solar cell, and the overall weight is 1 / 10-1 / 15 of that of the conventional germanium substrate battery, which greatly reduces the weight of the battery array in the spacecraft assembly; at the same time, the PI film itself is soft, has high mechanical strength, and can be bent, which greatly expands the design direction of the space solar cell array. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a schematic diagram of the epitaxial wafer structure after bonding is completed in S3 of the present invention; Figure 2 This is a schematic diagram of the epitaxial wafer structure after the chip manufacturing process is completed in S4 of the present invention; Figure 3 This is a schematic diagram of the structure of the epitaxial wafer after the sapphire substrate is removed in S5 of the present invention; Figure 4 It is a schematic diagram of the structure of the flexible multi-junction solar cell manufactured in S6 of the present invention.

[0018] Description of the numbers in the schematic diagram: 1. GaAs substrate; 2. Epitaxial layer structure; 3. DBR reflective layer; 4. Ohmic contact metal layer; 5. Back metal layer; 6. Si3N4 sacrificial layer; 7. SiO2 bonding layer; 8. Sapphire substrate; 9. N electrode; 10. Anti-reflection film; 11. Temporary bonding glue; 12. Temporary substrate; 13. PI film; 14. Bonding metal layer. DETAILED DESCRIPTION

[0019] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and is by no means intended to limit the present application and its application or use. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0020] In the description of the present application, it should be understood that the use of terms such as "first" and "second" to limit components is only for the convenience of distinguishing the corresponding components. Unless otherwise stated, the above terms have no special meaning and therefore cannot be understood as limiting the scope of protection of the present application.

[0021] In the description of the present application, it should be understood that the directions or positional relationships indicated by directional words such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom" are usually based on the directions or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description. Unless otherwise specified, these directional words do not indicate or imply that the device or element referred to must have a specific direction or be constructed and operated in a specific direction, and therefore cannot be understood as limiting the scope of protection of the present application; the directional words "inside and outside" refer to the inside and outside relative to the contours of each component itself.

[0022] See also Figures 1 to 4 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and therefore the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the form, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0023] Some embodiments of the present invention provide a method for manufacturing a flexible multi-junction solar cell, comprising the following steps: S1. Grow an epitaxial layer structure 2 on a GaAs substrate 1, which is a corrosion stop layer, a GaAs contact layer, a sub-cell structure and a tunnel junction in sequence; specifically, use an organic metal chemical vapor deposition (MOCVD) method to grow the epitaxial structure of a multi-junction solar cell: first grow an corrosion stop layer, the material is InGaP or AlInP; then grow GaAs material as a contact layer material; then grow a sub-cell structure, the sub-cell can be a two-junction or a three-junction. The order of growth of the two-junction is InGaP, GaAs; the three-junction cell is InGaP, GaAs, InGaAs in sequence. Each sub-cell is connected by a tunnel junction, which can be GaAs / AlGaAs or GaAs / GaInP. The sub-cell structure includes a back reflection layer, a base region, an emitter region, and a window layer, and the PN junction is between the base region and the emitter region. The window layer of the GaAs sub-cell can be AlGaAs or InGaP material, and the window layer of the InGaP sub-cell is AlInP material; this embodiment uses a three-junction structure.

[0024] S2. DBR reflective layer 3 and back metal layer 5 are formed on the surface of the epitaxial wafer, and ohmic contact is achieved; Specifically, the method includes the following steps: first, a DBR reflective layer is deposited on the surface of the epitaxial layer by electron beam evaporation, and the DBR reflective layer is formed by alternating and cyclic deposition of high refractive index materials and low refractive index materials. High refractive index materials usually use TiO2, Ta2O5, ZnO, etc., and low refractive index materials can be MgF2, SiO2, Al2O3, etc. High and low refractive index materials are deposited alternately, and each layer of high refractive index material is a pair with the adjacent low refractive index material. The overall DBR reflective layer usually ranges from a few pairs to more than a dozen pairs. The specific value is determined according to the target wavelength and the specific materials used, and the optimal structure is simulated by calculation. This embodiment uses a combination of TiO2 / SiO2, the number of cyclic logarithms is 6 pairs to 16 pairs, and the overall thickness of the DBR reflective layer is 0.9±0.05μm; Then, photolithography is used to make a through-hole pattern on the deposited DBR reflective layer; the through-hole pattern is arranged periodically, and can be a rectangular arrangement, a honeycomb arrangement, or other shapes. The design is based on minimizing the number of through-holes while ensuring good electrical properties. This embodiment uses a honeycomb arrangement, with a through-hole diameter of 10±0.5μm and a spacing of 30±2μm between through-holes; Secondly, etching through holes; either wet etching or ICP etching can be used. The advantage of wet etching is high selectivity, but the disadvantage is that side etching is prone to occur; the advantage of ICP etching is that there is basically no side etching, but the etching depth needs to be precisely controlled to prevent the epitaxial layer from being excessively corroded. This embodiment chooses to use ICP etching; Finally, the back metal layer is evaporated; first, the ohmic contact metal layer 4 is evaporated, and AuBe alloy, AuZn alloy or other metals that can form ohmic contact with InGaAs material can be used. In this example, AuZn alloy is used; then the back metal layer is evaporated, and the back metal layers are Ti / Pd / Ag / Pd / Au in sequence, where the thickness of Ti is 100±5nm, which is used as a diffusion barrier layer; the thickness of the first layer of Pd is 100±5nm, which plays an adhesion role and prevents stratification between Ti and Ag; the thickness of Ag is 2±0.1μm, which is the main electrode metal; the thickness of the second layer of Pd is 50±2nm, which can prevent mutual diffusion between Ag and the surface layer of Au; the thickness of the last layer of Au is 500±10nm. Such a back metal layer design can ensure the stability of the electrode.

[0025] S3 deposits Si3N4 sacrificial layer 6 and SiO2 bonding layer 7, CMP polishing, activation and bonding with the sapphire substrate 8, and removes the original GaAs substrate; Specifically, PECVD (plasma enhanced chemical vapor deposition) is used to deposit Si3N4 and SiO2 in sequence, where the thickness of Si3N4 is 500±10nm, which serves as a sacrificial layer for subsequent laser stripping; SiO2 is used as a bonding layer with a thickness of 2±0.1μm; For the first bonding, the surface SiO2 is first polished using CMP technology. The roughness of the polished surface is less than 5nm, and the surface is activated. The surface activation can be performed by wet or dry methods. The purpose is to create more dangling bonds and increase the bonding strength. At the same time, the sapphire substrate to be bonded is activated using the same conditions. In this embodiment, a mixed solution of KOH and H2O2 in any volume ratio is used for activation. Then the epitaxial wafer is bonded to the sapphire substrate. The bonding conditions of this embodiment are: pressure 12000kgf, temperature 150°C, vacuum 1E-02torr, and maintained for 10 minutes. The schematic diagram of the epitaxial wafer structure after bonding is as shown in FIG. Figure 1 shown.

[0026] Removal of original GaAs substrate: Use chemical solution etching to remove GaAs substrate of cell epitaxial wafer. The chemical solution used is composed of NH4OH, H2O2, H2O, and the volume ratio can be 1:1:5 or 1:5:5. Etching is carried out in a cooling tank to absorb the heat released by the reaction. Other chemical solutions that can corrode GaAs materials can also be used. Etching stops naturally when the corrosion cutoff layer is corroded, and then HCl or other chemical solvents that can corrode InGaP or AlInP materials are used to remove the corroded dielectric layer. At this point, the first flipping of the epitaxial layer is completed.

[0027] S4. After flipping the epitaxial wafer, the front chip process is carried out. The structural diagram is as follows Figure 2 Specifically, the corrosion stop layer is removed and then the chip manufacturing process is carried out. The N electrode 9, the anti-reflection film 10, and the back electrode window etching process are sequentially manufactured. This process is basically similar to the conventional multi-junction solar cell manufacturing process.

[0028] S5. Using temporary bonding technology, the epitaxial layer is bonded to the temporary substrate 12, and the sapphire substrate and the remaining Si3N4 sacrificial layer and SiO2 bonding layer are removed using LLO technology. The schematic diagram of the structure is shown in FIG. Figure 3 As shown; Specifically, using temporary bonding technology, the surface of the epitaxial layer is fully coated with temporary bonding glue 11, the thickness of the temporary bonding glue is 5μm-6μm, and it is baked at 120℃ for 5min. The temporary substrate also uses the same bonding conditions. The temporary substrate can be sapphire, silicon wafer, glass wafer, etc. The bonding conditions are: pressure 120kgf, temperature 100℃, vacuum 1E-02torr, and keep for 15min; Laser lift-off: Using laser lift-off technology, the Si3N4 sacrificial layer is laser ablated to achieve the separation of sapphire; then HF acid solution is used to corrode the remaining bonding layer and sacrificial layer to expose the Au layer.

[0029] S6. After flipping the epitaxial wafer, the epitaxial wafer is bonded to the PI film 13 using indium gold bonding technology, and the debonding process of the temporary bonding is completed at the same time; the schematic diagram of the structure is as follows Figure 4 As shown. Specifically, metal In-Au bonding, a bonding metal layer 14 is deposited on the PI film, and the bonding metal layer in contact with the PI film can be Cr or other metals with high adhesion to the PI film, and the outermost surface of the bonding metal layer is In; during bonding, metal faces metal, and the bonding conditions are: pressure 7000kgf-9000kgf, temperature rises and falls in three stages, the first stage is 120℃, maintained for 5min, the second stage is 180℃, maintained for 10min, and the third stage is 100℃, maintained for 5min; while the metal is bonding, because the bonding temperature exceeds the temperature of the temporary bonding glue debonding, the temporary bonding layer dissolves, the temporary substrate falls off, and the second flipping of the epitaxial layer is completed, and there is no need to remove the temporary substrate separately, and the steps are simpler.

[0030] S7. Clean the remaining bonding glue on the surface and form battery chips after wafer cutting.

[0031] Some other embodiments of the present invention also provide a flexible multi-junction solar cell, the structural schematic diagram of which is shown in FIG. Figure 4 As shown, the hollow flexible multi-junction solar cell includes, from bottom to top, a PI film 13, a bonding metal layer 14, a back metal layer 5, an ohmic contact metal layer 4, a DBR reflective layer 3, an epitaxial layer structure 2, an anti-reflection film 10, and an N electrode 9.

[0032] In summary, the present invention first uses a GaAs substrate, a sapphire substrate in the middle, and finally a PI film as the final substrate, and adopts a two-time epitaxial wafer flipping method. The process is simple and can avoid the problem of multiple metal bonding, large consumption of precious metals, and high temperature of evaporation and thermal stripping film processes affecting the performance of the epitaxial wafer. The flexible multi-junction solar cell does not use a germanium substrate, saves germanium materials, and has low cost; the PI film is used as the battery substrate, which is light in weight, has high mechanical strength and is bendable, and can meet the design requirements of solar cell arrays on spacecraft.

[0033] Finally, it should be emphasized that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various changes and modifications. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A method for manufacturing a flexible multi-junction solar cell, characterized in that: The following steps are involved: S1. Growing an epitaxial layer structure on a GaAs substrate, which includes an etching stop layer, a GaAs contact layer, a subcell structure and a tunnel junction; S2. Fabricate a DBR reflective layer and a back metal layer on the surface of the epitaxial wafer and realize ohmic contact; S3. Depositing a Si3N4 sacrificial layer and a SiO2 bonding layer, bonding them to a sapphire substrate after CMP polishing and activation, and removing the original GaAs substrate; S4. After flipping the epitaxial wafer, the front chip process is carried out; S5. Bonding the epitaxial layer to the temporary substrate using a temporary bonding technique, and removing the sapphire substrate and the remaining Si3N4 sacrificial layer and SiO2 bonding layer using an LLO technique; S6. After flipping the epitaxial wafer, the epitaxial wafer is bonded to the PI film using indium gold bonding technology, and the debonding process of the temporary bonding is completed at the same time; S7. Clean the remaining bonding glue on the surface and form battery chips after wafer cutting.

2. The method for manufacturing a flexible multi-junction solar cell according to claim 1, characterized in that: In S1, the material of the corrosion stop layer is InGaP or AlInP; the subcell structure is a triple-junction cell, including a GaInP subcell, a GaAs subcell, and an InGaAs subcell; and the tunnel junction is GaAs / AlGaAs or GaAs / GaInP.

3. The method for manufacturing a flexible multi-junction solar cell according to claim 1, characterized in that: In S2, the DBR reflective layer is deposited by electron beam evaporation. The DBR reflective layer is formed by alternating and cyclic deposition of high refractive index material and low refractive index material, the number of cycle logs is 6 pairs to 16 pairs, the high refractive index material is any one of TiO2, Ta2O5, and ZnO, and the low refractive index material is any one of MgF2, SiO2, and Al2O3; the total thickness of the DBR reflective layer is 0.9±0.05μm.

4. The method for manufacturing a flexible multi-junction solar cell according to claim 3, characterized in that: A periodically arranged through-hole pattern is made on the DBR reflective layer; the diameter of the through-hole pattern is 10±0.5 μm, and the spacing between the through-holes is 30±2 μm; the periodic arrangement is a matrix arrangement or a honeycomb arrangement.

5. The method for manufacturing a flexible multi-junction solar cell according to claim 1, characterized in that: In S2, the method for manufacturing the back metal layer is: first evaporate the ohmic contact metal layer, and then evaporate the back metal layer; the ohmic contact metal layer is AuBe alloy or AuZn alloy or other metals that can form ohmic contact with InGaAs material; the back metal layers are Ti / Pd / Ag / Pd / Au in sequence, wherein the thickness of Ti is 100±5nm, the thickness of the first layer of Pd is 100±5nm, the thickness of Ag is 2±0.1μm, the thickness of the second layer of Pd is 50±2nm, and the thickness of Au is 500±10nm.

6. The method for manufacturing a flexible multi-junction solar cell according to claim 1, characterized in that: In S3, the thickness of the Si3N4 sacrificial layer is 500±10nm; the thickness of the SiO2 bonding layer is 2±0.1μm; the bonding conditions are: pressure 12000kgf, temperature 150°C, vacuum 1E-02torr, and hold for 10min.

7. The method for manufacturing a flexible multi-junction solar cell according to claim 1, characterized in that: In S5, before bonding, a temporary bonding glue with a thickness of 5μm-6μm is spin-coated on the epitaxial layer and the surface of the temporary substrate, and baked at 120°C for 5 minutes; the bonding conditions are: pressure 120kgf, temperature 100°C, vacuum 1E-02torr, maintained for 15 minutes; the temporary substrate is any one of sapphire, silicon wafer, and glass wafer.

8. The method for manufacturing a flexible multi-junction solar cell according to claim 1, characterized in that: In S6, before bonding, a bonding metal layer is first deposited on the PI film, wherein the metal layer in contact with the PI film is Cr, and the outermost layer is In; during bonding, the metal surface of the epitaxial wafer is bonded to the bonding metal layer, and the bonding conditions are: pressure 7000kgf-9000kgf, temperature is divided into three stages, the first stage is 120°C, holding time 5min, the second stage is 180°C, holding time 10min, and the third stage is 100°C, holding time 5min.

9. A flexible multi-junction solar cell manufactured by the manufacturing method as described in any one of claims 1 to 8.

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