Voltage multiplier circuit control

Abstract

A circuit includes a first output terminal and a second output terminal; a transformer including a primary winding and a secondary winding, the secondary winding including a tap dividing the secondary winding into a first secondary winding and a second secondary winding; a rectifier circuit connected to the secondary winding; and a voltage multiplier circuit connected to the tap such that the voltage multiplier circuit receives the first voltage from both the first secondary winding and the second secondary winding and only the second voltage from the second secondary winding.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority to U.S. Patent Application No. 63 / 398,040, filed on August 15, 2022. The entire contents of each application are incorporated herein by reference. Technical Field

[0002] The present invention relates to voltage multiplier circuits. More particularly, the present invention relates to voltage multiplier circuits that can be used with transformers. Background Art

[0003] Figure 1 A known voltage multiplier circuit connected to the secondary winding S1 of a transformer TX2 is shown. In addition to the secondary winding S1, the transformer TX2 also includes a primary winding P1. "Primary side" refers to a circuit directly connected to the primary winding P1, and "secondary side" refers to a circuit directly connected to the secondary winding S1. The voltage multiplier circuit includes capacitors C3, C4 connected in series with each other and connected in parallel between the output terminals Vout+, Vout-. Rectifier diodes D1, D4 are also connected to the secondary winding S1. The cathode of the diode D4 is connected to the anode of the diode D3. The first node defined by the connection of the cathode of the diode D4 and the anode of the diode D3 is connected to the first end of the secondary winding S1, that is, the point end of the secondary winding S1. Each of the capacitors C3, C4 includes a first terminal and a second terminal. The first terminal of the capacitor C4 is connected to the cathode of the diode D1 and the output terminal Vout+. The second terminal of the capacitor C4 is connected to the first terminal of the capacitor C3. A second node defined by the connection between the second terminal of capacitor C4 and the first terminal of capacitor C3 is connected to a second end of secondary winding S1, ie, a non-point end of secondary winding S1. A second terminal of capacitor C3 is connected to an anode of diode D4 and output terminal Vout-.

[0004] A known voltage multiplier circuit provides an output voltage that is twice the AC input voltage. The known voltage multiplier circuit doubles the input voltage tolerance, which greatly affects the output voltage. That is, a small change in the input voltage results in a large change in the output voltage. Figure 1As shown, if the AC voltage applied to the voltage multiplier circuit is generated by the transformer TX2, when the number of turns in the secondary winding increases by 1, the output voltage of the voltage multiplier circuit increases by twice the turns ratio of the transformer. Due to these problems, it is difficult to design a circuit with a known voltage multiplier circuit to provide a target output voltage. The output voltage of the known voltage multiplier circuit cannot be controlled by adjusting the duty cycle of one or more power switches in the primary circuit. Regardless of the turn-on and turn-off timing of the power switch in the primary circuit, the output voltage of the voltage multiplier circuit is always constant. In order to avoid these problems of the known voltage multiplier circuit, it is known to use a full-bridge rectifier circuit to replace the voltage multiplier circuit. But a full-bridge rectifier does not double the voltage. Summary of the invention

[0005] In order to overcome the above problems, a preferred embodiment of the present invention provides a voltage multiplier circuit connected to a tapped secondary winding, so that the output voltage can be more accurately controlled by adjusting the duty cycle of one or more power switches in the primary circuit, thereby reducing the impact of the input voltage tolerance on the output voltage.

[0006] According to a preferred embodiment of the present invention, a circuit includes: a first output terminal and a second output terminal; a transformer, including a primary winding and a secondary winding, the secondary winding including a tap, the tap dividing the secondary winding into a first secondary winding and a second secondary winding; a rectifier circuit, connected to the secondary winding; and a voltage multiplier circuit, connected to the tap, so that the voltage multiplier circuit receives a first voltage from both the first secondary winding and the second secondary winding and receives a second voltage only from the second secondary winding.

[0007] The voltage multiplier circuit may include a first capacitor and a second capacitor, which are connected in series with each other and in parallel with the first output terminal and the second output terminal. The first voltage may be applied to the first capacitor and the second voltage may be applied to the second capacitor, so that the output voltage between the first output terminal and the second output terminal may be the sum of the first voltage and the second voltage. The rectifier circuit may include a first diode and a second diode. Each of the first capacitor and the second capacitor may include a first end and a second end; each of the first diode and the second diode may include an anode and a cathode; the anode of the first diode may be connected to the first end of the first secondary winding; the cathode of the second diode may be connected to the second end of the first secondary winding and the first end of the second secondary winding; the first terminal of the first capacitor may be connected to the cathode of the first diode and the first output terminal; the second terminal of the first capacitor may be connected to the first terminal of the second capacitor; the node defined by the connection between the second terminal of the first capacitor and the first terminal of the second capacitor may be connected to the second end of the second secondary winding; and the second terminal of the second capacitor may be connected to the anode and the output terminal of the second diode.

[0008] The circuit may further include a substrate, wherein the transformer may be embedded in the substrate.The primary winding and the secondary winding may be interwoven.

[0009] According to a preferred embodiment of the present invention, a converter includes first and second input terminals, a circuit according to one of various other preferred embodiments of the present invention, and an integrated circuit (IC) connected to the first and second input terminals and a primary winding.

[0010] The converter may further include a load compensation circuit connected to the second input terminal. The load compensation circuit may include a resistor connected to the second input terminal and an operational amplifier connected across the resistor. The converter may further include a third output terminal. The third output terminal may be connected to the voltage multiplier circuit. The converter may further include a series regulator, wherein the third output terminal may be connected to the series regulator.

[0011] During an off period of the IC, a first voltage may be applied to the first capacitor, and during an on period of the IC, a second voltage may be applied to the second capacitor.

[0012] The above and other features, elements, characteristics, steps and advantages of the present invention will become more apparent from the following detailed description of preferred embodiments of the present invention with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a circuit diagram of a known voltage multiplier circuit.

[0014] Figure 2 is the circuit diagram of a voltage multiplier circuit connected with the tapped secondary winding of a transformer.

[0015] Figure 3A and Figure 3B Is has Figure 2 Circuit diagram of a half-bridge DC-DC converter with a voltage doubler circuit.

[0016] Figure 4 Is has Figure 2 A circuit diagram of a half-bridge DC-DC converter of a voltage multiplier circuit and a first load compensation circuit.

[0017] Figure 5 Is has Figure 2 Circuit diagram of a half-bridge DC-DC converter with a voltage doubler circuit and a second load compensation circuit.

[0018] Figure 6 and Figure 7 is capable of being used in gate driver applications with Figure 2 Circuit diagram of a half-bridge DC-DC converter with a voltage doubler circuit.

[0019] Figure 8 , Fig. 9 , Fig.10 and Fig.11 is able to Figure 2 Perspective, top, bottom, and cross-sectional views of the primary and secondary windings of a transformer used with a voltage multiplier circuit.

[0020] Fig.12 shows two known voltage multiplier circuits with different turns ratios and Figure 2 Simulation of a voltage multiplier circuit.

[0021] Fig.13 The bench test results are shown, which show Fig.10 The relationship between the output voltage and output current of the voltage multiplier circuit is shown.

[0022] Fig.14 Shows Figure 3A and Figure 3B Load regulation of the converter at different primary voltages.

[0023] Fig.15 is a table showing the improvement of input voltage tolerance for different turns ratios during the on-period and the off-period. DETAILED DESCRIPTION

[0024] Figure 2A circuit is shown, the circuit comprising: a transformer TX2 having a primary winding P1 and a secondary winding, wherein the secondary winding is tapped to divide the secondary winding into a first secondary winding S1 and a second secondary winding S2; a rectifier circuit connected to the secondary winding; and a voltage multiplier circuit connected to the secondary winding, the rectifier circuit and output terminals Vout+, Vout-. Connecting the voltage multiplier circuit to the tapped secondary winding allows the output voltage to be determined more finely, making it easier to design a circuit using the voltage multiplier.

[0025] The voltage multiplier circuit includes capacitors C3 and C4 connected in series with each other and in parallel between output terminals Vout+ and Vout-. Rectifier diodes D1 and D4 are also connected to the first secondary winding S1 and the second secondary winding S2. For example, synchronous rectifiers can also be used instead of rectifier diodes D1 and D4. The anode of diode D1 is connected to the first end of the first secondary winding S1, that is, the point end of the first secondary winding S1. The cathode of diode D4 is connected to the tapped secondary winding, that is, connected to the second end or non-point end of the first secondary winding S1 and the first end or point end of the second secondary winding S2. Each of capacitors C3 and C4 includes a first terminal and a second terminal. The first terminal of capacitor C4 is connected to the cathode of diode D1 and the output terminal Vout+. The second terminal of capacitor C4 is connected to the first terminal of capacitor C3. The second node defined by the connection between the second terminal of capacitor C4 and the first terminal of capacitor C3 is connected to the second end of the second secondary winding S2, that is, the non-point end of the second secondary winding S2. A second terminal of the capacitor C3 is connected to the anode of the diode D4 and the output terminal Vout-.

[0026] The number of turns in the primary winding may be the same as or different from the sum of the number of turns in the first secondary winding S1 and the second secondary winding S2. The first secondary winding S1 and the second secondary winding S2 may have the same or different number of turns. If the first secondary winding S1 and the second secondary winding S2 have the same number of turns, the capacitor C4 may be charged to twice the voltage of the capacitor C3.

[0027] Figure 3A Shows that there is Figure 2 A half-bridge DC-DC converter of a voltage multiplier circuit is provided, and the voltage multiplier circuit is connected to a first secondary winding S1 and a second secondary winding S2 of a transformer TX1. Figure 3AThe converter in includes input terminals Vin+, Vin- connected to an integrated circuit (IC) U1. IC U1 is connected to a primary winding P1 of a transformer TX1. A first secondary winding S1 and a second secondary winding S2 of the transformer TX1 are connected to a voltage multiplier circuit including a first capacitor C1 and a second capacitor C2, which are connected in parallel between output terminals Vout+, Vout-. Figure 3A The first capacitor C1 corresponds to Figure 2 The capacitor C4 in the Figure 3A The second capacitor C2 corresponds to Figure 2 Capacitor C3 in.

[0028] IC U1 may be any suitable IC, including, for example, a point-of-load IC. IC U1 may be a fully integrated high frequency synchronous rectified step-down switch-mode converter with internal power switches, including, for example, metal oxide semiconductor field effect transistors (MOSFETs). IC U1 may provide a continuous output current of approximately 1A over a wide input range. IC U1 may use synchronous mode operation to achieve higher efficiency over the output current load range.

[0029] IC U1 may include various components of a converter (including, for example, two power switches connected in series), and may include a charge pump circuit. Figure 3A and Figure 3B As shown, IC U1 may include: an input voltage terminal VIN; an enable terminal EN, which turns on IC U1 when voltage is applied and turns off IC U1 when voltage is not applied; a boost terminal BST, which is connected to a charge pump circuit inside IC U1, for example, for driving a high-side n-channel power switch inside IC U1; a switch node terminal SW, which is connected to a node between two series-connected n-channel power switches; a feedback terminal FB, which monitors the output of IC U1; and a ground terminal GND. The switch node terminal SW can be connected to a magnetic component inside IC U1. The feedback terminal FB can be connected to a magnetic component inside IC U1 through a voltage divider (for example, Figure 3A Resistors R23 and R18 in FIG. 1 are connected to the output voltage of IC U1 to keep the output voltage of IC U1 the same or constant over time.

[0030] Capacitor C12 is an input capacitor, which is connected between input terminals Vin+, Vin- and can filter out any input voltage ripple to avoid instability of IC U1. Resistor R22 is a current limiting resistor, which is connected between input terminal Vin+ and enable terminal EN, limiting the current flowing into enable terminal EN to protect IC U1 from any over-current stress.

[0031] Resistor R17 and capacitor C9 are connected in series with each other and are connected between the boost terminal BST and the switch node terminal SW. Resistor R17 is a charge pump resistor, and capacitor C9 is charged by the switching voltage of the power switch inside the driver IC U1. The discharge current of capacitor C9 flows through resistor R17, and resistor R17 can delay the discharge time of capacitor C9, thereby reducing switching noise. Capacitor C9 is part of the charge pump circuit of the power switch inside the driver IC U1.

[0032] Resistors R23 and R18 may be connected in series between the primary winding P1 and the input terminal Vin-, and capacitor C10 may also be connected between the primary winding P1 and the input terminal Vin-. Resistors R23 and R18 may define a voltage divider that divides the primary output voltage of transformer TX1. An operational amplifier (OP amp) may be included within IC U1. The output of the internal OP amp may provide a duty cycle signal to an internal power switch through a driver circuit and a logic circuit. The internal power switch controlled by the duty cycle sensed by resistor R23 makes the output voltage of the transformer the same at any time, i.e., the output of the transformer is constant.

[0033] Resistor R24 ​​is connected to feedback terminal FB and a node of a voltage divider defined by resistors R23 and R18, i.e., resistor R24 ​​is connected to a node between resistors R23 and R18. Resistor R24 ​​can provide gain control for the OP amp within IC U1. That is, resistor R24 ​​can reduce the output gain of the internal OP amp of IC U1.

[0034] Capacitor C10 is the primary voltage output capacitor of transformer TX1 , which may help stabilize the operation of IC U1 .

[0035] exist Figure 3A In the embodiment, the primary winding P1 includes three turns, the first secondary winding S1 includes one turn, and the second secondary winding S2 includes three turns. The number of turns of the primary winding P1, the first secondary winding S1, and the second secondary winding S2 can be the same as Figure 3A The number of turns shown is different. Figure 3A In the example, the input voltage is 5.0V, but other input voltages are possible. In addition, the primary voltage is about 2.5V (within manufacturing and / or measurement tolerances), but other primary voltages are possible. Figure 3AAs shown, during the OFF period of IC U1, when a positive current is flowing through the primary winding P1, the first capacitor C1 is charged using both the first secondary winding S1 and the second secondary winding S2, so that the transformer turns ratio is 3:4, which causes the first capacitor C1 to be charged to about 3.33V (within manufacturing and / or measurement tolerances), and during the ON period of IC U1, when a negative current is flowing through the primary winding P1, the second capacitor C2 is charged using only the second secondary winding S2, so that the transformer turns ratio is 3:3, which causes the first capacitor C1 to be charged to about 2.5V (within manufacturing and / or measurement tolerances). Therefore, the output voltage at the output terminal Vout+ is about 5.83V (within manufacturing and / or measurement tolerances), which is the sum of the voltages on the first capacitor C1 and the second capacitor C2.

[0036] Fig.12 shows the simulation results for different converters. The top line shows the Figure 1 The output voltage of a known voltage multiplier circuit with a turns ratio of 3:4 varies with time, and the bottom line shows the output voltage of a converter with a turns ratio of 3:4. Figure 1 The output voltage of a converter with a known multiplier circuit but with a turns ratio of 3:3 varies over time. The middle line shows the output voltage of a converter with Figure 2 The output voltage of the converter with a voltage multiplier circuit having a turns ratio of 3:4 varies with time, wherein the secondary winding is tapped at the third turn so that the first secondary winding S1 includes one turn and the second secondary winding S2 includes three turns, and Figure 3A Similarly, the output voltage of the top line increases to about 6.67 V, and the output voltage of the bottom line increases to about 5.0 V. The output voltage of the middle line increases to about 5.83 V, which is between the output voltages of the top and bottom lines. Fig.13 These simulation results were verified in Fig.13 Shows Fig.12 Bench test results of the converter.

[0037] Figure 3B Shows that there is Figure 3A A converter with a similar topology and circuit layout to the converter of Figure 3B In the embodiment, the primary voltage is about 3.0 V, instead of about 2.5 V, which results in the first capacitor C1 being charged to about 4.0 V and the second capacitor C2 being charged to about 2.0 V (=5 V-3 V). Therefore, the output terminal Vout+ is about 5.83 V (within manufacturing and / or measurement tolerances), i.e., the sum of the voltages across the first capacitor C1 and the second capacitor C2.

[0038] Since the FB voltage of IC U1 is constant, the primary voltage during the off period is also always constant regardless of the input voltage tolerance because IC U1 maintains the same feedback voltage. On the other hand, during the on period, the input voltage tolerance is represented by the transformer ratio during the on period. Fig.15 As shown in the two tables in , if the transformer is smaller, the input voltage tolerance has less effect on the output voltage, which improves line regulation. Fig.15 A table with calculations is included showing output voltage tolerance improvement. Thus, by including only the second secondary winding S2 during the on period, fewer turns may be included in the secondary winding, which reduces the turns ratio, thereby reducing the impact of input voltage tolerance on the output voltage. Fig.14 It is shown that when the input voltage varies from 4.5V to 5.5V, the line regulation in the converter using a 3.0V primary voltage, three turns in the secondary winding during the on period and four turns in the secondary winding during the off period is improved compared to the converter using a 2.5V primary voltage, four turns in the secondary winding during the on period and three turns in the secondary winding during the off period.

[0039] Figure 4 Shown with Figure 3A and Figure 3B A converter similar to the converter shown in FIG. 1 but with a load compensation circuit on the primary side. The load compensation circuit may include a resistor R3 and a capacitor C3 connected in parallel to each other. A first end of the resistor R3 and a first end of the capacitor C3 may be connected to the input terminal Vin- and a voltage divider, and a second end of the resistor R3 and a second end of the capacitor C3 may be connected to ground and capacitor C12. Typically, the output voltage Vout is load regulated without any feedback or primary control. But when the duty cycle is controlled based on the load, the regulation of the output voltage Vout is improved. Figure 4 In the example, the voltage drop across resistor R3 of the input current represents the output current. The output voltage is increased by controlling the duty cycle to offset the voltage drop caused by the output load. Without capacitor C3, the current through resistor R3 can have a pulse waveform. Capacitor C3 filters the pulse waveform into a DC voltage to affect the FB voltage from the voltage divider.

[0040] Figure 5 Shown with Figure 4 A converter similar to the converter shown in FIG. 1 has another load compensation circuit on the primary side. The load compensation circuit is connected to the input terminals Vin+, Vin- and the node of the voltage divider between resistors R23 and R18. The load compensation circuit includes a resistor R9, which is arranged similar to Figure 4The load compensation circuit also includes a differential OP amp X1 including two inputs connected across the resistor R9. The non-inverting input of the differential OP amp X1 is connected to the first end of the resistor R9 and the input terminal Vin- through the resistor R7 and to the input terminal Vin+ through the resistor R1, and the inverting input of the differential OP amp X1 is connected to the second end of the resistor R9 through the resistor R4 and to the feedback circuit including the resistor R6 and the capacitor C5. The positive power supply voltage of the differential OP amp X1 is connected to the input terminal Vin+, and the negative power supply voltage of the differential OP amp X1 is connected to the input terminal Vin-. The resistor R5 is connected to the output of the differential OP amp X1 and the node of the voltage divider between the resistors R23 and R18. Figure 5 In the embodiment of the present invention, the differential OP amp X1 is connected across resistor R9 to amplify the signal across resistor R9, thereby reducing the loss of resistor R9. Capacitor C5 is included in the feedback circuit to help stabilize the control of IC U1. Resistor R4 is the output gain control resistor of the differential OP amp X1, which is used to adjust the gain of the differential OP amp X1. Resistor R5 is connected to the node between resistors R23 and R18. The output signal of OP amp X1 is controlled by resistor R5. If the signal is accurately controlled by resistors R1, R4, R7 and R6, resistor R5 may not always be necessary. However, resistor R5 can be used additionally to control the signal more accurately.

[0041] Figure 6 Shown with Figure 3A and Figure 3BThe converter is similar to the converter in , but it can be used in gate driver applications. In addition to the output terminals Vout+, Vout-, the converter may also include an output terminal 0V. The output terminal Vout- can be used to turn off a power switch, such as an insulated gate bipolar transistor IGBT, a SiC transistor, or a GaN transistor. The output terminal 0V can be used to turn off these power switches, but noise can increase the voltage on the output terminal 0V to a voltage level that causes the power switch to turn on. The output terminal Vout- can help avoid this undesired turn-on of the power switch. The output voltage of the voltage multiplier circuit is regulated by a series regulator, which includes a switch Q1, a Zener diode D1, a resistor R2, and a Zener diode D4 connected in series between the output terminals Vout+, Vout-. The node between the Zener diode D1 and the resistor R2 is connected to the output terminal 0V. The switch Q1 may be a bipolar junction transistor (BJT). The series regulator may include a resistor R1. Resistor R1 can be connected to the collector of switch Q1 and to the node between switch Q1 and Zener diode D1 to limit the current to Zener diode D1. Zener diode D1 needs to include a certain current to provide a stable voltage. Resistor R2 provides short-circuit protection to Zener diode D4. When the output terminal Vout+, 0V is short-circuited, a large current can flow into Zener diode D4, and resistor R2 can reduce the current in this case. Zener diode D4 provides a voltage at the output terminal 0V. Capacitor C3 can be connected in parallel with the output terminals Vout+, 0V as a filter capacitor to provide a stable voltage at the output terminal Vout+, and capacitor C4 can be connected in parallel with the output terminals 0V, Vout- as a filter capacitor to provide a stable voltage at the output terminal Vout-.

[0042] In applications where tight load regulation is required, resistor R1, switch Q1, and Zener diode D1 can be replaced with a single resistor to simplify the circuit.

[0043] Figure 7 Shown with Figure 4 This is a converter similar to the one in , but it can be used in gate driver applications. Figure 6 The same converter as in the example, except that the output terminals Vout+ and Vout- Figure 7 The converter in may further include an output terminal 0V connected to a node between the first capacitor C1 and the second capacitor C2. The output terminal Vout- may be used to turn off a power switch, such as an insulated gate bipolar transistor IGBT, a SiC transistor, or a GaN transistor. The output terminal 0V may be used to turn off these power switches, but noise may increase the voltage on the output terminal 0V to a voltage level that causes the power switch to turn on. The output terminal Vout- may help avoid such undesired turn-on of the power switch.

[0044] Figures 8 to 11 Shows that it is possible to Figure 2 An example of a transformer used with the voltage doubler circuit is shown. Figures 8 to 11 The transformer may be embedded in the substrate, as disclosed in U.S. Application No. 63 / 210,805, the entire contents of which are incorporated herein by reference. Figures 8 to 10 As shown, the primary winding coil 1 may include four turns, and the secondary winding coil 2 may include three turns. However, the primary winding coil 1 and the secondary winding coil 2 may include any number of turns. The secondary winding coil 2 may be tapped to divide the secondary winding coil 2 into a first secondary winding and a second secondary winding. The secondary winding coil 2 may be tapped at any position so that the first secondary winding and the second secondary winding may have any number of turns. The first secondary winding and the second secondary winding may include different or the same number of turns. Since the secondary winding does not require a large number of turns, the primary winding may include a similar number of turns as the secondary winding. The transformer may be embedded in a substrate, wherein the primary winding and the secondary winding include traces and vias within or on the substrate. The transformer may be embedded in any suitable substrate, such as a printed circuit board. Through the embedded structure, the primary winding and the secondary winding may be interwoven, such as Figures 8 to 10 As shown, the 0.4mm distance between the primary and secondary windings is maintained as required by safety standards to enhance isolation. The embedded structure also improves the transformer's gain coupling factor and the converter's load regulation.

[0045] Fig.11 Shown include Figures 8 to 10 An example layout of a PCB for a transformer is shown. As shown, the PCB may have dimensions of approximately 7.86 mm x approximately 8.73 mm, within manufacturing and / or measurement tolerances. Fig.11 The size of the PCBs allows for 216 PCBs to be created from a single mother PCB (which is 155mm x 120mm). Fig.11 Areas around the perimeter of the PCB that do not include copper traces, areas that can include a magnetic core, an isolation barrier between the primary circuit and the magnetic core, an isolation barrier between the secondary circuit and the magnetic core, and areas that can include through-holes in the primary circuit and the secondary circuit are shown. Fig.11 Also included are concentric circles around the via. Starting from the concentric circle closest to the via, the first concentric circle shows the via pad (which can be approximately 330µm, within manufacturing and / or measurement tolerances), the second concentric circle shows the space that can be used to add additional copper, the third concentric circle shows the distance from the via to the core, and the fourth concentric circle shows the isolation barrier from the primary via to the secondary via.

[0046] right Figures 8 to 10The transformer shown is simulated, where the current in the primary and secondary windings is 0.5A, the turns ratio is 3:4, the core height is 1.6mm, the cavity depth is 2.02mm, the primary and secondary windings are made of copper, and the core is made of µi900 (P61 Acme). The simulation shows that the primary winding has an inductance of 1.410µH and a resistance of 46.2mΩ, the secondary winding has an inductance of 2.489µH and a resistance of 54.7mΩ, and the transformer has a coupling coefficient of 0.986 and a mutual inductance of 1.848µH.

[0047] It should be understood that the foregoing description is only for illustrating the present invention. Various substitutions and modifications may be devised by those skilled in the art without departing from the present invention. Therefore, the present invention is intended to include all such substitutions, modifications and variations that fall within the scope of the appended claims.

Claims

1. A circuit comprising: a first output terminal and a second output terminal; A transformer, comprising a primary winding and a secondary winding, wherein the secondary winding comprises a tap, and the tap divides the secondary winding into a first secondary winding and a second secondary winding; a rectifier circuit connected to the secondary winding; as well as A voltage multiplier circuit is connected to the tap such that the voltage multiplier circuit receives a first voltage from both the first secondary winding and the second secondary winding and receives a second voltage only from the second secondary winding.

2. The circuit according to claim 1, wherein The voltage multiplier circuit includes a first capacitor and a second capacitor connected in series with each other and connected in parallel with the first output terminal and the second output terminal.

3. The circuit according to claim 2, wherein: The first voltage is applied to the first capacitor and the second voltage is applied to the second capacitor so that an output voltage between the first output terminal and the second output terminal is a sum of the first voltage and the second voltage.

4. A circuit according to claim 2 or 3, wherein: The rectifier circuit includes a first diode and a second diode.

5. The circuit according to claim 4, wherein: Each of the first capacitor and the second capacitor includes a first end and a second end; Each of the first diode and the second diode includes an anode and a cathode; An anode of the first diode is connected to a first end of the first secondary winding; A cathode of the second diode is connected to a second end of the first secondary winding and a first end of the second secondary winding; a first terminal of the first capacitor connected to a cathode of the first diode and the first output terminal; the second terminal of the first capacitor is connected to the first terminal of the second capacitor; a node defined by a connection between a second terminal of the first capacitor and a first terminal of the second capacitor connected to a second end of the second secondary winding; as well as A second terminal of the second capacitor is connected to the anode of the second diode and the second output terminal.

6. The circuit according to one of claims 1 to 5, further comprising a substrate; wherein The transformer is embedded in the substrate.

7. The circuit according to claim 6, wherein: The primary winding and the secondary winding are interlaced.

8. A converter comprising: a first input terminal and a second input terminal; A circuit according to one of claims 1 to 7; as well as An integrated circuit IC is connected to the first input terminal, the second input terminal and the primary winding.

9. The converter of claim 8, further comprising a load compensation circuit connected to the second input terminal.

10. The converter according to claim 9, wherein: The load compensation circuit comprises: a resistor connected to the second input terminal; and An operational amplifier is connected across the resistor. The converter of claim 8 , further comprising a third output terminal.

12. The converter according to claim 11, wherein The third output terminal is connected to a voltage multiplier circuit.

13. The converter according to claim 11, further comprising a series regulator; wherein: The third output terminal is connected to the series regulator.

14. The converter according to one of claims 8 to 13, wherein During an off period of the IC, a first voltage is applied to the first capacitor; as well as During an on-period of the IC, a second voltage is applied to the second capacitor.

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