Constant modulus waveform synthesis method and device for active sonar detection

Abstract

The invention provides a constant modulus waveform synthesis method for active sonar detection, which is executed by a system, the system comprises a control unit and a generation unit, and the method comprises the following steps: the control unit determines a parameter of a constant modulus waveform according to an index of active sonar detection; the constant modulus waveform is an emission waveform detected by an active sonar; after the control unit enables to transmit a control signal, the generation unit performs calculation according to a preset logic of a waveform category by using a carrier frequency control word and a waveform configuration parameter in parameters to obtain a phase accumulation step length and a phase control word; the generation unit uses a square wave direct digital frequency synthesizer to carry out synthesis according to the phase accumulation step length and the phase control word to obtain a target square wave; the target square wave is used for filtering higher harmonic components by using a low-pass filter to obtain a constant modulus waveform. Therefore, various types of constant modulus waveforms are generated by using the square waveform instead of the analog waveform, on-chip memory and input and output interface resources of the system can be saved, and the integration level of the system is improved.

Description

Technical Field

[0001] The present application relates to the fields of underwater acoustic engineering and information processing technology, and in particular to a constant modulus waveform synthesis method and device for active sonar detection. Background Art

[0002] In the field of active sonar detection, constant modulus waveforms are widely used due to their unique advantages. The amplitude of the constant modulus waveform remains constant over time, which helps to improve the transmission efficiency of the signal and helps to improve the detection and identification capabilities of the target.

[0003] In active sonar detection in different application scenarios, the requirements for the distance resolution and speed resolution of the transmission waveform are also different. For example, for targets with different moving speeds, different constant modulus waveforms need to be used as the transmission waveform for active sonar detection.

[0004] In the actual detection process, since the moving speed of the target to be detected is constantly changing, the active sonar transmitting system is required to have the ability to generate multiple transmitting waveforms, switch the transmitting waveforms, and adjust the waveform parameters.

[0005] At present, most transmission waveform generation schemes use direct digital frequency synthesis (DDS) technology. The most important part of DDS technology is the phase-amplitude conversion module. Common implementation schemes are: (1) taking the output of the phase accumulator as the address of the lookup table, and obtaining the amplitude value corresponding to the phase by looking up the table; (2) using the coordinate rotation digital computer (CORDIC) algorithm to obtain the corresponding amplitude through real-time calculation. DDS technology based on the lookup table method consumes a lot of on-chip memory, and is limited by the capacity of the lookup table, so the types of waveforms generated are relatively limited; while DDS technology based on the CORDIC algorithm has a high algorithm complexity and requires a lot of resources to be implemented on programmable devices. After the traditional DDS technology performs phase-amplitude conversion, it still needs to pass through a digital to analog converter (DAC) or use a dedicated DDS chip and a low-pass filter to restore it to an analog waveform. As the number of transmission channels increases, the cost of chip use will further increase, and the DAC chip will consume more input / output pin (IO) resources, limiting the expansion of the number of transmission channels.

[0006] In summary, there is an urgent need to realize a method for synthesizing active sonar constant modulus waveform with high integration and low resource consumption. Summary of the invention

[0007] In order to solve the above problems, the present application proposes a constant modulus waveform synthesis method and device for active sonar detection. By using square waves instead of analog waveforms to generate various types of constant modulus waveforms, resource consumption can be reduced and system integration can be improved.

[0008] According to a first aspect, the present application provides a constant modulus waveform synthesis method for active sonar detection, the method is performed by a system, the system includes a control unit, a generation unit, the generation unit includes a square wave direct digital frequency synthesizer, the method includes:

[0009] The control unit determines the emission parameters and waveform parameters of the constant mode waveform according to the indicators of active sonar detection; the constant mode waveform is the emission waveform of active sonar detection; the emission parameters include the carrier frequency control word and the emission control signal; the waveform parameters include the waveform category and the waveform configuration parameters;

[0010] After the control unit sends the transmission parameters and waveform parameters to the generation unit, the transmission control signal is enabled;

[0011] In response to the enabling of the transmission control signal, the generation unit uses the carrier frequency control word and the waveform configuration parameters to calculate according to the preset logic of the waveform category to obtain the phase accumulation step and the phase control word; the phase accumulation step is used to control the repetition frequency or pulse interval of the square wave signal, and the phase control word is used to control the initial phase of the square wave signal;

[0012] The generating unit uses a square wave direct digital frequency synthesizer to synthesize according to the phase accumulation step and the phase control word to obtain a target square wave; the target square wave is used to filter out high-order harmonic components using a low-pass filter to obtain a constant modulus waveform.

[0013] Therefore, by using a square wave waveform instead of an analog waveform to generate various types of constant modulus waveforms, it is possible to save on-chip memory and input / output interface resources of the system and improve the level of integration of the system.

[0014] According to a second aspect, the present application provides a constant modulus waveform synthesis device for active sonar detection, the device comprising a control unit and a generation unit, the generation unit comprising a square wave direct digital frequency synthesizer, and the device comprising:

[0015] A control unit is used to determine the emission parameters and waveform parameters of the constant mode waveform according to the indicators of active sonar detection; the constant mode waveform is the emission waveform of active sonar detection; the emission parameters include the carrier frequency control word and the emission control signal; the waveform parameters include the waveform category and the waveform configuration parameters;

[0016] The control unit is further used to enable the transmission control signal after sending the transmission parameters and waveform parameters to the generation unit;

[0017] A generating unit, configured to respond to the enabling of the transmission control signal, and the generating unit uses the carrier frequency control word and the waveform configuration parameter to calculate according to the preset logic of the waveform category to obtain a phase accumulation step and a phase control word; the phase accumulation step is used to control the repetition frequency or pulse interval of the square wave signal, and the phase control word is used to control the initial phase of the square wave signal;

[0018] The generating unit is also used to synthesize the target square wave by using a square wave direct digital frequency synthesizer according to the phase accumulation step and the phase control word; the target square wave is used to filter out the high-order harmonic components by using a low-pass filter to obtain a constant modulus waveform.

[0019] It can be understood that the beneficial effects of the second aspect mentioned above can be found in the relevant description of the first aspect mentioned above, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0021] Figure 1 It is a traditional DDS implementation structure;

[0022] Figure 2 It is a square wave DDS implementation structure provided in the embodiment of the present application;

[0023] Figure 3 It is a structural diagram of a constant modulus waveform generation system of a square wave direct digital frequency synthesizer provided in an embodiment of the present application;

[0024] Figure 4 is a codeword sequence storage structure diagram provided in an embodiment of the present application;

[0025] Figure 5 It is a schematic diagram of the structure of a square wave direct digital frequency synthesizer module provided in an embodiment of the present application;

[0026] Figure 6 It is a schematic diagram of the state machine implementation provided by the embodiment of the present application;

[0027] Figure 7 It is the minimum system schematic diagram of the software system provided in the embodiment of the present application;

[0028] Figure 8 is a software control flow chart of the software system provided in the embodiment of the present application;

[0029] Fig. 9It is a schematic diagram of a constant modulus waveform synthesis method for active sonar detection provided by an embodiment of the present application;

[0030] Fig.10 is a schematic diagram of generating a linear frequency modulation signal provided in an embodiment of the present application;

[0031] Fig.11 is a schematic diagram of generating a hyperbolic frequency modulation signal provided in an embodiment of the present application;

[0032] Fig.12 is a schematic diagram of generating a coded modulation signal provided in an embodiment of the present application;

[0033] Fig.13 It is the single frequency signal spectrum and time-frequency analysis result provided by the embodiment of the present application;

[0034] Fig.14 The linear frequency modulation signal spectrum and time-frequency analysis result provided by the embodiment of the present application;

[0035] Fig.15 is the spectrum and time-frequency analysis result of the hyperbolic frequency modulation signal provided in the embodiment of the present application;

[0036] Fig.16 It is the spectrum and time-frequency analysis result of the binary phase shift keying signal provided in the embodiment of the present application;

[0037] Fig.17 is the spectrum and time-frequency analysis result of the Costas coded frequency hopping signal provided in the embodiment of the present application;

[0038] Fig.18 is a result of matched filtering of a broadband signal generated by a system provided in an embodiment of the present application and a local replica signal;

[0039] Fig.19 It is a schematic diagram of a constant modulus waveform synthesis device for active sonar detection provided in an embodiment of the present application. DETAILED DESCRIPTION

[0040] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0041] In the description of the embodiments of the present application, words such as "exemplary", "for example" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary", "for example" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary", "for example" or "for example" is intended to present related concepts in a concrete way.

[0042] In the description of the embodiments of the present application, the term "and / or" is merely a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, B exists alone, and A and B exist at the same time. In addition, unless otherwise specified, the term "multiple" means two or more. For example, multiple systems refers to two or more systems, and multiple screen terminals refers to two or more screen terminals.

[0043] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. The terms "include", "comprises", "has" and their variations all mean "including but not limited to", unless otherwise specifically emphasized.

[0044] In active sonar detection, different application scenarios require different distance resolution and velocity resolution of the transmitted waveform. The following are several constant modulus waveforms used as the transmitted waveform in active sonar detection:

[0045] Single frequency (continuous wave, CW) signal: In high-speed target detection, CW signal is selected because of its high speed resolution and ability to effectively avoid the reverberation Doppler range.

[0046] Linear frequency modulation (LFM) signal: Suitable for low-speed target detection. LFM signal improves distance resolution through matched filtering technology.

[0047] Hyperbolic frequency modulation (HFM) signal: HFM signal has a large Doppler tolerance and time-bandwidth product, which makes it excellent in high-speed target detection.

[0048] Binary phase shift keying (BPSK) and Costas coded frequency hopping signals: These broadband signals provide excellent range and velocity resolution in active sonar detection due to their large time-bandwidth product.

[0049] In the actual detection process, since the moving speed of the target is constantly changing, the active sonar transmitting system is required to have the ability to generate multiple transmitting waveforms for different moving speeds, switch the transmitting waveforms, and adjust the waveform parameters.

[0050] Currently, most transmission waveform generation schemes use DDS technology. The most important part of DDS technology is the phase-amplitude conversion module. Common implementation schemes are: (1) taking the output of the phase accumulator as the address of the lookup table, and obtaining the amplitude value corresponding to the phase by looking up the table; (2) using the CORDIC algorithm to obtain the corresponding amplitude through real-time calculation. DDS technology based on the lookup table method consumes a lot of on-chip memory, and is limited by the capacity of the lookup table, so the types of waveforms generated are relatively limited; while DDS technology based on the CORDIC algorithm has a high algorithm complexity, and it requires a lot of resources to implement it on a programmable device.

[0051] For example, Figure 1 A traditional DDS implementation structure is shown in FIG.

[0052] like Figure 1 As shown, the system includes a clock signal f clk , the clock signal corresponds to the clock cycle. The initial count value of the phase accumulator is 0, and a phase accumulation step K is accumulated in each clock cycle. In order to control the initial phase of the generated signal, the M-bit phase accumulator count value and the phase control word P are superimposed in the adder, and the high N bits of the output result are taken as the lookup table address of the waveform memory (ROM) (N is related to the storage depth of the memory), completing the conversion from phase to amplitude and obtaining the waveform sample S(n). Then, the signal S(t) is output through a D-bit digital-to-analog converter (DAC) and a low-pass filter.

[0053] In addition, in engineering applications, active sonar transmission systems generally convert the waveform signal to be transmitted into a pulse-width modulation (PWM) signal through a comparator and a triangle wave generating circuit, and drive a digital power amplifier to amplify the transmission signal, which increases the device cost in the process.

[0054] In view of the above-mentioned existing problems, the embodiment of the present application switches the waveform category of the constant modulus waveform according to the active sonar detection index, and adjusts the waveform configuration parameters corresponding to the waveform category; for different categories of constant modulus waveforms, different preset logic calculations are performed according to the waveform configuration parameters to obtain the corresponding phase accumulation step and phase control word; the phase accumulation step and phase control word are input into the square wave direct digital frequency synthesizer to obtain the target square wave; the target square wave is used to obtain the constant modulus waveform by filtering out the high-order harmonic components using a low-pass filter. Since the square wave direct digital frequency synthesizer used in this scheme only includes a phase accumulator, a register and an adder, the square wave direct digital frequency synthesizer is used to generate various categories of constant modulus waveforms that meet the active sonar detection index, which can save the system's on-chip memory and input and output interface resources, and improve the system's integration level.

[0055] For example, Figure 2 A square wave DDS implementation structure provided in an embodiment of the present application is shown in FIG.

[0056] like Figure 2 As shown, compared to Figure 1 The traditional DDS shown uses a register to store the current value of the phase accumulator for use in the next clock cycle. The lookup table and phase-amplitude conversion device are omitted, and the most significant bit (MSB) of the adder is directly taken as the output. Finally, the signal output by the MSB is amplified to a level suitable for driving the subsequent circuit. Alternatively, the square wave signal output by the MSB is smoothed to remove high-frequency noise and generate the required sine wave or other waveform output S(t).

[0057] For example, Figure 3 Detailed description of the invention The structure diagram of the constant modulus waveform generation system of the square wave direct digital frequency synthesizer provided in the embodiment of the present application is shown in FIG.

[0058] like Figure 3 As shown, this application adopts a method of software and hardware collaborative design.

[0059] In terms of hardware design, the Zynq UltraScale+MPSoC (hereinafter referred to as MPSoC) is used as the main control chip. On the programmable logic (PL) side, it serves as a generation unit to generate CW and LFM signals commonly used in active sonar detection applications, as well as new system signals with large time-bandwidth products such as HFM, BPSK, and Costas coded frequency-hopping signals. On the processing system (PS) side of the MPSoC, it serves as a control unit and uses the advanced eXtensible interface-full (AXI-full) bus as a parameter configuration interface to flexibly configure the transmission parameters and waveform parameters required to generate the waveform.

[0060] To realize the parameter configuration and generation functions of multiple waveforms on MPSoC, the tasks to be completed mainly include: configuration and caching of transmission parameters and waveform parameters, clock frequency division, generation of phase accumulation step and phase control word, realization of pulse DDS, and realization of coding codeword control waveform parameter changes. Transmission parameters include carrier frequency control word and transmission control signal. Waveform parameters include waveform category and waveform configuration parameters.

[0061] Exemplarily, the system clock frequency f is set by the clock management module clk=100MHz, the DDS module includes a DDS output multiplexer module with 8 waveform output channels. The waveform category of each channel is the same, and the waveform configuration parameters of each channel can be independently configured. The output signal is a complementary square wave signal with dead time, which is used to directly drive a digital push-pull power amplifier. For example, Figure 3 The 8-channel DDS signals output by the DDS module are directly input into the pulse width modulation (PWM) driver module, and then connected to the transmitter after being processed by the class D amplifier and low-pass filter. For example, the PWM driver module generates PWM transmission signals (pwm_h and pwm_l) for waveform transmission, and generates PWM control signals (recv_vaild and pwm_valid) for transmission and reception isolation.

[0062] Specifically, the PS side of the system mainly obtains the indicators of active sonar detection according to the sonar workflow control logic, and then determines the emission parameters of the constant mode waveform and calculates / reads the waveform parameters according to the indicators, and then configures the parameters of the PL side of the system.

[0063] The PL side of the system mainly includes the following programmable logic hardware designs:

[0064] (1) Input parameter register module: The waveform generation method based on square wave DDS involves transmission parameters and waveform parameters, such as waveform type, carrier frequency control word K c , transmit pulse width, transmit trigger signal, etc. The design of the input parameter register module involves two aspects: data storage structure and read-write control logic. In terms of data storage structure, in actual design, the input parameter register module is implemented using the block random access memory (BRAM) on the programmable logic side. Its depth is determined by the number of parameters configured, and the width is uniformly set to 32 bits. Under the action of the BRAM controller, the transmit parameters and waveform parameters are stored in the BRAM according to the linear address.

[0065] Exemplarily, the address mapping relationship is shown in Table 1.

[0066] Table 1 Transmit parameter and waveform parameter cache address mapping

[0067]

[0068] In order to generate coded signals such as BPSK and Costas, a codeword sequence consisting of coded codewords needs to be pre-stored in the BRAM.

[0069] For example, Figure 4 A codeword sequence storage structure diagram provided in an embodiment of the present application is shown.

[0070] like Figure 4As shown in FIG. 1 , a continuous space is opened up in the BRAM for storing the codeword sequence. For example, for the codeword sequence including 0 to (L-1), each codeword occupies 4 bytes of space and is stored continuously starting from address space 0. The storage addresses include 3 bytes, 7 bytes, ..., (4L-5) bytes, and (4L-1) bytes.

[0071] In terms of read and write control, when the transmission parameters and waveform parameters need to be configured, the program running on the PS side writes the transmission parameters and waveform parameters into the corresponding address of the BRAM; when the configuration is completed, the program on the PS side writes a high level to the transmission control signal register. At this time, the waveform generating unit detects the rising edge signal of the transmission control signal included in the transmission parameters, reads the parameters in the corresponding register, and then starts the DDS module to generate the transmission waveform.

[0072] (2) DDS module: The DDS module is the core of the entire waveform generation module and is mainly composed of four parts: single frequency module, LFM module, HFM module, and DDS output multiplexing module. The first three modules generate the phase accumulation step and phase control word corresponding to the single frequency signal, LFM and HFM signals according to the waveform parameters, and use Figure 2 The square wave DDS module shown generates the target square wave. The DDS output multiplexer module realizes the output of multiple target square waves.

[0073] For example, Figure 5 A schematic diagram of the structure of a square wave direct digital frequency synthesizer module provided in an embodiment of the present application is shown.

[0074] like Figure 5 As shown, the single frequency module, LFM module, and HFM module share a common Figure 2 The square wave DDS module shown. When the DDS module receives the rising edge of the transmission trigger signal, it first reads the waveform category register to determine the waveform category of the transmission waveform, and then reads the waveform configuration parameters to send them to the module corresponding to the waveform category for processing. Next, the signal output multi-way selection module selects the phase accumulation step K and the phase control word P determined by the module corresponding to the waveform category to input the square wave DDS module to generate the target square wave. Among them, the phase accumulation step is used to control the repetition frequency or pulse interval of the square wave signal, which is very important when designing a pulse waveform, because the frequency and interval of the pulse directly affect the resolution and detection capability of the system. The phase control word is used to control the initial phase of the square wave signal to achieve a specific pulse sequence, which is particularly important in radar and communication systems, because the phase of the pulse can affect the transmission characteristics of the signal and the recognition capability of the target.

[0075] (3) Coded modulation signal control module: The coded modulation signal module is used to generate BPSK and Costas coded frequency hopping signals. It includes a BPSK generation module, a Costas frequency hopping generation module, and a state machine module. The state machine module controls the codewords to be output in a certain order according to the input codeword sequence, the number of codewords, and the duration of a single codeword, and ensures that the codewords are output in a certain order within a T c The output code word remains unchanged within the time to control the frequency and phase of the generated single-frequency signal.

[0076] For example, Figure 6 A schematic diagram of a state machine implementation provided by an embodiment of the present application is shown.

[0077] like Figure 6 As shown, the state machine is divided into 3 states in total, including the idle (IDLE), send (STATE_SEND) and finish (STATE_FINISH) states, where the idle state is the initial state of the state machine, the send state is the state when the state machine sends each codeword in the codeword sequence, and the finish state is the state when the state machine completes the sending. Specifically, the workflow of the state machine is as follows:

[0078] The IDLE state is the initial state. After receiving the pwm_start=0 message, it is responsible for judging whether the PWM enable flag signal pwm_vaild and the coding modulation enable signal code_arr_en are valid at the same time. If they are valid at the same time, it jumps to the next state STATE_SEND, otherwise it continues to stay in this state;

[0079] STATE_SEND is the codeword sending state. When the state machine jumps to this state, it first outputs the codeword data_seq_reg_i in a certain timing according to the input codeword number parameter num_data_seq, the duration parameter code_width of each codeword, and the codeword sequence data_seq, and controls the duration of the output codeword. The specific implementation code is as follows:

[0080]

[0081] STATE_FINISH is the end state. When all codewords in the codeword sequence data_seq are output, it marks the end of the pulse width duration period of a coded signal. At this time, the state machine needs to determine whether the transmission start signal pwm_start has been reset. If reset, it jumps to the initial state lDLE, otherwise maintains the original state. The purpose of this is to avoid continuously triggering the transmission state when the transmission start signal pwm_start is always at a high level, so as to ensure that only one transmission pulse is generated in a transmission interval of the active sonar.

[0082] When the waveform type is BPSK, the input multiplexer inputs the codeword sequence to the BPSK generation module to achieve binary phase shift keying modulation of the output waveform. When the waveform type is Costas, the input multiplexer inputs the codeword sequence to the Costas frequency hopping generation module to generate a frequency hopping signal. The output signal is then input to the single frequency module in the DDS module to generate a coded modulation signal.

[0083] In terms of software design, in order to improve the system integration and realize module reuse, the waveform generation unit on the PL side is encapsulated as an intellectual property (IP) core. In order to give full play to the advantages of MPSoC on-chip interconnect bus and heterogeneity, this paper chooses to run C language programs in the ARM core on the PS side, configure IP core registers through the AXI-full bus, and realize flexible configuration of transmission parameters and waveform parameters.

[0084] For example, Figure 7 The minimum system schematic diagram of the software system provided by the embodiment of the present application is shown in FIG.

[0085] like Figure 7 As shown in the figure, in the Vivado design suite provided by Xilinx, create a Block Design, add the Zynq MPSoC IP, waveform generation IP and corresponding peripheral modules, and realize the communication between the PS and PL through the AXI-full bus to form an embedded hard-core minimum system. Write C language application code in the SDK tool, and complete the configuration of the waveform generation IP core by reading and writing registers.

[0086] For example, Figure 8 The software control flow chart of the software system provided by the embodiment of the present application is shown in FIG. Figure 8 As shown, it mainly includes the following steps:

[0087] (1) Before the active sonar system starts working, the peripherals of the Zynq MPSoC are initialized by the application running on the PS side, and then the registers of the waveform generation module IP core are initialized.

[0088] (2) After initialization, the active sonar detection task starts a transmission. At this time, the IP core reads the waveform type register. If the generated signal type is a CW signal, it directly configures the carrier frequency control word, the transmission pulse width, and the initial phase register (that is, writes the phase control word), and then writes a high level to the transmission control signal register to start a transmission.

[0089] (3) If the transmission signal is a frequency modulated signal, it is also necessary to configure the frequency modulation parameter value, then configure the carrier frequency control word, transmission pulse width and initial phase register, and write a high level to the transmission control signal register to start a transmission.

[0090] (4) If the transmission signal is a coded modulation signal such as BPSK or Costas frequency hopping, it is necessary to first configure the coding signal parameter register and write parameters such as the number of code words, code word width and code word sequence, or frequency hopping bandwidth, then configure the carrier frequency control word (i.e., center frequency), transmission pulse width and initial phase register, and write a high level to the transmission control signal register to start a transmission.

[0091] (5) After transmitting a pulse, the system delays a transmission pulse width, switches to the receiving mode to receive the echo data, and performs real-time processing and analysis, followed by target detection and parameter estimation.

[0092] (6) If the transmission parameters and waveform parameters remain unchanged, a high level can be directly written to the transmission control signal register to start the next transmission. The above process is repeated to complete the target detection task of multiple detection cycles.

[0093] (7) If the detection mission is completed, the above cycle process is stopped, and the sonar work task is destroyed or suspended, waiting for the next detection mission to be initiated.

[0094] Therefore, through the above-mentioned software and hardware collaborative design method, the advantages of strong channel scalability, high frequency resolution and fast frequency switching speed of the constant modulus waveform synthesis method based on square wave DDS can be fully utilized. Compared with the traditional DDS architecture, this solution saves on-chip memory and input and output interface resources, has strong channel scalability, high integration and modularity, and provides a reference for the generation of transmission waveforms for active sonar detection.

[0095] Next, based on the above analysis, a constant modulus waveform synthesis method for active sonar detection provided in an embodiment of the present application is introduced in detail.

[0096] For example, Fig. 9 FIG. 1 is a schematic diagram of a constant modulus waveform synthesis method for active sonar detection provided by an embodiment of the present application. Fig. 9 As shown, the method is performed by a system, the system includes a control unit, a generation unit, the generation unit includes a square wave direct digital frequency synthesizer, and the method includes the following steps:

[0097] Step S901, the control unit determines the transmission parameters and waveform parameters of the constant mode waveform according to the indicators of active sonar detection; the constant mode waveform is the transmission waveform of active sonar detection; the transmission parameters include the carrier frequency control word and the transmission control signal; the waveform parameters include the waveform category and the waveform configuration parameters.

[0098] In this embodiment, the constant modulus waveform is a transmitting waveform of active sonar detection. The waveform categories of the constant modulus waveform include single frequency signal, linear frequency modulation signal, hyperbolic frequency modulation signal, binary phase shift keying signal, and Costas coded frequency hopping signal.

[0099] It can be understood that different waveform categories correspond to different waveform configuration parameters. The transmission parameters include a carrier frequency control word and a transmission control signal. The carrier frequency control word is used to determine the center frequency of the constant modulus waveform. The transmission control signal is used to start the generation and transmission of the transmission waveform.

[0100] Step S902: After the control unit sends the transmission parameters and waveform parameters to the generation unit, the transmission control signal is enabled.

[0101] In this embodiment, after the control unit sends the transmission parameters and waveform parameters to the generation unit, it enables the transmission control signal to start the generation unit to generate the target square wave.

[0102] Step S903, in response to the enablement of the transmission control signal, the generation unit uses the carrier frequency control word and the waveform configuration parameters to calculate according to the preset logic of the waveform category to obtain the phase accumulation step and the phase control word; the phase accumulation step is used to control the repetition frequency or pulse interval of the square wave signal, and the phase control word is used to control the initial phase of the square wave signal.

[0103] In this embodiment, different waveform categories correspond to different preset logic calculations. The generation unit uses the carrier frequency control word and the waveform configuration parameters to perform calculations according to the preset logic of the waveform category to obtain the phase accumulation step and the phase control word.

[0104] Step S904, the generating unit uses a square wave direct digital frequency synthesizer to synthesize according to the phase accumulation step and the phase control word to obtain a target square wave; the target square wave is used to filter out high-order harmonic components using a low-pass filter to obtain a constant modulus waveform.

[0105] Exemplarily, the system includes a preset number of generation units, the waveform parameters include a preset number of waveform categories and waveform configuration parameters, the preset number of waveform configuration parameters correspond to the same waveform category, and each generation unit corresponds one-to-one to each waveform category and waveform configuration parameter.

[0106] After the control unit enables the transmission of the control signal, the generation units of the preset number of paths respectively use the carrier frequency control word and the corresponding waveform configuration parameters to perform calculations according to the preset logic of the corresponding waveform category.

[0107] Specifically, for each generation unit:

[0108] First, the waveform category includes a single-frequency signal, and the waveform configuration parameters of the single-frequency signal include a single-frequency phase control word. When the waveform category is determined to be a single-frequency signal, the carrier frequency control word is used as the phase accumulation step; and the single-frequency phase control word is used as the phase control word.

[0109] Exemplarily, the implementation principle of generating a single-frequency signal based on a square wave DDS is as follows:

[0110] Consider a signal s(t) with a carrier frequency of f 0 , the amplitude is A, the transmission pulse width is T, and the initial phase is It can be expressed as:

[0111]

[0112] With f clk By sampling it at the sampling frequency, the discretized signal phase can be obtained:

[0113]

[0114] In formula (2), N = int(T*f clk ) is the number of sampling points, and int(·) represents the rounding function. When DDS is implemented in FPGA and fixed-point processor, it needs to be processed in fixed-point mode. Assuming that the number of quantization bits is N, the phase in the digital domain is obtained:

[0115]

[0116] From equation (3), we can see that the digital phase Φ n and the true phase There is a certain mapping relationship: when the initial phase When n =0 corresponds to the true phase Φ n =2 N Corresponding to the real phase Furthermore, the instantaneous frequency expression of the signal in the discrete domain can be obtained as:

[0117]

[0118] Let K = F(n), N corresponds to the bit width of the phase accumulator, K is the phase accumulation step, called the frequency control word, which is used to control the frequency of the generated signal; P is called the phase control word, which can be used to set the initial phase of the generated signal. Figure 1As shown, the initial count value of the phase accumulator is 0, and a frequency control word K is accumulated in each clock cycle. To control the initial phase of the generated signal, the accumulator count value is added to the phase control word P, and the high M bits of the output result are taken as the lookup table address of the waveform memory (M is related to the storage depth of the memory) to complete the conversion from phase to amplitude. The signal is then output through the DAC and low-pass filter.

[0119] The pulse output DDS implementation structure is as follows Figure 2 As shown, compared with the traditional DDS, the phase-to-amplitude conversion device is omitted, and the most significant bit (MSB) of the phase accumulation value is directly taken as the output, where the value of the MSB is determined by the following conditions:

[0120]

[0121] In formula (5), n is the value of the phase accumulator. When the MSB is used as the output value of the DDS, a rectangular pulse signal f(t) with a duty cycle of 50% can be obtained.

[0122] In order to further analyze the relationship between generating square waves and generating sine waves, the Fourier series expansion of the rectangular pulse signal f(t) can be obtained as follows:

[0123]

[0124] In formula (6), f 0 is the fundamental frequency of the output square wave signal, corresponding to the frequency of the single-frequency signal generated by the pulse output DDS method. From formula (6), it can be obtained that the spectrum of the square wave signal with an amplitude of 1 and a duty cycle of 50% only contains DC components and odd harmonics, and the amplitude of all even harmonics is 0, and the amplitude decreases with the increase of frequency. By filtering out the high-order harmonic components through a low-pass filter, the required sinusoidal signal can be obtained.

[0125] Secondly, the system includes a clock signal, and the clock signal corresponds to a clock cycle. The waveform category includes a linear frequency modulation signal, and the waveform configuration parameters of the linear frequency modulation signal include a phase difference accumulation step and a linear frequency modulation phase control word. When the waveform category is determined to be a linear frequency modulation signal, in each clock cycle, the phase difference accumulation step and the current phase difference are input into the phase difference accumulator for addition to obtain the phase difference of the clock cycle and store it in the first register; the current phase difference is the phase difference stored in the first register in the previous clock cycle of the clock cycle, and the data storage length of the first register is M bits; the high N bits of the clock cycle phase difference and the carrier frequency control word are input into the first adder for addition to obtain the phase accumulation step; N is less than M; the linear frequency modulation phase control word is used as the phase control word. The initial phase of the phase difference accumulator is 0.

[0126] Exemplarily, the implementation principle of generating a linear frequency modulation signal based on a square wave DDS is as follows:

[0127] Linear frequency modulation signal is the most commonly used broadband signal in the field of active sonar detection. Its energy is evenly distributed within the frequency band. High-precision ranging can be performed through matched filtering. Its time domain expression is as follows:

[0128]

[0129] Where A is the amplitude, which is uniformly set to 1 in the following text; f b is the frequency modulation starting frequency, f e is the frequency modulation end frequency, T is the pulse passing width, is the initial phase, the default is 0; k=(f e -f b ) / T is the linear frequency modulation coefficient. b <f e When f b >f e When , it is a down-frequency modulation signal, and the frequency modulation coefficient k is less than 0.

[0130] The instantaneous frequency expression of the LFM signal can be obtained as:

[0131]

[0132] Discretize it and put it into equation (4) to get the instantaneous frequency control word expression of the LFM signal:

[0133]

[0134] From the above formula (9), we can see that the frequency control word of LFM consists of two parts. The first part determines its starting scanning frequency, which is consistent with the single-frequency signal; the second part is a term that grows linearly with the clock cycle and can be implemented using an accumulator. Taking k>0 as an example, let K c =2 N ·f b / f clk , To K 2 Performing a first-order difference operation, we can get the rate of change as:

[0135]

[0136] Perform a fixed-point operation on it and set ΔK 2 Expand 2 M times, the phase difference accumulation step of LFM can be obtained as:

[0137]

[0138] Further, the system includes a clock signal, and the clock signal corresponds to a clock cycle. The waveform category includes a hyperbolic frequency modulation signal, and the waveform configuration parameters of the hyperbolic frequency modulation signal include a first phase accumulation step control parameter, a second phase accumulation step control parameter, and a hyperbolic frequency modulation phase control word. When the waveform category is determined to be a hyperbolic frequency modulation signal, in each clock cycle, the current counting result is input into the pulse counter for addition operation, and the counting result of the clock cycle is obtained and stored; the current counting result is the counting result stored by the pulse counter in the previous clock cycle; the counting result and the first phase accumulation step control parameter are input into the second adder / subtractor for addition; and the addition result of the second adder / subtractor and the second phase accumulation step control parameter are input into the integer divider for division operation; and the operation result of the integer divider and the carrier frequency control word are input into the third adder / subtractor for addition to obtain the phase accumulation step; and the hyperbolic frequency modulation phase control word is used as the phase control word.

[0139] Exemplarily, the implementation principle of generating a hyperbolic frequency modulation signal based on a square wave DDS is as follows:

[0140] Hyperbolic frequency modulation signal is a nonlinear frequency modulation signal with Doppler invariance. The time domain expression of HFM signal is:

[0141]

[0142] In formula (12), k = B / (f b ·f e ·T), t′=f e ·T / B; f b is the signal starting frequency, f e is the signal cutoff frequency, T is the pulse duration, A is the signal amplitude, and the default value is 1. When BT≥1, the signal bandwidth B=f e -f b The derivation process is similar to that of the LFM signal, and the frequency control word expression of the HFM signal can be obtained as:

[0143]

[0144] In the above formula, R 2 =2 N (f b ·f e ·T) / B,Q=f clk ·f e T / B, n is the sampling point index value. When implemented in FPGA, it corresponds to the number of clocks. Therefore, if the pulse output DDS method is used to generate HFM signals, it is only necessary to select the HFM frequency modulation parameter R 2(second phase accumulation step control parameter) and Q (first phase accumulation step control parameter), and implement integer division, so that the frequency control word K (n) changes according to a certain rule.

[0145] It should be noted that for HFM signals, the higher the center frequency, the more difficult it is to obtain when the bandwidth is limited, and the signal characteristics will tend to be close to LFM signals. Therefore, in high-frequency applications, a broadband signal is generally generated in the low-frequency band, and then multiplied by the carrier frequency to modulate to the high-frequency band to obtain a narrowband HFM waveform in the high-frequency band. The corresponding phase accumulator then accumulates a carrier frequency control word K c =2 N ·f c / f clk , which can give full play to the advantages of nonlinear modulation signals. The frequency control word at this time is:

[0146]

[0147] Furthermore, the generating unit includes a binary phase shift keying signal generating module. The waveform category includes a binary phase shift keying signal, and the waveform configuration parameters of the binary phase shift keying signal include a codeword sequence, the number of codewords, and the codeword duration. When it is determined that the waveform category is a binary phase shift keying signal, the codeword sequence, the number of codewords, and the codeword duration are input into the state machine so that the state machine outputs each codeword in the codeword sequence in sequence according to the number of codewords and the codeword duration; each codeword output in sequence is input into the binary phase shift keying signal generating module to generate a corresponding binary phase shift keying signal, that is, a phase control word; and the carrier frequency control word is used as the phase accumulation step.

[0148] Furthermore, the generating unit includes a frequency hopping bandwidth input Costas frequency hopping generation module. The waveform category includes a Costas coded frequency hopping signal, and the waveform configuration parameters of the Costas coded frequency hopping signal include the number of code words, the code word duration, and the frequency hopping bandwidth. When it is determined that the waveform category is a Costas coded frequency hopping signal, the first code word sequence, the number of code words, and the code word duration pre-stored in the system are input into the state machine, so that the state machine outputs each code word in the code word sequence in sequence according to the number of code words and the code word duration; each code word, carrier frequency control word, and frequency hopping bandwidth output in sequence are input into the Costas frequency hopping generation module to generate a corresponding frequency hopping signal, that is, a phase accumulation step; and the phase control word is set to 0.

[0149] Exemplarily, the implementation principle of generating a coded modulation signal based on a square wave DDS is as follows:

[0150] BPSK signal and Costas signal are two commonly used coded modulation signals in the field of active sonar. They have large time-bandwidth product and good anti-reverberation ability, and can obtain good time domain resolution through matched filtering technology. The time domain expression of BPSK signal is:

[0151] s(t)=c(t)sin(2πf c t) (15)

[0152]

[0153] Where c(t) is the binary modulation sequence, N is the number of codewords, T c is the codeword width, T is the total signal length, and T = NT c , c n =1 (indicates phase is 0) or -1 (indicates phase is π). The main characteristics of BPSK signal depend on the coding sequence C N ={c 1 , c 2 , …, c N}, the coding sequence can be reasonably designed according to the detection index requirements.

[0154] Costas coded frequency hopping signal is a continuous spectrum pulse, which is composed of short CW pulses at different discrete frequencies. In the field of active sonar applications, Costas coded sequence C is generally used, which is composed of integers 1 to N that satisfy the non-repetitive arrangement of the difference between the same interval elements. N ={c 1 , c 2 , …, c N}, modulate the frequency of the sub-pulse. Based on the center frequency f 0 and bandwidth B, using each element c in the Costas sequence n Can be used to generate sub-pulse frequencies:

[0155]

[0156] The sub-pulse is p n (t), the duration of the sub-pulse is T c , there are N sub-pulses with a length of T = NT c The analytical form of the Costas waveform is:

[0157]

[0158] The neutron pulse p n (t) is expressed as:

[0159] p n (t) = sin(2πf n t), 0≤t≤Tc (19)

[0160] Comparing the expressions of BPSK, Costas and single frequency signals, it can be seen that if the pulse output DDS method is used to generate BPSK or Costas coded frequency hopping signals, it is necessary to follow the given coding sequence C N The element c in n Control the frequency f of the single frequency signal 0 Or the initial phase This can be easily implemented using the state machine in the hardware description language.

[0161] In one implementation, a state machine for generating a coded modulated signal includes idle, sending, and completed states, wherein the idle state is the initial state of the state machine, the sending state is the state in which the state machine is when sending each codeword in a codeword sequence, and the completed state is the state in which the state machine is when completing the sending of each codeword in the codeword sequence.

[0162] In one implementation, the block random access memory included in the system pre-sets storage address spaces for transmission parameters and waveform parameters respectively.

[0163] Optionally, the block random access memory also pre-stores a code word sequence for generating a Costas coded frequency hopping signal.

[0164] In one implementation, the target square wave is transmitted to a pulse width modulation driving module for pulse width modulation to obtain a square wave signal to be filtered; the square wave signal to be filtered is input into a low-pass filter to filter out high-order harmonic components to obtain a constant modulus waveform.

[0165] In one implementation, the target square wave is transmitted to a pulse width modulation driving module according to the transmission pulse width to perform pulse width modulation.

[0166] In this embodiment, after determining the phase accumulation step and phase control word of different constant modulus waveforms, the generation unit uses Figure 2 The square wave DDS structure shown is synthesized according to the phase accumulation step and the phase control word to obtain a target square wave. The target square wave is used to filter out high-order harmonic components using a low-pass filter to obtain a constant modulus waveform.

[0167] Specifically, the phase accumulation step and the current phase are input to the phase accumulator for addition, the phase of the clock cycle is obtained and stored in the second register; the current phase is the phase stored in the second register in the previous clock cycle; the phase and the phase control word are input to the fourth adder for addition, and the most significant bit of the addition result of the fourth adder is output; the target square wave is generated according to the most significant bit outputted in the preset number of clock cycles. The initial phase of the phase accumulator is 0.

[0168] In one implementation, the generation units of the preset number of paths respectively use square wave direct digital frequency synthesizers to perform synthesis according to corresponding phase accumulation steps and phase control words to obtain target square waves of the preset number of paths.

[0169] Finally, the preset number of target square waves are used to filter out high-order harmonic components using low-pass filters to obtain the preset number of constant modulus waveforms.

[0170] Therefore, the system designed by this scheme can generate CW, LFM, HFM, BPSK and Costas signals under the premise of saving on-chip memory and FPGA IO resources on the programmable logic side, and realize flexible configuration of parameters such as phased transmission, signal pulse width, transmission bandwidth and codeword sequence on the processor side. The broadband signal generated by the system has a good correlation with the local matching replica signal, which can meet the high-precision ranging requirements of active sonar. The architecture has strong portability and scalability, simple hardware implementation, low resource consumption, and high integration. For constant modulus waveforms with more complex waveform systems and the need to expand more transmission channels, only the corresponding expansion architecture is needed to realize the transmission of modulated signals and the expansion of channels, which provides a design reference for the software and modular design of sonar.

[0171] For example, Fig.10 Schematic diagram of linear frequency modulation signal generation provided by an embodiment of the present application is shown in FIG.

[0172] like Fig.10 As shown, the generation of linear frequency modulation signal is divided into three stages:

[0173] In the first stage, in each clock cycle, the phase difference is accumulated by the step size R 1 The phase difference accumulator is input, and the phase difference accumulator accumulates according to the phase difference accumulation step length to obtain the phase difference of each clock cycle and store it.

[0174] In the second stage, the high N bits of the phase difference and the carrier frequency control word are input into the first adder / subtractor for addition to obtain the phase accumulation step length. N is less than M. The linear frequency modulation phase control word is used as the phase control word.

[0175] In the third stage, the phase accumulation step is input into the phase accumulator of the square wave direct digital frequency synthesizer, so that the phase accumulator accumulates according to the phase accumulation step, obtains the phase of each clock cycle and stores it. The phase and phase control word are input into the adder of the square wave direct digital frequency synthesizer for addition, and the most significant bit of the addition result is output. The target square wave is generated according to the most significant bit outputted according to the preset number of clock cycles; the target square wave is used to filter out the high-order harmonic components using a low-pass filter to obtain a constant modulus waveform.

[0176] For example, Fig.11A schematic diagram of generating a hyperbolic frequency modulation signal provided in an embodiment of the present application is shown in FIG.

[0177] like Fig.11 As shown, the generation of hyperbolic FM signal is divided into four stages:

[0178] In the first stage, a pulse counter is used to count in each clock cycle and the counting result of each clock cycle is stored. The counting result and the first phase accumulation step length control parameter Q are input into the second adder / subtractor for addition.

[0179] In the second stage, the addition result of the second adder / subtractor is added to the second phase accumulation step control parameter R 2 Input integer divider to perform division operation.

[0180] In the third stage, the result of the division operation and the carrier frequency control word are input into the third adder for addition to obtain the phase accumulation step length. The hyperbolic frequency modulation phase control word is used as the phase control word.

[0181] In the fourth stage, the phase accumulation step is input into the phase accumulator of the square wave direct digital frequency synthesizer, so that the phase accumulator accumulates according to the phase accumulation step to obtain the phase of each clock cycle, and the phase and phase control word are input into the adder of the square wave direct digital frequency synthesizer for addition, and the most significant bit of the addition result is output. The target square wave is generated according to the most significant bit outputted in the preset number of clock cycles; the target square wave is used to filter out the high-order harmonic components using a low-pass filter to obtain a constant modulus waveform.

[0182] For example, Fig.12 A schematic diagram of generating a coded modulation signal provided in an embodiment of the present application is shown in FIG.

[0183] like Fig.12 As shown, when the coded modulation signal is a binary phase shift keying signal, the codeword sequence, the number of codewords, and the codeword duration are input into the state machine, so that the state machine sequentially outputs each codeword in the codeword sequence according to the number of codewords and the codeword duration; each codeword output sequentially is input into the binary phase shift keying signal generating module to generate a corresponding binary phase shift keying signal, that is, a phase control word; and the carrier frequency control word is used as the phase accumulation step.

[0184] When the coded modulation signal is a Costas coded frequency hopping signal, the first codeword sequence, the number of codewords, and the codeword duration pre-stored in the system are input into the state machine, so that the state machine sequentially outputs each codeword in the codeword sequence according to the number of codewords and the codeword duration; each codeword, carrier frequency control word, and frequency hopping bandwidth output sequentially are input into the Costas frequency hopping generation module to generate a corresponding frequency hopping signal, that is, a phase accumulation step; and the phase control word is set to 0.

[0185] Finally, the modulation signal output multiplexer selects the corresponding phase accumulation step and phase control word according to the waveform type. Figure 2 The square wave DDS module shown generates a coded modulated signal.

[0186] Exemplarily, the board debugging method is used to verify the effectiveness of the waveform generation module in generating various waveforms, and the MPSoC pin output waveform data is collected and analyzed. Different waveform parameters are set by the host computer and loaded into the MPSoC via Ethernet to generate various waveforms. The DDS module output signal is output through the pin, and the output signal is captured using an oscilloscope and saved as a waveform file for data analysis.

[0187] Five basic waveforms are generated, and the experimental parameter settings are shown in Table 2. The BPSK signal is modulated by an M sequence with a length of 127, and the sequence is generated by a 7th-order feedback polynomial with polynomial coefficients of {0, 0, 0, 1, 0, 0, 1}; the Costas coded frequency modulation signal is modulated by a 10-element Costas sequence, and the coded sequence content is C N ={2, 4, 8, 5, 10, 9, 7, 3, 6, 1}.

[0188] Exemplarily, the waveform experiment parameters are shown in Table 2:

[0189] Table 2 Waveform experiment parameters

[0190]

[0191] In order to verify the validity of the generated waveforms, spectrum and time-frequency analysis are performed on the collected signals of the above-mentioned various waveforms. Figure 13-17 These are the spectra and time-frequency analysis results of CW, LFM, HFM, BPSK and Costas sampling signals before and after filtering.

[0192] In order to more precisely evaluate the waveform quality of the synthesized broadband signal, the matched filtering method is used. After the preprocessed acquisition data passes through a low-pass filter, it is correlated with the corresponding matching copy generated locally, and the waveform quality is evaluated through the matched filtering output result. During the entire measurement process, the oscilloscope trigger time is kept unchanged, so the arrival time of each acquired signal is also fixed. After measurement, the time is obtained as t 0 = 0.0124s. The low-pass filtered LFM, HFM, BPSK and Costas sampling signals are correlated with the local matching copies, and the output results are as follows: Fig.18 shown.

[0193] from Fig.18It can be seen that after the four broadband signals are correlated with the local matching copies, the main peak positions in the matched filtering output results are accurately located at the signal arrival time, and the main peak is sharp and the main sidelobe is high, which shows that the four broadband signals generated by the waveform generation system have good correlation with their respective matching copies.

[0194] It should be noted that although the operations of the method of the embodiment of the present application are described in a specific order in the above embodiment, this does not require or imply that these operations must be performed in this specific order, or that all the operations shown must be performed to achieve the desired result. On the contrary, the steps depicted in the flow chart can change the order of execution. Additionally or alternatively, some steps can be omitted, multiple steps can be combined into one step for execution, and / or one step can be decomposed into multiple steps for execution.

[0195] Based on the method in the above embodiment, illustratively, Fig.19 The constant modulus waveform synthesis device for active sonar detection provided by an embodiment of the present application is shown. The device includes a control unit and a generation unit, the generation unit includes a square wave direct digital frequency synthesizer, and the device 1900 includes:

[0196] The control unit 1910 is used to determine the transmission parameters and waveform parameters of the constant mode waveform according to the indicators of active sonar detection; the constant mode waveform is the transmission waveform of active sonar detection; the transmission parameters include the carrier frequency control word and the transmission control signal; the waveform parameters include the waveform category and the waveform configuration parameters.

[0197] The control unit 1910 is further configured to enable the transmission of a control signal after sending the transmission parameters and waveform parameters to the generation unit.

[0198] The generation unit 1920 is used to respond to the enablement of the transmission control signal. The generation unit uses the carrier frequency control word and the waveform configuration parameters to calculate according to the preset logic of the waveform category to obtain the phase accumulation step and the phase control word; the phase accumulation step is used to control the repetition frequency or pulse interval of the square wave signal, and the phase control word is used to control the initial phase of the square wave signal.

[0199] The generating unit 1920 is also used to use a square wave direct digital frequency synthesizer to synthesize according to the phase accumulation step and the phase control word to obtain a target square wave; the target square wave is used to filter out high-order harmonic components using a low-pass filter to obtain a constant modulus waveform.

[0200] It is understood that the various numerical numbers involved in the embodiments of the present application are only for the convenience of description and are not used to limit the scope of the embodiments of the present application. It should be understood that in the embodiments of the present application, the size of the sequence number of the above-mentioned processes does not mean the order of execution, and the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0201] The specific implementation methods described above further illustrate the purpose, technical solutions and beneficial effects of the present application in detail. It should be understood that the above description is only a specific implementation method of the present invention and is not intended to limit the scope of protection of the present application. Any modifications, equivalent substitutions, improvements, etc. made on the basis of the technical solutions of the present application should be included in the scope of protection of the present application.

Claims

1. A constant modulus waveform synthesis method for active sonar detection, characterized in that: The method is performed by a system, the system comprising a control unit and a generation unit, the generation unit comprising a square wave direct digital frequency synthesizer, and the method comprises: The control unit determines the emission parameters and waveform parameters of the constant mode waveform according to the indicators of active sonar detection; the constant mode waveform is the emission waveform of the active sonar detection; the emission parameters include the carrier frequency control word and the emission control signal; the waveform parameters include the waveform category and the waveform configuration parameters; After the control unit sends the transmission parameters and waveform parameters to the generation unit, the control unit enables the transmission control signal; In response to the enabling of the transmission control signal, the generation unit uses the carrier frequency control word and the waveform configuration parameter to perform calculation according to the preset logic of the waveform category to obtain a phase accumulation step and a phase control word; the phase accumulation step is used to control the repetition frequency or pulse interval of the square wave signal, and the phase control word is used to control the initial phase of the square wave signal; The generating unit uses the square wave direct digital frequency synthesizer to synthesize according to the phase accumulation step and the phase control word to obtain a target square wave; the target square wave is used to filter out high-order harmonic components using a low-pass filter to obtain the constant modulus waveform.

2. The method according to claim 1, characterized in that The system includes a preset number of generation units, the waveform parameters include the preset number of waveform categories and waveform configuration parameters, the preset number of waveform configuration parameters correspond to the same waveform category, and each generation unit corresponds to each waveform category and waveform configuration parameter one by one; The generating unit uses the carrier frequency control word and the waveform configuration parameter to perform calculation according to the preset logic of the waveform category, including: The preset number of generating units respectively use the carrier frequency control word and the corresponding waveform configuration parameters to perform calculations according to the preset logic of the corresponding waveform category; The generating unit uses the square wave direct digital frequency synthesizer to perform synthesis according to the phase accumulation step and the phase control word to obtain a target square wave, including: The preset number of generating units respectively use the square wave direct digital frequency synthesizer to synthesize according to the corresponding phase accumulation step and phase control word to obtain the preset number of target square waves; The target square wave is used to obtain the constant modulus waveform by filtering out high-order harmonic components using a low-pass filter, including: The preset number of target square waves is used to filter out high-order harmonic components using low-pass filters to obtain the preset number of constant modulus waveforms.

3. The method according to claim 1, characterized in that The system includes a clock signal, and the clock signal corresponds to a clock cycle; the waveform configuration parameters of the linear frequency modulation signal include a phase difference accumulation step and a linear frequency modulation phase control word; The generating unit uses the carrier frequency control word and the waveform configuration parameter to perform calculation according to the preset logic of the waveform category, including: When it is determined that the waveform category is a linear frequency modulation signal, in each clock cycle, the phase difference accumulation step and the current phase difference are input into the phase difference accumulator for addition, to obtain the phase difference of the clock cycle and store it in the first register; the current phase difference is the phase difference stored by the first register in the previous clock cycle of the clock cycle, and the data storage length of the first register is M bits; Inputting the high N bits of the clock cycle phase difference and the carrier frequency control word into a first adder for addition to obtain a phase accumulation step length; wherein N is less than M; The linear frequency modulation phase control word is used as the phase control word.

4. The method according to claim 1, characterized in that The system includes a clock signal, and the clock signal corresponds to a clock cycle; the waveform category includes a hyperbolic frequency modulation signal, and the waveform configuration parameters of the hyperbolic frequency modulation signal include a first phase accumulation step control parameter, a second phase accumulation step control parameter and a hyperbolic frequency modulation phase control word; The generating unit uses the carrier frequency control word and the waveform configuration parameter to perform calculation according to the preset logic of the waveform category, including: When it is determined that the waveform type is a hyperbolic frequency modulation signal, in each clock cycle, the current counting result is input into the pulse counter for addition operation to obtain the counting result of the clock cycle and store it; the current counting result is the counting result stored by the pulse counter in the previous clock cycle; Inputting the counting result and the first phase accumulation step length control parameter into a second adder / subtractor for addition; inputting the addition result of the second adder / subtractor and the second phase accumulation step length control parameter into an integer divider for division operation; and inputting the operation result of the integer divider and the carrier frequency control word into a third adder / subtractor for addition to obtain the phase accumulation step length; The hyperbolic frequency modulation phase control word is used as the phase control word.

5. The method according to claim 1, characterized in that The generating unit comprises a binary phase shift keying signal generating module; the waveform category comprises a binary phase shift keying signal, and the waveform configuration parameters of the binary phase shift keying signal comprise a codeword sequence, a number of codewords, and a codeword duration; The generating unit uses the carrier frequency control word and the waveform configuration parameter to perform calculation according to the preset logic of the waveform category, including: When it is determined that the waveform category is a binary phase shift keying signal, the codeword sequence, the number of codewords, and the codeword duration are input into a state machine, so that the state machine sequentially outputs each codeword in the codeword sequence according to the number of codewords and the codeword duration; Input each code word outputted in sequence into a binary phase shift keying signal generating module to generate a corresponding binary phase shift keying signal, namely the phase control word; The carrier frequency control word is used as the phase accumulation step.

6. The method according to claim 1, characterized in that The generating unit comprises a frequency hopping bandwidth input Costas frequency hopping generation module; the waveform category comprises a Costas coded frequency hopping signal, and the waveform configuration parameters of the Costas coded frequency hopping signal comprise the number of code words, the code word duration, and the frequency hopping bandwidth; The generating unit uses the carrier frequency control word and the waveform configuration parameter to perform calculation according to the preset logic of the waveform category, including: When it is determined that the waveform category is a Costas coded frequency hopping signal, the first codeword sequence, the number of codewords, and the codeword duration pre-stored in the system are input into the state machine, so that the state machine sequentially outputs each codeword in the codeword sequence according to the number of codewords and the codeword duration; Input each of the code words outputted in sequence, the carrier frequency control word and the frequency hopping bandwidth into a Costas frequency hopping generation module to generate a corresponding frequency hopping signal, i.e., the phase accumulation step length; The phase control word is set to 0.

7. The method according to claim 5 or 6, characterized in that: The state machine includes idle, sending and completed states, wherein the idle state is the initial state of the state machine, the sending state is the state of the state machine when sending each codeword in the codeword sequence, and the completed state is the state of the state machine when completing the sending of each codeword in the codeword sequence.

8. The method according to claim 1, characterized in that The waveform category includes a single-frequency signal, and the waveform configuration parameter of the single-frequency signal includes a single-frequency phase control word; The generating unit uses the carrier frequency control word and the waveform configuration parameter to perform calculation according to the preset logic of the waveform category, including: When it is determined that the waveform type is a single-frequency signal, using the carrier frequency control word as the phase accumulation step; The single-frequency phase control word is used as the phase control word.

9. The method according to claim 1, characterized in that: The generating unit uses the square wave direct digital frequency synthesizer to perform synthesis according to the phase accumulation step and the phase control word, including: In each cycle, the phase accumulation step and the current phase are input into the phase accumulator for addition, the phase of the clock cycle is obtained and stored in the second register; the current phase is the phase stored in the second register in the previous clock cycle; the phase and the phase control word are input into the fourth adder for addition, and the most significant bit of the addition result of the fourth adder is output; A target square wave is generated according to the most significant bit outputted in a preset number of clock cycles.

10. A constant modulus waveform synthesis device based on a square wave direct digital frequency synthesizer, characterized in that: The device comprises a control unit and a generating unit, wherein the generating unit comprises a square wave direct digital frequency synthesizer, and the device comprises: A control unit, used to determine the emission parameters and waveform parameters of the constant mode waveform according to the indicators of active sonar detection; the constant mode waveform is the emission waveform of the active sonar detection; the emission parameters include a carrier frequency control word and an emission control signal; the waveform parameters include a waveform category and a waveform configuration parameter; The control unit is further configured to enable the transmission control signal after sending the transmission parameters and waveform parameters to the generation unit; A generating unit, configured to respond to the enabling of the transmitting control signal, wherein the generating unit uses the carrier frequency control word and the waveform configuration parameter to perform calculation according to the preset logic of the waveform category to obtain a phase accumulation step and a phase control word; the phase accumulation step is used to control the repetition frequency or pulse interval of the square wave signal, and the phase control word is used to control the initial phase of the square wave signal; The generating unit is also used to use the square wave direct digital frequency synthesizer to synthesize according to the phase accumulation step and the phase control word to obtain a target square wave; the target square wave is used to filter out high-order harmonic components using a low-pass filter to obtain the constant modulus waveform.

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