An adaptive high detection voltage control system and method for a satellite-borne microwave radiometer

Abstract

The present application provides an adaptive high detection voltage control system and method for a satellite-borne microwave radiometer, comprising: an FPGA unit, a first analog-to-digital converter, a second analog-to-digital converter, a digital-to-analog converter, and a plurality of operational amplifiers; wherein the first-stage operational amplifier, the second-stage operational amplifier, the third-stage operational amplifier, the first analog-to-digital converter, and the FPGA unit are cascaded to form a first link, and the input end of the first-stage operational amplifier is connected to the external radiometer detection circuit; the fourth-stage operational amplifier, the second analog-to-digital converter, and the FPGA unit are cascaded to form a second link, and the input end of the fourth-stage operational amplifier is connected to the input end of the second-stage operational amplifier; the FPGA unit and the digital-to-analog converter are cascaded to form a third link, and the output end of the digital-to-analog converter is connected to the input end of the second-stage operational amplifier. The present application can effectively improve the acquisition accuracy of the detection voltage and the detection sensitivity of the radiometer, and ensure the overall reliability of the satellite-borne system.

Description

Technical Field

[0001] The present application belongs to the field of satellite-borne microwave radiometer detection technology, and in particular, relates to a satellite-borne microwave radiometer adaptive high detection voltage control system and method. Background Art

[0002] Microwave radiometers receive radiation energy from matter and can detect temperatures as low as a few K. The signal entering the radiometer is a weak signal. After passing through the RF front end and square law detection, the output voltage is at the mV level. Its detection sensitivity will directly affect the performance of the radiometer.

[0003] At present, it is generally achieved through a fixed operational amplifier circuit. The amplitude range of the detected signal after detection is small and the voltage range given to the ADC converter after amplification by the operational amplifier circuit varies greatly. The sampling bit number of the ADC converter is required to be high, resulting in inaccurate detection voltage acquisition accuracy and excessive detection sensitivity deviation, thereby reducing the overall reliability of the satellite-borne system. Summary of the invention

[0004] In view of this, the present application aims to propose an adaptive high detection voltage control system and method for a satellite-borne microwave radiometer to solve the problem of inaccurate detection voltage acquisition accuracy.

[0005] To achieve the above purpose, the technical solution of this application is implemented as follows: In a first aspect, the present application provides an adaptive high detection voltage control system for a satellite-borne microwave radiometer, comprising an FPGA unit, a first analog-to-digital converter, a second analog-to-digital converter, a digital-to-analog converter, and a plurality of operational amplifiers; Wherein, the first-stage operational amplifier, the second-stage operational amplifier, the third-stage operational amplifier, the first analog-to-digital converter and the FPGA unit are cascaded to form a first link, and the input end of the first-stage operational amplifier is connected to an external radiometer detection circuit; The fourth-stage operational amplifier, the second analog-to-digital converter and the FPGA unit are cascaded to form a second link, and the input end of the fourth-stage operational amplifier is connected to the input end of the second-stage operational amplifier; The FPGA unit is cascaded with the digital-to-analog converter to form a third link, and the output end of the digital-to-analog converter is connected to the input end of the second-stage operational amplifier.

[0006] Further, the inverting input terminal of the first-stage operational amplifier is respectively connected to a first resistor and a third resistor, the other end of the first resistor is configured to receive a detection voltage output by the radiometer detection circuit, the other end of the third resistor is connected to the output terminal of the first-stage operational amplifier, and the non-inverting input terminal of the first-stage operational amplifier is grounded through the connected second resistor; The output end of the first stage operational amplifier is respectively connected to the non-inverting input end of the fourth stage operational amplifier and is connected to the reverse input end of the second stage operational amplifier through a fourth resistor.

[0007] Further, a sixth resistor is provided between the inverting input terminal of the second-stage operational amplifier and its output terminal, and the non-inverting input terminal of the second-stage operational amplifier is connected to the digital-to-analog converter via a fifth resistor; The output terminal of the second-stage operational amplifier is connected to the non-inverting input terminal of the third-stage operational amplifier through a seventh resistor.

[0008] Further, the output end of the third-stage operational amplifier is connected to the first analog-to-digital converter through an eighth resistor, the eighth resistor is also connected to a first capacitor, and the other end of the first capacitor is grounded; A first switch tube and a second switch tube are further connected between the eighth resistor and the first analog-to-digital converter, the other end of the first switch tube is connected to the power supply end, and the other end of the second switch tube is grounded.

[0009] Furthermore, the first switch tube and the second switch tube are diodes, and an anode of the first diode and a cathode of the second diode are connected to the eighth resistor.

[0010] In the second aspect, based on the same inventive concept, the present application also provides a satellite-borne microwave radiometer adaptive high detection voltage control method, which is used to execute the satellite-borne microwave radiometer adaptive high detection voltage control system as described in the first aspect, comprising: The FPGA unit configures the output voltage of the digital-to-analog converter to be zero, and collects the first voltage output by the first analog-to-digital converter; Determine whether the first voltage collected at this time meets the collection voltage range of the first analog-to-digital converter; In response to the first voltage being in accordance with the acquisition voltage range, the amplitude of the detection voltage signal is calculated according to the output voltage of the current digital-to-analog converter and the first voltage currently output by the first analog-to-digital converter, so as to output the current detection voltage value of the radiometer; In response to the first voltage exceeding the acquisition voltage range, the second voltage output by the first-stage operational amplifier is acquired, the output voltage of the digital-to-analog converter is configured according to the second voltage, and the first voltage output by the first analog-to-digital converter continues to be acquired until the first voltage meets the acquisition voltage range to output the current radiometer detection voltage value.

[0011] Furthermore, the acquisition voltage range is 1~4V.

[0012] Compared with the prior art, the adaptive high detection voltage control system and method of the satellite-borne microwave radiometer described in the present application has the following beneficial effects: The present application describes an adaptive high detection voltage control system and method for a satellite-borne microwave radiometer, which significantly improves the signal acquisition accuracy and the detection sensitivity of the radiometer by adjusting the bias voltage of the operational amplifier in real time to stabilize the voltage range supplied to the analog-to-digital converter. At the same time, it reduces the demand for high-bit analog-to-digital converters, reduces the dependence on hardware, optimizes the system design, and effectively improves the reliability and performance of the satellite-borne system. It can also adapt to a wider signal input range, ensuring that the system operates stably in complex and extreme working environments. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings: Figure 1 This is a principle block diagram of an adaptive high detection voltage control system for a satellite-borne microwave radiometer described in an embodiment of the present application; Figure 2 This is a flow chart of an adaptive high detection voltage control method for a satellite-borne microwave radiometer described in an embodiment of the present application. DETAILED DESCRIPTION

[0014] In order to make the objectives, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0015] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should be the usual meanings understood by people with ordinary skills in the field to which the present application belongs. The "first", "second" and similar words used in the embodiments of the present application do not represent any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing in front of the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0016] After the system described in this embodiment is used in the detection circuit of a satellite-borne microwave radiometer, the detection voltage is highly amplified to achieve a wide input voltage range and a narrow voltage output. This embodiment takes the detection voltage of 1mV~50mV as an example for amplification and adaptive adjustment, and is also applicable to other range voltages and higher amplification factors.

[0017] like Figure 1 The system is composed of two ADC chips, one DAC chip, four operational amplifiers and one FPGA chip. The first-stage operational amplifier, the second-stage operational amplifier, the third-stage operational amplifier, the first analog-to-digital converter and the FPGA unit are cascaded to form a first link. The reverse input end of the first-stage operational amplifier is connected to the external radiometer detection circuit. The fourth-stage operational amplifier, the second analog-to-digital converter and the FPGA are cascaded to form a second link, and the non-inverting input terminal of the fourth-stage operational amplifier is connected to the reverse input terminal of the second-stage operational amplifier; The FPGA unit is cascaded with the digital-to-analog converter to form a third link, and the output end of the digital-to-analog converter is connected to the same-direction input end of the second-stage operational amplifier.

[0018] Specifically, in the present embodiment, the reverse input terminal of the operational amplifier OP1 is connected to the microwave radiometer of the peripheral device through the resistor R1 to receive the microwave voltage signal, the reverse input terminal of the operational amplifier OP1 is also connected to its output terminal through the resistor R3, the non-inverting input terminal of the operational amplifier OP1 is grounded through the resistor R2, the output terminal of the operational amplifier OP1 is respectively connected to the non-inverting input terminal of the operational amplifier OP4 and to the reverse input terminal of the operational amplifier OP2 through the resistor R4, the inverting input terminal of the operational amplifier OP2 is connected to its output terminal through the resistor R6, the non-inverting input terminal of the operational amplifier OP2 is connected to the DAC chip through the resistor R5, the output terminal of the operational amplifier OP2 is connected to the non-inverting input terminal of the operational amplifier OP3 through the resistor R7, the output terminal of the operational amplifier OP3 is connected to the ADC1 chip through the resistor R8, the reverse input terminal of the operational amplifier OP4 is connected to its output terminal, the output terminal of the operational amplifier OP4 is connected to the ADC2 chip, and two ADC chips and one DAC chip are connected to the FPGA chip.

[0019] The inverting input terminal of the operational amplifier OP3 is also connected to one end of the resistor R8 close to the ADC1 chip. The one end of the resistor R8 close to the ADC1 chip is also connected to a capacitor C1. The other end of the capacitor C1 is grounded. A diode D1 and a diode D2 are connected between the resistor R8 and the ADC1 chip. The other end of the diode D1 is connected to the power supply terminal, and the other end of the diode D2 is grounded.

[0020] To further explain, the detection voltage Vin is amplified by the operational amplifier OP1 and output as Vo1. R3 and R1 are the amplification adjustment resistors. Then, it is output as Vo2 through the operational amplifier OP2. The in-phase input terminal Vp of the operational amplifier OP2 is the output of the DAC (i.e., the digital-to-analog converter). The inverting terminal Vn of the operational amplifier OP2 is given to ADC2 (i.e., the second analog-to-digital converter) through the operational amplifier OP4. Vo2 is output to ADC1 (i.e., the first analog-to-digital converter) through the operational amplifier OP3. ADC1 collects the final voltage and gives it to the FPGA. OP3 and OP4 are used as followers to reduce the impact of impedance on voltage. The DAC is used to output voltage to adjust the bias voltage of OP2.

[0021] In this system, the Vin input voltage is 1~50mV, OP1 amplifies 200 times (R3 / R1=200), OP2 amplifies 10 times (R6 / R4=10), the total amplification is 2000 times, and the ADC1 acquisition voltage range is 0~5V. The following explanations are given using 1mV, 10mV, and 50mV as examples: When the Vin input voltage is 1mV, Vo1=-200mV, and when the Vp terminal is 0V, the Vo2 output is 2000mV. OP3 is a follower, and the final voltage value entering ADC1 is 2000mV. After ADC1, it is given to FPGA, and the final collected voltage is 2V.

[0022] When the Vin input voltage is 10mV, according to the formula Vo1=-Vin×(R3 / R1), Vo1=-2000mV is calculated; for the operational amplifier OP2, when the Vp terminal is 0V, according to the formula Vo2=-Vo1×(R6 / R4), the Vo2 output is calculated to be 20000mV, which exceeds the operating voltage of the operational amplifier. The actual output of the operational amplifier is close to the operating voltage and is in a nonlinear output. The operational amplifier OP3 is a follower, and the output voltage is equal to the input voltage. The clamping diodes D1 and D2 are used to protect the ADC1 chip to prevent the voltage from exceeding the ADC1 input range. When the voltage exceeds the ADC1 input range, the voltage is clamped to 5V. At this time, the voltage Vadc collected by the FPGA unit is 5V. Since the operational amplifier on the link is in a nonlinear working state at this time and the Vadc voltage is out of range (the normal range is 1~4V), the FPGA needs to configure the DAC output voltage to adjust the Vp terminal voltage of the operational amplifier OP2, thereby changing the output voltage of OP2 and finally changing Vadc. The Vo1 voltage collected by FPGA is -2V. According to the formula 11×Vp-10×Vo1=Vo2, Vp=(Vadc+10×Vo1) / 11, where Vo2=Vadc. Vadc needs to be adjusted to the normal range of 1~4V. By default, Vo2 is 3V, so Vp=-1.545V. When the FPGA unit configures the DAC output voltage to -1.545V, Vo2 output is 3V, which is given to ADC1 after the follower. The final collected voltage is about 3V (there is an error). FPGA then substitutes the actual collected voltage Vadc into the formula Vin=(11×Vp- Vadc) / 2000 to obtain the voltage Vin.

[0023] When the Vin input voltage is 50mV, according to the formula Vo1=-Vin×(R3 / R1), Vo1=-10000mV is calculated; for the operational amplifier OP2, when the Vp terminal is 0V, according to the formula Vo2=-Vo1×(R6 / R4), the Vo2 output is calculated to be 100000mV, which is far beyond the operating voltage of the operational amplifier. The actual output of the operational amplifier is close to the operating voltage and is in a nonlinear output. Due to the clamping diode, the voltage Vadc collected by the FPGA unit is 5V at this time. At this time, the FPGA needs to configure the DAC output voltage to adjust the Vp terminal voltage of the operational amplifier OP2, thereby changing the output voltage of OP2 and finally changing Vadc. The Vo1 voltage collected by FPGA is -10V. According to the formula 11×Vp-10×Vo1=Vo2, Vp=(Vo2+10×Vo1) / 11, where Vo2=Vadc. Vadc needs to be adjusted to the normal range of 1~4V. By default, Vo2 is 3V, so Vp=-8.818V. When the FPGA unit configures the DAC output voltage to -8.818V, the final collected voltage is about 3V (there is an error). FPGA then substitutes the actual collected voltage Vadc into the formula Vin=(11×Vp- Vadc) / 2000 to obtain the voltage Vin.

[0024] The calculation formula involved in this application is as follows: Vo1=-Vin×(R3 / R1); Vo2=-Vo1×(R6 / R4), (when Vp=0); (Vp-Vo1) ×(R6+R4) / R4+Vo1=Vo2, Vadc=Vo2, (when Vp is not 0); After simplification, it is 11×Vp-10×Vo1=Vadc; Vp=(Vadc+10×Vo1) / 11; Vin=(11×Vp-Vadc) / 2000.

[0025] In this way, a detection voltage range of 1mV~50mV can be achieved, and the final voltage collected by the ADC is 2~3V. The FPGA unit is adaptively adjusted to obtain the actual detection voltage size. After actual testing and calibration, high-accuracy voltage collection can be achieved.

[0026] The system and method described in this embodiment use devices such as FPGA, ADC, and DAC, and adjust the bias voltage of the operational amplifier in real time through a corresponding algorithm to ensure that the voltage supplied to the ADC is stable within the range of 1-4V, and can achieve a larger range of detection voltage input, thereby reducing the requirements for the ADC.

[0027] Based on the same inventive concept, corresponding to any of the above-mentioned embodiment systems, an embodiment of the present application further provides an adaptive high detection voltage control method for a satellite-borne microwave radiometer.

[0028] like Figure 2 This is the adaptive detection voltage amplification flow chart. After the system is powered on, the DAC output voltage Vp=0V is first configured, and the output voltage Vadc of ADC1 is collected. Then it is determined whether the collected Vadc voltage is within 1V~4V. If so, the Vin signal amplitude is calculated based on the current DAC output voltage and the current Vadc, and the current radiometer detection voltage Vin is output. If the Vadc voltage is less than 1V or greater than 4V, the output voltage Vo1 of OP1 is collected, and the DAC output voltage Vp=(Vadc+10×Vo1) / 11 is configured, where Vadc=Vo2; then the output voltage Vadc of ADC1 is continuously collected until the Vadc voltage is within 1V~4V, and the current radiometer detection voltage value is output after calculation.

[0029] When this method is actually used, because the input detection voltage Vin is an unknown quantity, the FPGA needs to collect an approximate value of Vadc and Vo1, and then continuously adjust Vp to make the final output Vadc fall between 1 and 4V. Then, according to the formula Vin=(11×Vp-Vadc) / 2000, the detection voltage Vin is calculated in reverse.

[0030] The method of the above embodiment is used to implement the corresponding system in any of the above embodiments, and has the beneficial effects of the corresponding system embodiment, which will not be described in detail here.

[0031] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents. These modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention, and they should all be included in the scope of the claims and specification of the present invention.

[0032] The embodiments of the present application are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application should be included in the scope of protection of the present application.

Claims

1. An adaptive high detection voltage control system for a satellite-borne microwave radiometer, characterized in that: It includes an FPGA unit, a first analog-to-digital converter, a second analog-to-digital converter, a digital-to-analog converter, and a plurality of operational amplifiers; Wherein, the first-stage operational amplifier, the second-stage operational amplifier, the third-stage operational amplifier, the first analog-to-digital converter and the FPGA unit are cascaded to form a first link, and the input end of the first-stage operational amplifier is connected to an external radiometer detection circuit; The fourth-stage operational amplifier, the second analog-to-digital converter and the FPGA unit are cascaded to form a second link, and the input end of the fourth-stage operational amplifier is connected to the input end of the second-stage operational amplifier; The FPGA unit is cascaded with the digital-to-analog converter to form a third link, and the output end of the digital-to-analog converter is connected to the input end of the second-stage operational amplifier.

2. The system according to claim 1, characterized in that: The inverting input terminal of the first-stage operational amplifier is respectively connected to a first resistor and a third resistor, the other end of the first resistor is configured to receive a detection voltage output by the radiometer detection circuit, the other end of the third resistor is connected to the output terminal of the first-stage operational amplifier, and the non-inverting input terminal of the first-stage operational amplifier is grounded through the connected second resistor; The output end of the first stage operational amplifier is respectively connected to the non-inverting input end of the fourth stage operational amplifier and is connected to the reverse input end of the second stage operational amplifier through a fourth resistor.

3. The system according to claim 1, characterized in that: A sixth resistor is provided between the inverting input terminal and the output terminal of the second-stage operational amplifier, and the non-inverting input terminal of the second-stage operational amplifier is connected to the digital-to-analog converter via a fifth resistor; The output terminal of the second-stage operational amplifier is connected to the non-inverting input terminal of the third-stage operational amplifier through a seventh resistor.

4. The system according to claim 1, characterized in that: The output end of the third-stage operational amplifier is connected to the first analog-to-digital converter via an eighth resistor, the eighth resistor is also connected to a first capacitor, and the other end of the first capacitor is grounded; A first switch tube and a second switch tube are further connected between the eighth resistor and the first analog-to-digital converter, the other end of the first switch tube is connected to the power supply end, and the other end of the second switch tube is grounded.

5. The system according to claim 4, characterized in that: The first switch tube and the second switch tube are diodes, and an anode of the first diode and a cathode of the second diode are connected to the eighth resistor.

6. A satellite-borne microwave radiometer adaptive high detection voltage control method, used to implement the satellite-borne microwave radiometer adaptive high detection voltage control system according to any one of claims 1 to 5, characterized in that: include: The FPGA unit configures the output voltage of the digital-to-analog converter to be zero, and collects the first voltage output by the first analog-to-digital converter; Determine whether the first voltage collected at this time meets the collection voltage range of the first analog-to-digital converter; In response to the first voltage being in accordance with the acquisition voltage range, the amplitude of the detection voltage signal is calculated according to the output voltage of the current digital-to-analog converter and the first voltage currently output by the first analog-to-digital converter, so as to output the current detection voltage value of the radiometer; In response to the first voltage exceeding the acquisition voltage range, the second voltage output by the first-stage operational amplifier is acquired, the output voltage of the digital-to-analog converter is configured according to the second voltage, and the first voltage output by the first analog-to-digital converter continues to be acquired until the first voltage meets the acquisition voltage range to output the current radiometer detection voltage value.

7. The method according to claim 6, characterized in that: The acquisition voltage range is 1~4V.

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