Four-switch Buck-Boost multi-mode hybrid control strategy for active disturbance rejection

By adopting the self-immune controller ADRC and feedforward control strategy in the four-switch Buck-Boost converter, the problem of output voltage pulsation and mode switching instability of the converter during a wide input voltage range is solved, and better disturbance suppression and mode switching smoothing are achieved.

CN119742986APending Publication Date: 2025-04-01CHONGQING TSINGSHAN IND
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Patent Information

Application Number
CN202411635411.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-15
Publication Date
2025-04-01

AI Technical Summary

Technical Problem

When the existing four-switch Buck-Boost converters are in a wide input voltage range, there are problems such as excessive output voltage pulsation and instability in mode switching.

Method used

The self-immune four-switch Buck-Boost multi-mode hybrid control strategy is adopted. By designing the self-immune controller ADRC, the load power feedforward and input voltage feedforward are introduced, the controller design is simplified, the observer burden is reduced, and the power feedforward value and input voltage feedforward value are calculated in real time according to the current working conditions.

Benefits of technology

It improves the system's ability to suppress disturbances, realizes smooth switching between modes, has good regulation of load mutations, and reduces the improvement of the system's dynamic response performance.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a self-disturbance rejection four-switch Buck-Boost multi-mode hybrid control strategy. The control strategy is improved on the basis of traditional self-disturbance rejection, and the error and disturbance are used as state variables to simplify the controller design; the load power feedforward and input voltage feedforward are introduced to improve the system's ability to suppress load mutations and input disturbances and reduce the burden of the observer, and define the intervals of the wide-range input-fixed output FSBB converter in different modes, select the mode through the relationship between input and output voltages, and calculate the power feedforward value and input voltage feedforward value in real time according to the current working conditions. The present invention can simplify the system control design to achieve smooth switching between modes, and has good regulation ability for load mutations.
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Description

Technical Field

[0001] The present invention relates to the technical field of multi-mode control of a four-switch Buck-Boost converter, and in particular to an auto-disturbance rejection four-switch Buck-Boost multi-mode hybrid control strategy. Background Art

[0002] In recent years, with the rapid development of power electronics technology, the application of power electronics has become more and more extensive. In energy fields such as photovoltaic systems, fuel cells, and energy storage batteries, the output voltage varies in a wide range due to factors such as sunlight, load characteristics, and state of charge. Therefore, in order to ensure stable and efficient output of the system, its interface DC-DC converter is required to have a wide range of buck-boost capabilities. The four-switch Buck-Boost (FSBB) converter with multi-mode operation characteristics can achieve a wide range of operation through the combination of different modes. At the same time, it has the advantages of fewer passive components, less switch stress, and the same polarity of input and output voltages. Therefore, it is widely used in photovoltaic power generation, battery management, fuel cell power supply and other fields.

[0003] In order to achieve stable system output and high conversion efficiency of FSBB converter in a wide input voltage range, many experts and scholars at home and abroad have conducted a lot of research work on this, which can be mainly divided into two types. The first is four-side inductor current control, which controls four switch tubes at the same time. By introducing negative inductor current, although all switch tubes can be turned on at zero voltage, the overall loss of the converter is large. The second is multi-mode control. According to the relationship between input voltage and output voltage, the working range of the converter is divided into different modes and the corresponding duty cycle control signal is designed. It can be specifically divided into single mode, two modes, three modes, and four modes. When the FSBB converter operates in a wide range, due to the nonlinear characteristics of system parameter changes, its transfer function presents discontinuous changes. When there are load and input voltage disturbances, it will cause the problem of excessive output voltage pulsation. For the design of multi-mode control parameters, considering the influence of the right half plane zero point of the Boost mode, the system steady-state operating point is selected in the Boost mode, but the working performance of the system in other modes is ignored. There is a risk of instability in the system when the mode is switched. Summary of the invention

[0004] In view of the problems existing in the prior art, the present invention provides a self-disturbance rejection four-switch Buck-Boost multi-mode hybrid control strategy, which can improve the system's ability to suppress disturbances.

[0005] The technical solutions to the above problems are as follows:

[0006] The self-disturbance rejection four-switch Buck-Boost multi-mode hybrid control strategy includes the following steps:

[0007] S1: Determine the reference voltage of the FSBB converter and obtain the output voltage of the FSBB converter when it is working;

[0008] S2: Establish the FSBB mathematical model, define the FSBB converter operating mode, and derive the multi-mode unified control-output voltage, control-inductor current, and input-output transfer functions;

[0010] S3: Design an active disturbance rejection controller ADRC and derive the first state quantity z1 and the second state quantity z2;

[0011] S4: According to the output voltage, input voltage, inductor current and converter parameters of the FSBB converter when it is working, the first state quantity z1 and the second state quantity z2 are obtained, the current inner loop is adjusted, and load feedforward is introduced;

[0012] S5: When the FSBB converter is working, the load and the converter system parameters are input as parameters to the state observer, the first state quantity z1 and the second state quantity z2 are obtained, the voltage outer loop is adjusted, and the input voltage feedforward is introduced;

[0013] S6: Select an operating mode, obtain a first duty cycle value d1 and a second duty cycle value d2 in the corresponding mode, and control the FSBB converter to operate.

[0014] The present invention is improved on the basis of traditional self-disturbance rejection, taking errors and disturbances as state variables to simplify the controller design; introducing load power feedforward and input voltage feedforward to improve the system's ability to suppress load mutations and input disturbances and reduce the burden of the observer, and defining the intervals of the wide-range input-fixed output FSBB converter in different modes, selecting the mode through the relationship between input and output voltages, and calculating the power feedforward value and input voltage feedforward value in real time according to the current working conditions. The present invention can simplify the system control design to achieve smooth switching between modes, and has good regulation ability for load mutations.

[0015] The advantages of the present invention are: improving the traditional anti-disturbance control strategy, taking errors and disturbances as state variables, simplifying the controller design; at the same time, introducing load and input voltage feedforward, reducing the burden of the observer, and further improving the dynamic response performance of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a flow chart of the present invention.

[0017] Figure 2 This is a schematic diagram of the FSBB topology structure.

[0018] Figure 3 Schematic diagram of the multi-mode switching process of the FSBB converter.

[0019] Figure 4 This is the block diagram of the voltage closed-loop control structure of the FSBB converter.

[0020] Figure 5 This is the block diagram of the classic second-order ADRC structure.

[0021] Figure 6 This is the structural block diagram of the improved ADRC.

[0022] Figure 7 Bode diagram for estimating disturbances under different ω0.

[0023] Figure 8 For different k p The following is the amplitude-phase characteristic curve of E-ADRC.

[0024] Fig. 9 This is the block diagram of the current inner loop control.

[0025] Fig.10 This is the frequency response curve of the current inner loop of the FSBB converter in multi-mode.

[0026] Fig.11 This is the voltage and current dual closed-loop control block diagram.

[0027] Fig.12 This is the closed-loop zero-pole distribution diagram of the FSBB converter based on E-ADRC control.

[0028] Fig.13 This is the voltage closed-loop control block diagram of the FSBB converter with input voltage feedforward.

[0029] Fig.14 This is the control block diagram of the FSBB converter based on the improved active disturbance rejection.

[0030] Fig.15 These are the steady-state experimental waveforms of the converter under different working modes.

[0031] Fig.16 The results of load switching experiments.

[0032] Fig.17 Experimental results for working mode switching. DETAILED DESCRIPTION

[0033] like Figures 1 to 14 As shown, the self-disturbance rejection four-switch Buck-Boost multi-mode hybrid control strategy of the present invention is as follows: Figure 2 As shown, the four-switch Buck-Boost converter includes a Buck bridge arm, a Boost bridge arm, and an output capacitor C oand inductor L, the Buck bridge arm includes switch tube S1 and switch tube S2, the Boost bridge arm includes switch tube S3 and switch tube S4, and switch tube S1 and switch tube S4 are the main switch tubes of Buck and Boost units respectively. Figure 1 , including the following steps:

[0034] S1: Determine the reference voltage of the FSBB converter and obtain the output voltage of the FSBB converter when it is working;

[0035] S2: Establish FSBB mathematical model, define FSBB converter operation mode, and derive multi-mode unified control-output voltage, control-inductor current, input-output transfer function. S2 includes:

[0036] S21, FSBB converter topology Figure 2 In the figure, S1-S4 are switch tubes, S1 and S2 form the Boost bridge arm, S3 and S4 form the Buck bridge arm, S1 and S4 are the main switch tubes of the Buck and Boost bridge arms respectively, L is the power inductor, C o is the output capacitance, V in is the input voltage, V o is the output voltage.

[0037] According to the volt-second balance law, the ideal DC voltage gain M of the FSBB converter is expressed as:

[0038]

[0039] In the above formula, V in is the input voltage, V o is the output voltage;

[0040] Based on the state space averaging method, combined with Figure 3 (b) The unified mathematical model of the FSBB converter in multi-mode continuous time domain can be obtained:

[0041]

[0042] Where: L is the power inductor, R L is the inductor parasitic resistance, V in (t) is the input voltage in the time domain, V0(t) is the output voltage in the time domain, d1(t) is the duty cycle of the switch tube S1 in the time domain, d2(t) is the duty cycle of the switch tube S4 in the time domain, i L (t) is the inductor current in the time domain, d iL (t) / d(t) is the rate of change of the inductor current over time, dV0(t) / d(t) is the rate of change of the capacitor voltage over time, C0 is the capacitor, and R is the load resistance.

[0043] S22. The FSBB mathematical model can be further used to obtain the unified control-output voltage transfer function G of the FSBB converter in multiple modes. vd (s), control-inductor current transfer function G id (s), input-output transfer function G vg (s) are:

[0044]

[0045] Where s is the complex frequency, ω0 is the turning frequency, Q is the quality factor, ω z2 is the left half-plane (LHP) zero point; ω z1 is the right half-plane (RHP) zero point. Table 1 shows the values ​​of λ1, λ2, λ3, and β1 in different modes. The values ​​of parameters λ1 and λ2 are related to the duty cycles d1 and d2. The value of λ3 depends on whether there is a right half-plane zero point. λ3=1 indicates that the converter works in Boost mode and Boost-T mode. C is the output capacitor.

[0046] Table 1 λ1, λ2, λ3 parameter values

[0047]

[0048] From equations (3) and (4) combined with Table 1, it can be seen that the system transfer function not only changes continuously with the parameters λ1, λ2, and λ3, but also changes discontinuously with the switching of the converter working mode. The conventional voltage closed-loop control block diagram of the FSBB converter is shown in Figure 4 shown.

[0049] In the formula are the reference voltage, input voltage, output voltage, output current, output of the voltage controller, and duty cycle transfer function respectively; G c (s) is the voltage controller transfer function; G M (s)=1 / U asw is the PWM transfer function, where U asw is the peak-to-peak value of the carrier; G vd (s) is the control-output voltage transfer function; G vg (s) is the input-output transfer function; Z out (s) is the open-loop output impedance, and H(s) is the transfer function of the sampling network. Figure 4 The converter open-loop transfer function is obtained

[0050] T(s)=G c (s)G M (s)G vd (s)H(s)(7).

[0051] S3: Design an active disturbance rejection controller ADRC and derive the first state quantity z1 and the second state quantity z2. S3 includes:

[0052] S31. Design of second-order ESO (Extended State Observer): The voltage outer loop and current inner loop of the FSBB converter are both second-order systems, and the ESO should be designed as a third-order system. To simplify the controller design, this embodiment reduces the order of the ESO and designs a second-order ESO. The first-order system can be expressed as:

[0053]

[0054] In the above formula, ESO is the extended state observer, f is the total disturbance, is the first-order system of the output signal, u is the control quantity after disturbance compensation, and b is the control quantity gain.

[0055] Let the error signal e = ry and substitute it into equation (11):

[0056]

[0057] y is the output, r is the given signal, is the error signal of the first-order system, is the given signal of the first-order system.

[0058] Select the state variable x1=e, Substituting into formula (14) we can get:

[0059]

[0060] is the state variable of the first-order system, and x2 is the state variable.

[0061] Constructing the second-order ESO for equation (10), we can obtain:

[0062]

[0063] Where z1 is the state estimate of the error signal e; z2 is the state estimate of the total disturbance f of the system; is the state estimate of the first-order system error signal e, is the state estimate of the total disturbance f of the first-order system, β1 and β2 are the coefficients of the extended state observer, and e1 is the difference between the original error signal and the observed value.

[0064] S32, design of the first state quantity z1 and the second state quantity z2: select the original error signal e as the controller input, and select the proportional feedback control rate. The controller is designed as:

[0065]

[0066] In the formula, k p is the proportional gain, b0 is the estimated value of the control quantity gain; u0 is the controller output;

[0067] Within the observer bandwidth, it can be considered that z2≈x2. Substituting into equation (12), the control quantity u after disturbance compensation is:

[0068]

[0069] It can be seen that E-ADRC (error-auto disturbance rejection controller) introduces input differential feedforward, combined with output feedback and disturbance compensation, and has good control performance. In order to stabilize the FSBB converter, the observer pole is configured at the ESO bandwidth ω0, and the closed-loop pole is configured at the controller bandwidth ω c Place, that is

[0070]

[0071] From formula (14), we can get

[0072]

[0073] Substituting equation (15) into equation (11), we can obtain the transfer function of z1(s) and z2(s) in ESO:

[0074]

[0075] E(s) is the error signal in the frequency domain, U( S ) is the nonlinear error feedback control rate in the frequency domain.

[0076] Substituting equation (16) into equation (12), the transfer function based on the error E-ADRC is obtained as follows:

[0077]

[0078] ω c is the controller bandwidth, G(s) is the transfer function based on error ADRC, E-ADRC is the error-ADRC, and ADRC is the active disturbance rejection controller.

[0079] Through the above derivation, the improved ADRC structure diagram is obtained as follows: Figure 6 Shown

[0080] Both E-ADRC and ADRC outer loops are negative feedback systems, and their tracking errors can be expressed as:

[0081]

[0082] e1(t) is the difference between the original error signal and the observed value in the time domain, z1(t) is the state estimate of the error signal e(t) in the time domain, e(t) is the error signal in the time domain, e2(t) is the difference between the state estimate of the total system disturbance f(t) in the time domain and the total system disturbance, z2(t) is the state estimate of the total system disturbance f(t) in the time domain, f(t) is the total system disturbance in the time domain.

[0083] Substituting equation (16) into equation (18), the error function obtained by Laplace transformation is:

[0084]

[0085] E1(s) is the difference between the original error signal and the observed value in the frequency domain, and E2(s) is the difference between the state estimate of the total disturbance of the system in the frequency domain and the total disturbance of the system.

[0086] Further, according to the final value theorem, the steady-state error of the outer loop of the system can be obtained as:

[0087]

[0088] Where: e 1ss is the output value of the difference between the original error signal and the observed value in the time-frequency domain when time tends to infinity, e 2ss When time approaches infinity, the output value of the total disturbance state estimate of the system in the frequency domain and the difference between the total disturbance of the system is E1(s), which is the difference between the original error signal and the observed value in the frequency domain, and E2(s) is the difference between the state estimate of the total disturbance f(t) of the system in the frequency domain and the total disturbance of the system. To find the limiting operation process when s approaches 0;

[0089] From formula (20), we can see that the values ​​of β1 and β2 are related to the ESO bandwidth ω0. From formula (9) and formula (16), we can get

[0090]

[0091] When the observer bandwidth ω0 takes different values, the frequency response curve of the ESO disturbance term can be obtained according to formula (21), as follows: Figure 7 shown.

[0092] S4: According to the output voltage, input voltage, inductor current and converter parameters of the FSBB converter when it is working, the first state quantity z1 and the second state quantity z2 are obtained, the current inner loop is adjusted, and load feedforward is introduced. S4 includes:

[0093] S41. Design the current inner loop of the current inner loop E-ADRC. The steps are as follows:

[0094] According to the FSBB mathematical model,

[0095]

[0096] L is the power inductor, is the inductor current of the first-order system after substituting equation (8);

[0097] From equation (22), we can know that the inductor current of FSBB converter is a first-order differential equation. Combined with equation (8), let:

[0098]

[0099] Combining formula (23) Figure 2 The current inner loop control quantity gain b and total disturbance f of the four working modes of the FSBB converter can be obtained, as shown in Table 2.

[0100] Table 2 Current inner loop b, f values ​​in different modes

[0101]

[0102] As shown in Table 2, E-ADRC takes the output voltage, input voltage, inductor current and FSBB converter parameters as the total disturbance, and then estimates the disturbance in real time through ESO and compensates it, so as to achieve the purpose of anti-disturbance. Fig. 9 shown.

[0103] Depend on Fig. 9 The system current inner loop open-loop transfer function T(s) is obtained as:

[0104] T(s)=G i (s)G M (s)G id (s)H i (s)(24)

[0105] In the formula, G i (s) is the current inner loop E-ADRC transfer function, G M (s) is the PWM transfer function, G id (s) is the control-inductor current transfer function, H i (s) is the current sampling transfer function.

[0106] In this embodiment, the E-ADRC parameter setting method takes the current inner loop ω0=30000, k p =0.2, substituting the prototype parameters into equation (24), the frequency response of the current inner loop of the FSBB converter under multiple modes can be obtained as follows: Fig.10 .

[0107] S42 introduces a load feedforward loop based on the E-ADRC control strategy. The steps are as follows:

[0108] In order to further improve the system's ability to cope with sudden load changes, this embodiment introduces a load feedforward loop based on the E-ADRC control strategy.

[0109] According to the power conservation theory, we can get

[0110]

[0111] The equivalent resistance loss power of inductance is

[0112]

[0113] Where P in is the input power, is the inductor equivalent resistance loss power, P o is the output power;

[0114] Substituting equation (25) into equation (22), we can obtain

[0115]

[0116] is the output voltage after substituting the first-order system expression of formula (8);

[0117] After introducing load feedforward, let

[0118]

[0119] The output power of the FSBB converter is related to the duty cycle d1 of the switch tube S1. The input power expressions of the converter in the four working modes are:

[0120]

[0121] From equations (25)-(29), the voltage outer loop inductor current feedforward value i′L of the FSBB converter in the four working modes is as follows:

[0122]

[0123] i' L-Boost is the Boost mode inductor current, i' L-Boost-T is the Boost-T mode inductor current, i' L-Buck-T is the Buck-T mode inductor current, i' L-Buck is the Buck mode inductor current, k v is the input voltage gain, k d is the control gain, d 1fix is the fixed duty cycle of switch tube S1, d 2fix The duty cycle of switch S4 is fixed, V o,refis the output reference voltage, λ1 and λ2 are the ratio values ​​of duty cycles d1 and d2, and λ3 is the logical value of whether the right half plane zero point exists.

[0124] From the above analysis, it can be seen that after the introduction of load feedforward, the power feedforward value is calculated in real time, and the ESO only observes the internal loss of the system, which reduces the burden of the observer and further reduces the impact of load mutation on the output voltage. Therefore, the voltage and current dual closed-loop control block diagram is as follows Fig.11 Shown

[0125] Based on E-ADRC voltage and current dual closed-loop control, the system open-loop transfer function is:

[0126]

[0127] Where: G v (s) is the voltage outer loop E-ADRC transfer function, H v (s) is the voltage sampling transfer function.

[0128] According to the E-ADRC parameter setting method in this embodiment, the voltage outer loop ω0=17000, k p = 0.1, substituting the prototype parameters into equation (30), the closed-loop zero-pole distribution of the FSBB converter under multiple modes can be obtained as follows: Fig.12 .

[0129] Depend on Fig.12 It can be seen that the closed-loop poles of the system are all located in the left half of the imaginary axis. In addition, with the change of parameters λ1 and λ2, the system damping ratio is around 0.7. This shows that the E-ADRC control system can operate stably, and the system has low voltage / current overshoot and short recovery time in different modes. S5: When the FSBB converter is working, the load and the converter system parameters are input as parameters to the state observer, the first state quantity z1 and the second state quantity z2 are obtained, the voltage outer loop is adjusted, and the input voltage feedforward is introduced. S5 includes:

[0130] S51. Design the current outer loop of the ADRC. The steps are as follows:

[0131] From the FSBB mathematical model, we can get:

[0132]

[0133] From formula (31), we can know that the output voltage of FSBB converter is a first-order differential equation. Combining formula (31), let:

[0134]

[0135] S52. Design input voltage feedforward. The steps are as follows:

[0136] This embodiment introduces input voltage feedforward control, and its control block diagram is as follows: Fig.13 As shown. ff (s) is the feedforward function. Fig.13 It can be seen that the input voltage feedforward is The impact is:

[0137]

[0138] is the duty cycle transfer function, Input voltage in the frequency domain.

[0139] Output voltage ripple for:

[0140]

[0141] G vg (s) is the input-output transfer function, G vd (s) is the control-output transfer function, is the input voltage ripple;

[0142] Substituting equations (3) and (5) into equation (40), we can obtain:

[0143]

[0144] U saw is the carrier signal, L is the power inductor, s is the complex frequency, k v , k d are input voltage gain and control gain respectively, and their expressions are:

[0145]

[0146] make The feedforward function G can be obtained ff (s) is:

[0147]

[0148] Since the feedforward function contains frequency terms And R>>L, so The feedforward function can be simplified as:

[0149]

[0150] Let the feedforward gain k s =G ff (s), we get:

[0151]

[0152] From the above analysis, we can see that by adjusting k s It can effectively suppress the impact of input voltage changes on the output voltage and reduce the burden of the current inner loop observer, thereby achieving smooth switching between modes.

[0153] S6: Select the working mode, obtain the first duty cycle value d1 and the second duty cycle value d2 in the corresponding mode, and control the FSBB converter to work. The working mode selected in S6 is as follows:

[0154]

[0155] Where: V in is the input voltage, V o is the output voltage, d 2min is the minimum duty cycle of switch tube S4, d 1max is the maximum duty cycle of switch tube S1.

[0156] The system of the present invention samples the output voltage and compares it with the output reference voltage V o,ref The error value is obtained by comparison, and then the inner current loop inductor current reference value i*L is obtained through the voltage outer loop error self-disturbance rejection controller and the inductor current feedforward value i′L, and compared with the actual value i L The error value is obtained by comparison, and then passed through the current inner loop error self-resistance controller and the input voltage feedforward gain k s , thereby obtaining the control quantity, and finally selecting the converter operating mode and its corresponding duty cycle signal according to the output voltage, and the modulator generates the switch tube drive signal.

[0157] Depend on Fig.14 As shown, the voltage outer loop and current inner loop in the control strategy proposed in this embodiment both use E-ADRC. When the FSBB converter switches between modes, the system parameters change nonlinearly, and the traditional PI control cannot simultaneously meet the dynamic performance in different modes. To address this problem, the E-ADRC control with stronger robustness and independent of the mathematical model of the controlled object is adopted. In order to effectively suppress the impact of load mutations and input voltage disturbances on the output voltage, this embodiment introduces a multi-feedforward hybrid control strategy, which significantly improves the system's anti-disturbance capability while reducing the burden on the observer.

[0158] Experimental verification

[0159] Fig.15The steady-state experimental waveforms of the FSBB converter in four modes when the proposed control strategy is adopted. When the input voltage is 24V, the converter works in the Boost mode, the inductor current ripple is about 0.53A, and the average inductor current is about 3.6A; when the input voltage is 34V, the converter works in the Boost-T mode, the inductor current ripple is about 0.34A, and the average inductor current is about 2.8A; when the input voltage is 38V, the converter works in the Buck-T mode, the inductor current ripple is about 0.3A, and the average inductor current is about 2.6A; when the input voltage is 48V, the converter works in the Buck mode, the inductor current ripple is about 0.6A, and the average inductor current is about 2.4A. It is not difficult to see that by adopting the proposed control strategy, the FSBB converter can achieve a stable output of 36V in an extremely wide input voltage range, and the inductor current ripples of Buck-T and Boost-T in the intermediate mode are lower than those in the Buck and Boost modes, respectively.

[0160] Fig.16 The waveforms of the load mutation experiment under the four working modes of the FSBB converter are shown. The input voltages are 24V, 34V, 38V, and 48V, respectively, and the load is switched from to. With the traditional control strategy, when the load is switched from half load to full load, the output voltage of the converter in the four modes will undershoot by about 3.5V, and it will take about 5ms to recover to the steady state; with E-ADRC control, the output voltage of the converter in the four modes will undershoot by about 2.5V, and it will take about 2.5ms to recover to the steady state; after the introduction of load feedforward, there is no obvious fluctuation in the output voltage at the load switching point, and the converter's ability to cope with load mutations is significantly improved.

[0161] Fig.17 The experimental waveforms of input voltage, output voltage and inductor current when the FSBB converter switches between different modes under full load are shown in the figure. It can be seen from the experimental waveforms that when the traditional control strategy is used, the maximum overshoot and undershoot of the output voltage when the mode is switched is about 1.3V, and it takes about 5ms to recover to a steady state; when the E-ADRC control is used, when the converter switches from Boost mode to Boost-T mode and from Boost-T mode to Buck-T mode, the maximum overshoot and undershoot of the output voltage is about 0.9V, and it takes about 2ms to recover to a steady state, and when switching from Buck-T mode to Buck mode, the output voltage has no obvious fluctuation; after introducing input voltage feedforward, when the FSBB converter switches modes, the output voltage has no obvious fluctuation, which effectively suppresses the influence of input voltage disturbance on the output voltage and realizes smooth switching between modes.

[0162] It is not difficult to see from the above comparative experiments that when the proposed control strategy is used for mode switching, the fluctuations of the output voltage and the inductor current are significantly reduced, and the output voltage can be quickly tracked to a given value, thereby achieving smooth switching between different modes. In summary, this embodiment addresses the FSBB four-mode control switching problem, and the system mathematical model changes. The traditional control strategy that shares a set of PI controllers will reduce the dynamic performance of some modes and has poor anti-disturbance performance. Therefore, this embodiment, based on traditional self-disturbance rejection control, proposes a hybrid control strategy of error ADRC containing multiple feedforwards, and through experimental comparison with the traditional control strategy, the following conclusions are obtained:

[0163] 1) By adopting the E-ADRC control strategy, the FSBB converter can achieve zero-error tracking of a given voltage in a wider input voltage range. Compared with the traditional control strategy, its implementation is simpler and the switching between modes is smoother.

[0164] 2) This embodiment introduces a multi-feedforward hybrid control strategy, which has good dynamic regulation capabilities for both load mutations and input voltage disturbances.

[0165] The examples described above are only some embodiments of the present invention, rather than all of them. Based on the examples in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

Claims

1. Self-disturbance rejection four-switch Buck-Boost multi-mode hybrid control strategy, characterized by: The following steps are involved: S1: Determine the reference voltage of the FSBB converter and obtain the output voltage of the FSBB converter when it is working; S2: Establish the FSBB mathematical model, define the FSBB converter operating mode, and derive the multi-mode unified control-output voltage, control-inductor current, and input-output transfer functions; S3: Design an active disturbance rejection controller ADRC and derive the first state quantity z1 and the second state quantity z2; S4: According to the output voltage, input voltage, inductor current and converter parameters of the FSBB converter when it is working, the first state quantity z1 and the second state quantity z2 are obtained, the current inner loop is adjusted, and load feedforward is introduced; S5: When the FSBB converter is working, the load and the converter system parameters are input as parameters to the state observer, the first state quantity z1 and the second state quantity z2 are obtained, the voltage outer loop is adjusted, and the input voltage feedforward is introduced; S6: Select an operating mode, obtain a first duty cycle value d1 and a second duty cycle value d2 in the corresponding mode, and control the FSBB converter to operate.

2. The auto-disturbance rejection four-switch Buck-Boost multi-mode hybrid control strategy according to claim 1, characterized in that: The process of implementing S2 is as follows: S21. According to the volt-second balance law, the DC voltage gain M of the FSBB converter is ideally expressed as: In the above formula, V in is the input voltage, V o is the output voltage; Based on the state space averaging method, the unified mathematical model of the FSBB converter in multi-mode continuous time domain is as follows: Where: L is the power inductor, R L is the inductor parasitic resistance, V in (t) is the input voltage in the time domain, V0(t) is the output voltage in the time domain, d1(t) is the duty cycle of the switch tube S1 in the time domain, d2(t) is the duty cycle of the switch tube S4 in the time domain, i L (t) is the inductor current in the time domain, d iL (t) / d(t) is the rate of change of the inductor current over time, dV0(t) / d(t) is the rate of change of the capacitor voltage over time, C0 is the capacitor, and R is the load resistance; S22. The FSBB mathematical model can be further used to obtain the unified control-output voltage transfer function G of the FSBB converter in multiple modes. vd (s), control-inductor current transfer function G id (s), input-output transfer function G vg (s) are: Where s is the complex frequency, ω0 is the turning frequency; Q is the quality factor; ω z2 is the zero point of the left half plane; ω z1 is the right half plane zero point, and the values ​​of λ1, λ2, λ3, and β1 in different modes. The values ​​of parameters λ1 and λ2 are related to the duty cycles d1 and d2, and the value of λ3 depends on whether there is a right half plane zero point. λ3=1 indicates that the converter works in Boost mode and Boost-T mode, and C is the output capacitor.

3. The auto-disturbance rejection four-switch Buck-Boost multi-mode hybrid control strategy according to claim 1, characterized in that: The S3 includes: S31. Design of second-order ESO: The first-order system of ESO is expressed as: In the above formula, ESO is the extended state observer, f is the total disturbance, is the first-order system of the output signal, u is the control quantity after disturbance compensation, and b is the control quantity gain; Let the error signal e = ry and substitute it into equation (11): r is the given signal, y is the output, is the error signal of the first-order system, is the given signal of the first-order system; Select the state variable x1=e, Substituting into formula (14) we can get: is the state variable of the first-order system, and x2 is the state variable; Constructing the second-order ESO for equation (10), we can obtain: Where z1 is the state estimate of the error signal e; z2 is the state estimate of the total disturbance f of the system; is the state estimate of the first-order system error signal e, is the state estimation of the total disturbance f of the first-order system, β1 and β2 are the coefficients of the extended state observer, and e1 is the difference between the original error signal and the observed value; S32, design of the first state quantity z1 and the second state quantity z2: select the original error signal e as the controller input, and select the proportional feedback control rate. The controller is designed as: In the formula, k p is the proportional gain, b0 is the estimated value of the control quantity gain; u0 is the controller output; Within the observer bandwidth, it can be considered that z2≈x2. Substituting into equation (12), the control quantity u after disturbance compensation is: To stabilize the FSBB converter, the observer pole is configured at the ESO bandwidth ω0, and the closed-loop pole is configured at the controller bandwidth ω c Place, that is From formula (14), we can get Substituting equation (15) into equation (11), we can obtain the transfer function of z1(s) and z2(s) in ESO: E(s) is the error signal in the frequency domain, U( S ) is the nonlinear error feedback control rate in the frequency domain; Substituting equation (16) into equation (12), the transfer function based on the error E-ADRC is obtained as follows: ω c is the controller bandwidth, G(s) is the transfer function based on error ADRC, and E-ADRC is the error-active disturbance rejection controller.

4. The auto-disturbance rejection four-switch Buck-Boost multi-mode hybrid control strategy according to claim 3, characterized in that: Both E-ADRC and ADRC outer loops are negative feedback systems, and their tracking errors can be expressed as: e1(t) is the difference between the original error signal and the observed value in the time domain, z1(t) is the state estimate of the error signal e(t) in the time domain, e(t) is the error signal in the time domain, e2(t) is the state estimate of the total disturbance f(t) of the system in the time domain and the difference between the total disturbance of the system, z2(t) is the state estimate of the total disturbance f(t) of the system in the time domain, f(t) is the total disturbance of the system in the time domain; Substituting equation (16) into equation (18), the error function obtained by Laplace transformation is: E1(s) is the difference between the original error signal and the observed value in the frequency domain, and E2(s) is the difference between the state estimate of the total disturbance of the system in the frequency domain and the total disturbance of the system; Further, according to the final value theorem, the steady-state error of the outer loop of the system can be obtained as: Where: e 1ss is the output value of the difference between the original error signal and the observed value in the time-frequency domain when time tends to infinity, e 2ss When time approaches infinity, the output value of the total disturbance state estimate of the system in the frequency domain and the difference between the total disturbance of the system is E1(s), which is the difference between the original error signal and the observed value in the frequency domain, and E2(s) is the difference between the state estimate of the total disturbance f(t) of the system in the frequency domain and the total disturbance of the system. To find the limiting operation process when s approaches 0; From formula (20), we can see that the values ​​of β1 and β2 are related to the ESO bandwidth ω0. From formula (9) and formula (16), we can get 5. The auto-disturbance rejection four-switch Buck-Boost multi-mode hybrid control strategy according to claim 3, characterized in that: S4 includes: S41, designing the current inner loop of the current inner loop E-ADRC, the steps are as follows: According to the FSBB mathematical model, L is the power inductor, is the inductor current of the first-order system after substituting equation (8); From equation (22), we can know that the inductor current of FSBB converter is a first-order differential equation. Combined with equation (8), let: The system current inner loop open loop transfer function T(s) is: T(s)=G i (s)G M (s)G id (s)H i (s) (24) In the formula, G i (s) is the current inner loop E-ADRC transfer function, G M (s) is the PWM transfer function, G id (s) is the control-inductor current transfer function, H i (s) is the current sampling transfer function.

6. The auto-disturbance rejection four-switch Buck-Boost multi-mode hybrid control strategy according to claim 5, characterized in that: S4 also includes: S42 introduces a load feedforward loop based on the E-ADRC control strategy, the steps are as follows: According to the power conservation theory, we can get The equivalent resistance loss power of inductance is Where P in is the input power, is the inductor equivalent resistance loss power, P o is the output power; Substituting equation (25) into equation (22), we can obtain is the output voltage after substituting the first-order system expression of formula (8); After introducing load feedforward, let The output power of the FSBB converter is related to the duty cycle d1 of the switch tube S1. The input power expressions of the converter in the four working modes are: From equations (25)-(29), the voltage outer loop inductor current feedforward value i′L of the FSBB converter in the four working modes is as follows: i' L-Boost is the inductor current in Boost mode, i' L-Boost-T is the Boost-T mode inductor current, i' L-Buck-T is the Buck-T mode inductor current, i' L-Buck is the Buck mode inductor current, k v is the input voltage gain, k d is the control gain, d 1fix is the fixed duty cycle of switch tube S1, d 2fix The duty cycle of the switch tube S4 is fixed, V o,ref is the output reference voltage, λ1 and λ2 are the ratio values ​​of duty cycles d1 and d2, and λ3 is the logic value of whether the right half plane zero point exists; Based on E-ADRC voltage and current dual closed-loop control, the system open-loop transfer function is: Where: G v (s) is the voltage outer loop E-ADRC transfer function, H v (s) is the voltage sampling transfer function.

7. The auto-disturbance rejection four-switch Buck-Boost multi-mode hybrid control strategy according to claim 2, characterized in that: S5 Including: S51, designing the current outer loop of the voltage outer loop E-ADRC, the steps are as follows: From the FSBB mathematical model, we can get: From formula (31), we can know that the output voltage of FSBB converter is a first-order differential equation. Combining formula (31), let: S52. Design input voltage feedforward. The steps are as follows: Input voltage feed-forward The impact of is the duty cycle transfer function, Input voltage in the frequency domain; Output voltage ripple for: G vg (s) is the input-output transfer function, G vd (s) is the control-output transfer function, is the input voltage ripple; According to formula (3) and (5), we can get U saw is the carrier signal, L is the power inductor, s is the complex frequency, k v , k d are input voltage gain and control gain respectively, and their expressions are: make The feedforward function G can be obtained ff (s) is: Since the feedforward function contains frequency terms And R>>L, so The feedforward function can be simplified as: Let the feedforward gain k s =G ff (s), we get:

8. According to the auto-disturbance rejection four-switch Buck-Boost multi-mode hybrid control strategy of claim 1, the selected working mode in S6 is as follows: in: V in is the input voltage, V o is the output voltage, d 2min is the minimum duty cycle of switch tube S4, d 1max is the maximum duty cycle of switch tube S1.

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