Preparation method of back contact TBC battery

Abstract

The invention discloses a preparation method of a back contact TBC battery, and belongs to the field of solar batteries. The preparation method of the back contact TBC battery comprises the following steps: polishing a silicon substrate, sequentially forming a first tunneling silicon oxide layer, a boron-doped polycrystalline silicon layer and a borosilicate glass layer on the back surface, and removing the borosilicate glass layer, the boron-doped polycrystalline silicon layer and the first tunneling silicon oxide layer of a non-P region part; then preparing a second tunneling silicon oxide layer, an intrinsic polycrystalline silicon layer and a phosphorosilicate glass layer in sequence, then removing the phosphorosilicate glass layer, the intrinsic polycrystalline silicon layer and the second tunneling silicon oxide layer on the P region through laser etching, converting the intrinsic polycrystalline silicon layer in the N region into a phosphorus-doped polycrystalline silicon layer, and then removing the borosilicate glass layer and the phosphorosilicate glass layer on the back surface of the silicon substrate, so as to obtain a silicon substrate; and then preparing a passive film layer on the front surface of the silicon substrate, preparing anti-reflection layers on the two surfaces, preparing an N-region electrode and a P-region electrode on the back surface, and finally obtaining the back contact TBC battery.

Description

Technical Field

[0001] The invention relates to the field of solar cells, and in particular to a method for preparing a back-contact TBC cell. Background Art

[0002] TBC (Tunneling Oxide Passivated Contact Back Contact) cells, or tunneling oxide passivated contact back contact cells, are a special solar cell technology that combines the tunneling oxide passivated contact technology of Topcon cells and the back contact structure of IBC (Interdigitated Back Contact) cells. TBC cells add a tunneling oxide layer and a passivated contact layer (doped polysilicon layer) on the back of the cell, so that the front surface of the cell is free of electrode obstruction, thereby effectively improving the transmission of light and the collection of electrons, which can effectively reduce short-circuit current losses and thus improve the conversion efficiency of the cell. The design of this structure helps to reduce light loss, allowing more light energy to be absorbed and converted into electrical energy. By combining the advantages of Topcon and IBC, TBC cells provide higher conversion efficiency, better process compatibility, and more flexible application scenarios. These advantages make it one of the important directions for the development of solar cell technology.

[0003] At present, the conventional preparation method of back-contact TBC cells is: double-sided alkaline polishing, back-side tunneling oxide layer, i-poly, boron diffusion, first laser grooving, front etching, front and back alkaline washing, tunneling oxide layer, i-poly, phosphorus diffusion, second laser grooving, alkaline washing, third laser grooving, acid washing, front texturing, passivation anti-reflection film, printing and sintering. However, these existing technologies require multiple laser grooving and etching on the back to perform PN partitioning, which easily damages the doped polysilicon layer of the cell, thereby affecting the performance of the back-contact TBC solar cell. In addition, the process is cumbersome and the cost is high, and further improvement is still needed. Summary of the invention

[0004] The object of the present invention is to provide a method for preparing a back-contact TBC battery to solve the above-mentioned problems in the background technology.

[0005] To achieve the above object, the present invention provides the following technical solutions:

[0006] One of the technical solutions of the present invention is to provide a method for preparing a back contact TBC battery, comprising the following steps:

[0007] A silicon substrate is taken, and the back side of the silicon substrate is divided into a P region, an isolation region and an N region, and a first tunneling silicon oxide layer, a boron-doped polysilicon layer and a borosilicate glass layer (BSG layer) are sequentially formed on the back side of the silicon substrate to obtain a precursor 1;

[0008] A laser mask layer that is acid-resistant but not alkali-resistant is formed on the surface of the borosilicate glass layer in the P region of the precursor 1 by a masking method to obtain a precursor 2; the borosilicate glass layer in the non-P region (isolation region and N region) on the back of the precursor 2 is removed by acid etching to obtain a precursor 3; and the boron-doped polysilicon layer, the first tunneling silicon oxide layer and the laser mask layer in the P region of the non-P region of the precursor 3 are removed by alkali etching to obtain a precursor 4;

[0009] A second tunneling silicon oxide layer, an intrinsic polysilicon layer and a phosphosilicate glass layer (PSG layer) are sequentially prepared on the back side of the precursor 4 to obtain a precursor 5;

[0010] The phosphosilicate glass layer, the intrinsic polysilicon layer, and the second tunneling silicon oxide layer in the P region of the precursor 5 are etched by laser etching to obtain a precursor 6;

[0011] converting the intrinsic polysilicon layer in the N region of the precursor 6 into a phosphorus-doped polysilicon layer to obtain a precursor 7;

[0012] The borosilicate glass layer and the phosphosilicate glass layer on the back of the precursor 7 are removed by acid etching to obtain a precursor 8;

[0013] Precursor 9 is obtained by texturing and preparing a passivation film layer on the front side of the precursor 8 and preparing an anti-reflection layer on both sides;

[0014] An N-region electrode and a P-region electrode are respectively prepared in the N-region and the P-region on the back side of the precursor 9 to obtain the back contact TBC battery.

[0015] Preferably, the silicon substrate is an N-type silicon substrate with a thickness of 100-200 μm.

[0016] Preferably, the thickness of the first tunneling silicon oxide layer is 0.5-5 nm; the thickness of the boron-doped polysilicon layer is 30-300 nm, and the carrier concentration is E18 cm -3 ~E21cm -3 ; The thickness of the borosilicate glass layer is 30-70nm.

[0017] Preferably, the thickness of the laser mask layer is 5-20 nm.

[0018] Preferably, in the process of preparing the laser mask layer, the wavelength of the laser is 200-400 nm and the power is 1-50 W.

[0019] Preferably, the thickness of the second tunneling silicon oxide layer is 0.5-5 nm; the thickness of the intrinsic polysilicon layer is 30-300 nm; and the thickness of the phosphosilicate glass layer is 30-70 nm.

[0020] Preferably, the first tunnel oxide layer and the second tunnel oxide layer have the same thickness; the boron-doped polysilicon layer and the phosphorus-doped polysilicon layer have the same thickness.

[0021] Preferably, the wavelength of the laser etching is 300-600nm, and the power is 10-200W.

[0022] Preferably, the passivation film layer is made of aluminum oxide and has a thickness of 3-10 nm.

[0023] Preferably, the N-region electrode extends to the phosphorus-doped polysilicon layer, and the P-region electrode extends to the boron-doped polysilicon layer.

[0024] The second technical solution of the present invention is to provide a back-contact TBC battery obtained according to the above-mentioned preparation method.

[0025] The beneficial technical effects of the present invention are as follows:

[0026] The present invention can solve the common problem of laser grooving in the existing TBC battery preparation process, avoid the damage of the material layer by laser grooving, and reduce the risk of laser damage. In the process of forming the boron-doped polysilicon layer and the borosilicate glass layer, the present invention retains the surface borosilicate glass layer, and then performs subsequent operations, so that the borosilicate glass layer can be used as a laser protection layer in subsequent steps to reduce the damage of the laser patterning mask to the edge of the P-region boron-doped polysilicon layer and the laser etching to the P-region tunneling oxide layer passivation contact structure.

[0027] In the conventional TBC battery preparation method in the prior art, laser grooving is usually required to isolate the N region and the P region, and the laser operation will damage the doped polysilicon and silicon substrate in the N region and the P region. The present invention does not need to perform laser grooving on the silicon substrate, and isolates the N region and the P region through the tunneling silicon oxide layer and the polysilicon layer in the isolation region; and the laser etching process of the present invention does not affect the main structure of the product, and there is no need to repair the laser damage. The present invention only requires two groovings (i.e., the laser patterning mask in step 3 of Example 1 and the laser grooving in step 5), and both have a BSG layer as a laser protection layer to reduce the risk of laser damage, thereby avoiding the decrease in photoelectric conversion efficiency to a greater extent. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0029] Figure 1This is a schematic diagram of the cross-sectional structure of the back-contact TBC battery in Example 1.

[0030] Figure 2 This is a schematic diagram of the cross-sectional structure of the intermediate product 1 in Example 1.

[0031] Figure 3 This is a schematic diagram of the cross-sectional structure of the intermediate product 2 in Example 1.

[0032] Figure 4 This is a schematic diagram of the cross-sectional structure of the intermediate product 3 in Example 1.

[0033] Figure 5 This is a schematic diagram of the cross-sectional structure of the intermediate product 4 in Example 1.

[0034] Figure 6 This is a schematic diagram of the cross-sectional structure of the intermediate product 5 in Example 1.

[0035] Figure 7 This is a schematic diagram of the cross-sectional structure of the intermediate product 6 in Example 1.

[0036] Figure 8 This is a schematic diagram of the cross-sectional structure of the intermediate product 7 in Example 1.

[0037] Fig. 9 This is a schematic diagram of the cross-sectional structure of the intermediate product 8 in Example 1.

[0038] Fig.10 This is a schematic diagram of the cross-sectional structure of the intermediate product 9 in Example 1.

[0039] Fig.11 This is a schematic diagram of the cross-sectional structure of the intermediate product 10 in Example 1.

[0040] Among them, 1: silicon substrate; 2: first tunneling oxide layer; 3: boron-doped polysilicon layer; 4: borosilicate glass layer; 5: laser mask layer; 6: second tunneling oxide layer; 7: intrinsic polysilicon layer; 8: phosphosilicate glass layer; 9: phosphorus-doped polysilicon layer; 10: passivation film layer; 11: anti-reflection film layer; 12: electrode.

[0041] Fig.12 The cross-sectional structure diagram of the laser-grooved TBC cell is shown in FIG. 210 is a silicon substrate, 220 is a tunneling oxide layer, 231 is a first doped polysilicon layer, 232 is a second doped polysilicon layer, 233 is an isolation layer, and 260 is an anti-reflection layer.

[0042] Fig.13It is a schematic diagram of the cross-sectional structure of the back contact TBC cell in comparative example 1. Wherein, 1: silicon substrate; 2: first tunneling oxide layer; 3: boron-doped polysilicon layer; 4: second tunneling oxide layer; 5: phosphorus-doped polysilicon layer; 6: passivation film layer; 7: anti-reflection film layer; 8: electrode. DETAILED DESCRIPTION

[0043] Now, various exemplary embodiments of the present invention are described in detail, and this detailed description should not be considered as a limitation of the present invention, but should be understood as a more detailed description of certain aspects, characteristics and embodiments of the present invention. It should be understood that the terms described in the present invention are only for describing specific embodiments and are not used to limit the present invention.

[0044] In addition, for the numerical range in the present invention, it is understood that each intermediate value between the upper and lower limits of the range is also specifically disclosed. The intermediate value in any stated value or stated range, and each smaller range between any other stated value or intermediate value in the range is also included in the present invention. The upper and lower limits of these smaller ranges can be independently included or excluded in the scope.

[0045] Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which the invention pertains. Although only preferred methods and materials are described herein, any methods and materials similar or equivalent to those described herein may also be used in the practice or testing of the present invention.

[0046] The words “include,” “including,” “have,” “contain,” etc. used in the present invention are open-ended terms, meaning including but not limited to.

[0047] Similar preparation schemes in the prior art usually require laser grooving and etching on the back of the battery to perform PN partitioning. As one exemplary preparation method of a laser grooved TBC battery, the steps are as follows:

[0048] A groove is opened on one side of the silicon substrate by laser; a tunneling oxide layer and an intrinsic polysilicon layer are sequentially prepared on one side of the silicon substrate; a first doped silicon oxide layer is prepared on the intrinsic polysilicon layer; the first doped silicon oxide layer outside the groove is removed to expose the intrinsic polysilicon layer; the doping source of the first doped silicon oxide layer inside the groove is pushed into the intrinsic polysilicon layer to form a first doped polysilicon layer; a second doped silicon oxide layer of opposite doping type to the first doped silicon oxide layer is prepared on the intrinsic polysilicon layer outside the groove; the doping source of the second doped silicon oxide layer outside the groove is pushed into the intrinsic polysilicon layer to form a second doped polysilicon layer (the intrinsic polysilicon layer on the side wall of the groove forms an isolation layer), and then an anti-reflection layer is arranged on the back of the silicon substrate to obtain a laser grooved TBC battery, the structural schematic diagram of which is shown in FIG. Fig.12 shown.

[0049] Fig.12 Schematic diagram of the structure of a laser-grooved TBC cell, wherein 210 is a silicon substrate, 220 is a tunneling oxide layer, 231 is a first doped polysilicon layer, 232 is a second doped polysilicon layer, 233 is an isolation layer, and 260 is an anti-reflection layer.

[0050] like Fig.12 As shown, this battery is made by using a laser to open a groove in a silicon substrate, and then a first doped silicon oxide layer is arranged in the groove, and a second doped silicon oxide layer is arranged outside the groove. The two doped polysilicon layers are separated by the height difference between the inside and outside of the groove. After the doped polysilicon layer is prepared, there is no need to use a laser to separate the N region and the P region.

[0051] Although this technology can avoid damage to hierarchical structures such as doped polysilicon layers caused by laser operation, the high energy of the laser during the laser grooving process will cause the surface temperature of the silicon substrate to rise, and then form lattice defects on the surface of the silicon substrate. These defects will become additional recombination centers, resulting in the loss of photocurrent during transmission, thereby reducing the efficiency of the battery. The local second doped oxide layer outside the groove may also use laser grooving to remove the second doped oxide layer at the corresponding position of the P region, thereby causing laser damage to the doped polysilicon layer in the P region. Alternatively, instead of laser grooving, a mask plate is used to prepare the local second doped oxide layer, which will increase the cost and technical complexity of the battery, and require regular maintenance and updates, limiting the improvement of the production efficiency and cost-effectiveness of solar cells.

[0052] The present invention provides a method for preparing a back contact TBC battery, comprising the following steps:

[0053] (1) Select an N-type silicon substrate (the back side of the silicon substrate is divided into a P region, an isolation region and an N region), and use alkali solution for rough polishing to remove the damaged layer and the impurities wrapped in it; then use alkali solution and hydrogen peroxide to perform pre-cleaning through the principles of oxidation and etching to remove surface organic matter, metals, particles and other contaminants, prepare a clean surface for texturing, and reduce the surface roughness of the silicon wafer; then use alkali solution and polishing agent (the NaOH concentration in the solution is 1-2wt%, and the polishing agent concentration is 0.5-1.5wt%) to polish both sides of the pre-cleaned silicon wafer to prepare the front and back surfaces of the silicon wafer with a flat alkali-polished tower base morphology, and obtain an intermediate product 1.

[0054] (2) depositing a first tunneling silicon oxide layer (covering the entire back surface) on the back of the intermediate product 1, and then depositing a boron-doped polysilicon layer on the first tunneling silicon oxide layer, and the boron-doped polysilicon layer will also generate a borosilicate glass layer on the side of the surface away from the silicon substrate, to obtain an intermediate product 2; wherein the first tunneling silicon oxide layer and the doped polysilicon layer can be grown by LPCVD and boron diffusion, or by PECVD and annealing, the thickness of the first tunneling silicon oxide layer is 0.5 to 5 nm, the thickness of the boron-doped polysilicon layer is 30 to 300 nm, and the carrier concentration of the boron-doped polysilicon layer is E18 cm -3 ~E21cm -3 ; The thickness of the borosilicate glass layer is 30-70nm.

[0055] (3) removing the BSG layer on the front side of the intermediate product 2 by a chain pickling device, and forming a patterned laser mask layer on the BSG layer in the P region of the intermediate product 2 by a mask method to obtain an intermediate product 3; removing the BSG layer in the non-P region on the back side of the intermediate product 3 by a chain pickling device to obtain an intermediate product 4; and then removing the boron-doped polysilicon layer, the first tunneling silicon oxide layer, the laser mask layer in the P region, and the polysilicon and oxide layer on the front side of the non-P region on the back side of the intermediate product 4 by a tank-type alkaline cleaning device to obtain an intermediate product 5; wherein the laser mask layer is acid-resistant but not alkali-resistant, and is made of oxide, nitride or wax, and has a thickness of 5-20nm. In the process of preparing the laser mask layer, the wavelength of the laser is 200-400nm, and the power is 1-50W.

[0056] (4) A second tunneling silicon oxide layer is prepared by full surface oxidation on the back side of the intermediate product 5, and then an intrinsic polysilicon layer and a phosphosilicate glass layer are deposited on the second tunneling silicon oxide layer to obtain an intermediate product 6 (due to the difference in height between the P region and the non-P region before deposition, a groove is formed in the N region after deposition); wherein the intrinsic polysilicon layer is grown by LPCVD, and the PSG layer is grown by PECVD, SACVD or solution method, the thickness of the second tunneling silicon oxide layer is 0.5 to 5 nm, the thickness of the intrinsic polysilicon layer is 30 to 300 nm, and the thickness of the PSG layer is 30 to 70 nm.

[0057] (5) The PSG layer, the intrinsic polysilicon layer, and the second tunneling silicon oxide layer on the P region of the intermediate product 6 are patterned by laser etching until the BSG layer structure of the P region is exposed to obtain the intermediate product 7; wherein the wavelength of the laser etching is 300-600nm and the power is 10-200W.

[0058] (6) In the N region of the intermediate product 7, a phosphorus source is advanced in a laser-directed manner to transform the intrinsic polysilicon layer in the N region into a phosphorus-doped polysilicon layer, and the phosphorus-doped polysilicon layer is used as the N-type doping region of the back contact TBC battery to obtain the intermediate product 8.

[0059] (7) The BSG layer and PSG layer on the back of the intermediate product 8, as well as the polysilicon and oxide layer and other redundant deposited layers on the front are removed by acid washing, alkaline washing and re-acid washing in sequence, and then cleaned to obtain an intermediate product 9.

[0060] (8) The light-receiving surface (front side) of the intermediate product 9 is textured to form a texture with a reflectivity of 8-12% to enhance the absorption of sunlight and reduce reflection, and a passivation film layer is formed on the texture surface, and an anti-reflection film layer is prepared on the front and back sides of the silicon wafer to obtain an intermediate product 10; wherein the passivation film layer is made of aluminum oxide with a thickness of 3-10nm, and the anti-reflection film layer has a thickness of 70-90nm.

[0061] (9) Metal paste is screen-printed and sintered on the N-region and P-region on the back side of the intermediate product 10 to obtain an N-region electrode and a P-region electrode. The P-region electrode penetrates the anti-reflection film layer and makes electrical contact with the boron-doped polysilicon layer. The N-region electrode penetrates the anti-reflection film layer and makes electrical contact with the phosphorus-doped polysilicon layer. Finally, a back-contact TBC battery is obtained through light injection repair.

[0062] All raw materials used in the following examples and comparative examples of the present invention are commercially available products.

[0063] Example 1

[0064] A method for preparing a back contact TBC battery, the steps are as follows:

[0065] (1) An N-type silicon substrate with a thickness of 150 μm (the back side of the silicon substrate is divided into a P region, an isolation region and an N region) is selected, and the damaged layer and the impurities contained therein are removed by rough polishing with alkaline solution; then, alkaline solution and hydrogen peroxide are used for pre-cleaning by oxidation and etching to remove surface organic matter, metal, particles and other contaminants, prepare a clean surface for texturing, and reduce the surface roughness of the silicon wafer; then, alkaline solution and a polishing agent (the NaOH concentration in the solution is 1.6 wt %, and the polishing agent concentration is 0.97 wt %) are used to polish both sides of the pre-cleaned silicon wafer to prepare the front and back surfaces of the silicon wafer with a flat alkaline polishing tower base morphology, and obtain an intermediate product 1, such as Figure 2 shown.

[0066] (2) The first tunneling silicon oxide layer (covering the entire back surface) and the intrinsic polysilicon layer are deposited on the back of the intermediate product 1 by the LPCVD process, and then the back of the silicon wafer is diffused at high temperature by a boron diffusion device to transform the intrinsic polysilicon layer into a boron-doped polysilicon layer. The boron-doped polysilicon layer also generates a borosilicate glass layer on the side of the surface away from the silicon substrate, thereby obtaining the intermediate product 2, as shown in FIG. Figure 3 As shown; wherein the thickness of the first tunneling silicon oxide layer is 1.5nm, the thickness of the boron-doped polysilicon layer is 120nm, and the carrier concentration of the boron-doped polysilicon layer is 5E18cm-3 , the thickness of the borosilicate glass layer is 40nm.

[0067] (3) The BSG layer on the front side of the intermediate product 2 is removed by a chain pickling device, and a patterned laser mask layer is formed on the BSG layer in the P region of the intermediate product 2 by a mask method to obtain an intermediate product 3, such as Figure 4 As shown; the BSG layer of the non-P region on the back of the intermediate product 3 is removed by a chain pickling device to obtain an intermediate product 4, as shown Figure 5 As shown; then use a tank alkali cleaning device to remove the boron-doped polysilicon layer, the first tunneling silicon oxide layer, the laser mask layer of the P region, and the polysilicon and oxide layer of the front side of the non-P region on the back of the intermediate product 4 to obtain an intermediate product 5, as shown Figure 6 As shown; wherein, the laser mask layer is acid-resistant but not alkali-resistant, is made of wax, has a thickness of 10nm, and in the process of preparing the laser mask layer, the wavelength of the laser is 266nm and the power is 5W.

[0068] (4) A second tunneling silicon oxide layer is prepared by full surface oxidation on the back side of the intermediate product 5, and then an intrinsic polysilicon layer and a phosphorus silicon glass layer are deposited on the second tunneling silicon oxide layer to obtain an intermediate product 6 (due to the difference in height between the P region and the non-P region before deposition, a groove is formed in the N region after the deposition is completed). Figure 7 As shown; wherein, the intrinsic polysilicon layer is grown by LPCVD, the PSG layer is grown by PECVD, the thickness of the second tunneling silicon oxide layer is 1.5nm, the thickness of the intrinsic polysilicon layer is 120nm, and the thickness of the PSG layer is 40nm.

[0069] (5) The PSG layer, the intrinsic polysilicon layer, and the second tunneling silicon oxide layer on the P region of the intermediate product 6 are patterned by laser etching until the BSG layer structure of the P region is exposed, thereby obtaining an intermediate product 7, such as Figure 8 As shown; wherein, the wavelength of the laser etching is 532nm and the power is 50W.

[0070] (6) In the N region of the intermediate product 7, a phosphorus source is advanced in a laser-directed manner to transform the intrinsic polysilicon layer of the N region into a phosphorus-doped polysilicon layer, and the phosphorus-doped polysilicon layer is used as the N-type doping region of the back contact TBC battery to obtain the intermediate product 8, as shown in Fig. 9 shown.

[0071] (7) The BSG layer and PSG layer on the back of the intermediate product 8, as well as the polysilicon and oxide layers on the front are removed by acid washing, alkaline washing and re-acid washing in sequence. First, the PSG layer on the front of the intermediate product 8 is removed by a chain acid washing device; secondly, the polysilicon and oxide layers on the front are removed by a tank alkaline washing device. Since the BSG layer and PSG layer on the back of the intermediate product 8 are used as mask layers, the polysilicon layers on the back P and N regions are not affected; finally, the BSG layer and PSG layer on the back of the intermediate product 8 are removed by a chain acid washing device to obtain an intermediate product 9, as shown in FIG. Fig.10 shown.

[0072] (8) The light-receiving surface (front side) of the intermediate product 9 is textured to form a texture with a reflectivity of 10% to enhance the absorption of sunlight and reduce reflection, and a passivation film layer is formed on the texture surface, and an anti-reflection film layer is prepared on the front and back sides of the silicon wafer to obtain an intermediate product 10, such as Fig.11 As shown; wherein, the material of the passivation film layer is aluminum oxide, the thickness is 5nm, and the thickness of the anti-reflection film layer is 80nm.

[0073] (9) Screen printing and sintering metal paste on the N region and P region on the back of the intermediate product 10 to obtain an N region electrode and a P region electrode, the P region electrode penetrates the anti-reflection film layer and is in electrical contact with the boron-doped polysilicon layer, the N region electrode penetrates the anti-reflection film layer and is in electrical contact with the phosphorus-doped polysilicon layer, and finally, after light injection repair, a back-contact TBC cell is obtained, such as Figure 1 shown.

[0074] Figure 1 This is a schematic diagram of the cross-sectional structure of the back-contact TBC battery in Example 1.

[0075] Figure 2 This is a schematic diagram of the cross-sectional structure of the intermediate product 1 in Example 1.

[0076] Figure 3 This is a schematic diagram of the cross-sectional structure of the intermediate product 2 in Example 1.

[0077] Figure 4 This is a schematic diagram of the cross-sectional structure of the intermediate product 3 in Example 1.

[0078] Figure 5 This is a schematic diagram of the cross-sectional structure of the intermediate product 4 in Example 1.

[0079] Figure 6 This is a schematic diagram of the cross-sectional structure of the intermediate product 5 in Example 1.

[0080] Figure 7 This is a schematic diagram of the cross-sectional structure of the intermediate product 6 in Example 1.

[0081] Figure 8This is a schematic diagram of the cross-sectional structure of the intermediate product 7 in Example 1.

[0082] Fig. 9 This is a schematic diagram of the cross-sectional structure of the intermediate product 8 in Example 1.

[0083] Fig.10 This is a schematic diagram of the cross-sectional structure of the intermediate product 9 in Example 1.

[0084] Fig.11 This is a schematic diagram of the cross-sectional structure of the intermediate product 10 in Example 1.

[0085] Among them, 1: silicon substrate; 2: first tunneling oxide layer; 3: boron-doped polysilicon layer; 4: borosilicate glass layer; 5: laser mask layer; 6: second tunneling oxide layer; 7: intrinsic polysilicon layer; 8: phosphosilicate glass layer; 9: phosphorus-doped polysilicon layer; 10: passivation film layer; 11: anti-reflection film layer; 12: electrode.

[0086] In step (3), during the process of forming a patterned laser mask layer in the P region on the back side of the silicon wafer, the BSG layer below the non-P region mask is a non-conductive dielectric layer, which can serve as a laser protection layer to reduce the impact of high-power laser on the silicon substrate below and reduce the risk of damage caused by the laser.

[0087] In step (5), during the process of patterning the PSG layer, the intrinsic polysilicon layer, and the second tunneling silicon oxide layer on the P region by laser etching, the BSG layer in the P region can protect the boron-doped polysilicon layer below, and also reduce the damage caused by the laser, thereby helping to improve the photoelectric conversion efficiency of the manufactured back-contact TBC battery.

[0088] Step (7) uses acid-base etching to remove excess deposition layers on the front and back sides, avoiding laser damage caused by the third laser grooving in the traditional preparation method. In addition, the tunneling layer and the intrinsic polysilicon layer are used as isolation layers, eliminating the need for grooving, and improving the problem of inaccurate Gap area position caused by laser alignment.

[0089] Comparative Example 1

[0090] (1) An N-type silicon substrate with a thickness of 150 μm (the back side of the silicon substrate is divided into a P region, an isolation region and an N region) is selected, and the damaged layer and the impurities contained therein are removed by rough polishing with alkaline solution; then, alkaline solution and hydrogen peroxide are used for pre-cleaning through the principles of oxidation and etching to remove surface organic matter, metal, particles and other contaminants, prepare a clean surface for texturing, and reduce the surface roughness of the silicon wafer; then, alkaline solution and a polishing agent (the NaOH concentration in the solution is 1.6 wt %, and the polishing agent concentration is 0.97 wt %) are used to polish both sides of the pre-cleaned silicon wafer to prepare the front and back surfaces of the silicon wafer with a flat alkaline polishing tower base morphology, and obtain an intermediate product 1.

[0091] (2) The first tunneling silicon oxide layer (covering the entire back surface) and the intrinsic polysilicon layer are deposited on the back of the intermediate product 1 by the LPCVD process, and then the back of the silicon wafer is diffused at high temperature by a boron diffusion device to transform the intrinsic polysilicon layer into a boron-doped polysilicon layer. The boron-doped polysilicon layer also generates a borosilicate glass layer on the side of the surface away from the silicon substrate, thereby obtaining the intermediate product 2; wherein the thickness of the first tunneling silicon oxide layer is 1.8 nm, the thickness of the boron-doped polysilicon layer is about 115 nm, and the carrier concentration of the boron-doped polysilicon layer is 5E18 cm -3 , the thickness of the borosilicate glass layer is about 40nm.

[0092] (3) The BSG layer on the surface of the N region on the back side of the intermediate product 2 is removed by laser grooving, and the front side single-sided acid etching and groove-type alkaline etching are used to remove the expanded BSG layer and the polysilicon layer and the first tunneling silicon oxide layer in the N region to obtain the intermediate product 3; wherein the wavelength of the laser grooving is 355nm and the power is 10W.

[0093] (4) A second tunneling silicon oxide layer (covering the entire back surface) and an intrinsic polysilicon layer are deposited on the back of the intermediate product 3 by using an LPCVD process, and then a phosphorus diffusion device is used to perform high-temperature diffusion on the back of the silicon wafer to convert the intrinsic polysilicon layer into a phosphorus-doped polysilicon layer. The phosphorus-doped polysilicon layer also generates a phosphorus-silicate glass layer on the side of the surface away from the silicon substrate, thereby obtaining an intermediate product 4. The thickness of the second tunneling silicon oxide layer is 1.8 nm, the thickness of the phosphorus-doped polysilicon layer is about 115 nm, and the thickness of the PSG layer is about 40 nm.

[0094] (5) The PSG layer on the back surface of the non-N region of the intermediate product 4 is removed by laser grooving, and the expanded PSG layer is removed by single-sided acid etching on the front side; the phosphorus-doped polysilicon layer and the second tunneling silicon oxide layer in the non-N region on the back side and the expanded polysilicon and oxide layer on the front side are removed by trench alkaline etching to obtain the intermediate product 5; wherein the wavelength of the laser grooving is 355 nm and the power is 10 W.

[0095] (6) The tunneling layer and the phosphorus-doped polysilicon layer in the isolation region between the N region and the P region are removed by laser grooving, and the BSG layer on the P region is removed by acid pickling to obtain an intermediate product 6; wherein the wavelength of the laser grooving is 532 nm and the power is 30 W.

[0096] (7) The light-receiving surface (front side) of the intermediate product 6 is textured to form a texture with a reflectivity of 10% to enhance the absorption of sunlight and reduce reflection, and a passivation film layer is formed on the surface of the texture, and an anti-reflection film layer is prepared on the front and back sides of the silicon wafer to obtain an intermediate product 7; wherein the passivation film layer is made of aluminum oxide with a thickness of 5 nm, and the anti-reflection film layer has a thickness of 80 nm.

[0097] (8) Screen printing and sintering metal paste on the N region and P region on the back of the intermediate product 7 to obtain an N region electrode and a P region electrode. The P region electrode penetrates the anti-reflection film layer and is in electrical contact with the boron-doped polysilicon layer. The N region electrode penetrates the anti-reflection film layer and is in electrical contact with the phosphorus-doped polysilicon layer. Finally, light injection repair is performed to obtain a back-contact TBC cell, such as Fig.13 shown.

[0098] Fig.13 It is a schematic diagram of the cross-sectional structure of the back contact TBC cell in comparative example 1. Wherein, 1: silicon substrate; 2: first tunneling oxide layer; 3: boron-doped polysilicon layer; 4: second tunneling oxide layer; 5: phosphorus-doped polysilicon layer; 6: passivation film layer; 7: anti-reflection film layer; 8: electrode.

[0099] Effect verification

[0100] The electrical performance tests were conducted on the TBC batteries of Example 1 and Comparative Example 1 to obtain parameters such as the short-circuit current (Isc), open-circuit voltage (Voc), fill factor (FF), and energy conversion efficiency (Eta) of the batteries, as shown in Table 1 below.

[0101] Table 1

[0102] Isc(A) Voc(V) FF(%) Eta(%) Example 1 13.3607 0.7383 83.459 24.936 Comparative Example 1 13.3413 0.7284 83.366 24.538

[0103] Compared with comparative example 1, embodiment 1 only requires two laser groovings, which can reduce damage to the silicon wafer, increase the minority carrier lifetime of the silicon substrate, and improve the short-circuit current. During the preparation process, embodiment 1 blocks the high-temperature diffusion of impurity atoms through the isolation layer, achieves isolation between the P and N regions, avoids the risk of leakage, and improves process stability. There is no need for multiple laser groovings in comparative example 1, which reduces laser damage to the edges of the P and N regions, thereby making the Poly layer and the tunneling layer have better passivation effect, bringing gains in Voc and FF, and finally the Eta of embodiment 1 is also improved.

[0104] The embodiments described above are only descriptions of the preferred modes of the present invention, and are not intended to limit the scope of the present invention. Without departing from the design spirit of the present invention, various modifications and improvements made to the technical solutions of the present invention by ordinary technicians in this field should all fall within the protection scope determined by the claims of the present invention.

Claims

1. A method for preparing a back contact TBC battery, characterized in that: The following steps are involved: A silicon substrate is taken, and the back side of the silicon substrate is divided into a P region, an isolation region and an N region, and a first tunneling silicon oxide layer, a boron-doped polysilicon layer and a borosilicate glass layer are sequentially formed on the back side of the silicon substrate to obtain a precursor 1; A laser mask layer that is acid-resistant but not alkali-resistant is formed on the surface of the borosilicate glass layer in the P region of the precursor 1 by a masking method to obtain a precursor 2; and the borosilicate glass layer in the non-P region on the back side of the precursor 2 is removed by acid etching to obtain a precursor 3; Then, the boron-doped polysilicon layer, the first tunneling silicon oxide layer and the laser mask layer in the P region of the non-P region of the precursor 3 are removed by alkaline etching to obtain the precursor 4; A second tunneling silicon oxide layer, an intrinsic polysilicon layer and a phosphosilicate glass layer are sequentially prepared on the back of the precursor 4 to obtain a precursor 5; The phosphosilicate glass layer, the intrinsic polysilicon layer and the second tunneling silicon oxide layer in the P region of the precursor 5 are etched by laser etching to obtain a precursor 6; converting the intrinsic polysilicon layer in the N region of the precursor 6 into a phosphorus-doped polysilicon layer to obtain a precursor 7; The borosilicate glass layer and the phosphosilicate glass layer on the back of the precursor 7 are removed by acid etching to obtain a precursor 8; Precursor 9 is obtained by texturing and preparing a passivation film layer on the front side of the precursor 8 and preparing an anti-reflection layer on both sides; An N-region electrode and a P-region electrode are respectively prepared in the N-region and the P-region on the back side of the precursor 9 to obtain the back contact TBC battery.

2. The preparation method according to claim 1, characterized in that: The silicon substrate is an N-type silicon substrate with a thickness of 100-200 μm.

3. The preparation method according to claim 1, characterized in that: The thickness of the first tunneling silicon oxide layer is 0.5-5 nm; the thickness of the boron-doped polysilicon layer is 30-300 nm, and the carrier concentration is E18 cm -3 ~E21cm -3 ; The thickness of the borosilicate glass layer is 30-70nm.

4. The preparation method according to claim 1, characterized in that: The thickness of the laser mask layer is 5-20 nm.

5. The preparation method according to claim 1, characterized in that: In the process of preparing the laser mask layer, the wavelength of the laser is 200-400nm and the power is 1-50W.

6. The preparation method according to claim 1, characterized in that: The thickness of the second tunneling silicon oxide layer is 0.5-5 nm; the thickness of the intrinsic polysilicon layer is 30-300 nm; and the thickness of the phosphosilicate glass layer is 30-70 nm.

7. The preparation method according to claim 1, characterized in that: The wavelength of the laser etching is 300-600nm, and the power is 10-200W.

8. The preparation method according to claim 1, characterized in that: The passivation film layer is made of aluminum oxide layer with a thickness of 3-10 nm.

9. The preparation method according to claim 1, characterized in that: The N-region electrode extends to the phosphorus-doped polysilicon layer, and the P-region electrode extends to the boron-doped polysilicon layer.

10. A back-contact TBC battery obtained according to the preparation method according to any one of claims 1 to 9.

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