Equipment control method, equipment control device and equipment control system

Abstract

The present application relates to a device control method, a device control apparatus, a device control system, a computer device, a computer-readable storage medium and a computer program product, including receiving a control signal in response to an electric start signal. When the control signal does not match the preset instruction signal, the controlled device is controlled based on the preset initial signal; when the control signal matches the preset instruction signal, the controlled device is controlled based on the control signal. Among them, the electric start signal is used to characterize the power-on of the processor, and the control signal is generated by the processor. By identifying the control signal when controlling the device at the beginning of power-on, and using the preset initial signal to control the controlled device when the control signal fails to match the preset instruction signal, the phenomenon of the processor falsely triggering the controlled device due to signal disorder at the time of power-on is reduced, and accurate and reliable control of the device is guaranteed.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a device control method, a device control apparatus, a device control system, a computer device, a computer-readable storage medium, and a computer program product. Background Art

[0002] With the continuous development and widespread application of computers, there are more and more computer models and functions, and the models and types of processors they carry also vary. Some processors may experience temporary signal disorder and uncontrollability during the power-on process of the computer. This will cause such computers to control other devices. Due to the disorder of the control signal output by the processor, the control level received by the controlled device is inaccurate, resulting in level jumps.

[0003] Due to the abnormal jump of the control level, the controlled device has the problem of false triggering, which reduces the reliability of the control process. Therefore, how to reduce false triggering during the power-on process to improve the reliability of the control process is still an urgent problem to be solved. Summary of the invention

[0004] Based on this, it is necessary to provide a device control method, device control apparatus, device control system, computer equipment, computer-readable storage medium and computer program product that can reduce device false triggering and improve control accuracy in response to the above technical problems.

[0005] In a first aspect, the present application provides a device control method, the method comprising:

[0006] Receiving a control signal in response to an electrical start-up signal; the electrical start-up signal is used to indicate that the processor is powered on; the control signal is generated by the processor;

[0007] In the case where the control signal does not match the preset instruction signal, controlling the controlled device based on the preset initial signal;

[0008] In a case where the control signal matches the preset instruction signal, the controlled device is controlled based on the control signal.

[0009] In one of the embodiments, when the control signal matches the preset instruction signal, after controlling the controlled device based on the control signal, the method further includes:

[0010] Continue to receive subsequent control signals, and control the controlled device based on the subsequent control signals.

[0011] In one of the embodiments, when the control signal does not match the preset instruction signal, controlling the controlled device based on the preset initial signal includes:

[0012] In the case where the control signal does not match the preset instruction signal, calling a preset initial signal;

[0013] The preset initial signal is transmitted to the controlled device to control the controlled device.

[0014] In one embodiment, when the control signal matches the preset instruction signal, controlling the controlled device based on the control signal includes:

[0015] When the control signal matches the preset instruction signal, performing level conversion based on the control signal to generate a control level signal;

[0016] The control level signal is transmitted to the controlled device to control the controlled device.

[0017] In one of the embodiments, the preset initial signal is determined by the controlled device.

[0018] In one embodiment, the control signal includes an actual control signal or an instruction signal, wherein the actual control signal is used to control the controlled device, and the instruction signal is used to indicate that the processor is powered on and matches the preset instruction signal.

[0019] In a second aspect, the present application further provides a device control apparatus, the apparatus comprising:

[0020] A startup module, for receiving a control signal in response to an electric startup signal; the electric startup signal is used to indicate that the processor is powered on; the control signal is generated by the processor;

[0021] An initial control module, used to control the controlled device based on a preset initial signal when the control signal does not match the preset command signal;

[0022] The processor control module is used to control the controlled device based on the control signal when the control signal matches the preset instruction signal.

[0023] In a third aspect, the present application also provides a device control system, which includes a processor and a controller, wherein the controller is connected to the processor and the controlled device, the processor is used to generate a control signal and send it to the controller, and the controller is used to control the controlled device based on the methods described in the above embodiments.

[0024] In one embodiment, the processor and the controller are communicatively connected based on a GPIO interface.

[0025] In one embodiment, the processor includes an operating system and a memory, and the operating system is connected to the controller and the memory.

[0026] In a fourth aspect, the present application further provides a computer device, comprising a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the following steps are implemented:

[0027] Receiving a control signal in response to an electrical start-up signal; the electrical start-up signal is used to indicate that the processor is powered on; the control signal is generated by the processor;

[0028] In the case where the control signal does not match the preset instruction signal, controlling the controlled device based on a preset initial signal;

[0029] In a case where the control signal matches the preset instruction signal, the controlled device is controlled based on the control signal.

[0030] In a fifth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the following steps are implemented:

[0031] Receiving a control signal in response to an electrical start-up signal; the electrical start-up signal is used to indicate that the processor is powered on; the control signal is generated by the processor;

[0032] In the case where the control signal does not match the preset instruction signal, controlling the controlled device based on a preset initial signal;

[0033] In a case where the control signal matches the preset instruction signal, the controlled device is controlled based on the control signal.

[0034] In a sixth aspect, the present application further provides a computer program product, including a computer program, which implements the following steps when executed by a processor:

[0035] Receiving a control signal in response to an electrical start-up signal; the electrical start-up signal is used to indicate that the processor is powered on; the control signal is generated by the processor;

[0036] In the case where the control signal does not match the preset instruction signal, controlling the controlled device based on a preset initial signal;

[0037] In a case where the control signal matches the preset instruction signal, the controlled device is controlled based on the control signal.

[0038] The above-mentioned device control method, device control apparatus, device control system, computer device, computer-readable storage medium and computer program product include receiving a control signal in response to an electric start signal. When the control signal does not match the preset instruction signal, the controlled device is controlled based on the preset initial signal; when the control signal matches the preset instruction signal, the controlled device is controlled based on the control signal. Among them, the electric start signal is used to characterize the power-on of the processor, and the control signal is generated by the processor. By identifying the control signal when controlling the device at the beginning of power-on, and using the preset initial signal to control the controlled device when the control signal fails to match the preset instruction signal, the phenomenon of the processor falsely triggering the controlled device due to signal disorder at the time of power-on is reduced, and accurate and reliable control of the device is guaranteed. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0040] Figure 1 is an application environment diagram of a device control system in one embodiment;

[0041] Figure 2 A schematic diagram of a flow chart of a device control method in one embodiment;

[0042] Figure 3 is a flow chart of a device control method in another embodiment;

[0043] Figure 4 It is a flowchart of the steps of controlling a controlled device based on a preset initial signal when a control signal does not match a preset instruction signal in one embodiment;

[0044] Figure 5 It is a flowchart of the steps of controlling a controlled device based on a control signal when the control signal matches a preset instruction signal in one embodiment;

[0045] Figure 6 is an application environment diagram of a device control system in another embodiment;

[0046] Figure 7 is a flow chart of a device control method in yet another embodiment;

[0047] Figure 8 is a structural block diagram of a device control device in an embodiment;

[0048] Fig. 9 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0049] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0050] It is understood that the terms "first", "second", etc. used in this application may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0051] It can be understood that the “connection” in the following embodiments should be understood as “electrical connection”, “communication connection”, etc. if the connected circuits, modules, units, etc. have electrical signals or data transmission between each other.

[0052] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the relevant listed items.

[0053] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0054] The device control method provided in the embodiment of the present application can be applied to Figure 1 In the application environment shown. The device control system controls the controlled device, and the two are connected through an IO (also written as I / O, Input / Output) interface. The device control system can control the controlled device through the IO interface, such as controlling different working modes, different data transmission, etc. This application also provides a device control system, such as Figure 1As shown, the device control system includes a processor 102 and a controller 104. The controller 104 connects the processor 102 and the controlled device. The processor 102 is used to generate a control signal and send it to the controller 104. The controller 104 is used to control the controlled device based on the methods described in the embodiments of this application.

[0055] Among them, the processor 102 can be a processing chip of different models, which can perform data processing and calculation, and send control signals when controlling the controlled device. The controller 104 is a programmable logic device that can receive the control signal sent by the processor 102, and perform corresponding conversion or processing, and output a level signal or other signal that can directly act on the controlled device in the form of logic conversion to control the controlled device. Exemplarily, the controller 104 can be a CPLD (Complex Programmable Logic Device), which is an integrated circuit chip that can realize various circuit designs and logic processing through internal logic programming. It generally has multiple physical interface modules such as IO BANK inside to complete signal transmission and reception.

[0056] Optionally, the processor 102 can be considered as a software-oriented programmable device, and the controller 104 can be considered as a hardware-oriented programmable device. For example, ZYNQ (fully programmable system on chip) can integrate the software programmability of ARM and the hardware programmability of FPGA, and realize the application of complex embedded systems through high flexibility and scalability.

[0057] In one embodiment, the processor 102 includes an operating system and a memory, and the operating system is connected to the controller 104 and the memory. The operating system refers to a software programmable system, which is usually carried on a chip with software programmability to work, such as the Feiteng series CPU, which has the characteristics of full spectrum, high performance, complete ecology, high degree of autonomy, high adaptability and compatibility, and can control different types of controlled devices. The memory refers to a device that can store data content, such as a flash memory, which is a flash memory chip that can save program files. On the basis of the flash memory being configured with UEFI (Unified Extensible Firmware Interface, providing an interface connecting the operating system and hardware), it is connected to the UEFI interface of the Feiteng series CPU through SPI (Serial Peripheral Interface, a physical bus interface), so that the Feiteng series CPU can complete the data processing in the Feiteng series CPU according to the program in the flash memory and the program in its own operating system, and output the corresponding control signal.

[0058] Furthermore, in one embodiment, the processor 102 and the controller 104 are connected in communication based on a GPIO interface. The GPIO (General Purpose Input Output) interface is an interface commonly used in embedded systems, which has high flexibility and scalability and can support multiple data inflows. The connection between the GPIO interface of the Feiteng series CPU and the IO BANK of the CPLD can enhance the adaptability of the device control system, so that it can adapt to more models and types of controlled devices.

[0059] In an exemplary embodiment, Figure 2 As shown, a device control method is provided, which is applied to Figure 1 The controller 104 in FIG. 1 is taken as an example to illustrate, and the following steps 202 to 206 are included. Among them:

[0060] Step 202, receiving a control signal in response to the electric start signal.

[0061] Among them, the electric start signal is used to characterize the power-on of the processor, that is, when the processor starts to power on, the controller can detect the electric start signal; or the processor sends an electric start signal to the controller when the processor starts to power on. In fact, the electric start signal can be sent by the processor to the controller, or when the controller obtains electric energy, the received electric energy is used as the electric start signal. It should be noted that the power-on and power-off of the device control system and the controlled device are synchronized, at least the power-on and power-off of the processor and controller in the device control system are synchronized, and at this time, the power-on of the controlled device should be earlier than that of the device control system. Then, the electric start signal can be a characterization that the controlled device, the processor and the controller are all powered on, or a characterization that the device control system is powered on. In this embodiment, the controlled device, the controller and the processor must all be powered on before the controlled device can be controlled.

[0062] When the processor starts to power on, that is, when the controller receives the power-on signal, the processor will complete the data processing in the processor according to the control program stored in the flash memory and the program in the operating system, and output different control signals, that is, the control signal is generated by the processor and used to control the controlled device. Since the control signal needs to be converted by the controller and transmitted to the controlled device, the processor transmits the control signal to the controller so that the controller receives the control signal to facilitate the execution of subsequent steps.

[0063] Step 204: When the control signal does not match the preset instruction signal, the controlled device is controlled based on the preset initial signal.

[0064] Specifically, the controller stores a preset judgment logic, that is, a preset command signal, which is set to execute different control logics when receiving a signal that meets the requirements and a signal that does not meet the requirements. For example, when the control signal received by the controller does not match the preset command signal, that is, when the signal that meets the requirements is not received, the control logic executed by the controller is: control the controlled device based on the preset initial signal. Among them, the controller stores a preset signal logic, such as a specified high and low level timing. This signal logic is the preset command signal, which is used to control the controlled device instead of the control signal when the preset command signal is not received.

[0065] Step 206: When the control signal matches the preset instruction signal, the controlled device is controlled based on the control signal.

[0066] Specifically, when the control signal received by the controller matches the preset instruction signal, that is, when a signal that meets the requirements is received, the control logic executed by the controller is: control the controlled device based on the control signal. The controller converts or analyzes the control signal and controls the controlled device based on the control signal.

[0067] It should be noted that when the above control signal does not match the preset instruction signal, it may indicate that the processor has just been powered on and is still in a disordered IO signal state. At this time, the output control signal does not correspond to the control program stored in the processor. If the controlled device is controlled according to the control signal, it may cause the controlled device to be triggered incorrectly. Therefore, the controller will use the preset initial signal instead of the control signal to control the controlled device. By controlling the controlled device according to the initial preset signal, the controlled device can be controlled according to the established control logic, without worrying about unexpected triggering of the controlled device, thereby reducing the occurrence of false triggering. When the control signal matches the preset instruction signal, it can be indicated that the processor has been powered on and the IO signal has stabilized. At this time, the output control signal corresponds to the control program stored in the processor, and the controlled device can be directly controlled based on the control signal to achieve device control.

[0068] Furthermore, during the operation of the controlled device, the device control system needs to continuously transmit data to the IO interface of the controlled device to control the entire operation of the controlled device, rather than only controlling the controlled device based on the control signal after power-on. Therefore, it is necessary to continuously obtain the control signal and continue to perform logical judgment. In an exemplary embodiment, Figure 3 As shown, after step 206, the device control method further includes step 302: continuously receiving subsequent control signals, and controlling the controlled device based on the subsequent control signals.

[0069] Specifically, the controller and the processor continuously interact through the GPIO interface and can continuously receive control signals. After the control signal matches the preset command signal, the control signals subsequently received do not need to be logically judged with the preset command signal, and the controlled device can be directly controlled based on the subsequent control signal. That is, when there is a match between the control signal and the preset command signal, that is, when it indicates that the processor has been powered on and the operating system has been loaded normally, the controlled device can be directly controlled based on the control signal in this device control process.

[0070] Optionally, in the first case, in the subsequent control signal, the signal sent by the processor to the controller may only include a signal for adjusting the working mode and operating parameters of the controlled device, and need not include a signal matching the preset instruction signal. In other words, when receiving the control signal output by the processor, the controller may set and store the preset instruction signal accordingly based on the historical experience of the power-on process or a selected special control signal, and use the preset instruction signal as the basis for judging whether the processor is normally powered on and the operating system is normally loaded, and perform corresponding processing on the control signal sent by the processor.

[0071] In this case, in an exemplary embodiment, the control signal can be a substantial control signal or a command signal, the substantial control signal is used to control the controlled device, and the command signal is used to indicate that the processor is powered on and the operating system is loaded normally, and matches the preset command signal. That is to say, after receiving the electric start signal, the controller will receive the first wave of substantial control signals, the command signal, and the second wave of substantial control signals in chronological order, wherein the first wave of substantial control signals indicates that the processor is still in an unstable state after power-on and sends out a disorder signal, the command signal indicates that the processor is powered on and the operating system is loaded normally and has stabilized, and the second wave of substantial control signals indicates that the signal actually controls the controlled device.

[0072] When the signal sent by the processor is the first wave of substantial control signals, it is equivalent to the controller not having received the control signal matching the preset instruction signal in step 204, and the controller will control the controlled device according to the preset initial signal. When the signal sent by the processor is an instruction signal, it is equivalent to the controller receiving the control signal matching the preset instruction signal in step 206, and the controller will control the controlled device according to the control signal. Since the control signal is an instruction signal, the instruction signal is only used to indicate that power-on and normal loading of the operating system are completed, then the control of the controlled device is empty at this time, that is, the controlled device is not adjusted. When the signal sent by the processor is the second wave of substantial control signals, since the controller has received the control signal matching the preset instruction signal, then this is equivalent to step 302, and the controller will control the controlled device according to the control signal obtained at this time, that is, the second wave of substantial control signals.

[0073] In the second case, in the subsequent control signals, or in other words, in the entire device control process, the signals sent by the processor to the controller may include signals for adjusting the working mode and operating parameters of the controlled device, and identification signals for analyzing the preset instruction signals, and the identification signals may be signals that match the preset instruction signals or signals that fail to match the preset instruction signals. In other words, when the controller receives the control signal output by the processor, it can set and store the preset instruction signal accordingly based on the historical experience of the power-on process or the identification signal in a selected special control signal, and use the preset instruction signal as the basis for judging whether the processor is normally powered on and the operating system is normally loaded, and perform corresponding processing on the control signal sent by the processor.

[0074] In this case, in an exemplary embodiment, the control signal includes a substantial control signal and an identification signal, the substantial control signal is used to control the controlled device, the identification signal is used to indicate whether the processor is powered on and the operating system is loaded normally, and when the processor is powered on and the operating system is loaded normally, the identification signal matches the preset instruction signal in the controller. That is, after receiving the electric start signal, the controller continues to receive control signals sent by the processor, each control signal includes a substantial control signal and an identification signal, and the controller can analyze the substantial control signal and the identification signal in the control signal.

[0075] When the identification signal in the control signal sent by the processor does not match the preset instruction signal, it is equivalent to the controller not receiving the control signal matching the preset instruction signal in step 204, and the controller will control the controlled device according to the preset initial signal. When the identification signal in the control signal sent by the processor matches the preset instruction signal, it is equivalent to the controller receiving the control signal matching the preset instruction signal in step 206, and the controller controls the controlled device according to the actual control signal in the control signal.

[0076] The above-mentioned device control method includes receiving a control signal in response to an electric start signal. When the control signal does not match the preset instruction signal, the controlled device is controlled based on the preset initial signal; when the control signal matches the preset instruction signal, the controlled device is controlled based on the control signal. Among them, the electric start signal is used to characterize the power-on of the processor, and the control signal is generated by the processor. By identifying the control signal when controlling the device at the beginning of power-on, and using the preset initial signal to control the controlled device when the control signal fails to match the preset instruction signal, the phenomenon of the processor falsely triggering the controlled device due to signal disorder at the time of power-on is reduced, thereby ensuring accurate and reliable control of the device.

[0077] In an exemplary embodiment, Figure 4 As shown, step 204 includes steps 402 to 404 .

[0078] Step 402: When the control signal does not match the preset instruction signal, call the preset initial signal.

[0079] Specifically, when the control signal does not match the preset instruction signal, that is, when the IO signal of the processor is still in disorder, the controller will ignore the control signal sent by the processor and directly call the preset initial signal stored in the controller as the control signal.

[0080] Step 404: Transmit the preset initial signal to the controlled device to control the controlled device.

[0081] The controller is connected to the IO port of the controlled device. After obtaining the preset initial signal, the controller can transmit the preset initial signal to the controlled device, so that the controlled device can trigger different working states based on different level signals, thereby realizing the control of the controlled device.

[0082] Optionally, the preset initial signal can be directly transmitted to the controlled device, or it can be transmitted to the controlled device after a certain format conversion. Then the controller can perform conversion according to the preset initial signal, such as level conversion, converting different signal values ​​or data in the preset initial signal into different levels to obtain the corresponding preset initial signal. The generated preset initial signal can be a high level signal or a low level signal.

[0083] Similarly, in an exemplary embodiment, Figure 5 As shown, step 206 includes steps 502 to 504 .

[0084] Step 502: When the control signal matches the preset instruction signal, level conversion is performed based on the control signal to generate a control level signal.

[0085] When the control signal matches the preset command signal, that is, when the processor's IO signal is stable, the controller can directly control the controlled device based on the control signal. That is, the controller performs level conversion based on the control signal, converts different signal values ​​or data in the control signal into different levels, and obtains the corresponding control level signal.

[0086] Step 504: Transmit the control level signal to the controlled device to control the controlled device.

[0087] The controller is connected to the IO port of the controlled device. After obtaining the control level signal, the controller can transmit the control level signal to the controlled device, so that the controlled device can trigger different working states based on different level signals, thereby realizing the control of the controlled device.

[0088] In this embodiment, different signals are converted into level signals by the controller, and the control is transmitted in the form of level signals so as to be received by the controlled device, which is beneficial to enhancing the applicability of the device control system.

[0089] In the above embodiments, the preset initial signal stored in the controller is determined by the controlled device. That is, when the model, type and other working parameters of the controlled device change, the preset initial signal also changes accordingly. Specifically, the controller can detect the model, type or other working parameters of the controlled device to determine the preset initial signal that matches the controlled device from multiple initial signal alternatives. It can also be that the preset initial signal is set by the staff according to the model, type and other working parameters of the controlled device, and is entered or burned into the controller, so that the controller can control the controlled device when the IO state of the processor is not stable.

[0090] Based on the same technical concept, the present application also provides a device control system, such as Figure 1 As shown, the device control system includes a processor 102 and a controller 104. The controller 104 connects the processor 102 and the controlled device. The processor 102 is used to generate a control signal and send it to the controller 104. The controller 104 is used to control the controlled device based on the methods described in the embodiments of this application.

[0091] Among them, the processor 102 can be a processing chip of different models, which can perform data processing and calculation, and send control signals when controlling the controlled device. The controller 104 is a programmable logic device that can receive the control signal sent by the processor 102, and perform corresponding conversion or processing, and output a level signal or other signal that can directly act on the controlled device in the form of logic conversion to control the controlled device. Exemplarily, the controller 104 can be a CPLD (Complex Programmable Logic Device), which is an integrated circuit chip that can realize various circuit designs and logic processing through internal logic programming. It generally has multiple physical interface modules such as IO BANK inside to complete signal transmission and reception.

[0092] Optionally, the processor 102 can be considered as a software-oriented programmable device, and the controller 104 can be considered as a hardware-oriented programmable device. For example, ZYNQ (fully programmable system on chip) can integrate the software programmability of ARM and the hardware programmability of FPGA, and realize the application of complex embedded systems through high flexibility and scalability.

[0093] In one embodiment, the processor 102 includes an operating system and a memory, and the operating system is connected to the controller 104 and the memory. The operating system refers to a software programmable system, which is usually carried on a chip with software programmability to work, such as the Feiteng series CPU, which has the characteristics of full spectrum, high performance, complete ecology, high degree of autonomy, high adaptability and compatibility, and can control different types of controlled devices. The memory refers to a device that can store data content, such as a flash memory, which is a flash memory chip that can save program files. On the basis of the flash memory being configured with UEFI (Unified Extensible Firmware Interface, providing an interface connecting the operating system and hardware), it is connected to the UEFI interface of the Feiteng series CPU through SPI (Serial Peripheral Interface, a physical bus interface), so that the Feiteng series CPU can complete the data processing in the Feiteng series CPU according to the program in the flash memory and the program in its own operating system, and output the corresponding control signal.

[0094] Furthermore, in one embodiment, the processor 102 and the controller 104 are connected in communication based on a GPIO interface. The GPIO (General Purpose Input Output) interface is an interface commonly used in embedded systems, which has high flexibility and scalability and can support multiple data inflows. The connection between the GPIO interface of the Feiteng series CPU and the IO BANK of the CPLD can enhance the adaptability of the device control system, so that it can adapt to more models and types of controlled devices.

[0095] In order to better understand the above scheme, combined with Figure 1 The application scenario shown is explained in detail below in conjunction with a specific embodiment.

[0096] In one embodiment, Figure 6As shown, the device control system includes Feiteng series processors, FLASH and CPLD. The Feiteng series processors are equipped with an operating system and are connected to FLASH in SPI mode through the UEFI interface. They are also connected to the IO BANK of the CPLD through the GPIO interface. The IO BANK of the CPLD is also connected to the IO interface of the controlled device.

[0097] The control process of the controlled device is as follows: Figure 7 As shown, the Feiteng series processor (CPU), FLASH, CPLD and controlled device are powered on first. At this time, the UEFI connected to the FLASH will initialize the CPU's GPIO interface, and the CPU will correct the IO state by itself, and at the same time, it will send control IO to the CPLD. However, the control IO at this time is not accurate when the IO state is not stable, so the CPLD does not process the CPU's control IO, and the CPLD gives the control IO (preset initial signal) of the initial state to control the controlled device. Wait for the CPU's operating system to be powered on and the normal loading of the operating system is completed, and the CPU sends accurate instruction IO to the CPLD. The accurate instruction IO corresponds to the logic set in the CPLD, so the CPLD can determine that the instruction IO sent by the CPU is correct, which indicates that the CPU's IO state has stabilized. The CPLD receives the control IO sent by the CPU, and sends it to the controlled device after corresponding level conversion to control the controlled device.

[0098] Since the solution of directly performing level conversion on the CPLD when the CPU processor is powered on has the defect that the IO of the CPU processor is uncontrollable and unstable during the power-on process. In this embodiment, through the collaborative control of the operating system of UEFI+CPLD+CPU during the power-on process, the reliability of device control is improved, and the situation of GPIO level jump during the power-on process of the CPU processor causing the GPIO controlled controlled device to be falsely triggered is reduced, making the device control method and device control system based on the GPIO control of the CPU processor more reliable and stable.

[0099] It should be understood that, although the steps in the flowcharts involved in the above embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above embodiments may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0100] Based on the same inventive concept, the embodiment of the present application also provides a device control device for implementing the device control method involved above. The implementation solution provided by the device to solve the problem is similar to the implementation solution recorded in the above method, so the specific limitations in one or more device control device embodiments provided below can refer to the limitations on the device control method above, and will not be repeated here.

[0101] In an exemplary embodiment, Figure 8 As shown, a device control device is provided, including: a startup module 820, an initial control module 840 and a processor control module 860, wherein:

[0102] The start-up module 820 is used to receive a control signal in response to an electric start-up signal; the electric start-up signal is used to indicate that the processor is powered on; the control signal is generated by the processor;

[0103] An initial control module 840, configured to control the controlled device based on a preset initial signal when the control signal does not match the preset command signal;

[0104] The processor control module 860 is used to control the controlled device based on the control signal when the control signal matches the preset instruction signal.

[0105] In one embodiment, the device control apparatus further includes a stabilization control module for continuously receiving subsequent control signals and controlling the controlled device based on the subsequent control signals after the processor control module 860 controls the controlled device based on the control signal when the control signal matches the preset instruction signal.

[0106] In one embodiment, the initial control module 840 is further configured to call a preset initial signal when the control signal does not match the preset instruction signal, transmit the preset initial signal to the controlled device, and control the controlled device.

[0107] In one embodiment, the processor control module 860 is also used to perform level conversion based on the control signal, generate a control level signal, transmit the control level signal to the controlled device, and control the controlled device when the control signal matches the preset instruction signal.

[0108] In one of the embodiments, the preset initial signal is determined by the controlled device.

[0109] In one embodiment, the control signal includes an actual control signal or an instruction signal, wherein the actual control signal is used to control the controlled device, and the instruction signal is used to indicate that the processor is powered on and matches the preset instruction signal.

[0110] Each module in the above-mentioned device control device can be implemented in whole or in part by software, hardware or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute the operations corresponding to each module above.

[0111] In an exemplary embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as shown in FIG. Fig. 9 As shown. The computer device includes a processor, a memory, an input / output interface, a communication interface, a display unit and an input device. The processor, the memory and the input / output interface are connected through a system bus, and the communication interface, the display unit and the input device are connected to the system bus through the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and the external device. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be implemented through WIFI, a mobile cellular network, near field communication (NFC) or other technologies. When the computer program is executed by the processor, a device control method is implemented. The display unit of the computer device is used to form a visually visible picture, which can be a display screen, a projection device or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device can be a touch layer covering the display screen, or a button, trackball or touchpad set on the computer device shell, or an external keyboard, touchpad or mouse.

[0112] Those skilled in the art will understand that Fig. 9 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0113] In an exemplary embodiment, a computer device is provided, including a memory and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, the following steps are implemented:

[0114] Receiving a control signal in response to an electrical start signal; the electrical start signal is used to indicate that the processor is powered on; the control signal is generated by the processor;

[0115] When the control signal does not match the preset command signal, the controlled device is controlled based on the preset initial signal;

[0116] When the control signal matches the preset instruction signal, the controlled device is controlled based on the control signal.

[0117] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0118] Continue to receive subsequent control signals, and control the controlled device based on the subsequent control signals.

[0119] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0120] In the case where the control signal does not match the preset command signal, the preset initial signal is called and transmitted to the controlled device to control the controlled device.

[0121] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0122] When the control signal matches the preset instruction signal, a level conversion is performed based on the control signal to generate a control level signal, which is then transmitted to the controlled device to control the controlled device.

[0123] In one of the embodiments, the preset initial signal is determined by the controlled device.

[0124] In one embodiment, the control signal includes an actual control signal or an instruction signal, wherein the actual control signal is used to control the controlled device, and the instruction signal is used to indicate that the processor is powered on and matches the preset instruction signal.

[0125] In one embodiment, a computer readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

[0126] Receiving a control signal in response to an electrical start signal; the electrical start signal is used to indicate that the processor is powered on; the control signal is generated by the processor;

[0127] When the control signal does not match the preset command signal, the controlled device is controlled based on the preset initial signal;

[0128] When the control signal matches the preset instruction signal, the controlled device is controlled based on the control signal.

[0129] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0130] Continue to receive subsequent control signals, and control the controlled device based on the subsequent control signals.

[0131] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0132] In the case where the control signal does not match the preset command signal, the preset initial signal is called and transmitted to the controlled device to control the controlled device.

[0133] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0134] When the control signal matches the preset instruction signal, a level conversion is performed based on the control signal to generate a control level signal, which is then transmitted to the controlled device to control the controlled device.

[0135] In one of the embodiments, the preset initial signal is determined by the controlled device.

[0136] In one embodiment, the control signal includes an actual control signal or an instruction signal, wherein the actual control signal is used to control the controlled device, and the instruction signal is used to indicate that the processor is powered on and matches the preset instruction signal.

[0137] In one embodiment, a computer program product is provided, comprising a computer program, which, when executed by a processor, implements the following steps:

[0138] Receiving a control signal in response to an electrical start signal; the electrical start signal is used to indicate that the processor is powered on; the control signal is generated by the processor;

[0139] When the control signal does not match the preset command signal, the controlled device is controlled based on the preset initial signal;

[0140] When the control signal matches the preset instruction signal, the controlled device is controlled based on the control signal.

[0141] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0142] Continue to receive subsequent control signals, and control the controlled device based on the subsequent control signals.

[0143] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0144] In the case where the control signal does not match the preset command signal, the preset initial signal is called and transmitted to the controlled device to control the controlled device.

[0145] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0146] When the control signal matches the preset instruction signal, a level conversion is performed based on the control signal to generate a control level signal, which is then transmitted to the controlled device to control the controlled device.

[0147] In one of the embodiments, the preset initial signal is determined by the controlled device.

[0148] In one embodiment, the control signal includes an actual control signal or an instruction signal, wherein the actual control signal is used to control the controlled device, and the instruction signal is used to indicate that the processor is powered on and matches the preset instruction signal.

[0149] A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, an artificial intelligence (AI) processor, etc., but are not limited to this.

[0150] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0151] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A device control method, characterized in that: The method comprises: Receiving a control signal in response to an electrical start-up signal; the electrical start-up signal is used to indicate that the processor is powered on; the control signal is generated by the processor; In the case where the control signal does not match the preset instruction signal, controlling the controlled device based on the preset initial signal; In a case where the control signal matches the preset instruction signal, the controlled device is controlled based on the control signal.

2. The method according to claim 1, characterized in that: In the case where the control signal matches the preset instruction signal, after controlling the controlled device based on the control signal, the method further includes: Continue to receive subsequent control signals, and control the controlled device based on the subsequent control signals.

3. The method according to claim 1, characterized in that When the control signal does not match the preset instruction signal, controlling the controlled device based on the preset initial signal includes: In the case where the control signal does not match the preset instruction signal, calling a preset initial signal; The preset initial signal is transmitted to the controlled device to control the controlled device.

4. The method according to claim 1, characterized in that: When the control signal matches the preset instruction signal, controlling the controlled device based on the control signal includes: When the control signal matches the preset instruction signal, performing level conversion based on the control signal to generate a control level signal; The control level signal is transmitted to the controlled device to control the controlled device.

5. The method according to any one of claims 1 to 4, characterized in that: The preset initial signal is determined by the controlled device.

6. The method according to claim 1, characterized in that The control signal includes an actual control signal or an instruction signal, wherein the actual control signal is used to control the controlled device, and the instruction signal is used to indicate that the processor has been powered on and matches the preset instruction signal.

7. A device control device, characterized in that: The device comprises: A startup module, for receiving a control signal in response to an electric startup signal; the electric startup signal is used to indicate that the processor is powered on; the control signal is generated by the processor; An initial control module, used to control the controlled device based on a preset initial signal when the control signal does not match the preset command signal; The processor control module is used to control the controlled device based on the control signal when the control signal matches the preset instruction signal.

8. A device control system, characterized in that: The device control system includes a processor and a controller, the controller is connected to the processor and the controlled device, the processor is used to generate a control signal and send it to the controller, and the controller is used to control the controlled device based on the method described in any one of claims 1-6.

9. The device control system according to claim 8, characterized in that: The processor and the controller are communicatively connected based on a GPIO interface.

10. The device control system according to claim 8, characterized in that: The processor includes an operating system and a memory, and the operating system is connected to the controller and the memory.

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