A power supply circuit, chip and low power consumption control method for overvoltage application

Abstract

The present invention discloses a power supply circuit, chip and low-power consumption control method for overvoltage application, including: a diode series branch, including multiple diodes connected in series, the positive pole is connected to the power supply, and the negative pole is defined as point A; a primary amplifier circuit, powered by point A, the input end is connected to the reference signal, and the output end is connected to the input end of the secondary amplifier circuit; the secondary amplifier circuit is powered by the power supply, and the output end is connected to point A; a reference signal generating circuit, powered by point A, is used to output the reference signal. The present invention enables the chip to work normally in an overvoltage environment, without the need for an additional independent voltage conversion chip, reducing costs, and can also shut down part of the voltage conversion circuit in low-power application scenarios, achieving a low-power consumption effect.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit design, and in particular to a power supply circuit and chip for overvoltage application and a low power consumption control method thereof. Background Art

[0002] For high-voltage power supply systems, many chip processes can only support a lower voltage range, so a voltage conversion chip is needed to convert the high-voltage power supply into a voltage range that the chip can withstand. For example, Figure 1 As shown, chip 1 is a voltage conversion chip, which converts the high voltage power supply VH into a low voltage power supply output voltage VL to provide a suitable power supply voltage for chip 2. Therefore, the traditional method requires at least two chips to solve the chip power supply problem, which undoubtedly increases the cost.

[0003] On the other hand, the voltage conversion chip must be working all the time and cannot be turned off, which will be a large part of the power consumption for low-power applications. Summary of the invention

[0004] Purpose of the invention: In order to solve the problem in the prior art that chips require additional voltage conversion chips in a high-voltage power supply system environment, resulting in high cost and high power consumption, the present invention provides a power supply circuit, chip and low-power consumption control method for overvoltage applications.

[0005] Technical solution: A power supply circuit for overvoltage application, comprising:

[0006] A diode series branch includes multiple diodes connected in series, with the positive electrode connected to the power supply and the negative electrode defined as point A;

[0007] The first-stage amplifier circuit is powered by point A, the input end is connected to the reference signal, and the output end is connected to the input end of the second-stage amplifier circuit;

[0008] The secondary amplifier circuit is powered by a power supply, and the output end is connected to point A;

[0009] The reference signal generating circuit is powered by point A and is used to output the reference signal.

[0010] Furthermore, assuming that the number of diodes in the diode series branch is N, the turn-on voltage of a single diode is Vdio, the power supply voltage is VH, the target supply voltage is VL, and the minimum operating voltage of the reference signal generating circuit is VR, then VH-VR ≥ N*Vdio≥VH-VL, where N is a positive integer.

[0011] Furthermore, N is the smallest positive integer that can satisfy the condition VH-VR≥N*Vdio≥VH-VL.

[0012] Furthermore, it also includes a control circuit, which is powered by point A and is used to output a control signal to the first-stage amplifier circuit and the reference signal generating circuit; assuming that the minimum operating voltage of the control circuit is VP, then VH-VP ≥ N*Vdio.

[0013] Furthermore, the secondary amplifier circuit includes a PMOS tube P1, a PMOS tube P2, an NMOS tube N1, an NMOS tube N2, a resistor R1, and a resistor R2. The sources of the PMOS tube P1 and the PMOS tube P2 are both connected to a power supply, the drain of the PMOS tube P1 is connected to point A, the gate of the PMOS tube P1 is connected to the gate of the PMOS tube P2, the drain of the PMOS tube P2 is connected to the drain of the NMOS tube N1, the source of the NMOS tube N1 is connected to the drain of the NMOS tube N2, the gate of the NMOS tube N1 is connected to point A, the source of the NMOS tube N2 is grounded, one end of the resistor R1 is connected to the resistor R2 and the input of the primary amplifier circuit, the other end of the resistor R1 is grounded, and the other end of the resistor R2 is connected to point A.

[0014] Furthermore, assuming that the voltage of the reference signal is Vref, there is a relationship among Vref, R1, R2 and the target power supply voltage VL: VL=Vref*(1+R2 / R1).

[0015] Furthermore, the safety voltage of the PMOS transistor P1 , the PMOS transistor P2 , the NMOS transistor N1 , and the NMOS transistor N2 is VS, and the power supply voltage VH>VS.

[0016] A chip for overvoltage application, further comprising the above-mentioned power supply circuit for overvoltage application.

[0017] A low power consumption control method for a chip in an overvoltage application comprises the following steps:

[0018] Power on;

[0019] When the voltage at point A reaches the minimum operating voltage of the control circuit, the control circuit sends an enable signal to the reference circuit and the first-stage amplifier circuit, and the reference circuit and the first-stage amplifier circuit start working;

[0020] When the chip enters a low power consumption state, the control circuit controls the reference circuit and the first-stage amplifier circuit to stop working;

[0021] When the chip is awakened from the low power consumption state, the control circuit controls the reference circuit and the first-stage amplifier circuit to restart working.

[0022] Compared with the prior art, the power supply circuit, chip and low power consumption control method for overvoltage application provided by the present invention have at least the following beneficial effects:

[0023] It enables the chip to work normally in an overvoltage environment without the need for an additional independent voltage conversion chip, thus reducing costs;

[0024] After the power circuit of the overvoltage application is turned on, the powered chip can work normally. When it is necessary to enter a low-power state, the power circuit of the overvoltage application can be turned off. At this time, the power circuit can still provide a low voltage to maintain low power consumption of the system, thereby reducing power consumption. It is especially suitable for use in low-power products. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is a structural schematic diagram of a high voltage power supply system in the prior art;

[0026] Figure 2 A schematic diagram of the power supply circuit for overvoltage application;

[0027] Figure 3 Schematic diagram of power supply circuit for overvoltage application;

[0028] Figure 4 The voltage change at point A in the power circuit for overvoltage application under different working conditions. DETAILED DESCRIPTION

[0029] The present invention is further explained below in conjunction with the accompanying drawings and specific embodiments.

[0030] A power circuit for overvoltage applications, such as Figure 2 As shown, including:

[0031] A diode series branch includes multiple diodes connected in series, with the positive electrode connected to the power supply and the negative electrode defined as point A. In the figure, a number of diodes are represented in series by dotted lines. The positive electrode refers to the positive electrode of the first diode from the power supply to the output, and the negative electrode refers to the negative electrode of the last diode.

[0032] The first-stage amplifier circuit is powered by point A, the input end is connected to the reference signal, and the output end is connected to the input end of the second-stage amplifier circuit. The first-stage amplifier circuit is implemented by an amplifier, and there are many specific implementation methods;

[0033] The secondary amplifier circuit is powered by a power supply, and the output end is connected to point A;

[0034] The reference signal generating circuit is powered by point A and is used to output the reference signal.

[0035] like Figure 3As shown, the second-stage amplifier circuit includes PMOS transistor P1, PMOS transistor P2, NMOS transistor N1, NMOS transistor N2, resistor R1, and resistor R2. The sources of PMOS transistor P1 and PMOS transistor P2 are both connected to the power supply. The drain of PMOS transistor P1 is connected to point A. The gate of PMOS transistor P1 is connected to the gate of PMOS transistor P2. The drain of PMOS transistor P2 is connected to the drain of NMOS transistor N1. The source of NMOS transistor N1 is connected to the drain of NMOS transistor N2. The source of NMOS transistor N2 is grounded. One end of resistor R1 is connected to resistor R2 and the input of the first-stage amplifier circuit, and the other end of resistor R1 is grounded. The other end of resistor R2 is connected to point A.

[0036] Assume that the voltage across any two terminals of the MOS transistors supported by the chip process does not exceed VS, that is, the safe voltage of PMOS transistor P1, PMOS transistor P2, NMOS transistor N1, and NMOS transistor N2 is VS. When the power supply voltage VH is greater than VS, that is, VH > VS, the chip can still work normally. Reason: For PMOS transistor P2, since PMOS transistor P2 is in diode connection, the voltage across any two of its terminals will not exceed VS, which can ensure that PMOS transistor P2 will not be damaged; for PMOS transistor P1, because the gate V GSP1 = V GSP2 , the gate-drain voltage V GDP1 =V DSP1 -V GSP1 <VH - VL, so as long as the voltage difference VH - VL < VS of V DSP1 is ensured, it can be ensured that PMOS transistor P1 will not be damaged. Since VL is the supply voltage of other circuits of the chip, it is also necessary to satisfy VL < VS; for NMOS transistor N2, due to the existence of NMOS transistor N1, its V DSN2 =VL - V GSN1 <VS, and its gate voltage will not exceed VL, which can ensure that NMOS transistor N2 will not be damaged; for NMOS transistor N1, because V DGN1 =VH - VL - V GSP2 <VS, V DSN1 =VH - V GSP2 - (VL - V GSN1 ) < VS, it can be ensured that NMOS transistor N1 will not be damaged. Assume that the diode series branch contains N diodes in series. The turn-on voltage of a single diode is Vdio. The series voltage of N diodes satisfies N * Vdio ≥ VH - VL. If the minimum operating voltage VR of the reference signal generation circuit is to be satisfied, then VH - N * Vdio ≥ VR, that is, the series voltage of the diode series branch should satisfy VH - VR ≥ N * Vdio ≥ VH - VL, where N is a positive integer. Preferably, N takes the smallest positive integer that can satisfy this condition.

[0037] In order to further adapt to low-power application scenarios, the power supply circuit for overvoltage applications may also include a control circuit, which is powered by point A and is used to output a control signal to a first-stage amplifier circuit and a reference signal generating circuit; assuming that the minimum operating voltage of the control circuit is VP, then VH-VP≥N*Vdio.

[0038] Assume that the voltage of the reference signal is Vref, the first-stage amplifier circuit mainly provides gain, the second-stage amplifier circuit mainly provides driving current capability, and outputs the target power supply voltage VL. Assuming that the gain of the first-stage amplifier circuit is A1, and the gain of the second-stage amplifier circuit is A2, the target power supply voltage VL=Vref*A1*A2 / (A1*A2(1+R2 / R1)+1) is approximately equal to Vref*(1+R2 / R1), where A1*A2 is much greater than 1.

[0039] A chip for overvoltage application, comprising the above-mentioned power supply circuit for overvoltage application, can enable the chip to still work when the power supply voltage exceeds its own safety voltage, without the need for an additional voltage conversion chip.

[0040] The low power consumption control method of the chip for overvoltage application comprises the following steps:

[0041] Power on;

[0042] When the voltage at point A reaches the minimum operating voltage of the control circuit, the control circuit sends an enable signal to the reference signal generating circuit and the first-stage amplifying circuit, and the reference signal generating circuit and the first-stage amplifying circuit start working;

[0043] When receiving a signal that requires entering a low power consumption state, the control circuit controls the reference circuit and the first-stage amplifier circuit to stop working;

[0044] When the chip is awakened from the low power consumption state, the control circuit controls the reference circuit and the first-stage amplifier circuit to restart working.

[0045] In many battery-powered applications, the chip needs to sleep with low power consumption, and only a small number of circuits are powered, and the rest of the circuits need to be turned off. In this embodiment, when the chip is in a low power consumption state, the control circuit controls the primary amplifier circuit and the reference signal generating circuit to stop working. At this time, the diode series branch plays a role, and the primary amplifier circuit, the secondary amplifier circuit, and the reference signal generating circuit in the power supply circuit of the overvoltage application no longer work. Figure 3 The dotted line in the middle is the part that does not work in low power consumption state. At this time, the chip is powered by the diode series branch, and the output VL=VH-N*Vdio. This overcomes the Figure 1 The traditional power supply method has the disadvantages that the chip 1 cannot be turned off and the standby power consumption is large. Under normal working conditions, the diode series branch does not work, and the dotted line box part works normally.

[0046] like Figure 4 It can be seen that the voltage VA at point A changes during the whole process. VB represents the power supply voltage, which is turned on at time 0. At time T0, the PMOS tube P1 is in the off state, the diode series branch is forward-conducting, and VA rises from 0 to VH-N*Vdio under the action of the diode. At this time, the minimum operating voltage VP of the control circuit and the minimum operating voltage VR of the reference signal generating circuit have been reached. The control circuit works and sends an enable signal to the reference signal generating circuit and the first-stage amplifier circuit. The reference signal generating circuit, the first-stage amplifier circuit, and the second-stage amplifier circuit work. At time T1, the diode series branch is no longer in effect, and VA rises to the target power supply voltage VL, providing the target power supply voltage for other circuits of the chip. At time T2, the chip enters a low-power state, and the control circuit controls the reference signal generating circuit and the first-stage amplifier circuit to suspend work. VA returns to VH-N*Vdio and waits for the chip to be awakened from the low-power state, and then rises to the target power supply voltage VL again.

Claims

1. A power supply circuit for overvoltage application, characterized in that: include: A diode series branch includes multiple diodes connected in series, with the positive electrode connected to the power supply and the negative electrode defined as point A; The first-stage amplifier circuit is powered by point A, the input end is connected to the reference signal, and the output end is connected to the input end of the second-stage amplifier circuit; A secondary amplifier circuit is powered by a power supply, and an output end is connected to point A; the secondary amplifier circuit comprises a PMOS tube P1, a PMOS tube P2, an NMOS tube N1, an NMOS tube N2, a resistor R1, and a resistor R2, the source electrodes of the PMOS tube P1 and the PMOS tube P2 are both connected to the power supply, the drain electrode of the PMOS tube P1 is connected to point A, the gate electrode of the PMOS tube P1 is connected to the gate electrode of the PMOS tube P2, the drain electrode of the PMOS tube P2 is connected to the drain electrode of the NMOS tube N1, the source electrode of the NMOS tube N1 is connected to the drain electrode of the NMOS tube N2, the gate electrode of the NMOS tube N1 is connected to point A, the source electrode of the NMOS tube N2 is grounded, one end of the resistor R1 is connected to the resistor R2 and the input of the primary amplifier circuit, the other end of the resistor R1 is grounded, and the other end of the resistor R2 is connected to point A; The reference signal generating circuit is powered by point A and is used to output the reference signal.

2. The power supply circuit for overvoltage application according to claim 1, characterized in that: Assume that the number of diodes in the diode series branch is N, the turn-on voltage of a single diode is Vdio, the power supply voltage is VH, the target power supply voltage is VL, and the minimum operating voltage of the reference signal generating circuit is VR, then VH-VR≥N*Vdio ≥ VH-VL, and N is a positive integer.

3. The power supply circuit for overvoltage application according to claim 2, characterized in that: N is the smallest positive integer that satisfies the condition VH-VR≥N*Vdio≥VH-VL.

4. The power supply circuit for overvoltage application according to any one of claims 1 to 3, characterized in that: It also includes a control circuit, which is powered by point A and is used to output a control signal to a first-stage amplifier circuit and a reference signal generating circuit. If the minimum operating voltage of the control circuit is VP, then VH-VP≥N*Vdio.

5. The power supply circuit for overvoltage application according to any one of claims 1 to 3, characterized in that: Assume that the voltage of the reference signal is Vref, and there is a relationship among Vref, R1, R2 and the target power supply voltage VL: VL=Vref*(1+R2 / R1).

6. The power supply circuit for overvoltage application according to any one of claims 1 to 3, characterized in that: The safety voltage of the PMOS tube P1, PMOS tube P2, NMOS tube N1, and NMOS tube N2 is VS, and the power supply voltage VH>VS.

7. A chip for overpressure application, characterized in that: A power supply circuit for overvoltage application comprising any one of claims 1 to 6.

8. A low power consumption control method for a chip in an overvoltage application as claimed in claim 7, characterized in that: The following steps are involved: Power on; When the voltage at point A reaches the minimum operating voltage of the control circuit, the control circuit sends an enable signal to the reference circuit and the first-stage amplifier circuit, and the reference circuit and the first-stage amplifier circuit start working; When the chip enters a low power consumption state, the control circuit controls the reference circuit and the first-stage amplifier circuit to stop working; When the chip is awakened from the low power consumption state, the control circuit controls the reference circuit and the first-stage amplifier circuit to restart working.

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