Error correction code replacement method and device of NAND FLASH memory

Abstract

The invention relates to an error correction code replacement method and device for an NAND FLASH memory. The method comprises the following steps: acquiring a detection error correction code from a detection data page in the NAND FLASH memory; determining an error correction code type of the NAND FLASH memory according to the detection error correction code; under the condition that the error correction code type of the NAND FLASH memory is a Hamming code type, generating a first error correction code according to storage data stored in each data page of the NAND FLASH memory; replacing a second error correction code in each data page of the NAND FLASH memory with the first error correction code so as to replace the error correction code type of the NAND FLASH memory from a Hamming code type to a BCH code type; through the method and the device, the technical problem that the error correction capability is insufficient when an NAND FLASH memory adopts a Hamming code to carry out error correction is solved.

Description

Technical Field

[0001] The present application relates to the field of memory technology, and in particular to a method and device for replacing an error correction code of a NAND FLASH memory. Background Art

[0002] NAND FLASH memory is a type of FLASH (flash memory) memory, which uses a nonlinear macrocell mode internally, providing a cheap and effective solution for the implementation of solid-state large-capacity memory. NAND FLASH memory has the advantages of large capacity, fast rewrite speed, and low cost, and is suitable for storing large amounts of data.

[0003] NAND FLASH memory is prone to errors in data reading and writing during use, so ECC (Error Correction Code) is usually set to detect and correct these errors. Hamming code is a specific implementation of ECC.

[0004] Generally speaking, Hamming codes are usually used for NAND FLASH memories with SLC architecture. However, with the upgrade of current production processes, we find that even for NAND FLASH memories with SLC architecture, the error correction capability of Hamming codes is insufficient when using Hamming codes for error correction.

[0005] In the prior art, there has been a technical problem that the error correction capability of NAND FLASH memory is insufficient when using Hamming code for error correction. Summary of the invention

[0006] The present application provides a method and device for replacing an error correction code of a NAND FLASH memory, so as to solve the technical problem that the error correction capability of the NAND FLASH memory is insufficient when the Hamming code is used for error correction.

[0007] In a first aspect, the present application provides a method for replacing an error correction code of a NAND FLASH memory, characterized in that the method comprises:

[0008] Acquire a detection error correction code from a detection data page in the NAND FLASH memory; wherein the detection data page is at least one data page of the NAND FLASH memory, and the detection error correction code is an error correction code stored in the detection data page;

[0009] Determining the error correction code type of the NAND FLASH memory according to the detected error correction code; wherein the error correction code type is a Hamming code type or a BCH code type;

[0010] In the case where the error correction code type of the NAND FLASH memory is the Hamming code type, a first error correction code is generated according to the storage data stored in each of the data pages of the NAND FLASH memory; wherein the first error correction code is a BCH code;

[0011] The second error correction code in each of the data pages of the NAND FLASH memory is replaced with the first error correction code, so as to replace the error correction code type of the NAND FLASH memory from the Hamming code type to the BCH code type; wherein the second error correction code is the error correction code originally stored in the data page.

[0012] In a feasible embodiment of the present application, obtaining a detection error correction code from a detection data page in the NAND FLASH memory includes:

[0013] Selecting any data page of the NAND FLASH memory as the detection data page;

[0014] The detection error correction code is obtained from a non-data area of ​​the detection data page.

[0015] In a feasible embodiment of the present application, obtaining a detection error correction code from a detection data page in the NAND FLASH memory further includes:

[0016] Selecting a data home page, a data middle page, and a data tail page of the NAND FLASH memory as the detection data page;

[0017] The detection error correction code is obtained from the non-data area in the data first page, the non-data area in the data middle page, and the non-data area in the data tail page.

[0018] In a feasible embodiment of the present application, determining the error correction code type of the NAND FLASH memory according to the first error correction code includes:

[0019] Acquire detection storage data from the data area of ​​the detection data page; wherein the detection storage data is the storage data stored in the detection data page;

[0020] The detection storage data is calculated by a first error correction code algorithm to generate a third error correction code corresponding to the detection storage data; wherein the first error correction code algorithm is used to calculate the Hamming code corresponding to the detection storage data;

[0021] Determining whether the third error correction code is consistent with the detection error correction code;

[0022] In a case where the third error correction code is consistent with the detection error correction code, determining that the error correction code type of the NAND FLASH memory is the Hamming code type;

[0023] When the third error correction code is inconsistent with the detection error correction code, it is determined that the error correction code type of the NAND FLASH memory is not the Hamming code type.

[0024] In a feasible embodiment of the present application, generating a first error correction code according to the storage data stored in each of the data pages of the NAND FLASH memory includes:

[0025] Verifying the correctness of the stored data;

[0026] When the stored data passes the correctness check, the stored data is calculated using a second error correction code algorithm to generate the first error correction code corresponding to the stored data; wherein the second error correction code algorithm is used to calculate the BCH code corresponding to the stored data.

[0027] In a feasible embodiment of the present application, after checking the correctness of the stored data, the method further includes:

[0028] In the case where the stored data fails the correctness check, performing error correction on the stored data by using the second error correction code to generate correct stored data;

[0029] The correct stored data is calculated using the second error correction code algorithm to generate the first error correction code corresponding to the correct stored data.

[0030] In a feasible embodiment of the present application, replacing the second error correction code in each of the data pages of the NAND FLASH memory with the first error correction code includes:

[0031] erasing the second error correction code in the data block in which the data page is located;

[0032] The first error correction code is written into a non-data area of ​​the corresponding data page in units of the data block where the data page is located.

[0033] In a second aspect, the present application provides an error correction code replacement device for a NAND FLASH memory, characterized in that the device comprises:

[0034] An acquisition module, used to acquire a detection error correction code from a detection data page in the NAND FLASH memory; wherein the detection data page is at least one data page of the NAND FLASH memory, and the detection error correction code is an error correction code stored in the detection data page;

[0035] A determination module, used to determine the error correction code type of the NAND FLASH memory according to the detected error correction code; wherein the error correction code type is a Hamming code type or a BCH code type;

[0036] A generating module, configured to generate a first error correction code according to the storage data stored in each of the data pages of the NAND FLASH memory when the error correction code type of the NAND FLASH memory is the Hamming code type; wherein the first error correction code is a BCH code;

[0037] A replacement module is used to replace the second error correction code in each data page of the NAND FLASH memory with the first error correction code, so as to replace the error correction code type of the NAND FLASH memory from the Hamming code type to the BCH code type; wherein the second error correction code is the error correction code originally stored in the data page.

[0038] In a third aspect, the present application provides an electronic device comprising: at least one communication interface; at least one bus connected to the at least one communication interface; at least one processor connected to the at least one bus; and at least one memory connected to the at least one bus, wherein the processor is configured to execute the error correction code replacement method for a NAND FLASH memory described in the first aspect of the present application.

[0039] In a fourth aspect, the present application further provides a computer storage medium storing computer executable instructions, wherein the computer executable instructions are used to execute the error correction code replacement method for a NAND FLASH memory described in the first aspect of the present application.

[0040] The above technical solution provided by the embodiment of the present application has the following advantages compared with the prior art:

[0041] The technical solution provided by the embodiment of the present application obtains a detection error correction code from a detection data page in a NAND FLASH memory; wherein the detection data page is any data page of the NAND FLASH memory, and the detection error correction code is the error correction code stored in the detection data page; the error correction code type of the NAND FLASH memory is determined according to the detection error correction code; wherein the error correction code type is a Hamming code type or a BCH code type; when the error correction code type of the NAND FLASH memory is a Hamming code type, a first error correction code is generated according to the storage data stored in each data page of the NAND FLASH memory; wherein the first error correction code is a BCH code; the second error correction code in each data page of the NAND FLASH memory is replaced with the first error correction code, so as to replace the error correction code type of the NAND FLASH memory from the Hamming code type to the BCH code type; wherein the second error correction code is the error correction code originally stored in the data page.

[0042] Through the technical solution provided by the present application, the error correction code type of the NAND FLASH memory can be firstly identified by detecting the error correction code in the data page. When the error correction code type of the NAND FLASH memory is a Hamming code type, the original second error correction code is replaced with the first error correction code, and the first error correction code is a BCH code, so that the error correction code type of the NAND FLASH memory is replaced with a BCH code type. Since the error correction capability of the BCH code is significantly stronger than that of the Hamming code, when the error correction code type of the NAND FLASH memory is set to the BCH code type, the error correction capability of the NAND FLASH memory can be effectively improved, and the technical problem of insufficient error correction capability when the NAND FLASH memory uses the Hamming code for error correction is solved. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0044] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0045] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0046] Figure 1 A flowchart of a method for replacing an error correction code of a NAND FLASH memory provided in an embodiment of the present application;

[0047] Figure 2 An overall flow chart of a NAND FLASH memory error correction code replacement method provided in an embodiment of the present application during specific implementation;

[0048] Figure 3 A schematic diagram of the structure of an error correction code replacement device for a NAND FLASH memory provided in an embodiment of the present application;

[0049] Figure 4 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0050] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0051] The disclosure below provides many different embodiments or examples to realize the different structures of the present application. In order to simplify the disclosure of the present application, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeat reference numbers and / or letters in different examples. This repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed.

[0052] In order to solve the technical problem in the prior art that the error correction capability of NAND FLASH memory is insufficient when using Hamming code for error correction, the present application provides a method and device for replacing the error correction code of NAND FLASH memory, which can change the error correction code type of NAND FLASH memory, thereby improving the error correction capability of NAND FLASH memory.

[0053] In order to better illustrate the error correction code replacement method of a NAND FLASH memory provided by the present application, the technical problem solved by the embodiment provided by the present application is first described in more detail.

[0054] In the prior art, the storage architecture of NAND FLASH memory includes SLC architecture, MLC architecture, TLC architecture, etc. The SLC architecture means that when the number of electrons in the transistor is less than 50%, it is set to represent 1, and when it is greater than 50%, it is set to represent 0; the MLC architecture performs second-order quantization on the number of electrons in the transistor, and one transistor can represent four states. When the number of electrons in the transistor is less than 25%, it is set to represent 00, when the number of electrons is 25% to 50%, it is set to represent 01, when the number of electrons is 50% to 75%, it is set to represent 10, and when the number of electrons is greater than 75%, it is set to represent 11; the TLC architecture is further divided, so that one transistor can represent eight states.

[0055] In the early production of NAND FLASH memory, the SLC architecture is mostly used. For the simpler SLC architecture, data error correction is usually performed through Hamming code.

[0056] However, with the upgrade of production technology, it is currently found that even for NAND FLASH memory with SLC architecture, data errors will frequently occur when the Hamming code is used for error correction.

[0057] In the actual production and sales of NAND FLASH memory, for the NAND FLASH memory that has been shipped and adopts SLC architecture and uses Hamming code for error correction, if the product is recalled due to insufficient error correction capability of the Hamming code, it will consume a lot of manpower and material resources. Therefore, it is expected to use a method to directly replace the error correction code of the NAND FLASH memory, and replace the Hamming code with poor error correction capability with the BCH code with better error correction capability.

[0058] The execution subject of the error correction code replacement method of a NAND FLASH memory provided in an embodiment of the present application may be a memory controller of the NAND FLASH memory.

[0059] Figure 1 A flowchart of a method for replacing an error correction code of a NAND FLASH memory provided in an embodiment of the present application is provided. Figure 1 The error correction code replacement method of a NAND FLASH memory provided in an embodiment of the present application specifically includes the following steps:

[0060] S1: Obtaining a detection error correction code from a detection data page in a NAND FLASH memory; wherein the detection data page is at least one data page of the NAND FLASH memory, and the detection error correction code is an error correction code stored in the detection data page;

[0061] Specifically, the detection error correction code is obtained from the detection data page in the NAND FLASH memory, wherein the NAND FLASH memory includes multiple data pages, and the detection data page is at least one data page from the multiple data pages. It can be seen that the detection data page can be one data page or multiple data pages.

[0062] In a feasible embodiment of the present application, any data page in the NAND FLASH memory can be randomly selected as the detection data page. However, randomly selecting any data page in the NAND FLASH memory as the detection data page may not be able to well represent the overall situation of the NAND FLASH memory. In another feasible embodiment of the present application, all the data pages in the NAND FLASH memory can also be directly used as the detection data pages. However, using all the data pages in the NAND FLASH memory as the detection data pages will affect the execution efficiency of subsequent implementation steps.

[0063] Therefore, in a preferred embodiment of the present application, the first page, mid page and end page of the NAND FLASH memory are selected as the detection data pages. By selecting the first page, mid page and end page as the detection data pages, on the one hand, the descriptiveness of the detection data page to the overall situation of the NAND FLASH memory is improved by increasing the detection samples, and on the other hand, the execution efficiency of the subsequent implementation steps will not be affected too much.

[0064] After the detection data page is determined, the detection error correction code is obtained from the detection data page. For the data page in the NAND FLASH memory, the corresponding error correction code is stored in the non-data area (Out Of Band, OOB) in the data page, so the detection error correction code can be directly obtained from the non-data area in the detection data page.

[0065] S2: determining the error correction code type of the NAND FLASH memory according to the detected error correction code; wherein the error correction code type is a Hamming code type or a BCH code type;

[0066] Specifically, if the error correction code in any data page of the NAND FLASH memory is a Hamming code, it means that the ECC mechanism of the NAND FLASH memory is a Hamming code, and the error correction code type of the NAND FLASH memory is a Hamming code type. Therefore, the error correction code type of the NAND FLASH memory can be determined by detecting the error correction code. If the detected error correction code is a Hamming code, it means that the error correction code type of the NAND FLASH memory is a Hamming code type. On the contrary, if the detected error correction code is not a Hamming code, it means that the error correction code type of the NAND FLASH memory is not a Hamming code type.

[0067] In a feasible embodiment of the present application, determining the error correction code type of the NAND FLASH memory according to the first error correction code includes:

[0068] Acquire detection storage data from the data area of ​​the detection data page; wherein the detection storage data is the storage data stored in the detection data page;

[0069] Calculating the detection storage data by using a first error correction code algorithm to generate a third error correction code corresponding to the detection storage data; wherein the first error correction code algorithm is used to calculate the Hamming code corresponding to the detection storage data;

[0070] Determining whether the third error correction code is consistent with the detection error correction code;

[0071] When the third error correction code is consistent with the detection error correction code, determining that the error correction code type of the NAND FLASH memory is a Hamming code type;

[0072] When the third error correction code is inconsistent with the detection error correction code, it is determined that the error correction code type of the NAND FLASH memory is not a Hamming code type.

[0073] Specifically, the detection storage data is the storage data stored in the detection data page. After the detection data page and the detection error correction code are determined, the storage data stored in the detection data page is obtained from the data area of ​​the detection data page, that is, the detection storage data is obtained.

[0074] A first error correction code algorithm is pre-stored in the memory controller, and the first error correction code algorithm is used to calculate the Hamming code corresponding to the storage data. After the detection storage data is acquired, the detection storage data is calculated by the error correction code algorithm to obtain a third error correction code. Since the algorithm for calculating the Hamming code corresponding to the storage data (i.e., the first error correction code algorithm) is a prior art, the specific content of the first error correction code algorithm is not described in detail here.

[0075] Since the first error correction code algorithm is used to calculate the Hamming code corresponding to the stored data, the third error correction code must be a Hamming code. By comparing the third error correction code with the detection error correction code, it can be determined whether the detection error correction code is a Hamming code, and then whether the error correction code type of the NAND FLASH memory is a Hamming code type. When the third error correction code is consistent with the detection error correction code, the detection error correction code is a Hamming code, and the error correction code type of the NAND FLASH memory is determined to be a Hamming code type; when the third error correction code is inconsistent with the detection error correction code, the detection error correction code is not a Hamming code, and the error correction code type of the NAND FLASH memory is determined not to be a Hamming code type.

[0076] S3: when the error correction code type of the NAND FLASH memory is a Hamming code type, generating a first error correction code according to the storage data stored in each data page of the NAND FLASH memory; wherein the first error correction code is a BCH code;

[0077] Specifically, if the error correction code type of the NAND FLASH memory is currently determined to be a Hamming code type, the error correction code originally stored in each data page of the NAND FLASH memory needs to be replaced. If the error correction code originally stored in each data page is replaced with a first error correction code, the first error correction code needs to be generated according to the storage data stored in each data page. The first error correction code is a BCH code, and the error correction capability of the BCH code is significantly stronger than that of the Hamming code.

[0078] In a feasible embodiment of the present application, generating a first error correction code according to storage data stored in each data page of the NAND FLASH memory includes:

[0079] Verify the correctness of stored data;

[0080] When the stored data passes the correctness check, the stored data is calculated by a second error correction code algorithm to generate a first error correction code corresponding to the stored data; wherein the second error correction code algorithm is used to calculate a BCH code corresponding to the stored data;

[0081] When the stored data fails the correctness check, the stored data is corrected by the second error correction code to generate correct stored data; the correct stored data is calculated by the second error correction code algorithm to generate a first error correction code corresponding to the correct stored data.

[0082] Specifically, to ensure the accuracy of the first error correction code, the stored data needs to be checked for correctness. In a feasible embodiment of the present application, the correctness check of the stored data can be performed using the error correction code originally stored in the data page.

[0083] The correctness of the stored data is checked by the error correction code originally stored in the data page (i.e., the second error correction code). If the stored data passes the correctness check, it means that the current stored data is error-free. At this time, the first error correction code corresponding to the stored data can be directly calculated.

[0084] In a feasible embodiment of the present application, the first error correction code is a BCH code, and the first error correction code is calculated by a second error correction code algorithm. The second error correction code algorithm is used to calculate the BCH code corresponding to the stored data, and the second error correction algorithm can be pre-stored in the memory controller. Since the algorithm for calculating the BCH code corresponding to the stored data (i.e., the second error correction code algorithm) is a prior art, the specific content of the second error correction code algorithm is not described in detail here.

[0085] If the stored data fails the correctness check, it means that there are errors in the current stored data. At this time, the stored data is corrected by the error correction code originally stored in the data page (i.e., the second error correction code), and the stored data is converted into correct stored data. The correct stored data is then calculated based on the second error correction code algorithm to obtain the first error correction code.

[0086] S4: replacing the second error correction code in each data page of the NAND FLASH memory with the first error correction code, so as to replace the error correction code type of the NAND FLASH memory from the Hamming code type to the BCH code type; wherein the second error correction code is the error correction code originally stored in the data page;

[0087] Specifically, based on the above embodiment, the first error correction code corresponding to the storage data in each data page of the NAND FLASH memory has been determined. At this time, the second error correction code originally stored in each data page can be replaced by the first error correction code. After the replacement is completed, the error correction codes in each data page of the NAND FLASH memory are all BCH codes, and then the error correction code type of the NAND FLASH memory is replaced from the Hamming code type to the BCH code type.

[0088] In a feasible embodiment of the present application, replacing the second error correction code in each data page of the NAND FLASH memory with the first error correction code includes:

[0089] Erasing the second error correction code in the data block in units of the data block where the data page is located;

[0090] The first error correction code is written into the non-data area of ​​the corresponding data page in units of the data block where the data page is located.

[0091] Specifically, when replacing the error correction code in each data page of the NAND FLASH memory, in order to improve data processing efficiency, the error correction code is erased and written in units of data blocks. For a data block in the NAND FLASH memory, which includes multiple data pages, the first error correction code corresponding to each data page in the data block is first calculated, and then the error correction code (i.e., the second error correction code) originally stored in each data page in the current data block is erased as a whole, and then the calculated first error correction code is written as a whole, and the first error correction code is stored in the non-data area of ​​each data page.

[0092] In a feasible embodiment of the present application, erasing and writing of error correction codes are performed in units of data blocks. Before erasing and writing of error correction codes for any data block, the following steps are also included:

[0093] Determine whether the data block to be written / erased is a bad block, and determine whether the data block to be written / erased is an empty block;

[0094] When the data block to be written / erased is a bad block or the data block to be written / erased is an empty block, skip the data block to be written / erased;

[0095] When the data block to be written / erased is not a bad block or the data block to be written / erased is not an empty block, the error correction code is erased and written.

[0096] Specifically, when a data block is a bad block, the stored data stored in the data page in the data block has errors that are difficult to correct, so the first error correction code corresponding to the stored data cannot be generated, and thus the error correction code cannot be replaced; when a data block is an empty block, the stored data is not stored in the data page in the data block, so the first error correction code corresponding to the stored data cannot be generated, and thus the error correction code cannot be replaced. For bad blocks and empty blocks, the data blocks need to be further repaired. In order not to affect the execution efficiency of the technical solution provided by the present application, in the technical solution provided by the present application, data blocks that are bad blocks or empty blocks are skipped.

[0097] Through the technical solution provided by the present application, the error correction code type of the NAND FLASH memory can be firstly identified by detecting the error correction code in the data page. When the error correction code type of the NAND FLASH memory is a Hamming code type, the original second error correction code is replaced with the first error correction code, and the first error correction code is a BCH code, so that the error correction code type of the NAND FLASH memory is replaced with a BCH code type. Since the error correction capability of the BCH code is significantly stronger than that of the Hamming code, when the error correction code type of the NAND FLASH memory is set to the BCH code type, the error correction capability of the NAND FLASH memory can be effectively improved, and the technical problem of insufficient error correction capability when the NAND FLASH memory uses the Hamming code for error correction is solved.

[0098] Figure 2 The overall flow chart of the specific implementation of the error correction code replacement method of a NAND FLASH memory provided in the embodiment of the present application is shown in FIG. Figure 2 In some practical implementations, a method for replacing an error correction code of a NAND FLASH memory provided by an embodiment of the present application may specifically include the following steps:

[0099] S201: sampling a detection data page, and determining an error correction code type of the NAND FLASH memory based on the detection data page;

[0100] S202: Determine whether the error correction code type of the NAND FLASH memory is a Hamming code type? If the error correction code type of the NAND FLASH memory is a Hamming code type, continue with steps S203-S210; if the error correction code type of the NAND FLASH memory is not a Hamming code type, end;

[0101] S203: Read the nth data block;

[0102] S204: Determine whether the data block is a bad block? If the data block is a bad block, read the n+1th data block and repeat S205; if the data block is not a bad block, continue to S206;

[0103] S205: Determine whether the data block is an empty block? If the data block is an empty block, read the n+1th data block and repeat S206; if the data block is not a bad block, continue to S207;

[0104] S206: Correct the original stored data by using the Hamming code in the data page in the data block to obtain the corrected stored data;

[0105] S207: Erasing the original stored data in units of data blocks;

[0106] S208: Determine a BCH code based on the error-corrected stored data;

[0107] S209: Writing the error-corrected stored data and the corresponding BCH code in units of data blocks.

[0108] Figure 3 A schematic diagram of the structure of an error correction code replacement device for a NAND FLASH memory provided in an embodiment of the present application. Corresponding to the above method embodiment, an embodiment of the present application further provides an error correction code replacement device for a NAND FLASH memory, referring to Figure 3 , the device specifically comprises:

[0109] The acquisition module 301 is used to acquire the detection error correction code from the detection data page in the NAND FLASH memory; wherein the detection data page is at least one data page of the NAND FLASH memory, and the detection error correction code is the error correction code stored in the detection data page;

[0110] The determination module 302 is used to determine the error correction code type of the NAND FLASH memory according to the detected error correction code; wherein the error correction code type is a Hamming code type or a BCH code type;

[0111] The generating module 303 is used to generate a first error correction code according to the storage data stored in each data page of the NAND FLASH memory when the error correction code type of the NAND FLASH memory is a Hamming code type; wherein the first error correction code is a BCH code;

[0112] The replacement module 304 is used to replace the second error correction code in each data page of the NAND FLASH memory with the first error correction code, so as to replace the error correction code type of the NAND FLASH memory from the Hamming code type to the BCH code type; wherein the second error correction code is the error correction code originally stored in the data page.

[0113] In a feasible embodiment of the present application, the acquisition module 301 may include:

[0114] A first selection unit is used to select any data page of the NAND FLASH memory as a detection data page;

[0115] The first acquisition unit is used to acquire the detection error correction code from the non-data area of ​​the detection data page.

[0116] In a feasible embodiment of the present application, the acquisition module 301 may further include:

[0117] The second selection unit is used to select the data first page, data middle page and data last page of the NAND FLASH memory as the detection data page;

[0118] The second acquisition unit is used to acquire the detection error correction code from the non-data area in the data first page, the non-data area in the data middle page, and the non-data area in the data last page.

[0119] In a feasible embodiment of the present application, the determination module 302 includes:

[0120] A third acquisition unit is used to acquire detection storage data from the data area of ​​the detection data page; wherein the detection storage data is the storage data stored in the detection data page;

[0121] A first calculation unit, used to calculate the detection storage data by using a first error correction code algorithm to generate a third error correction code corresponding to the detection storage data; wherein the first error correction code algorithm is used to calculate the Hamming code corresponding to the detection storage data;

[0122] A judging unit, used to judge whether the third error correction code is consistent with the detection error correction code;

[0123] A first determining unit, configured to determine that the error correction code type of the NAND FLASH memory is a Hamming code type when the third error correction code is consistent with the detection error correction code;

[0124] The second determining unit is used to determine that the error correction code type of the NAND FLASH memory is not a Hamming code type when the third error correction code is inconsistent with the detection error correction code.

[0125] In a feasible embodiment of the present application, the generating module 303 includes:

[0126] A verification unit, used to verify the correctness of stored data;

[0127] The second calculation unit is used to calculate the stored data through a second error correction code algorithm to generate a first error correction code corresponding to the stored data when the stored data passes the correctness check; wherein the second error correction code algorithm is used to calculate the BCH code corresponding to the stored data.

[0128] In a feasible embodiment of the present application, the generating module 303 further includes:

[0129] An error correction unit, used to correct the stored data by using a second error correction code to generate correct stored data when the stored data fails to pass the correctness check;

[0130] The third calculation unit is used to calculate the correctly stored data by using the second error correction code algorithm to generate a first error correction code corresponding to the correctly stored data.

[0131] In a feasible embodiment of the present application, the replacement module 304 further includes:

[0132] An erasing unit, used for erasing the second error correction code in the data block in units of the data block where the data page is located;

[0133] The writing unit is used to write the first error correction code into the non-data area of ​​the corresponding data page based on the data block where the data page is located.

[0134] like Figure 4 As shown, an embodiment of the present application provides an electronic device, including a processor 401, a communication interface 402, a memory 403 and a communication bus 404, wherein the processor 401, the communication interface 402, and the memory 403 communicate with each other through the communication bus 404.

[0135] Memory 403, used for storing computer programs;

[0136] In one embodiment of the present application, the processor 401 is used to implement a NAND FLASH memory error correction code replacement method provided by any one of the aforementioned method embodiments when executing a program stored in the memory 403, for example, including:

[0137] Acquire a detection error correction code from a detection data page in a NAND FLASH memory; wherein the detection data page is at least one data page of the NAND FLASH memory, and the detection error correction code is an error correction code stored in the detection data page;

[0138] Determine the error correction code type of the NAND FLASH memory according to the detected error correction code; wherein the error correction code type is a Hamming code type or a BCH code type;

[0139] When the error correction code type of the NAND FLASH memory is a Hamming code type, a first error correction code is generated according to the storage data stored in each data page of the NAND FLASH memory; wherein the first error correction code is a BCH code;

[0140] The second error correction code in each data page of the NAND FLASH memory is replaced with the first error correction code, so as to replace the error correction code type of the NAND FLASH memory from the Hamming code type to the BCH code type; wherein the second error correction code is the error correction code originally stored in the data page.

[0141] An embodiment of the present application further provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of a method for replacing an error correction code of a NAND FLASH memory provided in any of the aforementioned method embodiments are implemented.

[0142] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0143] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a general hardware platform, and of course, by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the relevant technology can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0144] It should be understood that the terms used herein are only for the purpose of describing specific example embodiments and are not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms "one", "an" and "said" as used herein may also be meant to include plural forms. The terms "include", "comprise", "contain", and "have" are inclusive, and therefore specify the existence of stated features, steps, operations, elements and / or parts, but do not exclude the existence or addition of one or more other features, steps, operations, elements, parts, and / or combinations thereof. The method steps, processes, and operations described herein are not interpreted as necessarily requiring them to be performed in the specific order described or illustrated, unless the execution order is clearly indicated. It should also be understood that additional or alternative steps may be used.

[0145] The above description is only a specific implementation of the present application, so that those skilled in the art can understand or implement the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest range consistent with the principles and novel features applied for herein.

Claims

1. A method for replacing an error correction code of a NAND FLASH memory, characterized in that: The method comprises: Acquire a detection error correction code from a detection data page in the NAND FLASH memory; wherein the detection data page is at least one data page of the NAND FLASH memory, and the detection error correction code is an error correction code stored in the detection data page; Determining the error correction code type of the NAND FLASH memory according to the detected error correction code; wherein the error correction code type is a Hamming code type or a BCH code type; In the case where the error correction code type of the NAND FLASH memory is the Hamming code type, a first error correction code is generated according to the storage data stored in each of the data pages of the NAND FLASH memory; wherein the first error correction code is a BCH code; The second error correction code in each of the data pages of the NAND FLASH memory is replaced with the first error correction code, so as to replace the error correction code type of the NAND FLASH memory from the Hamming code type to the BCH code type; wherein the second error correction code is the error correction code originally stored in the data page.

2. The method according to claim 1, characterized in that Acquiring a detection error correction code from a detection data page in the NAND FLASH memory includes: Selecting any data page of the NAND FLASH memory as the detection data page; The detection error correction code is obtained from a non-data area of ​​the detection data page.

3. The method according to claim 2, characterized in that Acquiring a detection error correction code from a detection data page in the NAND FLASH memory also includes: Selecting a data home page, a data middle page, and a data tail page of the NAND FLASH memory as the detection data page; The detection error correction code is obtained from the non-data area in the data first page, the non-data area in the data middle page, and the non-data area in the data tail page.

4. The method according to claim 1, characterized in that: Determining the error correction code type of the NAND FLASH memory according to the first error correction code includes: Acquire detection storage data from the data area of ​​the detection data page; wherein the detection storage data is the storage data stored in the detection data page; The detection storage data is calculated by a first error correction code algorithm to generate a third error correction code corresponding to the detection storage data; wherein the first error correction code algorithm is used to calculate the Hamming code corresponding to the detection storage data; Determining whether the third error correction code is consistent with the detection error correction code; In a case where the third error correction code is consistent with the detection error correction code, determining that the error correction code type of the NAND FLASH memory is the Hamming code type; When the third error correction code is inconsistent with the detection error correction code, it is determined that the error correction code type of the NAND FLASH memory is not the Hamming code type.

5. The method according to claim 1, characterized in that Generating a first error correction code according to the storage data stored in each of the data pages of the NAND FLASH memory, comprising: Verifying the correctness of the stored data; When the stored data passes the correctness check, the stored data is calculated using a second error correction code algorithm to generate the first error correction code corresponding to the stored data; wherein the second error correction code algorithm is used to calculate the BCH code corresponding to the stored data.

6. The method according to claim 5, characterized in that After checking the correctness of the stored data, the method further includes: In the case where the stored data fails the correctness check, performing error correction on the stored data by using the second error correction code to generate correct stored data; The correct stored data is calculated using the second error correction code algorithm to generate the first error correction code corresponding to the correct stored data.

7. The method according to claim 1, characterized in that Replacing the second error correction code in each of the data pages of the NAND FLASH memory with the first error correction code, comprising: erasing the second error correction code in the data block in which the data page is located; The first error correction code is written into a non-data area of ​​the corresponding data page in units of the data block where the data page is located.

8. A NAND FLASH memory error correction code replacement device, characterized in that: The device comprises: An acquisition module, used to acquire a detection error correction code from a detection data page in the NAND FLASH memory; wherein the detection data page is at least one data page of the NAND FLASH memory, and the detection error correction code is an error correction code stored in the detection data page; A determination module, used to determine the error correction code type of the NAND FLASH memory according to the detected error correction code; wherein the error correction code type is a Hamming code type or a BCH code type; A generating module, configured to generate a first error correction code according to the storage data stored in each of the data pages of the NAND FLASH memory when the error correction code type of the NAND FLASH memory is the Hamming code type; wherein the first error correction code is a BCH code; A replacement module is used to replace the second error correction code in each data page of the NAND FLASH memory with the first error correction code, so as to replace the error correction code type of the NAND FLASH memory from the Hamming code type to the BCH code type; wherein the second error correction code is the error correction code originally stored in the data page.

9. An electronic device, characterized in that: include: at least one communication interface; at least one bus connected to the at least one communication interface; at least one processor coupled to the at least one bus; At least one memory connected to the at least one bus, wherein the processor is configured to be able to implement the error correction code replacement method for the NAND FLASH memory as described in any one of claims 1-7.

10. A computer storage medium, characterized in that: Computer executable instructions are stored, and the computer executable instructions are used to execute the error correction code replacement method of the NAND FLASH memory as described in any one of claims 1-7.

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