Nonvolatile memory erasing method and device, electronic equipment and storage medium

Abstract

The embodiment of the invention provides a nonvolatile memory erasing method and device, electronic equipment and a storage medium, and relates to the technical field of nonvolatile memories. A storage array of the nonvolatile memory comprises a plurality of blocks, each block comprises a plurality of data blocks, the data blocks to be erased of a selected target block in the nonvolatile memory are subjected to over-erasure operation, the total erasure frequency of completing the over-erasure operation is recorded, and the data blocks to be erased in the target block are erased according to the total erasure frequency. Determining a repair interval value, needing to be repaired, of the target block; the total number of times of erasing represents the interference degree of the block, and the greater the total number of times of erasing is, the greater the interference degree of the block is, and the greater the repair interval value is; and according to the repair interval value, selecting a target repair area needing to be repaired from the target block, and performing repair operation on the target repair area. Therefore, the block can be repaired according to the interference degree of the block, and the erasing efficiency is further improved.

Description

Technical Field

[0001] The present invention relates to the technical field of non-volatile memory, and in particular to a non-volatile memory erasing method, device, electronic device and storage medium. Background Art

[0002] The operating principle of the memory cells in the same block of non-volatile memory is based on the behavior of the Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET). When a memory cell is selected, the gate of the cell is connected to a negative high voltage (usually called "on"), which can form a conduction channel (r DS or R on) so that current can flow from the source to the drain, representing a logic 1. For unselected cells, since the gate is connected to a positive low voltage or 0V (i.e. "off"), the MOSFET is turned off and almost no current flows, so it will not affect other selected cells. However, if the gate of the unselected memory cell contacts the positive high voltage, even if there is only a weak contact (such as weak erase phenomenon), it may still be partially turned on, resulting in charge exchange with the P-WELL. In this case, although it is not a normal read and write operation, it may cause a slight change in the stored information, especially under static conditions, which is called weak interference or weak erase effect.

[0003] In the related art, a method to solve the weak erase effect is to repair all storage units in the same block after erasing the data block. However, this method will result in low erase efficiency of the non-volatile memory because all storage units in the same block need to be repaired. Summary of the invention

[0004] In view of this, an object of the embodiments of the present invention is to provide a non-volatile memory erasing method, device, electronic device and storage medium to at least partially improve the above-mentioned problem.

[0005] In order to achieve the above purpose, the technical solution adopted by the embodiment of the present invention is as follows:

[0006] In a first aspect, an embodiment of the present invention provides a method for erasing a non-volatile memory, wherein a storage array of the non-volatile memory includes a plurality of blocks, each of the blocks includes a plurality of data blocks, and the method includes:

[0007] Performing an over-erasing operation on a to-be-erased data block of a selected target block in a non-volatile memory, and recording a total number of erasures completed by the over-erasing operation;

[0008] According to the total number of erasures, a repair interval value of the target block that needs to be repaired is determined; the total number of erasures represents the degree to which the block is disturbed, and the greater the total number of erasures, the greater the degree to which the block is disturbed, and the greater the repair interval value;

[0009] According to the repair interval value, a target repair area to be repaired is selected from the target block, and a repair operation is performed on the target repair area; the size of the target repair area is the repair interval value.

[0010] Optionally, performing an over-erasing operation on the to-be-erased data block of the target block selected in the non-volatile memory and recording a total number of erasures completed by the over-erasing operation includes:

[0011] Erasing the data block to be erased, recording the current erasure count, and verifying whether the data block to be erased has been erased;

[0012] If yes, taking the current number of erasures as the total number of erasures;

[0013] If not, determining whether the current erasure count is greater than or equal to a preset maximum erasure count;

[0014] In the case where the current erasure count is greater than or equal to the preset maximum erasure count, the preset maximum erasure count is used as the total erasure count;

[0015] In the case that the current number of erasures is less than the preset maximum number of erasures, the steps of erasing the data block to be erased, recording the current number of erasures, and verifying whether the data block to be erased has been erased are repeated until the data block to be erased has been erased or the current number of erasures is greater than or equal to the preset maximum number of erasures.

[0016] Optionally, determining a repair interval value for the target block to be repaired according to the total number of erasures includes:

[0017] Based on the repair interval calculation formula, according to the total number of erasures, the repair interval value that the target block needs to be repaired is calculated and determined; the repair interval calculation formula is:

[0018]

[0019] Among them, x is the total number of erasures, y is the repair interval value, n is a positive integer, and a, b, and c are coefficients.

[0020] Optionally, the data block includes a plurality of storage units, and selecting a target repair area to be repaired from the target block according to the repair interval value, and performing a repair operation on the target repair area includes:

[0021] Selecting a storage address of a storage unit in a data block of the target block other than the to-be-erased data block;

[0022] Taking the storage address as the starting address, continuously selecting a plurality of storage units of the repair interval value;

[0023] A repair operation is performed on each of the storage units.

[0024] Optionally, before the step of performing an over-erasing operation on the to-be-erased data block of the target block selected in the non-volatile memory and recording the total number of erasures completed by the over-erasing operation, the method further comprises:

[0025] Pre-programming the data block to be erased, and recording the total time of the pre-programming;

[0026] Determining the repair interval value of the target block that needs to be repaired according to the total number of erasures includes:

[0027] According to the total number of erasures and the total time, a repair interval value for which the target block needs to be repaired is determined.

[0028] Optionally, determining a repair interval value for the target block to be repaired according to the total number of erasures and the total time includes:

[0029] According to the total number of erasures and the total time, the repair interval value that needs to be repaired for the target block is determined according to a preset strategy; the preset strategy is that the greater the total number of erasures, the larger the repair interval value, the smaller the total number of erasures, the smaller the repair interval value, the greater the total time, the larger the repair interval value, and the smaller the total time, the smaller the repair interval value.

[0030] Optionally, determining the repair interval value of the target block to be repaired according to the total number of erasures and the total time according to a preset strategy includes:

[0031] Calculate a repair coefficient according to a first preset weight of the total number of erasures and a second preset weight of the total time;

[0032] According to the repair coefficient, a repair interval value of the target block that needs to be repaired is determined.

[0033] In a second aspect, an embodiment of the present invention provides a non-volatile memory erasing device, wherein a storage array of the non-volatile memory includes a plurality of blocks, each of the blocks includes a plurality of data blocks, and the device includes:

[0034] An over-erasing unit, used for performing an over-erasing operation on a to-be-erased data block of a selected target block in the non-volatile memory, and recording a total number of erasing times for completing the over-erasing operation;

[0035] a repair interval value determination unit, configured to determine a repair interval value for repairing the target block according to the total number of erasures; the total number of erasures represents the degree to which the block is disturbed, and the greater the total number of erasures, the greater the degree to which the block is disturbed, and the greater the repair interval value;

[0036] A repair unit is used to select a target repair area to be repaired from the target block according to the repair interval value, and perform a repair operation on the target repair area; the size of the target repair area is the repair interval value.

[0037] In a third aspect, an embodiment of the present invention provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and running on the processor, wherein the processor implements any of the above-described methods when executing the program.

[0038] In a fourth aspect, an embodiment of the present invention provides a storage medium having a computer program stored thereon, wherein the computer program implements any of the above-described methods when executed by a processor.

[0039] A non-volatile memory erasing method, device, electronic device and storage medium provided by an embodiment of the present invention improves the erasing efficiency of the non-volatile memory by recording the total number of erasures completed when erasing data in the non-volatile memory, and determining the size of the interval that needs to be repaired based on the total number of erasures. The non-volatile memory also reduces the error rate while maintaining high-performance erasure by recording the pre-programming time of the erased data block and combining the pre-programming time and the total number of erasures to protect the overall reliability of the non-volatile memory.

[0040] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are specifically cited below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0042] Figure 1 A schematic structural block diagram of an electronic device provided by an embodiment of the present invention;

[0043] Figure 2 A schematic structural block diagram of a non-volatile memory provided by an embodiment of the present invention;

[0044] Figure 3 A schematic diagram of a flow chart of a non-volatile memory erasing method provided in an embodiment of the present invention;

[0045] Figure 4 A schematic diagram of a flow chart of step S210 provided in an embodiment of the present invention;

[0046] Figure 5 Another schematic diagram of a flow chart of a non-volatile memory erasing method provided by an embodiment of the present invention;

[0047] Figure 6 A schematic structural block diagram of a non-volatile memory erasing device provided in an embodiment of the present invention.

[0048] Icons: 100 - electronic device; 101 - memory; 102 - communication interface; 103 - processor; 104 - bus; 300 - non-volatile memory; 310 - block; 311 - data block; 400 - non-volatile memory erasing device; 410 - over-erasing unit; 420 - repair interval value determination unit; 430 - repair unit. DETAILED DESCRIPTION

[0049] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0050] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0051] It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings. At the same time, in the description of the present invention, the terms "first", "second", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0052] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0053] As described in the background art, see Figure 2 , Figure 2 A schematic structural block diagram of a non-volatile memory provided in an embodiment of the present invention, wherein a storage array of the non-volatile memory 300 includes a plurality of blocks 310, each block includes a plurality of data blocks 311, and when erasing a data block 311, it may cause interference to other data blocks in the same block of the data block 311, affecting data reliability, and therefore, it is necessary to repair the interference area. In the related art, a method for solving the weak erasure effect is to perform a repair operation on all storage units in the same block after erasing the data block, but this method requires repairing all storage units in the same block, which will result in low erasing efficiency of the non-volatile memory.

[0054] Based on the above situation, an embodiment of the present invention provides a non-volatile memory erasure method, device, electronic device and storage medium, which improves the erasure efficiency of the non-volatile memory by recording the total number of erasures when erasing data blocks of the non-volatile memory and determining the size of the interval that needs to be repaired.

[0055] To implement the process steps and functions of each example of the present invention, please refer to Figure 1 , Figure 1 A schematic structural block diagram of an electronic device provided by an embodiment of the present invention. The electronic device 100 includes a memory 101 and a processor 103, and the memory 101 and the processor 103 are electrically connected to each other directly or indirectly to realize data transmission or interaction. For example, these elements can be electrically connected to each other through one or more communication buses 104 or signal lines. The memory 101 can be used to store software programs and modules, and the processor 103 executes the software programs and modules stored in the memory 101 to perform various functional applications and data processing.

[0056] The electronic device 100 may be, but is not limited to, a personal computer (PC), a server, a distributed computer, etc. It is understandable that the electronic device 100 is not limited to a physical server, but may also be a virtual machine on a physical server, a virtual machine built on a cloud platform, etc., which can provide the same functions as the server or virtual machine. The operating system of the electronic device 100 may be, but is not limited to, a Windows system, a Linux system, etc.

[0057] Among them, the memory 101 can be, but is not limited to, a random access memory (RAM), a read only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable read-only memory (EEPROM), etc.

[0058] The communication connection between the electronic device 100 and an external device is achieved through at least one communication interface 102 (which can be wired or wireless).

[0059] The processor 103 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the embodiment of the present invention can be completed by the hardware integrated logic circuit in the processor 103 or the instructions in the form of software. The processor 103 can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components.

[0060] Understandably, Figure 1 The structure shown is for illustration only. The electronic device 100 may also include Figure 1 More or fewer components as shown, or with Figure 1 Different configurations are shown. Figure 1 Each component shown in the figure can be implemented by hardware, software or a combination thereof.

[0061] The following is an exemplary description of the non-volatile memory erasing method provided by the present invention. Figure 2 , Figure 2 A schematic structural block diagram of a non-volatile memory provided in an embodiment of the present invention, wherein a storage array of the non-volatile memory 300 includes a plurality of blocks 310, each of which includes a plurality of data blocks 311. Figure 3 , Figure 3 A flowchart of a non-volatile memory erasing method provided by an embodiment of the present invention, the method execution subject may be the above Figure 1 The electronic device 100 shown in FIG. 1 includes: Figure 3 The following steps are described:

[0062] S210: performing an over-erasing operation on the to-be-erased data block of the selected target block in the non-volatile memory, and recording the total number of erasing times of completing the over-erasing operation.

[0063] The erasing operation is performed on a data block to be erased in a target block, but one erasing operation often does not completely erase the data block, so it is necessary to perform multiple erasing operations on the data block to be erased. After the entire erasing operation is completed, the total number of erasing operations is recorded.

[0064] S220: Determine the repair interval value of the target block to be repaired according to the total number of erasures, wherein the total number of erasures represents the degree of interference to the block, and the greater the total number of erasures, the greater the degree of interference to the block, and the greater the repair interval value.

[0065] According to the number of erasures in this erasure process, an interval in the target block that needs to be repaired is determined. The degree of interference to the target block is related to the total number of erasures. The greater the total number of erasures, the greater the degree of interference to the block, and the larger the repair interval value. For example, if the total number of erasures is 1, the degree of interference to the target block is small, and the smaller area of ​​the target block can be modified, the repair interval value can be 1 / 8, indicating that 1 / 8 of the target block needs to be repaired. If the total number of erasures is large, such as 10, the entire target block needs to be repaired, and the repair interval value is 1.

[0066] S230: According to the repair interval value, a target repair area to be repaired is selected from the target block, and a repair operation is performed on the target repair area, wherein the size of the target repair area is the repair interval value.

[0067] After the repair interval value is determined, a target repair area with a size of the repair interval value is selected from the target block, and the target repair area is repaired.

[0068] The method records the total number of erasures when erasing a data block of a non-volatile memory, determines a repair interval based on the total number of erasures, that is, based on the degree of interference, and repairs the target block. This method can reduce the erasure time in the early stage of use of the non-volatile memory, thereby improving the erasure efficiency of the non-volatile memory. At the same time, it also ensures the reliability of storage in the later stage of use of the non-volatile memory.

[0069] There are many ways to record the total number of erasures. In one possible implementation, see Figure 4 , Figure 4 A flowchart of step S210 is provided in an embodiment of the present invention. Step S210 may include the following steps:

[0070] S211: Erasing the data block to be erased, recording the current erasure times, and verifying whether the data block to be erased has been erased. If yes, executing step S212; if no, executing step S213.

[0071] The method for verifying whether the data block to be erased is erased is to compare the high boundary point of the threshold voltage distribution of the data block to be erased with the erase verification boundary point (EV). If the high boundary point is greater than EV, the verification fails; if the high boundary point is less than or equal to EV, the verification passes.

[0072] S212: The current erasure times are taken as the total erasure times.

[0073] If the erasing is successful, the erasing is completed and no further erasing is performed. The current erasing times, that is, the total number of erasing times up to this moment, is taken as the total erasing times.

[0074] S213: Determine whether the current erasure times are greater than or equal to the preset maximum erasure times. If yes, execute step S214; if no, execute step S215.

[0075] The preset maximum erasing times is the maximum erasing times in one erasing process. If the erasing times reach the preset maximum erasing times, no erasing will be performed. If the preset maximum erasing times are not reached, erasing will continue.

[0076] The preset maximum number of erase times can be a globally set value, for example, if it is preset to 10, then in each subsequent erase process, the preset maximum number of erase times is 10. It can also be a value set separately at the beginning of each erase process. In this way, the preset maximum number of erase times for each erase process may change. This method can be dynamically set according to the usage time of the non-volatile memory.

[0077] S214: The preset maximum erasing times is used as the total erasing times.

[0078] If the erasing times reaches the preset maximum erasing times, no further erasing is performed, and the preset maximum erasing times is taken as the total erasing times.

[0079] S215: Repeat the steps of erasing the data block to be erased, recording the current erasure count, and verifying whether the data block to be erased has been successfully erased, until the data block to be erased has been successfully erased or the current erasure count is greater than or equal to the preset maximum erasure count.

[0080] If the erasure fails and the erasure times do not reach the preset maximum erasure times, step S211 will be repeatedly executed until the data block to be erased passes or the current erasure times are greater than or equal to the preset maximum erasure times.

[0081] There are many ways to determine the repair interval value of the target block that needs to be repaired according to the total number of erasures. For example, a plurality of mapping relationships between the number of erasures and the repair interval value may be preset, or a function relationship may be set to determine the repair interval value. In a possible implementation, the above step S220 includes the following steps:

[0082] Based on the repair interval calculation formula, according to the total number of erases, the repair interval value that needs to be repaired for the target block is calculated. The repair interval calculation formula is:

[0083]

[0084] Among them, x is the total number of erasures, y is the repair interval value, n is a positive integer, and a, b, and c are coefficients.

[0085] It can be calculated based on the repair interval calculation formula. For example, in this formula, n=8, a, b, and c are That is, when the total number of erasures is greater than or equal to 8, the repair interval value is 1. If the total number of erasures is 1, the repair interval value can be calculated by substituting it into the formula If the total number of erasures is 2, the repair interval value can be calculated by substituting it into the formula:

[0086] Each data block includes multiple storage units. After determining the repair interval value, there are multiple ways to select the target repair area. For example, randomly select the storage unit with the proportion of the repair interval value in the target block, or select a continuous area. In order to quickly select the target repair area, the embodiment of the present invention adopts the method of selecting a continuous area. The above step S230 includes the following steps:

[0087] S231: Selecting a storage address of a storage unit from data blocks other than the to-be-erased data blocks in the target block.

[0088] In other data blocks in the target block that are not the data blocks to be erased, a storage address of a storage unit is selected, and the storage unit may be selected randomly.

[0089] S232: Using the storage address as the starting address, continuously select multiple storage units of the repair interval value.

[0090] After selecting a storage unit, the storage address of the storage unit is used as the starting address, and multiple storage units with the same repair interval value ratio are continuously selected. For example, the repair interval value is The target block There are 1000 storage units. Starting from their actual addresses, 1000 storage units are selected continuously.

[0091] S232: Perform repair operations on each storage unit.

[0092] Repairing memory cells involves adjusting the threshold voltage (Vt) of the memory cells to ensure that they can properly store and retain data.

[0093] In a possible implementation, in order to make the repair interval more accurately determined, pre-programming may be performed before erasing the data block to be erased. Before step S210, the method may further include:

[0094] S209: Pre-programming the data block to be erased, and recording the total pre-programming time.

[0095] The data in the storage cells of non-volatile memory include "1" and "0". Erasing in non-volatile memory is to lower the threshold voltage of the storage cell, which usually corresponds to logic "1". After the erase operation, the threshold voltage of the storage cell is set to this lower level, making it at logic "1".

[0096] Pre-programming writes charge into the floating gate to ensure that the threshold voltage of the erase block storage cell is in a high state before erasing, making it in logic "0". Therefore, the more data "0" the storage cells in the data block to be erased have, the shorter the total pre-programming time is. Conversely, the fewer data "0" the storage cells have, the longer the total pre-programming time is.

[0097] S220`: Determine the repair interval value of the target block that needs to be repaired according to the total number of erasures and the total time.

[0098] After pre-programming, the repair interval value can be determined based on the total number of erase times and the total pre-programming time.

[0099] Optionally, according to the total number of erasures and the total time, the repair interval value of the target block to be repaired is determined according to a preset strategy. The preset strategy is that the greater the total number of erasures, the greater the repair interval value, the smaller the total number of erasures, the smaller the repair interval value, the greater the total time, the greater the repair interval value, and the smaller the total time, the smaller the repair interval value.

[0100] For example, when the total number of erase times is large and the total pre-programming time is large, the entire block is repaired and the repair interval value can be set to 1. When the total number of erase times is small and the total pre-programming time is small, a smaller area can be repaired.

[0101] In order to make the influence of the total number of erasures and the total time concrete, the repair coefficient can be calculated according to the first preset weight of the total number of erasures and the second preset weight of the total time. The calculation formula can be:

[0102] x=α×number+β×time

[0103] Among them, x is the repair coefficient, α and β are the first preset weight and the second preset weight respectively, and number and time are the total number of erasures and the total time respectively.

[0104] For example, the first preset weight is 0.8, the second preset weight is 0.2, the total number of erasures is 5, and the total time is 8 microseconds, then the calculated repair coefficient is 5.6.

[0105] According to the repair coefficient, the repair interval value of the target block that needs to be repaired is determined.

[0106] After calculating the repair coefficient, the repair interval value can be calculated in the same way as the above repair interval calculation formula. The repair interval calculation formula is:

[0107]

[0108] Among them, x is the repair coefficient, y is the repair interval value, n is a positive integer, and a, b, and c are coefficients.

[0109] Further, refer to Figure 5 In a possible implementation, the process of erasing the erased data block is as follows: Figure 5 As shown, an erase instruction is received, which includes which data block to erase. The data block to be erased is first pre-programmed and the pre-programming time is recorded. Then, the data block to be erased is erased. After erasing once, the number of erases is increased by 1, and it is verified whether the erasure is successful. If not, it is determined whether the number of erases reaches the preset maximum number of times. If not, the data block to be erased is erased again until the erasure is verified to be successful or the number of erases reaches the preset maximum number of times. The erasing operation is then completed. Subsequently, a repair coefficient is calculated based on the number of erases and the pre-programming time. Then, a repair interval value is calculated based on the repair coefficient. A storage address is selected in shorthand in the target block where the data block to be erased is located. The storage address is used as the starting address, and a target repair area with a repair interval value ratio is selected. Finally, the target repair area is repaired to complete the entire erasing process.

[0110] Furthermore, an embodiment of the present invention also provides a non-volatile memory erasing device, wherein the storage array of the non-volatile memory includes a plurality of blocks, each of which includes a plurality of data blocks, see Figure 6 , the non-volatile memory erasing device 400 comprises:

[0111] The over-erasing unit 410 is used to perform an over-erasing operation on the to-be-erased data block of the selected target block in the non-volatile memory, and record the total number of erasing times of completing the over-erasing operation.

[0112] The repair interval value determination unit 420 is used to determine the repair interval value that needs to be repaired for the target block according to the total number of erasures; the total number of erasures represents the degree of interference to the block. The greater the total number of erasures, the greater the degree of interference to the block, and the larger the repair interval value.

[0113] The repair unit 430 is used to select a target repair area to be repaired from the target block according to the repair interval value, and perform a repair operation on the target repair area; the size of the target repair area is the repair interval value.

[0114] In summary, the embodiments of the present invention provide a non-volatile memory erasing method, device, electronic device and storage medium. When erasing data in the non-volatile memory, the total number of erasures is recorded, and the size of the interval that needs to be repaired is determined based on the total number of erasures, thereby improving the erasing efficiency of the non-volatile memory. The pre-programming time of the erased data block is recorded, and the size of the interval that needs to be repaired is determined in combination with the pre-programming time and the total number of erasures. This allows the non-volatile memory to reduce the error rate while maintaining high-performance erasure, thereby protecting the overall reliability of the non-volatile memory.

[0115] In the embodiments provided by the present invention, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely schematic. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of the present invention. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of the code, and a module, a program segment or a part of the code contains one or more executable instructions for implementing the specified logical functions. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of dedicated hardware and computer instructions.

[0116] In addition, the functional modules in the various embodiments of the present invention may be integrated together to form an independent part, or each module may exist independently, or two or more modules may be integrated to form an independent part.

[0117] If the function is implemented in the form of a software function module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a computer-readable storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods of each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk and other media that can store program codes.

[0118] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

[0119] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

Claims

1. A method for erasing a non-volatile memory, characterized in that: The storage array of the non-volatile memory includes a plurality of blocks, each of the blocks includes a plurality of data blocks, and the method includes: Performing an over-erasing operation on a to-be-erased data block of a selected target block in a non-volatile memory, and recording a total number of erasures completed by the over-erasing operation; According to the total number of erasures, a repair interval value of the target block that needs to be repaired is determined; the total number of erasures represents the degree to which the block is disturbed, and the greater the total number of erasures, the greater the degree to which the block is disturbed, and the greater the repair interval value; According to the repair interval value, a target repair area to be repaired is selected from the target block, and a repair operation is performed on the target repair area; the size of the target repair area is the repair interval value.

2. The method according to claim 1, characterized in that The over-erasing operation is performed on the to-be-erased data block of the target block selected in the non-volatile memory, and the total number of erasures completed by the over-erasing operation is recorded, including: Erasing the data block to be erased, recording the current erasure count, and verifying whether the data block to be erased has been erased; If yes, taking the current number of erasures as the total number of erasures; If not, determining whether the current erasure count is greater than or equal to a preset maximum erasure count; In the case where the current erasure count is greater than or equal to the preset maximum erasure count, the preset maximum erasure count is used as the total erasure count; In the case that the current number of erasures is less than the preset maximum number of erasures, the steps of erasing the data block to be erased, recording the current number of erasures, and verifying whether the data block to be erased has been erased are repeated until the data block to be erased has been erased or the current number of erasures is greater than or equal to the preset maximum number of erasures.

3. The method according to claim 1, characterized in that: Determining the repair interval value of the target block that needs to be repaired according to the total number of erasures includes: Based on the repair interval calculation formula, according to the total number of erasures, the repair interval value that the target block needs to be repaired is calculated and determined; the repair interval calculation formula is: Among them, x is the total number of erasures, y is the repair interval value, n is a positive integer, and a, b, and c are coefficients.

4. The method according to claim 1, characterized in that The data block includes a plurality of storage units, and selecting a target repair area to be repaired from the target block according to the repair interval value, and performing a repair operation on the target repair area, including: Selecting a storage address of a storage unit in a data block of the target block other than the to-be-erased data block; Taking the storage address as the starting address, continuously selecting a plurality of storage units of the repair interval value; A repair operation is performed on each of the storage units.

5. The method according to claim 1, characterized in that: Before the step of performing an over-erasing operation on the to-be-erased data block of the target block selected in the non-volatile memory and recording the total number of erasures completed by the over-erasing operation, the method further includes: Pre-programming the data block to be erased, and recording the total time of the pre-programming; Determining the repair interval value of the target block that needs to be repaired according to the total number of erasures includes: According to the total number of erasures and the total time, a repair interval value for which the target block needs to be repaired is determined.

6. The method according to claim 5, characterized in that The determining, according to the total number of erasures and the total time, a repair interval value for the target block that needs to be repaired includes: According to the total number of erasures and the total time, the repair interval value that needs to be repaired for the target block is determined according to a preset strategy; the preset strategy is that the greater the total number of erasures, the larger the repair interval value, the smaller the total number of erasures, the smaller the repair interval value, the greater the total time, the larger the repair interval value, and the smaller the total time, the smaller the repair interval value.

7. The method according to claim 6, characterized in that The determining, according to the total number of erasures and the total time, a repair interval value of the target block that needs to be repaired according to a preset strategy includes: Calculate a repair coefficient according to a first preset weight of the total number of erasures and a second preset weight of the total time; According to the repair coefficient, a repair interval value of the target block that needs to be repaired is determined.

8. A non-volatile memory erasing device, characterized in that: The storage array of the non-volatile memory includes a plurality of blocks, each of the blocks includes a plurality of data blocks, and the device includes: An over-erasing unit, used for performing an over-erasing operation on a to-be-erased data block of a selected target block in the non-volatile memory, and recording a total number of erasing times for completing the over-erasing operation; a repair interval value determination unit, configured to determine a repair interval value for repairing the target block according to the total number of erasures; the total number of erasures represents the degree to which the block is disturbed, and the greater the total number of erasures, the greater the degree to which the block is disturbed, and the greater the repair interval value; A repair unit is used to select a target repair area to be repaired from the target block according to the repair interval value, and perform a repair operation on the target repair area; the size of the target repair area is the repair interval value.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that: When the processor executes the program, the method according to any one of claims 1 to 7 is implemented.

10. A storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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