A solid state hard disk read error adaptive rereading device and method

Abstract

The present invention relates to the field of solid-state storage, and specifically to a solid-state hard disk read error adaptive rereading device and method. This aspect splits multi-plane reading into several single-plane readings, which solves the problem that the wear difference of each block in different planes causes interference during rereading regardless of the voltage axis set, so that individual blocks in the multi-plane rereading cannot be read correctly, which leads to the overall failure of rereading. The rereading mechanism is disassembled into multiple states and completed through a finite state machine model, making the rereading process clearer and more controllable, and improving the robustness of the system. The data generated in the rereading is stored separately, and only the final correct data is stored at the target address, effectively isolating temporary data from production data. In the event of a failure, the erroneous data can be confined to the module without contaminating other production data, thereby ensuring the safety of production data.

Description

Technical Field

[0001] The present invention relates to the field of solid-state storage, and in particular to a solid-state hard disk read error adaptive rereading device and method. Background Art

[0002] The read error handling process of a solid-state drive (SSD) is a critical component, extending the drive's lifespan and ensuring data security at the end of its lifespan. Furthermore, it can extend the data retention period of SSDs that store data during extended power outages. The quality of read error handling directly impacts the competitiveness of enterprise-class SSDs. Read error adaptive reread is part of the read error handling mechanism. This mechanism primarily adjusts different read voltage axes and determines data integrity based on the LDPC results of the read data. If the data integrity is still incorrect, the next voltage axis is selected, and the process continues until all available voltage axes are exhausted or the correct data is read. Read error adaptive reread uses a pre-stored voltage axis table, determines the order of requests through state machine logic, and analyzes read results to determine read status, achieving error correction and maximizing data accuracy. In practical applications, the read error adaptive reread mechanism first determines parameters such as the erase count and write time of the data block to be reread. Based on these parameters, it then determines the voltage axis sequence with the highest probability of a correct read. It then deconstructs the original command into a reread command, configuring information such as the data address and metadata address. Finally, a reread command is issued and the reread results are analyzed. If a read error still occurs, the voltage axis with the highest probability is retrieved from the remaining table and the above steps are repeated until completion. In general, SSDs may encounter temporary interference or occasional errors when reading data, which may cause data read failures. The retry mechanism increases the probability of successful data reads by attempting to read data multiple times, thereby improving data read reliability. It also optimizes the user experience, protects hardware, and provides troubleshooting clues. It is a critical component of SSD drives, helping to ensure stable data reading and stable system operation.

[0003] Currently, the reread mechanism still has problems. For example, using the same voltage axis in multi-plane operation may not be able to correct errors in all blocks at the same time. Summary of the Invention

[0004] In response to the shortcomings of the existing technology, the present invention provides a solid-state hard drive read error adaptive reread device and method. Through a series of operations such as command disassembly, task query, data preparation, and message return, different voltage axes can be used to correct blocks on different planes, thereby optimizing the reread mechanism.

[0005] In order to solve the above technical problems, the present invention adopts a technical solution: a solid state hard disk read error adaptive rereading device, comprising:

[0006] The command parsing module determines whether the command causing the read error is a single-plane read or a multi-plane read. If it is a multi-plane read, it breaks it into several single-plane read commands and stores the parsed data in the reread module for execution.

[0007] The reread module completes the reread operation on the NAND flash according to the data parsed by the command parsing module;

[0008] The task query module is used to detect the information in the reread module. If it detects that there is a command to be executed, it will send the corresponding reread command to the reread module. When it detects that the read task is completed, it determines the read status. If there is still an error, it will continue to send the reread command using the next voltage axis. If the read is correct or the read is incorrect but all voltage axes have been used up, the read will be marked as complete.

[0009] The data preparation module, after the reread is completed, copies the information to the specified location according to the structure of the original command and marks the data ready. The data generated during the reread is stored separately, and it is determined whether the reread obtained the correct data, and only the correct data is stored at the target address.

[0010] Message return module, all completed reread commands are stored in the queue of the message return module. The message return module automatically routes the completion status of the reread command to its incoming module. After successful sending, the message is removed from the queue.

[0011] Furthermore, when the reread module performs rereading, for multiple single-plane read commands decomposed from the multi-plane read, corresponding voltage axis error correction is performed according to the conditions of the multiple single-plane read commands.

[0012] Furthermore, for multiple single-plane read commands decomposed from a multi-plane read, the re-read voltage axes are all different or partially the same.

[0013] Furthermore, the data preparation module determines whether the correct data is obtained by rereading based on the data status returned by the LDPC module integrated in the NAND flash controller.

[0014] The present invention also discloses a solid state hard disk read error adaptive rereading method, comprising the following steps:

[0015] S01. Add to reread queue: After the firmware detects a read error, it records the relevant information of the read error and passes it to the reread queue;

[0016] S02. The command parsing module parses and decomposes the original command: When the reread module is idle, the command decryption module checks the reread queue. If there are pending messages in the reread queue, it parses the first message at the top of the queue to determine whether the command with the read error is a single-plane read or a multi-plane read. If it is a multi-plane read, it decomposes the command into several single-plane read commands and stores the parsed data in the reread module for execution.

[0017] S03, using the task query module to wait for the task to be completed. After the parsing is completed, the task query module sends the corresponding reread command to the reread module. The reread module completes the reread operation on the NAND flash according to the data parsed by the command parsing module. The task query module periodically queries the completion status of the read task. When all reads in the task are completed, the reread is marked as completed.

[0018] S04. Utilize the data preparation module to organize the required data. After the rereading is completed, the data preparation module copies the information including data and metadata to the designated location according to the structure of the original command, and marks the data as ready.

[0019] S05. The message return module returns a read completion message. After the data is ready, the message return module is used to return a read completion message.

[0020] Furthermore, the method is implemented through a finite state machine module, and the finite state machine model includes an initial state, a parsing state, a running state, a data preparation state, and a message recovery state;

[0021] When powered on, the system automatically enters the initial state, and all state memories and information memories are restored to default values. When the polling system detects a reread command to be started in the reread queue, it takes a command from the head of the reread queue and enters the parsing state;

[0022] The parsing state parses the parameters in the original read message and converts them into the standard data required by the reread module, waiting for subsequent state calls. When the parsing is completed, it automatically switches to the running state. During the parsing, it determines whether the command with the read error is a single-plane read or a multi-plane read. If it is a multi-plane read, it is disassembled into several single-plane read commands.

[0023] The running state checks the command status of each plane in the state memory. If it is in the pending state, a reread command is issued and the plane state is changed to the running state. If it is in the running state, the running state is checked regularly to see if it is completed. If it is completed, the state of the plane is changed to the ready state. If it is in the ready state, the reread data is checked. If correct, it is marked as completed, otherwise it is marked as pending. When the status of all planes changes to the completed state, it automatically switches to the data ready state.

[0024] In the data preparation state, the correct information read out from the reread module is copied to the specified address according to the format of the original read message, data length, and data address. After the copy is completed, the message reply state is automatically entered;

[0025] The message reply status replies the message to the incoming module according to the read command parameters, so that the external module can continue to perform its task. If the external module is busy and cannot receive the message, the message will be placed in the queue to be sent until it is sent successfully.

[0026] Furthermore, in the running state, each plane executes in parallel, and for multiple single-plane read commands decomposed from the multi-plane read, corresponding voltage axis error correction is taken according to the conditions of the multiple single-plane read commands.

[0027] Furthermore, for multiple single-plane read commands decomposed from a multi-plane read, the re-read voltage axes are all different or partially the same.

[0028] Furthermore, in the data preparation state, the data generated during the reread is stored separately. The data status returned by the LDPC module integrated in the nandflash controller is used to determine whether the reread obtained the correct data, and only the correct data is stored at the target address.

[0029] Beneficial effects of the present invention:

[0030] Innovative command parsing: This solution splits a multi-plane read into several single-plane reads. This addresses the issue of varying block wear in different planes. This can cause interference during rereads regardless of the voltage axis setting, leading to individual blocks not being correctly read during multi-plane rereads and overall reread failure.

[0031] State Division and Transition Mechanism: The reread mechanism is broken down into multiple states, such as initial state, instruction parsing state, running state, data preparation state, and message reply state, and switches between these states based on transition conditions. This state machine-based approach makes the reread process clearer and more controllable, improving system robustness.

[0032] Data isolation: Data generated during rereading is stored separately. The data status returned by the LDPC module integrated in the NAND Flash controller determines whether the rereading process retrieved the correct data. Only the final correct data is stored at the target address, effectively isolating temporary data from production data. In the event of a failure, erroneous data is confined to the module, preventing contamination of other production data and ensuring the security of production data. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 is a schematic diagram of the rereading device according to the embodiment;

[0034] Figure 2 A schematic diagram of adaptive rereading based on a finite state machine model;

[0035] Figure 3 This is a schematic diagram of multiple planes in operation;

[0036] Figure 4 This is a diagram showing how messages are returned to external modules. DETAILED DESCRIPTION

[0037] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0038] Example 1

[0039] This embodiment discloses a solid state hard disk read error adaptive rereading device, such as Figure 1 Shown, including:

[0040] The command parsing module determines whether the command causing the read error is a single-plane read or a multi-plane read. If it is a multi-plane read, it breaks it into several single-plane read commands and stores the parsed data in the reread module for execution.

[0041] The reread module completes the reread operation on the NAND flash according to the data parsed by the command parsing module.

[0042] The task query module is used to detect the information in the reread module. If a command is detected to be executed, the corresponding reread command is sent to the reread module. When the read task is detected to be completed, the reading status is judged. If an error still exists, the next voltage axis is used to continue sending the reread command. If the reading is correct or the reading is incorrect but all voltage axes have been used up, the reading will be marked as complete.

[0043] The data preparation module copies the information of the original command to the designated location according to its structure after the rereading is completed, and marks the data as ready. The data generated during the rereading is stored separately to determine whether the rereading has obtained the correct data, and only the correct data is stored at the target address. The temporary data and production data are effectively isolated. Once a fault occurs, the erroneous data can be confined to the module without contaminating other production data, thus ensuring the security of the production data.

[0044] In the message return module, all completed reread commands are stored in the message return module's queue and automatically routed to the incoming module based on the module that sent the message. If the incoming module is busy, it will be resent periodically until the message is successfully sent. After successful sending, the message will be removed from the queue.

[0045] In this embodiment, when performing a reread, the reread module applies voltage axis error correction based on the conditions of the multiple single-plane read commands decomposed from the multi-plane read. Specifically, because the conditions of each single-plane read command are different, the reread voltage axes may be completely different or partially the same.

[0046] In this embodiment, the data preparation module determines whether correct data is obtained by rereading based on the data status returned by the LDPC module integrated in the NAND flash controller.

[0047] Example 2

[0048] This embodiment discloses a method for adaptively rereading a read error of a solid-state hard disk, comprising the following steps:

[0049] S01. Add to reread queue: After the firmware detects a read error, it records the relevant information of the read error (such as address, data length, etc.) and passes it to the reread queue, waiting for the reread module to be called in sequence.

[0050] S02. The command parsing module parses and decomposes the original command: When the reread module is idle, the command decryption module checks the reread queue. If there are pending messages in the reread queue, it parses the first message at the top of the queue to determine whether the command with the read error is a single-plane read or a multi-plane read. If it is a multi-plane read, it decomposes the command into several single-plane read commands and stores the parsed data in the reread module for execution.

[0051] S03. The task query module waits for task completion. After parsing is complete, the task query module issues the corresponding reread command to the reread module. The reread module completes the NAND flash reread operation based on the data parsed by the command parsing module. The task query module periodically queries the completion status of the read task and marks the reread complete when all reads in the task are complete. For multiple single-plane read commands decomposed from a multi-plane read, their reread voltage axes may be completely different or partially the same.

[0052] S04. Use the data preparation module to organize the required data. After the reread is completed, the data preparation module copies the information including data and metadata to the specified location according to the structure of the original command and marks the data ready. This step stores the data generated during the reread separately. The data status returned by the LDPC module integrated in the NAND Flash controller is used to determine whether the reread obtained the correct data. Only the correct data is stored at the target address.

[0053] S05. The message return module returns a read completion message. After the data is ready, the message return module is used to return a read completion message.

[0054] The method described in this embodiment is completed by a finite state machine module, such as Figure 2 As shown, the finite state machine model includes initial state, parsing state, running state, data preparation state and message recovery state;

[0055] When powered on, the system automatically enters the initial state and all state memories and information memories are restored to default values. When the polling system detects a reread command to be started in the reread queue, it takes a command from the head of the reread queue and enters the parsing state.

[0056] The parsing state parses the parameters in the original read message and converts them into the standard data required by the reread module, waiting for subsequent state calls. When the parsing is completed, it automatically switches to the running state. During parsing, it determines whether the command with the read error is a single-plane read or a multi-plane read. If it is a multi-plane read, it will be disassembled into several single-plane read commands.

[0057] like Figure 3 As shown, the running state checks the command status of each plane in the state memory. If the state is pending, a reread command is issued and the plane's state is changed to running. If the state is running, the running state is periodically checked to see if it has completed. If so, the plane's state is changed to ready. If the state is ready, the reread data is checked. If correct, it is marked as completed; otherwise, it is marked as pending. When all planes have reached the completed state, the state automatically transitions to data ready. In this embodiment, the running states of each plane run in parallel. When in the running state, the reread module performs a reread operation on each plane. For the multiple single-plane read commands decomposed from the multi-plane read, voltage axis error correction is applied based on the conditions of the multiple single-plane read commands. Specifically, due to the different conditions of each single-plane read command, the reread voltage axes may be completely different or partially the same.

[0058] In the data preparation state, the correct information read out from the reread module is copied to the specified address according to the format of the original read message, data length, and data address. After the copy is completed, the message reply state is automatically entered.

[0059] like Figure 4 As shown, the message reply status replies the message to the incoming module according to the read command parameters, so that the external module continues to perform its task. If the external module is busy and cannot receive the message, the message is placed in the queue to be sent until it is sent successfully.

[0060] This method provides a solution for splitting a multi-plane read into several single-plane reads. This solves the problem of varying wear on blocks in different planes. This causes interference during rereads regardless of the voltage axis setting, leading to individual blocks not being correctly read during multi-plane rereads and overall reread failure.

[0061] This method breaks down the reread mechanism into multiple states, such as initialization, instruction parsing, execution, data preparation, and message reply, and switches between these states based on transition conditions. This state-machine-based approach makes the reread process clearer and more controllable, improving the robustness of the system.

[0062] This method stores the data generated during the reread separately. The data status returned by the LDPC module integrated into the NAND Flash controller determines whether the reread retrieved the correct data. Only the final correct data is stored at the target address, effectively isolating temporary data from production data. In the event of a failure, the erroneous data is confined to the module, preventing contamination of other production data and ensuring the security of production data.

[0063] The above description is only the basic principle and preferred embodiments of the present invention. Improvements and substitutions made by those skilled in the art based on the present invention fall within the protection scope of the present invention.

Claims

1. A solid-state hard drive read error adaptive reread device, characterized by: include: The command parsing module determines whether the command causing the read error is a single-plane read or a multi-plane read. If it is a multi-plane read, it breaks it into several single-plane read commands and stores the parsed data in the reread module for execution. The reread module completes the reread operation on the NAND flash according to the data parsed by the command parsing module; The task query module is used to detect the information in the reread module. If it detects that there is a command to be executed, it will send the corresponding reread command to the reread module. When it detects that the read task is completed, it determines the read status. If there is still an error, it will continue to send the reread command using the next voltage axis. If the read is correct or the read is incorrect but all voltage axes have been used up, the read will be marked as complete. The data preparation module, after the reread is completed, copies the information to the specified location according to the structure of the original command and marks the data ready. The data generated during the reread is stored separately, and it is determined whether the reread obtained the correct data, and only the correct data is stored at the target address. Message return module, all completed reread commands are stored in the queue of the message return module. The message return module automatically routes the completion status of the reread command to its incoming module. After successful sending, the message is removed from the queue.

2. The SSD read error adaptive rereading device according to claim 1, wherein: When the reread module performs rereading, it takes corresponding voltage axis error correction based on the multiple single-plane read commands decomposed from the multi-plane read.

3. The SSD read error adaptive rereading device according to claim 2, wherein: For multiple single-plane read commands split from a multi-plane read, the re-read voltage axes are completely different or partially the same.

4. The SSD read error adaptive rereading device according to claim 1, wherein: The data preparation module determines whether the correct data is obtained by rereading based on the data status returned by the LDPC module integrated in the NAND Flash controller.

5. A method for adaptively rereading read errors in a solid-state drive, characterized by: The following steps are involved: S01. Add to reread queue: After the firmware detects a read error, it records the relevant information of the read error and passes it to the reread queue; S02. The command parsing module parses and decomposes the original command: When the reread module is idle, the command decryption module checks the reread queue. If there are pending messages in the reread queue, it parses the first message at the top of the queue to determine whether the command with the read error is a single-plane read or a multi-plane read. If it is a multi-plane read, it decomposes the command into several single-plane read commands and stores the parsed data in the reread module for execution. S03, using the task query module to wait for the task to be completed. After the parsing is completed, the task query module sends the corresponding reread command to the reread module. The reread module completes the reread operation on the NAND flash according to the data parsed by the command parsing module. The task query module periodically queries the completion status of the read task. When all reads in the task are completed, the reread is marked as completed. S04. Utilize the data preparation module to organize the required data. After the rereading is completed, the data preparation module copies the information including data and metadata to the designated location according to the structure of the original command, and marks the data as ready. S05. The message return module returns a read completion message. After the data is ready, the message return module is used to return a read completion message.

6. The method for adaptively rereading read errors in a solid-state drive according to claim 5, wherein: This method is completed through a finite state machine module. The finite state machine model includes an initial state, a parsing state, a running state, a data preparation state, and a message recovery state. When powered on, the system automatically enters the initial state, and all state memories and information memories are restored to default values. When the polling system detects a reread command to be started in the reread queue, it takes a command from the head of the reread queue and enters the parsing state; The parsing state parses the parameters in the original read message and converts them into the standard data required by the reread module, waiting for subsequent state calls. When the parsing is completed, it automatically switches to the running state. During the parsing, it determines whether the command with the read error is a single-plane read or a multi-plane read. If it is a multi-plane read, it is disassembled into several single-plane read commands. The running state checks the command status of each plane in the state memory. If it is in the pending state, a reread command is issued and the plane state is changed to the running state. If it is in the running state, the running state is checked regularly to see if it is completed. If it is completed, the state of the plane is changed to the ready state. If it is in the ready state, the reread data is checked. If correct, it is marked as completed, otherwise it is marked as pending. When the status of all planes changes to the completed state, it automatically switches to the data ready state. In the data preparation state, the correct information read out from the reread module is copied to the specified address according to the format of the original read message, data length, and data address. After the copy is completed, the message reply state is automatically entered; The message reply status replies the message to the incoming module according to the read command parameters, so that the external module can continue to perform its task. If the external module is busy and cannot receive the message, the message will be placed in the queue to be sent until it is sent successfully.

7. The SSD read error adaptive rereading method according to claim 6, wherein: In the running state, each plane executes in parallel, and for multiple single-plane read commands decomposed from multi-plane reads, corresponding voltage axis error correction is taken according to the situation of multiple single-plane read commands.

8. The method for adaptively rereading read errors in a solid-state drive according to claim 7, wherein: For multiple single-plane read commands split from a multi-plane read, the re-read voltage axes are completely different or partially the same.

9. The method for adaptively rereading read errors in a solid-state drive according to claim 5, wherein: In the data preparation state, the data generated during the reread is stored separately. The data status returned by the LDPC module integrated in the nandflash controller is used to determine whether the reread obtained the correct data, and only the correct data is stored at the target address.

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