Driving method, driving circuit and liquid crystal display panel

Abstract

The invention discloses a driving method, a driving circuit and a liquid crystal display panel. The method comprises the following steps: driving two adjacent data lines to respectively maintain positive polarity and negative polarity by using a driving unit; a driving unit is used for driving a first signal control line according to a first driving time sequence so as to periodically open or close two adjacent frames of data lines, and driving a second signal control line according to a second driving time sequence so as to periodically enable the two adjacent frames of data lines to exchange driving data; the first driving time sequence and the second driving time sequence have the same frequency and opposite pulse level polarities. A driving circuit is arranged in a liquid crystal display panel, a driving unit is used for driving a first signal control line and a second signal control line in the driving circuit according to different driving time sequences, so that two adjacent frames of data lines exchange driving data periodically, and under the condition that the polarity of the data lines is kept unchanged, pixels are subjected to column overturning, so that the display quality of the liquid crystal display panel is improved. The problem of high power consumption caused by column overturning through a data line in the prior art is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of pixel flipping of liquid crystal display panels, and in particular to a driving method, a driving circuit and a liquid crystal display panel. Background Art

[0002] The liquid crystal display panel controls the polarity of the pixel voltage by column flipping to avoid the destruction of the characteristics of the liquid crystal molecules. The principle is as follows: the timing controller outputs the start signal of the image frame, the data source row latch signal and the first polarity conversion signal to the signal flip control unit. The signal flip control unit flips the first polarity conversion signal every preset period T, after the end of the data source row latch signal of each image frame within the period T and before the start signal of the next image frame, thereby obtaining a second polarity conversion signal.

[0003] The source driver controls the polarity of the pixel voltage in the liquid crystal display according to the second polarity conversion signal, so that the voltage polarity between the pixel electrode and the common electrode alternates between positive and negative polarities, and is flipped in units of columns. By changing the voltage polarity through column flipping, the liquid crystal molecules can be twisted in different directions in different frames, controlling the amount of light transmission and realizing image display. Column flipping can adjust the rotation direction of the liquid crystal molecules, thereby adjusting the angle and intensity of light transmission, and realizing the display of different grayscales and colors.

[0004] However, this column polarity flipping method increases the power consumption of the IC data line output. Summary of the invention

[0005] The existing liquid crystal display panel uses a display mode of column polarity inversion, which increases its power consumption.

[0006] In view of the above problems, a driving method, a driving circuit and a liquid crystal display panel are proposed. By setting a driving circuit in the liquid crystal display panel, a driving unit is used to drive the first signal control line and the second signal control line in the driving circuit with different driving timings, so as to periodically exchange the driving data of the two adjacent frame data lines, thereby achieving column flipping of pixels while keeping the polarity of the data lines unchanged, thereby solving the problem of high power consumption caused by column flipping through data lines in the prior art.

[0007] In a first aspect, a driving method includes: Step 100: Use a driving unit to drive two adjacent data lines to maintain positive polarity and negative polarity respectively; Step 200: using the driving unit to drive the first signal control line with a first driving timing to periodically open or close the two adjacent frame data lines, and at the same time driving the second signal control line with a second driving timing to periodically exchange driving data between the two adjacent frame data lines; The first driving timing sequence and the second driving timing sequence have the same frequency and opposite pulse level polarities.

[0008] In combination with the driving method described in the first aspect of the present invention, in a first possible implementation manner, step 100 includes: Step 110, driving a plurality of groups of two adjacent data lines in the data line array; Step 120 , driving the first data line of the two adjacent data lines to keep the positive polarity, and driving the second data line of the two adjacent data lines to keep the negative polarity.

[0009] In combination with the first possible implementation of the first aspect of the present invention, in a second possible implementation, step 200 includes: Step 210, turning on all the data lines in the data line array with a high level in the first driving timing, so that the two adjacent data lines are respectively positive polarity and negative polarity; Step 220, turning off all data lines in the data line array with a low level in the first driving timing; Step 230, repeating steps 210 to 220 until the first driving sequence is completed.

[0010] In combination with the second possible implementation manner of the first aspect of the present invention, in a third possible implementation manner, step 200 includes: Step 240, turning on all the data lines in the data line array with a high level in the second driving timing, and exchanging the data in the two adjacent data lines, which are negative polarity and positive polarity respectively; Step 250, turning off all data lines in the data line array with a low level in a second driving timing sequence; Step 260, repeating steps 240 to 250 until the second driving sequence is completed.

[0011] In a second aspect, a driving circuit adopts the driving method described in the first aspect, comprising: Drive unit; Data line array; a plurality of first transistors; a plurality of second transistors; A first signal control line; A second signal control line; The data line array is used to sequentially connect each column of pixels and is electrically connected to the driving unit; The drain and source of the first transistor are electrically connected between the corresponding data line and the driving unit; The first signal control line is electrically connected to the driving unit and the gates of the plurality of first transistors respectively, and is used to control the on or off of the first transistors; The second transistors are alternately connected between the adjacent data lines; The second signal control line is electrically connected to the driving unit and the gates of a plurality of second transistors respectively, and is used to control the on or off of the second transistors so that adjacent data lines can exchange data.

[0012] In conjunction with the driving circuit described in the second aspect of the present invention, in a first possible implementation manner, the driving unit is used to: Driving two adjacent data lines to maintain positive polarity and negative polarity respectively; The first signal control line is driven with a first driving timing to periodically open or close the two adjacent frame data lines, and the second signal control line is driven with a second driving timing to periodically exchange driving data of the two adjacent frame data lines.

[0013] In combination with the first possible implementation manner of the second aspect of the present invention, in a second possible implementation manner, the driving unit is further used for: driving a plurality of groups of two adjacent data lines in a data line array; The first data line of the two adjacent data lines is driven to keep the positive polarity, and the second data line of the two adjacent data lines is driven to keep the negative polarity.

[0014] In combination with the second possible implementation manner of the second aspect of the present invention, in a third possible implementation manner, the driving unit is further used for: All data lines in the data line array are opened with a high level in the first driving sequence, so that the two adjacent data lines are respectively positive and negative polarities, and all data lines in the data line array are closed with a low level in the first driving sequence until the first driving sequence is completed.

[0015] In combination with the third possible implementation manner of the second aspect of the present invention, in a fourth possible implementation manner, the driving unit is further used for: All data lines in the data line array are opened with a high level in the second driving sequence, and the data in the two adjacent data lines are exchanged, which are negative polarity and positive polarity respectively, and all data lines in the data line array are closed with a low level in the second driving sequence until the second driving sequence is completed.

[0016] In a third aspect, a liquid crystal display panel comprises the driving circuit described in the second aspect.

[0017] A driving method, a driving circuit and a liquid crystal display panel in the present invention are implemented. By setting a driving circuit in a liquid crystal display panel, a driving unit is used to drive a first signal control line and a second signal control line in the driving circuit with different driving timings, so as to periodically exchange driving data of the two adjacent frame data lines, thereby achieving column flipping of pixels while keeping the polarity of the data lines unchanged, thereby solving the problem of high power consumption caused by column flipping through data lines in the prior art. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the scheme in the present application, a brief introduction is given below to the drawings required for use in the description of the embodiments of the present application. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0019] Figure 1 It is a schematic diagram of pixel arrangement of a liquid crystal display panel in the prior art; Figure 2 It is a schematic diagram of the principle of a driving circuit of a liquid crystal display panel in the prior art; Figure 3 It is a driving timing diagram of a driving circuit of a liquid crystal display panel in the prior art; Figure 4 is a schematic diagram of the principle of the driving circuit of the liquid crystal display panel in this application; Figure 5 is a driving timing diagram of a driving circuit of a liquid crystal display panel in the present application; Figure 6 is a flow chart of an embodiment of a driving method of the present application; Figure 7 yes Figure 6 A flowchart of a specific implementation of S100; Figure 8 yes Figure 6 A flowchart of a specific implementation of S200; Fig. 9 yes Figure 6 A flowchart of another specific implementation of S200. DETAILED DESCRIPTION

[0020] The following will be combined with the accompanying drawings in the invention to clearly and completely describe the technical solutions in the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, other embodiments obtained by ordinary technicians in this field without creative work are all within the scope of protection of the present invention.

[0021] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0022] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used in the specification of the application are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" in the specification and claims of this application and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.

[0023] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0024] The existing liquid crystal display panel uses a display mode of column polarity inversion, which increases its power consumption. Figure 1 , Figure 2 and Figure 3 , Figure 1 is a schematic diagram of pixel arrangement of a liquid crystal display panel in the prior art, Figure 2 is a schematic diagram of the principle of a driving circuit of a liquid crystal display panel in the prior art, Figure 3 Schematic diagram of the driving timing of the driving circuit of the liquid crystal display panel in the prior art. Figure 1 In the example, the column pixels are R pixels, G pixels or B pixels. Figure 2 In the embodiment, the gate drive lines G1, G2, ..., Gn are electrically connected to the gates of the R pixels, G pixels, and B pixels of the corresponding rows, respectively, and the data lines S1, S2, ..., Sn are electrically connected to the drains of the pixel transistors of the pixels of the corresponding columns, respectively, for data transmission, and the drive unit (IC) is electrically connected to the data lines S1, S2, ..., Sn. Figure 3 In the embodiment, the data lines S1, S2, ..., Sn are driven in different driving timings in different frames to realize column flipping. The polarity of the data lines of two adjacent frames needs to be flipped, which increases the power consumption of the liquid crystal display panel.

[0025] In view of the above problems, a driving method, a driving circuit and a liquid crystal display panel are proposed.

[0026] In the first aspect, a driving method, such as Figure 6 , Figure 6 It is a flowchart of an embodiment of a driving method of the present application, including: Step 100: Use a driving unit to drive two adjacent data lines to maintain positive polarity and negative polarity respectively.

[0027] like Figure 4 and Figure 5 , Figure 4 is a schematic diagram of the principle of the driving circuit of the liquid crystal display panel in this application; Figure 5 This is a driving timing diagram of the driving circuit of the liquid crystal display panel in the present application. In the embodiment of the present application, in order to realize the column pixel flipping, the existing driving circuit is improved. Specifically, the driving circuit includes a driving unit, a data line array, a plurality of first transistors, a plurality of second transistors, a first signal control line, and a second signal control line; the data line array is used to connect each column of pixels in sequence and is electrically connected to the driving unit; the drain and source of the first transistor are electrically connected between the corresponding data line and the driving unit; the first signal control line is electrically connected to the driving unit and the gate of the plurality of first transistors respectively, and is used to control the opening or closing of the first transistor; the second transistor is staggered between adjacent data lines; the second signal control line is electrically connected to the driving unit and the gate of the plurality of second transistors respectively, and is used to control the opening or closing of the second transistors to enable adjacent data lines to exchange data.

[0028] like Figure 5 In the present application embodiment, Figure 7 , Figure 7 yes Figure 6 A flowchart of a specific implementation of S100; step 100 includes: step 110, driving multiple groups of two adjacent data lines in the data line array; step 120, driving the previous data line of the two adjacent data lines to maintain the positive polarity, and driving the next data line of the two adjacent data lines to maintain the negative polarity.

[0029] like Figure 4 Taking the adjacent data lines IC-S1 and IC-S2 as an example, a first signal control line K1 and a second signal control line K2 are added. After power-on, the output polarity of the data line of IC does not change, that is, IC-S1 maintains the positive polarity unchanged, and IC-S2 maintains the negative polarity unchanged.

[0030] Step 200: using a driving unit to drive a first signal control line with a first driving timing to periodically open or close two adjacent frame data lines, and at the same time driving a second signal control line with a second driving timing to periodically exchange driving data between two adjacent frame data lines; The first driving timing sequence and the second driving timing sequence have the same frequency and opposite pulse level polarities.

[0031] In the embodiments of the present application, Figure 8 , Figure 8 yes Figure 6 A flowchart of a specific implementation of S200 in the embodiment; step 200 includes: step 210, opening all data lines in the data line array with a high level in the first driving sequence, so that two adjacent data lines are respectively positive and negative polarities; step 220, closing all data lines in the data line array with a low level in the first driving sequence; step 230, repeating steps 210-220 until the first driving sequence is completed.

[0032] In the embodiments of the present application, Fig. 9 , Fig. 9 yes Figure 6 Flow chart of another specific implementation of S200 in the second embodiment. Step 200 includes: step 240, opening all data lines in the data line array with a high level in the second driving sequence, and exchanging data in two adjacent data lines, which are negative polarity and positive polarity respectively; step 250, closing all data lines in the data line array with a low level in the second driving sequence; step 260, repeating steps 240-250 until the second driving sequence is completed.

[0033] like Figure 5 Taking the adjacent data lines IC-S1 and IC-S2 as an example, the first driving timing and the second driving timing in the embodiment of the present application drive the adjacent data lines IC-S1 and IC-S2 simultaneously in different frames. Specifically, taking adjacent data lines IC-S1 and IC-S2 as an example, the driving principle of the embodiment of the present application is: After power-on, the output polarity of the IC data line does not change, that is, IC-S1 maintains the positive polarity unchanged, and IC-S2 maintains the negative polarity unchanged. Through the periodic switching of K1 and K2, the polarity entering the pixel display area is reversed, and the column flip is realized. However, here the IC needs to exchange data between IC-S1 and IC-S2 for the previous and next two frames.

[0034] That is, after the data from the external interface is transmitted to the display driver IC, the driver IC parses it and converts it into the data required by the display AA. During the conversion, data exchange can be performed.

[0035] In the data exchange in the embodiments of the present application, for example, after the display screen driver IC has completed the analysis, the first frame of data sent to the display area of ​​the display screen is regular data (that is, no data exchange is performed, IC-S1 sends data to the display area S1 of the display screen, and IC-S2 sends data to the display area S2 of the display screen, that is, the two adjacent data lines are respectively maintained as positive polarity and negative polarity in turn), and the second frame of data is for IC data exchange (that is, the data sent by IC-SI is the data of the display screen S2, and the data sent by IC-S2 is the data of the display screen S1, that is, the data in the two adjacent data lines are exchanged, and are respectively exchanged as negative polarity and positive polarity in turn). The data exchange action is completed inside the IC, that is, the data exchange must be completed before the IC sends it to the display area of ​​the display screen, and then the data is written into the display screen. By analogy, the other adjacent data lines IC-S3 and IC-S4, IC-S5 and IC-S6 are also driven by the same driving principle.

[0036] By setting a driving circuit in a liquid crystal display panel, using a driving unit to drive the first signal control line and the second signal control line in the driving circuit with different driving timings, so as to periodically exchange driving data of two adjacent frames of data lines, it is possible to achieve column flipping of pixels while keeping the polarity of the data lines unchanged, thereby solving the problem of high power consumption caused by column flipping of data lines in the prior art. While the pixel area column flipping can be achieved, the IC data line output does not flip the polarity, which can reduce the power consumption data increased by the polarity flipping of the IC data line, thereby improving the competitiveness of the product.

[0037] In a second aspect, a driving circuit adopts the driving method of the first aspect, such as Figure 4 , including a driving unit, a data line array, a plurality of first transistors, a plurality of second transistors, a first signal control line, and a second signal control line; the data line array is used to connect each column of pixels in sequence and is electrically connected to the driving unit; the drain and source of the first transistor are electrically connected between the corresponding data line and the driving unit; the first signal control line is electrically connected to the driving unit and the gates of the plurality of first transistors, respectively, for controlling the on or off of the first transistors; the second transistors are staggeredly connected between adjacent data lines; the second signal control line is electrically connected to the driving unit and the gates of the plurality of second transistors, respectively, for enabling adjacent data lines to exchange data by controlling the on or off of the second transistors.

[0038] Furthermore, the driving unit is used to drive two adjacent data lines to maintain positive polarity and negative polarity respectively, drive the first signal control line with a first driving timing to periodically open or close the two adjacent frame data lines, and drive the second signal control line with a second driving timing to periodically exchange driving data of the two adjacent frame data lines.

[0039] Furthermore, the driving unit is further used to drive multiple groups of two adjacent data lines in the data line array, drive the first data line of the two adjacent data lines to keep the positive polarity, and drive the second data line of the two adjacent data lines to keep the negative polarity.

[0040] Furthermore, the driving unit is further used to open all data lines in the data line array with a high level in the first driving timing, so that two adjacent data lines are positive polarity and negative polarity respectively, and close all data lines in the data line array with a low level in the first driving timing until the first driving timing is completed.

[0041] Furthermore, the driving unit is further used to open all data lines in the data line array with a high level in the second driving timing, and exchange the data in two adjacent data lines, which are negative polarity and positive polarity respectively, and close all data lines in the data line array with a low level in the second driving timing until the second driving timing is completed.

[0042] In a third aspect, a liquid crystal display panel comprises the driving circuit of the second aspect.

[0043] A driving method, a driving circuit and a liquid crystal display panel in the present invention are implemented. By setting a driving circuit in a liquid crystal display panel, a driving unit is used to drive a first signal control line and a second signal control line in the driving circuit with different driving timings, so that the driving data of two adjacent frames of data lines are periodically exchanged, thereby achieving column flipping of pixels while keeping the polarity of the data lines unchanged, thereby solving the problem of high power consumption caused by column flipping through data lines in the prior art.

[0044] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A driving method, characterized in that it includes: Step 100, using a driving unit to drive two adjacent data lines to maintain positive polarity and negative polarity respectively; Step 200: using the driving unit to drive the first signal control line with a first driving timing to periodically open or close the two adjacent frame data lines, and at the same time driving the second signal control line with a second driving timing to periodically exchange driving data between the two adjacent frame data lines; The first driving timing sequence and the second driving timing sequence have the same frequency and opposite pulse level polarities.

2. The driving method according to claim 1, characterized in that: The step 100 comprises: Step 110, driving a plurality of groups of two adjacent data lines in the data line array; Step 120 , driving the first data line of the two adjacent data lines to keep the positive polarity, and driving the second data line of the two adjacent data lines to keep the negative polarity.

3. The driving method according to claim 1, characterized in that: The step 200 includes: Step 210, turning on all the data lines in the data line array with a high level in the first driving timing, so that the two adjacent data lines are respectively positive polarity and negative polarity; Step 220, turning off all data lines in the data line array with a low level in the first driving timing; Step 230, repeating steps 210 to 220 until the first driving sequence is completed.

4. The driving method according to claim 1, characterized in that: The step 200 includes: Step 240, turning on all the data lines in the data line array with a high level in the second driving timing, and exchanging the data in the two adjacent data lines, which are negative polarity and positive polarity respectively; Step 250, turning off all data lines in the data line array with a low level in a second driving timing sequence; Step 260, repeating steps 240 to 250 until the second driving sequence is completed.

5. A driving circuit, using the driving method according to any one of claims 1 to 4, characterized in that: include: Drive unit; Data line array; a plurality of first transistors; a plurality of second transistors; A first signal control line; A second signal control line; The data line array is used to sequentially connect each column of pixels and is electrically connected to the driving unit; The drain and source of the first transistor are electrically connected between the corresponding data line and the driving unit; The first signal control line is electrically connected to the driving unit and the gates of the plurality of first transistors respectively, and is used to control the on or off of the first transistors; The second transistors are alternately connected between the adjacent data lines; The second signal control line is electrically connected to the driving unit and the gates of a plurality of second transistors respectively, and is used to control the on or off of the second transistors so that adjacent data lines can exchange data.

6. The driving circuit according to claim 5, characterized in that: The drive unit is used for: Driving two adjacent data lines to maintain positive polarity and negative polarity respectively; The first signal control line is driven with a first driving timing to periodically open or close the two adjacent frame data lines, and the second signal control line is driven with a second driving timing to periodically exchange driving data of the two adjacent frame data lines.

7. The driving circuit according to claim 6, characterized in that: The drive unit is further configured to: driving a plurality of groups of two adjacent data lines in a data line array; The first data line of the two adjacent data lines is driven to keep the positive polarity, and the second data line of the two adjacent data lines is driven to keep the negative polarity.

8. The driving circuit according to claim 6, characterized in that: The drive unit is further configured to: All data lines in the data line array are opened with a high level in the first driving sequence, so that the two adjacent data lines are respectively positive and negative polarities, and all data lines in the data line array are closed with a low level in the first driving sequence until the first driving sequence is completed.

9. The driving circuit according to claim 6, characterized in that: The drive unit is further configured to: All data lines in the data line array are opened with a high level in the second driving sequence, and the data in the two adjacent data lines are exchanged, which are negative polarity and positive polarity respectively, and all data lines in the data line array are closed with a low level in the second driving sequence until the second driving sequence is completed.

10. A liquid crystal display panel, characterized in that: The driving circuit comprises the driving circuit described in any one of claims 5 to 9.

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