FPGA-based power supply safety output method, device, equipment and medium

Abstract

The present invention relates to the field of electric power safety technology, and discloses a power supply safety output method based on FPGA, including: configuring parameters of FPGA based on preset data acquisition instructions to obtain a configured FPGA, and collecting data in a preset circuit through an ADC interface in the configured FPGA to obtain ADC data; smoothing the ADC data based on a preset filtering device to obtain smoothed ADC data, and calibrating and zeroing the smoothed ADC data to obtain standard ADC data; judging whether the circuit meets the arc extinguishing condition based on the standard ADC data and the configured FPGA; if the arc extinguishing condition is met, an arc extinguishing signal is obtained according to the arc extinguishing condition, and the arc extinguishing of the circuit is controlled by the arc extinguishing signal; if the arc extinguishing condition is not met, PID calculation is performed according to the standard ADC data to obtain a PWM wave, and output control is performed according to the pulse width of the PWM wave. The present invention also proposes a power supply safety output device, equipment and storage medium based on FPGA. The present invention can improve the safety of electricity use behavior.

Description

Technical Field

[0001] The present invention relates to the field of power safety technology, and in particular to a FPGA-based power safety output method, device, equipment and medium. Background Art

[0002] Currently, most power supplies are controlled by a single-chip microcomputer, and the working characteristic of the single-chip microcomputer is that the single-chip microcomputer periodically scans the connected ADC module to capture data, makes judgments on the input data and performs operations.

[0003] Since the microcontroller can only operate serially, the frequency of operation will be limited by the scanning cycle, which means that the microcontroller alone cannot access the high-speed ADC with a sampling frequency of more than 50Mhz. If the data is temporarily stored in the storage module, the amount of data collected by the high-speed ADC per unit cycle is too large for the processing speed of the microcontroller to process, and the voltage and current of the output section collected by the ADC are prone to arcing, affecting the safety of electricity use. Summary of the invention

[0004] The present invention provides a method, device, equipment and medium for power safety output based on FPGA, the main purpose of which is to ensure the safety of power usage.

[0005] To achieve the above object, the present invention provides a power supply safety output method based on FPGA, comprising:

[0006] Configuring parameters of the FPGA based on a preset data acquisition instruction to obtain a configured FPGA, and acquiring data in a preset circuit through an ADC interface in the configured FPGA to obtain ADC data;

[0007] Performing a smoothing operation on the ADC data based on a preset filtering device to obtain smoothed ADC data, and calibrating and zeroing the smoothed ADC data to obtain standard ADC data;

[0008] Determining whether the circuit meets the arc extinguishing condition based on the standard ADC data and the configured FPGA;

[0009] If the arc extinguishing condition is met, an arc extinguishing signal is obtained according to the arc extinguishing condition, and the arc extinguishing of the circuit is controlled by the arc extinguishing signal;

[0010] If the arc extinguishing condition is not met, PID calculation is performed according to the standard ADC data to obtain a PWM wave, and output control is performed according to the pulse width of the PWM wave.

[0011] Optionally, judging whether the circuit meets the arc extinguishing condition based on the standard ADC data and the configured FPGA includes:

[0012] Performing real-time analysis on the standard ADC data according to the configured FPGA to obtain analysis results, and judging whether the circuit meets arc occurrence conditions according to the analysis results and preset arc extinguishing conditions, wherein the arc extinguishing conditions are that the current is greater than a current threshold, the voltage is less than a voltage threshold, or the current is greater than a current threshold and the voltage is less than a voltage threshold;

[0013] If the circuit meets the arc occurrence condition, the duration for which the circuit meets the arc occurrence condition is obtained, and when the duration is greater than 80 nanoseconds, it is determined that an arc has occurred in the circuit and the arc extinguishing condition is met.

[0014] Optionally, configuring parameters of the FPGA based on a preset data acquisition instruction to obtain a configured FPGA, and acquiring data in a preset circuit through an ADC interface in the configured FPGA to obtain ADC data, includes:

[0015] Based on the data acquisition instruction, the FPGA is configured with parameters of sampling frequency, resolution, and input channel to obtain a configured FPGA;

[0016] It is queried whether a control signal channel in the circuit is turned on, and when the control signal channel is turned on, the output voltage and output current data in the circuit are collected through the ADC interface in the configured FPGA to obtain ADC data.

[0017] Optionally, performing PID calculation according to the standard ADC data to obtain a PWM wave includes:

[0018] Obtaining a preset expected value, and calculating the difference between the expected value and the standard ADC reading to obtain an error value;

[0019] According to the error value, the adjustment amount of the preset control signal is calculated by using the proportional, integral and differential formulas to obtain the signal adjustment amount;

[0020] The signal adjustment amount is limited to ensure that the signal adjustment amount is within a preset control range, and a PWM wave is generated based on the signal adjustment amount.

[0021] Optionally, the performing a smoothing operation on the ADC data based on a preset filtering device to obtain smoothed ADC data includes:

[0022] Based on the type of the filtering device, setting the corresponding coefficient of the filtering device and determining the cutoff frequency of the filtering device to obtain a standard filtering device;

[0023] The high-frequency noise part in the ADC data is removed by the standard filtering device, and the low-frequency signal is retained to obtain smooth ADC data.

[0024] Optionally, the performing arc extinguishing control of the circuit by using the arc extinguishing signal includes:

[0025] The arc extinguishing signal is sent to the FPGA of the circuit, and the preset arc extinguishing operation is immediately performed by the FPGA of the circuit. After the arc extinguishing operation, when the arc disappears and the system is stable, the power supply of the circuit is controlled by the FPGA of the circuit to restart the output and restore the normal working state.

[0026] Optionally, before configuring the parameters of the FPGA based on the preset data acquisition instruction to obtain the configured FPGA, the method further includes:

[0027] Determine key parameters of the PWM wave according to preset power system requirements, wherein the key parameters include frequency, duty cycle and pulse width;

[0028] A dedicated timer or counter module is configured in the FPGA to generate a PWM module, and a code is written to control the PWM module.

[0029] In order to solve the above problems, the present invention further provides a power supply safety output device based on FPGA, the device comprising:

[0030] A data acquisition module is used to configure the parameters of the FPGA based on a preset data acquisition instruction to obtain a configured FPGA, and to collect data in a preset circuit through an ADC interface in the configured FPGA to obtain ADC data;

[0031] A data standardization module, used for performing a smoothing operation on the ADC data based on a preset filtering device to obtain smoothed ADC data, and calibrating and zeroing the smoothed ADC data to obtain standard ADC data;

[0032] An arc extinguishing judgment module, used to judge whether the circuit meets the arc extinguishing condition based on the standard ADC data and the configured FPGA; if the arc extinguishing condition is met, an arc extinguishing signal is obtained according to the arc extinguishing condition, and the arc extinguishing of the circuit is controlled by the arc extinguishing signal;

[0033] The output control module is used to perform PID calculation according to the standard ADC data to obtain a PWM wave if the arc extinguishing condition is not met, and perform output control according to the pulse width of the PWM wave.

[0034] In order to solve the above problem, the present invention further provides an electronic device, the electronic device comprising:

[0035] at least one processor; and,

[0036] a memory communicatively connected to the at least one processor; wherein,

[0037] The memory stores a computer program that can be executed by the at least one processor. The computer program is executed by the at least one processor so that the at least one processor can perform the FPGA-based power supply safety output method as described above.

[0038] In order to solve the above problems, the present invention also provides a computer-readable storage medium, including a data storage area and a program storage area, the data storage area stores created data, and the program storage area stores a computer program; wherein, when the computer program is executed by a processor, the FPGA-based power supply safety output method as described above is implemented.

[0039] The embodiment of the present invention configures the parameters of the FPGA based on the preset data acquisition instruction to obtain the configured FPGA, and acquires the data in the circuit through the ADC interface in the configured FPGA to obtain ADC data; performs smoothing operation on the ADC data based on the preset filtering device to obtain smoothed ADC data, and calibrates and zeroes the smoothed ADC data to obtain standard ADC data; determines whether the arc extinguishing condition is met based on the FPGA configured with the standard ADC data; if the arc extinguishing condition is met, an arc extinguishing signal is obtained according to the arc extinguishing condition, and the arc extinguishing of the circuit is controlled by the arc extinguishing signal; if the arc extinguishing condition is not met, PID calculation is performed according to the standard ADC data to obtain a PWM wave, and output control is performed according to the pulse width of the PWM wave. Therefore, the FPGA-based power supply safety output method, device, electronic device and computer-readable storage medium proposed by the present invention eliminate the problems of arc and power supply output control in power consumption behavior, and can improve the safety of power consumption behavior. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 A schematic diagram of a flow chart of a power supply safety output method based on FPGA provided in one embodiment of the present invention;

[0041] Figure 2 A schematic diagram of a module of a FPGA-based power supply safety output device provided in one embodiment of the present invention;

[0042] Figure 3 A schematic diagram of the internal structure of an electronic device for implementing a power safety output method based on FPGA provided by an embodiment of the present invention.

[0043] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0044] It should be understood that the specific embodiments described herein are only used to explain the present invention, and are not used to limit the present invention.

[0045] The embodiment of the present application provides a power supply safety output method based on FPGA. The execution subject of the FPGA-based power supply safety output method includes but is not limited to at least one of the electronic devices such as the server and the terminal that can be configured to execute the method provided by the embodiment of the present application. Among them, the server can be an independent server, or it can be a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, content delivery networks (Content Delivery Network, CDN), and big data and artificial intelligence platforms. In other words, the FPGA-based power supply safety output method can be executed by software or hardware installed on a remote device or a server device, and the software can be a blockchain platform. The server includes but is not limited to: a single server, a server cluster, a cloud server or a cloud server cluster, etc.

[0046] Reference Figure 1 FIG. 1 is a flow chart of a method for safely outputting a power supply based on FPGA according to an embodiment of the present invention. In this embodiment, the method for safely outputting a power supply based on FPGA includes the following steps S1-S5:

[0047] S1. Parameter configuration is performed on the FPGA based on a preset data acquisition instruction to obtain a configured FPGA, and data in a preset circuit is collected through an ADC interface in the configured FPGA to obtain ADC data.

[0048] In the embodiment of the present invention, the data acquisition instruction refers to an instruction for configuring parameters of the FPGA to facilitate data acquisition in the circuit through the ADC, which is used to configure and control the key parameters and operations of the ADC to ensure that the system can accurately and timely acquire signal data according to predetermined requirements. In detail, these instructions are usually generated and sent by the logic circuit inside the FPGA or the external controller (such as the host computer) to achieve efficient data acquisition and processing.

[0049] Furthermore, the data acquisition instructions can be used to control the acquisition frequency, acquisition resolution, sampling channel, trigger conditions, data format, data storage, etc. Among them, controlling the acquisition frequency can specify the frequency of ADC data acquisition, that is, how many times per second the data is collected, ensuring that the system can monitor the important parameters of signal changes in real time; controlling the acquisition resolution can specify the resolution of the ADC, which determines the minimum signal change that the ADC can distinguish, for example, a 12-bit ADC can provide 4096 different digital values.

[0050] In the embodiment of the present invention, the FPGA is a field programmable gate array, which is a semiconductor device that can be programmed to implement specific logic functions, used to control the safe output of power supply, capable of performing multiple operations simultaneously, and providing fast data processing and control response. These characteristics make FPGA suitable for occasions requiring real-time power control. The ADC stands for analog-to-digital converter, which is an electronic device that converts analog signals into digital signals. It can convert analog signals from the real world (such as temperature, pressure, sound, etc.) into digital signals that can be processed by computers or digital circuits.

[0051] In an embodiment of the present invention, the step of configuring parameters of an FPGA based on a preset data acquisition instruction to obtain a configured FPGA, and acquiring data in a preset circuit through an ADC interface in the configured FPGA to obtain ADC data includes:

[0052] Based on the data acquisition instruction, the FPGA is configured with parameters of sampling frequency, resolution, and input channel to obtain a configured FPGA;

[0053] It is queried whether a control signal channel in the circuit is turned on, and when the control signal channel is turned on, the output voltage and output current data in the circuit are collected through the ADC interface in the configured FPGA to obtain ADC data.

[0054] In the embodiment of the present invention, the control signal channel is a communication path between the FPGA and an external device (such as an ADC, an actuator, a relay, etc.), which can be a physical electrical connection or a logical communication protocol for transmitting control signals and data.

[0055] Furthermore, before configuring the parameters of the FPGA based on the preset data acquisition instruction to obtain the configured FPGA, the method further includes:

[0056] Determine key parameters of the PWM wave according to preset power system requirements, wherein the key parameters include frequency, duty cycle and pulse width;

[0057] A dedicated timer or counter module is configured in the FPGA to generate a PWM module, and a code is written to control the PWM module.

[0058] The key parameters are calculated by a control algorithm, such as a PID controller.

[0059] In another embodiment of the present invention, the channel may also be a power output channel and a data transmission channel, through which the power supply can provide electrical energy to the load. In the control system, turning on or off this channel can control the output of the power supply, and through the data transmission channel, data is transmitted from the sensor (such as ADC) to the FPGA, or from the FPGA to the host computer. This includes any necessary data buffering, processing and transmission mechanisms.

[0060] S2. Perform a smoothing operation on the ADC data based on a preset filtering device to obtain smoothed ADC data, and perform a calibration and zeroing operation on the smoothed ADC data to obtain standard ADC data.

[0061] In an embodiment of the present invention, the filtering device is a digital filter for smoothing and purifying ADC collected data. The filtering device is implemented in an FPGA and is used to process voltage and current signals collected from the output end of the power supply system.

[0062] In an embodiment of the present invention, the smoothing operation on the ADC data based on a preset filtering device to obtain smoothed ADC data includes:

[0063] Based on the type of the filtering device, setting the corresponding coefficient of the filtering device and determining the cutoff frequency of the filtering device to obtain a standard filtering device;

[0064] The high-frequency noise part in the ADC data is removed by the standard filtering device, and the low-frequency signal is retained to obtain smooth ADC data.

[0065] Furthermore, by setting corresponding coefficients according to the selected filter type, it is possible to avoid the coefficients affecting the filtering effect. In addition, by determining the cutoff frequency of the filter, it is possible to ensure that important signal components are not filtered out.

[0066] In detail, the above standard filtering device uses a commonly used low-pass filter. In addition, a moving average filter, a Gaussian filter, and a median filter can also be used. Among them, the moving average filter smoothes the ADC data by calculating the sliding average of the data points; the Gaussian filter smoothes the ADC data by using the Gaussian function as a weight window; the median filter replaces the original value with the median of the ADC data point, which is particularly effective in removing spike noise.

[0067] In the embodiment of the present invention, by calibrating and zeroing the smoothed ADC data, standard ADC data can be obtained. The role of this step is to ensure the accuracy and consistency of the data, eliminate system deviation and zero drift, so that subsequent signal processing and control decisions are based on a reliable basis, and improve the overall performance and reliability of the system. In short, calibration and zeroing is a key link to improve data quality and ensure precise control of the system.

[0068] S3. Determine whether the circuit meets the arc extinguishing condition based on the standard ADC data and the configured FPGA.

[0069] In the embodiments of the present invention, arc extinguishing refers to the process of taking measures to extinguish the arc when current passes through the arc in electrical equipment, such as switches, circuit breakers or contactors. The arc is a discharge phenomenon generated when current passes through air or other media, usually accompanied by high temperature and bright light. The existence of the arc not only causes energy loss, but also may cause damage to the equipment and even cause safety accidents.

[0070] Further, judging whether the circuit meets the arc extinguishing condition based on the standard ADC data and the configured FPGA includes:

[0071] Performing real-time analysis on the standard ADC data according to the configured FPGA to obtain analysis results, and judging whether the circuit meets arc occurrence conditions according to the analysis results and preset arc extinguishing conditions, wherein the arc extinguishing conditions are that the current is greater than a current threshold, the voltage is less than a voltage threshold, or the current is greater than a current threshold and the voltage is less than a voltage threshold;

[0072] If the circuit meets the arc occurrence condition, the duration for which the circuit meets the arc occurrence condition is obtained, and when the duration is greater than 80 nanoseconds, it is determined that an arc has occurred in the circuit and the arc extinguishing condition is met.

[0073] S4. If the arc extinguishing condition is met, an arc extinguishing signal is obtained according to the arc extinguishing condition, and the arc extinguishing of the circuit is controlled by the arc extinguishing signal.

[0074] In an embodiment of the present invention, the arc extinguishing control of the circuit by using the arc extinguishing signal includes:

[0075] The arc extinguishing signal is sent to the FPGA of the circuit, and the preset arc extinguishing operation is immediately performed by the FPGA of the circuit. After the arc extinguishing operation, when the arc disappears and the system is stable, the power supply of the circuit is controlled by the FPGA of the circuit to restart the output and restore the normal working state.

[0076] The arc extinguishing operation may include closing the output switch, cutting off the power supply, or adjusting the output parameters to extinguish the arc.

[0077] Furthermore, the arc extinguishing operation must be completed within 100 nanoseconds after the arc occurs to ensure the safety of the system.

[0078] S5. If the arc extinguishing condition is not met, PID calculation is performed according to the standard ADC data to obtain a PWM wave, and output control is performed according to the pulse width of the PWM wave.

[0079] In the embodiment of the present invention, the PID calculation refers to the implementation and calculation process of the proportional-integral-derivative control algorithm. The PID controller is one of the most common feedback controllers in industrial control systems and is used to automatically control a dynamic system. The PID controller adjusts the control signal by calculating a combination of three basic elements to achieve the purpose of adjusting the system output to the desired value.

[0080] Among them, proportional control is the most direct part of the PID controller, which adjusts the output proportionally according to the current error value (the difference between the expected value and the actual value). Proportional gain (Kp) is a parameter that controls the strength of the proportional response; integral control focuses on the cumulative sum of the error over time. The role of the integral term is to eliminate steady-state errors and ensure that the system output can eventually reach the expected value. The integral gain (Ki) determines the strength of the integral action; the differential control predicts the trend of the error change and adjusts the output by the rate of change of the current error value. The differential gain (Kd) controls the strength of the differential response.

[0081] Furthermore, proportional control can respond quickly to system deviations, but often cannot eliminate steady-state errors when used alone. Integral action can ensure that the system adjusts to accumulated errors over a long period of time, but excessive integral action may cause the system to respond more slowly or overshoot. Differential action can improve system stability and reduce overshoot, allowing the system to reach a steady state faster, but it may also be adversely affected by noise.

[0082] In the embodiment of the present invention, the PWM wave is a pulse width modulation (Pulse Width Modulation) wave, which is a common signal form in digital output circuits. The PWM wave controls the overall energy output of the signal by adjusting the duration of the high level state (i.e., the pulse width), thereby realizing analog control of the analog signal.

[0083] Further, performing PID calculation according to the standard ADC data to obtain a PWM wave includes:

[0084] Obtaining a preset expected value, and calculating the difference between the expected value and the standard ADC reading to obtain an error value;

[0085] According to the error value, the adjustment amount of the preset control signal is calculated by using the proportional, integral and differential formulas to obtain the signal adjustment amount;

[0086] The signal adjustment amount is limited to ensure that the signal adjustment amount is within a preset control range, and a PWM wave is generated based on the signal adjustment amount.

[0087] In the embodiment of the present invention, limiting the signal adjustment amount within a certain range can prevent the system from over-responding. This is usually achieved by setting an output limit or saturation to ensure that the output signal does not exceed the safe operating range of the system or device.

[0088] Furthermore, when generating a PWM wave based on the signal adjustment amount, the duty cycle of the PWM wave is also adjusted according to the output of the PID controller, thereby controlling the power of the load connected to the PWM output. The adjustment of the duty cycle directly affects the average voltage and current of the power supply output.

[0089] In the embodiment of the present invention, the error value is the basis of PID control, and the error value reflects the degree to which the system needs to be adjusted. Further, the proportional part provides immediate response, the integral part eliminates steady-state error, and the differential part predicts error changes and makes adjustments in advance.

[0090] Furthermore, when no arc is detected, the FPGA adjusts the output of the power supply according to real-time data to ensure stable operation of the power supply, which may involve adjusting the duty cycle of the PWM signal to control the output voltage and current of the power supply. Among them, the high processing speed and parallel processing capability of the FPGA enable it to quickly respond to the occurrence of arcs and perform arc extinguishing operations in a timely manner. By accurately controlling the PWM signal, the FPGA can finely adjust the power supply output to meet different power supply requirements.

[0091] The embodiment of the present invention configures the parameters of the FPGA based on the preset data acquisition instruction to obtain the configured FPGA, and acquires the data in the circuit through the ADC interface in the configured FPGA to obtain ADC data; performs smoothing operation on the ADC data based on the preset filtering device to obtain smoothed ADC data, and calibrates and zeroes the smoothed ADC data to obtain standard ADC data; determines whether the arc extinguishing condition is met based on the standard ADC data; if the arc extinguishing condition is met, an arc extinguishing signal is obtained according to the arc extinguishing condition, and the arc extinguishing of the circuit is controlled by the arc extinguishing signal; if the arc extinguishing condition is not met, PID calculation is performed according to the standard ADC data to obtain a PWM wave, and output control is performed according to the pulse width of the PWM wave. Therefore, the FPGA-based power supply safety output method, device, electronic device and computer-readable storage medium proposed by the present invention eliminate the problems of arc and power supply output control in power consumption behavior, and can improve the safety of power consumption behavior.

[0092] like Figure 2 FIG. 1 is a schematic diagram of a module of a power supply safety output device based on FPGA of the present invention.

[0093] The FPGA-based power supply safety output device 100 of the present invention can be installed in an electronic device. According to the functions to be implemented, the FPGA-based power supply safety output device can include a data acquisition module 101, a data standardization module 102, an arc extinguishing judgment module 103 and an output control module 104. The module of the present invention can also be called a unit, which refers to a series of computer program segments that can be executed by an electronic device processor and can complete fixed functions, which are stored in the memory of the electronic device.

[0094] In this embodiment, the functions of each module / unit are as follows:

[0095] The data acquisition module 101 is used to configure the parameters of the FPGA based on the preset data acquisition instruction to obtain the configured FPGA, and collect data in the preset circuit through the ADC interface in the configured FPGA to obtain ADC data;

[0096] A data standardization module 102 is used to perform a smoothing operation on the ADC data based on a preset filtering device to obtain smoothed ADC data, and to calibrate and zero the smoothed ADC data to obtain standard ADC data;

[0097] The arc extinguishing judgment module 103 is used to judge whether the circuit meets the arc extinguishing condition based on the standard ADC data and the configured FPGA; if the arc extinguishing condition is met, an arc extinguishing signal is obtained according to the arc extinguishing condition, and the arc extinguishing of the circuit is controlled by the arc extinguishing signal;

[0098] The output control module 104 is used to perform PID calculation according to the standard ADC data to obtain a PWM wave if the arc extinguishing condition is not met, and perform output control according to the pulse width of the PWM wave.

[0099] In detail, each module described in the FPGA-based power supply safety output device 100 in the embodiment of the present invention is used in the same manner as described above. Figure 1 The above-mentioned FPGA-based power supply safety output method has the same technical means and can produce the same technical effects, which will not be described in detail here.

[0100] like Figure 3 FIG. 1 is a schematic diagram of the structure of an electronic device for implementing a power supply safety output method based on FPGA according to the present invention.

[0101] The electronic device may include a processor 10, a memory 11, a communication bus 12, and a communication interface 13, and may also include a computer program stored in the memory 11 and executable on the processor 10, such as an FPGA-based power safety output program.

[0102] In some embodiments, the processor 10 may be composed of an integrated circuit, for example, a single packaged integrated circuit, or a plurality of packaged integrated circuits with the same or different functions, including one or more central processing units (CPUs), microprocessors, digital processing chips, graphics processors, and combinations of various control chips. The processor 10 is the control core (ControlUnit) of the electronic device, and uses various interfaces and lines to connect various components of the entire electronic device, and executes or executes programs or modules stored in the memory 11 (for example, executing a power safety output program based on FPGA, etc.), and calls data stored in the memory 11 to execute various functions of the electronic device and process data.

[0103] The memory 11 includes at least one type of readable storage medium, and the readable storage medium includes a flash memory, a mobile hard disk, a multimedia card, a card-type memory (for example, an SD or DX memory, etc.), a magnetic memory, a disk, an optical disk, etc. In some embodiments, the memory 11 may be an internal storage unit of an electronic device, such as a mobile hard disk of the electronic device. In other embodiments, the memory 11 may also be an external storage device of an electronic device, such as a plug-in mobile hard disk, a smart memory card (Smart Media Card, SMC), a secure digital (Secure Digital, SD) card, a flash card (Flash Card), etc. equipped on the electronic device. Further, the memory 11 may also include both an internal storage unit of the electronic device and an external storage device. The memory 11 can not only be used to store application software and various types of data installed in the electronic device, such as the code of the power safety output program based on FPGA, but also can be used to temporarily store data that has been output or is to be output.

[0104] The communication bus 12 may be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The bus may be divided into an address bus, a data bus, a control bus, etc. The bus is configured to realize connection and communication between the memory 11 and at least one processor 10, etc.

[0105] The communication interface 13 is used for communication between the above-mentioned electronic device and other devices, including a network interface and a user interface. Optionally, the network interface may include a wired interface and / or a wireless interface (such as a WI-FI interface, a Bluetooth interface, etc.), which is generally used to establish a communication connection between the electronic device and other electronic devices. The user interface may be a display (Display), an input unit (such as a keyboard (Keyboard)), and optionally, the user interface may also be a standard wired interface, a wireless interface. Optionally, in some embodiments, the display may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, and an OLED (Organic Light-Emitting Diode, organic light-emitting diode) touch device, etc. Among them, the display may also be appropriately referred to as a display screen or a display unit, which is used to display information processed in the electronic device and to display a visual user interface.

[0106] Figure 3 Only an electronic device with components is shown, and those skilled in the art will understand that Figure 3 The structure shown does not constitute a limitation on the electronic device, and may include fewer or more components than shown in the figure, or combine certain components, or arrange the components differently.

[0107] For example, although not shown, the electronic device may also include a power source (such as a battery) for supplying power to each component. Preferably, the power source may be logically connected to the at least one processor 10 through a power management device, so that the power management device can realize functions such as charging management, discharging management, and power consumption management. The power source may also include one or more DC or AC power sources, recharging devices, power failure detection circuits, power converters or inverters, power status indicators, and other arbitrary components. The electronic device may also include a variety of sensors, Bluetooth modules, Wi-Fi modules, etc., which will not be repeated here.

[0108] It should be understood that the embodiment is for illustration only and the scope of the patent application is not limited to this structure.

[0109] The FPGA-based power safety output program stored in the memory 11 in the electronic device is a combination of multiple computer programs. When running in the processor 10, it can achieve:

[0110] Configuring parameters of the FPGA based on a preset data acquisition instruction to obtain a configured FPGA, and acquiring data in a preset circuit through an ADC interface in the configured FPGA to obtain ADC data;

[0111] Performing a smoothing operation on the ADC data based on a preset filtering device to obtain smoothed ADC data, and calibrating and zeroing the smoothed ADC data to obtain standard ADC data;

[0112] Determining whether the circuit meets the arc extinguishing condition based on the standard ADC data and the configured FPGA;

[0113] If the arc extinguishing condition is met, an arc extinguishing signal is obtained according to the arc extinguishing condition, and the arc extinguishing of the circuit is controlled by the arc extinguishing signal;

[0114] If the arc extinguishing condition is not met, PID calculation is performed according to the standard ADC data to obtain a PWM wave, and output control is performed according to the pulse width of the PWM wave.

[0115] Specifically, the specific implementation method of the processor 10 for the above computer program can refer to Figure 1 The description of the relevant steps in the corresponding embodiments will not be repeated here.

[0116] Furthermore, if the module / unit integrated in the electronic device is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a non-volatile computer-readable storage medium. The computer-readable storage medium can be volatile or non-volatile. For example, the computer-readable medium can include: any entity or device capable of carrying the computer program code, a recording medium, a USB flash drive, a mobile hard disk, a magnetic disk, an optical disk, a computer memory, and a read-only memory (ROM).

[0117] The present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor of an electronic device, the computer program can implement:

[0118] Configuring parameters of the FPGA based on a preset data acquisition instruction to obtain a configured FPGA, and acquiring data in a preset circuit through an ADC interface in the configured FPGA to obtain ADC data;

[0119] Performing a smoothing operation on the ADC data based on a preset filtering device to obtain smoothed ADC data, and calibrating and zeroing the smoothed ADC data to obtain standard ADC data;

[0120] Determining whether the circuit meets the arc extinguishing condition based on the standard ADC data and the configured FPGA;

[0121] If the arc extinguishing condition is met, an arc extinguishing signal is obtained according to the arc extinguishing condition, and the arc extinguishing of the circuit is controlled by the arc extinguishing signal;

[0122] If the arc extinguishing condition is not met, PID calculation is performed according to the standard ADC data to obtain a PWM wave, and output control is performed according to the pulse width of the PWM wave.

[0123] In the several embodiments provided by the present invention, it should be understood that the disclosed devices, apparatuses and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of the modules is only a logical function division, and there may be other division methods in actual implementation.

[0124] The modules described as separate components may or may not be physically separated, and the components shown as modules may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0125] In addition, each functional module in each embodiment of the present invention may be integrated into one processing unit, each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of hardware plus software functional modules.

[0126] It is obvious to those skilled in the art that the present invention is not limited to the details of the above exemplary embodiments, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention.

[0127] Therefore, no matter from which point of view, the embodiments should be regarded as illustrative and non-restrictive, and the scope of the present invention is limited by the appended claims rather than the above description, so it is intended that all changes falling within the meaning and scope of the equivalent elements of the claims are included in the present invention. Any attached figure mark in the claims should not be regarded as limiting the claims involved.

[0128] The blockchain referred to in this invention is a new application mode of computer technologies such as distributed data storage, peer-to-peer transmission, consensus mechanism, encryption algorithm, etc. Blockchain is essentially a decentralized database, a string of data blocks generated by cryptographic methods. Each data block contains a batch of network transaction information, which is used to verify the validity of its information (anti-counterfeiting) and generate the next block. Blockchain can include the underlying blockchain platform, platform product service layer, and application service layer.

[0129] The embodiments of the present application can acquire and process relevant data based on artificial intelligence technology. Among them, artificial intelligence (AI) is the theory, method, technology and application system that uses digital computers or machines controlled by digital computers to simulate, extend and expand human intelligence, perceive the environment, acquire knowledge and use knowledge to obtain the best results.

[0130] In addition, it is clear that the word "comprising" does not exclude other units or steps, and the singular does not exclude the plural. Multiple units or devices stated in the system claim can also be implemented by one unit or device through software or hardware. The second and other words are used to indicate names, but not to indicate any particular order.

[0131] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the spirit and scope of the technical solution of the present invention.

Claims

1. A power supply safety output method based on FPGA, characterized in that: The method comprises: Configuring parameters of the FPGA based on a preset data acquisition instruction to obtain a configured FPGA, and acquiring data in a preset circuit through an ADC interface in the configured FPGA to obtain ADC data; Performing a smoothing operation on the ADC data based on a preset filtering device to obtain smoothed ADC data, and calibrating and zeroing the smoothed ADC data to obtain standard ADC data; Determining whether the circuit meets the arc extinguishing condition based on the standard ADC data and the configured FPGA; If the arc extinguishing condition is met, an arc extinguishing signal is obtained according to the arc extinguishing condition, and the arc extinguishing of the circuit is controlled by the arc extinguishing signal; If the arc extinguishing condition is not met, PID calculation is performed according to the standard ADC data to obtain a PWM wave, and output control is performed according to the pulse width of the PWM wave.

2. The FPGA-based power supply safety output method according to claim 1, characterized in that: The determining whether the circuit meets the arc extinguishing condition based on the standard ADC data and the configured FPGA includes: Performing real-time analysis on the standard ADC data according to the configured FPGA to obtain analysis results, and judging whether the circuit meets arc occurrence conditions according to the analysis results and preset arc extinguishing conditions, wherein the arc extinguishing conditions are that the current is greater than a current threshold, the voltage is less than a voltage threshold, or the current is greater than a current threshold and the voltage is less than a voltage threshold; If the circuit meets the arc occurrence condition, the duration for which the circuit meets the arc occurrence condition is obtained, and when the duration is greater than 80 nanoseconds, it is determined that an arc has occurred in the circuit and the arc extinguishing condition is met.

3. The FPGA-based power supply safety output method according to claim 1, characterized in that: The method configures the parameters of the FPGA based on the preset data acquisition instruction to obtain a configured FPGA, and acquires data in a preset circuit through an ADC interface in the configured FPGA to obtain ADC data, including: Based on the data acquisition instruction, the FPGA is configured with parameters of sampling frequency, resolution, and input channel to obtain a configured FPGA; It is queried whether a control signal channel in the circuit is turned on, and when the control signal channel is turned on, the output voltage and output current data in the circuit are collected through the ADC interface in the configured FPGA to obtain ADC data.

4. The FPGA-based power supply safety output method according to claim 1, characterized in that: The step of performing PID calculation according to the standard ADC data to obtain a PWM wave comprises: Obtaining a preset expected value, and calculating the difference between the expected value and the standard ADC reading to obtain an error value; According to the error value, the adjustment amount of the preset control signal is calculated by using the proportional, integral and differential formulas to obtain the signal adjustment amount; The signal adjustment amount is limited to ensure that the signal adjustment amount is within a preset control range, and a PWM wave is generated based on the signal adjustment amount.

5. The FPGA-based power supply safety output method according to claim 1, characterized in that: The smoothing operation on the ADC data based on the preset filtering device to obtain smoothed ADC data includes: Based on the type of the filter device, set the corresponding coefficient of the filter device, and determine the cutoff frequency of the filter device to obtain a standard filter device; The high-frequency noise part in the ADC data is removed by the standard filtering device, and the low-frequency signal is retained to obtain smooth ADC data.

6. The FPGA-based power supply safety output method according to claim 1, characterized in that: The arc extinguishing control of the circuit by using the arc extinguishing signal comprises: The arc extinguishing signal is sent to the FPGA of the circuit, and the preset arc extinguishing operation is immediately performed by the FPGA of the circuit. After the arc extinguishing operation, when the arc disappears and the system is stable, the power supply of the circuit is controlled by the FPGA of the circuit to restart the output and restore the normal working state.

7. The FPGA-based power supply safety output method according to any one of claims 1 to 6, characterized in that: Before configuring the parameters of the FPGA based on the preset data acquisition instruction to obtain the configured FPGA, the method further includes: Determine key parameters of the PWM wave according to preset power system requirements, wherein the key parameters include frequency, duty cycle and pulse width; A dedicated timer or counter module is configured in the FPGA to generate a PWM module, and a code is written to control the PWM module.

8. A power supply safety output device based on FPGA, characterized in that: The device comprises: A data acquisition module is used to configure the parameters of the FPGA based on a preset data acquisition instruction to obtain a configured FPGA, and to collect data in a preset circuit through an ADC interface in the configured FPGA to obtain ADC data; A data standardization module, used for performing a smoothing operation on the ADC data based on a preset filtering device to obtain smoothed ADC data, and calibrating and zeroing the smoothed ADC data to obtain standard ADC data; An arc extinguishing judgment module, used to judge whether the circuit meets the arc extinguishing condition based on the standard ADC data and the configured FPGA; if the arc extinguishing condition is met, an arc extinguishing signal is obtained according to the arc extinguishing condition, and the arc extinguishing of the circuit is controlled by the arc extinguishing signal; The output control module is used to perform PID calculation according to the standard ADC data to obtain a PWM wave if the arc extinguishing condition is not met, and perform output control according to the pulse width of the PWM wave.

9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and, a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the FPGA-based power supply safety output method according to any one of claims 1 to 7.

10. A computer-readable storage medium, comprising a data storage area and a program storage area, wherein the data storage area stores created data and the program storage area stores a computer program; wherein: When the computer program is executed by a processor, the FPGA-based power supply safety output method according to any one of claims 1 to 7 is implemented.

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