Fault ride-through control method and device based on impedance estimation and storage medium

Through the fault crossing control method based on impedance estimation, the problem of difficulty in maintaining the grid stability during low voltage crossing is solved. By estimating the grid impedance and adjusting the inverter current, the stability guarantee of the grid during low voltage crossing is achieved.

CN119765368APending Publication Date: 2025-04-04SHANGHAI CHINT POWER SYST CO LTD +1
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Patent Information

Application Number
CN202411812224.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-10
Publication Date
2025-04-04

AI Technical Summary

Technical Problem

During the low voltage traversal, how to maintain the stability of the power grid has become an urgent problem.

Method used

Through the fault crossing control method based on impedance estimation, the grid impedance is estimated, the degree of fall of the grid voltage is determined, the boundary value of the active current is determined based on the degree of fall and grid impedance, and the active and reactive currents of the inverter are adjusted on the premise that the grid stability conditions are met.

Benefits of technology

The stability guarantee of the power grid during low voltage crossing is achieved, and the instability problem of the power grid during low voltage crossing is avoided.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiment of the invention discloses a fault ride-through control method and device based on impedance estimation and a storage medium, and the method comprises the steps: determining the drop degree of a power grid voltage based on the power grid impedance obtained through the estimation of the power grid impedance under the condition of low voltage ride-through, and determining an active current boundary value according to the drop degree and the power grid impedance. And calculating according to the phase difference between the output phase angle of the phase-locked loop and the phase angle of the power grid voltage to obtain a power grid stability condition, and when the active current boundary value meets the power grid stability condition, adjusting the active current of the inverter within the active current boundary value. According to the technical scheme, the drop degree of the power grid is obtained by estimating the impedance of the power grid, so that the active current boundary value during low-voltage ride-through is obtained, and the active current is not too large in the process of adjusting the active current; and the stability of the power grid in the low-voltage ride-through process is ensured by increasing the reactive current on the premise of meeting the stable condition of the power grid under the condition that the low-voltage ride-through occurs.
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Description

Technical Field

[0001] The present invention relates to the technical field of power system control, and in particular to a fault ride-through control method, device and storage medium based on impedance estimation. Background Art

[0002] As the scale of power electronic equipment continues to expand, traditional distribution networks are gradually developing towards an advanced form with high penetration of power electronic equipment, high access rate of renewable energy, and AC / DC hybrid.

[0003] Fault ride-through means that when the voltage on the AC outlet side of the inverter exceeds the normal operating range due to power system accidents or disturbances, the inverter can ensure continuous operation without disconnection within the specified range of change and time interval until the fault is resolved and the system returns to normal and stable operation. Fault ride-through includes low voltage ride-through and high voltage ride-through.

[0004] During the low voltage ride-through process, how to maintain the stability of the power grid becomes an urgent problem to be solved. Summary of the invention

[0005] The present invention provides a fault ride-through control method, device and storage medium based on impedance estimation to ensure the stability of a power grid during a low voltage ride-through process.

[0006] According to one aspect of the present invention, there is provided a fault ride-through control method for impedance estimation, comprising:

[0007] Compensating the voltage amplitude of the common point voltage connecting the inverter and the grid to the voltage amplitude of the grid voltage, and estimating the grid impedance;

[0008] The grid stability condition is calculated based on the phase difference between the phase angle of the phase-locked loop output and the phase angle of the grid voltage;

[0009] When low voltage ride-through is determined to have occurred, the extent of grid voltage drop is determined based on grid impedance;

[0010] Determine the active current boundary value according to the drop degree and the grid impedance;

[0011] Under the premise of meeting the grid stability conditions, the reactive current of the inverter is increased, and the active current of the inverter is adjusted within the active current boundary value.

[0012] Optionally, estimating the grid impedance includes:

[0013] The grid impedance is estimated based on the common point voltage, grid voltage, inverter output current, system power factor angle, and load impedance angle.

[0014] Optionally, when it is determined that low voltage ride-through occurs, determining the extent of grid voltage drop based on grid impedance includes:

[0015] When low voltage ride-through occurs, estimate the grid voltage drop based on the common point voltage, grid voltage, inverter output current, load impedance angle, system power factor angle changed after low voltage ride-through, and grid impedance;

[0016] Determining the active current boundary value according to the sag degree and the grid impedance includes: determining the active current boundary value according to the sag degree, the grid voltage and the grid impedance.

[0017] Optionally, the grid stability condition includes an active current range;

[0018] The grid stability condition is obtained by calculating the phase difference between the phase angle of the phase-locked loop output and the phase angle of the grid voltage, including: determining the active current range by using a phase difference calculation formula between the phase angle of the phase-locked loop output and the phase angle of the potential voltage determined according to the control parameters of the phase-locked loop, the common point voltage, the output current of the inverter and the grid impedance;

[0019] Under the premise of meeting the grid stability conditions, increase the reactive current of the inverter and adjust the active current of the inverter within the active current boundary value, including:

[0020] Under the premise of meeting the grid stability conditions, increase the reactive current of the inverter;

[0021] When the active current boundary value is within the active current range, the active current of the inverter is adjusted with the active current boundary value as the initial active current;

[0022] Determine whether the frequency of the common point voltage exceeds a preset range;

[0023] If so, reduce the active current until the frequency of the common point voltage is within a preset range;

[0024] If not, determine again whether low voltage ride-through occurs;

[0025] If so, return to the step of determining the extent of grid voltage drop based on grid impedance when low voltage ride-through is determined to have occurred.

[0026] Optionally, after determining the active current range according to the phase difference calculation formula between the phase angle of the phase-locked loop output and the phase angle of the potential voltage determined according to the control parameters of the phase-locked loop, the common point voltage, the output current of the inverter and the grid impedance, the method further includes:

[0027] When the active current boundary value exceeds the active current range, the active current of the inverter is adjusted within the active current range.

[0028] Optionally, the grid stability condition also includes a reactive current range; the grid stability condition is obtained by calculating the phase difference between the phase angle of the phase-locked loop output and the phase angle of the grid voltage, and further includes:

[0029] The reactive current range is determined based on a phase difference calculation formula between the phase angle of the phase-locked loop output and the phase angle of the potential voltage determined based on the control parameters of the phase-locked loop, the common point voltage, the output current of the inverter and the grid impedance;

[0030] Under the premise of meeting the grid stability conditions, increase the reactive current of the inverter, including:

[0031] Calculate the reactive current of the inverter according to the following formula within the reactive current range:

[0032] Iq = 1.5 * IN * (VPCCVN - 0.9);

[0033] I q Represents reactive current, I N It represents the nominal output current of the inverter, VPCC represents the common point voltage, and VN represents the nominal grid voltage.

[0034] Optionally, the fault ride-through control method based on impedance estimation further includes: determining whether high voltage ride-through occurs according to the common point voltage;

[0035] In the event of high voltage ride-through, reduce the inverter's reactive current and maintain the inverter's active current unchanged;

[0036] Again, determine whether high voltage ride-through occurs based on the common point voltage;

[0037] If yes, return to the step of reducing the reactive current of the inverter and maintaining the active current of the inverter unchanged when high voltage ride-through occurs;

[0038] If yes, determine whether low voltage ride-through occurs based on the common point voltage;

[0039] In the case where low voltage ride through occurs, a step of determining a drop degree of grid voltage based on grid impedance is performed when it is determined that low voltage ride through occurs.

[0040] Optionally, in the event of high voltage ride-through, the reactive current of the inverter is reduced and the active current of the inverter is maintained unchanged, including:

[0041] In the event of high voltage ride-through, calculate the inverter reactive current according to the following formula:

[0042] Iq = 1.5 * IN * (VPCCVN - 1.1);

[0043] I qRepresents reactive current, I N It represents the nominal output current of the inverter, VPCC represents the common point voltage, and VN represents the nominal grid voltage.

[0044] According to another aspect of the present invention, there is provided a fault ride-through control device based on impedance estimation, comprising:

[0045] An estimation module, used to compensate the voltage amplitude of the common point voltage connecting the inverter and the grid to the voltage amplitude of the grid voltage, and estimate the grid impedance;

[0046] A calculation module, used for calculating the grid stability condition according to the phase difference between the phase angle of the phase-locked loop output and the phase angle of the grid voltage;

[0047] A first determination module is used to determine the drop degree of the grid voltage based on the grid impedance when it is determined that low voltage ride-through occurs;

[0048] A second determination module is used to determine the active current boundary value according to the drop degree and the grid impedance;

[0049] The adjustment module is used to increase the reactive current of the inverter and adjust the active current of the inverter within the active current boundary value under the premise of meeting the grid stability condition.

[0050] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the fault-crossing control method based on impedance estimation according to any embodiment of the present invention when executed.

[0051] The impedance estimation-based fault ride-through control method, device and storage medium of the embodiment of the present invention determine the degree of grid voltage drop based on the grid impedance obtained by estimating the grid impedance in the case of low voltage ride-through, and determine the active current boundary value according to the degree of drop and the grid impedance. The grid stability condition is calculated according to the phase difference between the phase angle of the phase-locked loop output and the phase angle of the grid voltage, and the active current of the inverter is adjusted within the active current boundary value when the active current boundary value meets the grid stability condition. The technical solution of the present invention obtains the degree of grid drop by estimating the grid impedance, and thereby obtains the active current boundary value during low voltage ride-through, so that the active current will not be too large during the adjustment of the active current; and in the case of low voltage ride-through, the reactive current is increased on the premise of meeting the grid stability condition, so as to ensure the stability of the grid during the low voltage ride-through process.

[0052] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0054] Figure 1 is a flow chart of a fault ride-through control method based on impedance estimation provided by an embodiment of the present invention;

[0055] Figure 2 is a flow chart of another fault ride-through control method based on impedance estimation provided by an embodiment of the present invention;

[0056] Figure 3 It is the vector diagram of connecting weak power grid under normal power grid condition;

[0057] Figure 4 System equivalent circuit diagram of the interaction between the inverter and the grid;

[0058] Figure 5 This is the system large signal stability schematic;

[0059] Figure 6 This is the grid voltage drop estimation diagram;

[0060] Figure 7 is a flow chart of another fault ride-through control method based on impedance estimation provided by an embodiment of the present invention;

[0061] Figure 8 It is a structural schematic diagram of a fault ride-through control device based on impedance estimation provided by an embodiment of the present invention;

[0062] Fig. 9 It is a structural schematic diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0063] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0064] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0065] The embodiment of the present invention provides a fault ride-through control method based on impedance estimation, which can be used to control an inverter during a fault ride-through process to ensure grid stability. The fault ride-through control method can be executed by a fault ride-through control device, wherein the fault ride-through device can be implemented by software and / or hardware. Figure 1 is a flowchart of a fault ride-through control method based on impedance estimation provided by an embodiment of the present invention, with reference to Figure 1 , the fault ride-through control method comprises:

[0066] S110 , compensating a voltage amplitude of a common point voltage connecting the inverter to the grid to a voltage amplitude of a grid voltage, and estimating grid impedance.

[0067] Specifically, in this step, the voltage amplitude of the common point voltage can be compensated to the grid voltage amplitude through steady-state reactive current compensation.

[0068] S120. Calculate the grid stability condition according to the phase difference between the phase angle of the phase-locked loop output and the phase angle of the grid voltage.

[0069] Specifically, in this step, the grid stability condition in the case of low voltage ride-through can be determined according to the calculation formula of the phase difference between the phase angle of the phase-locked loop output and the phase angle of the grid voltage, wherein the full grid stability condition includes the active current range and reactive current range that meet the grid stability. The input of the phase-locked loop can be the common point voltage, and the phase angle of the phase-locked loop output is the calculated common point voltage phase angle.

[0070] S130: When it is determined that low voltage ride-through occurs, determine a grid voltage drop degree based on grid impedance.

[0071] Specifically, in this step, it can be determined whether low voltage ride-through occurs based on the common point voltage and the set first voltage threshold. When the common point voltage is lower than the first voltage threshold, it is determined that low voltage ride-through occurs; when the common point voltage is not lower than the first voltage threshold, it is determined that low voltage ride-through does not occur. Among them, the first voltage threshold can be a voltage per unit value, and the first voltage threshold can be set according to actual needs. Exemplarily, the grid voltage is 1 p.u. nominal value, and the first threshold voltage can be 0.9 pu.

[0072] Optionally, in the event of low voltage crossing, the virtual impedance is switched in to avoid line overcurrent. In addition, in the event of low voltage crossing, the grid impedance obtained based on the estimation of the grid impedance can determine the degree of grid voltage drop. Among them, the estimation of the grid impedance can be calculated based on the system operating conditions in the steady state. The estimation process of the grid impedance may include determining the grid impedance based on the system parameters of the system formed by the inverter and the grid. The system parameters include but are not limited to the grid voltage, the common point voltage, the system power factor angle, and the load impedance angle. After estimating the grid impedance, the degree of grid voltage drop can be determined based on the relationship between the grid impedance and the degree of grid voltage drop.

[0073] S140: Determine an active current boundary value according to the drop degree and the grid impedance.

[0074] After estimating the grid impedance, the degree of grid voltage drop can be determined based on the relationship between the grid impedance and the grid voltage drop. Under different grid voltage drop levels, the adjustment boundary of the active current output by the inverter is different. In this step, the active current boundary value can be determined based on the corresponding relationship between the grid voltage drop level and the active current boundary value. Among them, the active current boundary value includes the maximum value of the active current. In the subsequent adjustment process of the active current output by the inverter, the active current is adjusted within the range of the active current boundary value.

[0075] S150. On the premise of satisfying grid stability conditions, increase the reactive current of the inverter and adjust the active current of the inverter within the active current boundary value.

[0076] In this step, the reactive current of the inverter is increased under the premise of satisfying the grid stability condition. And under the condition that the active current boundary value is within the active current range that satisfies the grid stability condition, the active current of the inverter can be adjusted within the active current boundary value, thereby ensuring the stability of the grid during the low voltage ride through process. In the case that the active current boundary value does not meet the grid stability condition, the active current of the inverter can be adjusted within the active current range that satisfies the grid stability condition as the boundary, further ensuring the stability of the grid during the low voltage ride through process.

[0077] The fault ride-through control method based on impedance estimation of this embodiment, in the case of low voltage ride-through, cuts into virtual impedance and determines the degree of grid voltage drop based on the grid impedance obtained by estimating the grid impedance, and determines the active current boundary value according to the degree of drop and the grid impedance. The grid stability condition is calculated according to the phase difference between the phase angle of the phase-locked loop output and the phase angle of the grid voltage, and the active current of the inverter is adjusted within the active current boundary value when the active current boundary value meets the grid stability condition. The technical solution of this embodiment obtains the degree of grid drop by estimating the grid impedance, and thereby obtains the active current boundary value during low voltage ride-through, so that the active current will not be too large during the adjustment of the active current; and in the case of low voltage ride-through, the reactive current is increased on the premise of meeting the grid stability condition, so as to ensure the stability of the grid during the low voltage ride-through process.

[0078] Figure 2 is a flowchart of another fault ride-through control method based on impedance estimation provided by an embodiment of the present invention, with reference to Figure 2 Optionally, the fault ride-through control method based on impedance estimation includes:

[0079] S210, compensating the voltage amplitude of the common point voltage connecting the inverter to the grid to the voltage amplitude of the grid voltage, and estimating the grid impedance according to the common point voltage, the grid voltage, the output current of the inverter, the system power factor angle, and the load impedance angle.

[0080] Figure 3 It is the vector diagram of the weak grid connected under normal grid conditions, where I d Represents active current, I q Represents reactive current, according to Figure 3 The vector diagram shown can be obtained and the grid impedance can be estimated as follows:

[0081]

[0082] Where γ is the load impedance angle, α is the system power factor angle, V pcc is the voltage at the common connection point, V g is the grid voltage, and I is the inverter output current.

[0083] In this embodiment, the estimation and analysis of the grid impedance are all based on the assumption that the load impedance angle is known. When the actual load impedance angle is unknown, the load impedance angle can be calculated by the harmonic injection method. The grid impedance is resistive and inductive, and the estimation result of the inductive component of the grid impedance is more accurate, while the estimation result of the resistive component has a large error. When the resistance and inductance are relatively small, the resistive component can be ignored, and the estimation result of the inductive component has reference significance.

[0084] Optionally, the grid stability condition includes an active current range.

[0085] S220, determining the active current range according to a phase difference calculation formula between the phase angle of the phase-locked loop output and the phase angle of the potential voltage determined by the control parameters of the phase-locked loop, the common point voltage, the output current of the inverter and the grid impedance.

[0086] Among them, the phase difference calculation formula between the phase-locked loop output and the potential voltage is as follows:

[0087]

[0088] Where δ is the phase difference between the phase angle of the phase-locked loop output voltage and the phase angle of the grid voltage (that is, the phase difference between the calculated common point voltage and the grid voltage), θ PLL is the phase-locked loop output phase angle, θ g is the grid voltage phase angle, k p_PLL k is the proportional coefficient of the phase-locked loop PI controller, i_PLL is the integral coefficient of the phase-locked loop PI controller, I g is the inverter output current, Z g is the grid line impedance, γ is the grid line impedance angle (also known as the load impedance angle), θ pcc is the actual phase angle of the voltage at the common connection point, V g is the grid voltage.

[0089] Figure 4 System equivalent circuit diagram of the interaction between the inverter and the grid, Figure 5 This is the system large signal stability schematic diagram. Figure 4 and Figure 5 , in this system, the inverter is connected to the grid, where Figure 4 The inverter output current is shown in Common point voltage V pcc ∠θ pcc , grid impedance Z g ∠γ and grid voltage V g ∠θ g .

[0090] like Figure 5 The large signal stability principle diagram of the system shown in the figure shows that the phase difference δ depends on When the value is greater than 0, the phase-locked loop PI controller increases δ, otherwise it decreases. δ will stabilize at With V g The intersection point of sinδ is the equilibrium working point. Always greater than V g sinδ(such as Figure 5When the medium voltage drops to 0.2pu), the phase-locked loop frequency will continue to increase, and the phase-locked loop cannot synchronize with the grid phase. At this time, the system will experience large signal instability. It is worth noting that even if the system has a balance point when the voltage drops to a certain depth, the system still has the risk of instability (such as Figure 5 The voltage drops to 0.5 pu. Due to the dynamics of the PI controller, the integral link causes δ to continue to increase after reaching the equilibrium operating point (a to b).

[0091] There are two possibilities at this point:

[0092] If δ reaches the corresponding δ at point c c Before it started to decrease, at this time due to The system can return to equilibrium.

[0093] If δ is greater than the δ corresponding to point c c , at this time due to δ continues to increase and the system becomes unstable.

[0094] Therefore, if the grid stability needs to be guaranteed, From this we can get

[0095]

[0096] middle, Approximately equal to δ.

[0097] Based on this, it can be determined that the active current range that satisfies the grid stability is:

[0098]

[0099] Optionally, the grid stability condition also includes a reactive current range.

[0100] S230, determining the reactive current range based on a phase difference calculation formula between the phase angle of the phase-locked loop output and the phase angle of the potential voltage determined based on the control parameters of the phase-locked loop, the common point voltage, the output current of the inverter and the grid impedance.

[0101] As described in the above embodiment, if the grid stability needs to be guaranteed, it is necessary to ensure Based on this, the reactive current range that satisfies the grid stability can be obtained as:

[0102]

[0103] S240: Determine whether low voltage ride through occurs according to the common point voltage.

[0104] Specifically, before this step, the voltage at the common point where the inverter is connected to the grid can be obtained, and then it is determined whether low voltage ride-through occurs based on the voltage at the common point.

[0105] S250. When it is determined that low voltage ride-through occurs, the extent of grid voltage drop is estimated based on the common point voltage, grid voltage, inverter output current, load impedance angle, system power factor angle changed after low voltage ride-through, and grid impedance.

[0106] Figure 6 For grid voltage drop estimation diagram, refer to Figure 6 , the grid voltage drop is calculated based on the geometric relationship in the vector diagram, and the grid voltage drop can be estimated according to the following formula:

[0107]

[0108] α 1 is the system power factor angle after low voltage ride-through, V pcc is the real-time sampling value of the common point voltage, I is calculated in real time from the inverter output active current value and the inverter output reactive current value, and Z g is the grid impedance, which is calculated from the steady-state system condition. The load impedance angle γ is a fixed value. V g is the grid voltage.

[0109] S260: Determine an active current boundary value according to the drop degree, the grid voltage, and the grid impedance.

[0110] Among them, the active current boundary value I dref It can be calculated as follows:

[0111]

[0112] The active current boundary value can be used as the maximum value for adjusting the active current.

[0113] S270: In case of low voltage ride-through, increase the reactive current of the inverter.

[0114] Optionally, S270 includes: when low voltage ride-through occurs, calculating the reactive current of the inverter according to the following calculation formula within the reactive current range:

[0115] Iq = 1.5 * IN * (VPCCVN - 0.9);

[0116] I q Represents the reactive current, I N represents the nominal output current of the inverter, VPCC represents the common point voltage, and VN represents the nominal grid voltage.

[0117] Specifically, when the reactive current calculated according to the reactive current calculation formula of the above inverter is within the reactive current range that satisfies the grid stability condition, the reactive current of the inverter is adjusted to the reactive current calculated according to the reactive current calculation formula of the above inverter. When the reactive current calculated according to the reactive current calculation formula of the above inverter does not satisfy the reactive current range that satisfies the grid stability condition, the reactive current of the inverter can be adjusted within the reactive current range directly according to the reactive current range that satisfies the grid stability condition.

[0118] S280: When the active current boundary value is within the active current range, the active current of the inverter is adjusted using the active current boundary value as the initial active current.

[0119] Specifically, according to the active current boundary value I dref and The magnitude relationship determines whether the active current boundary value is within the active current range. dref Less than In the case of active current boundary value I, it is determined that the active current boundary value is within the active current range; dref Greater than or equal to In the case where the active current boundary value exceeds the active current range, it is determined that the active current boundary value exceeds the active current range. In the case where the active current boundary value is within the active current range, the active current output by the inverter is adjusted to the active current boundary value, that is, the active current boundary value is used as the initial active current for adjusting the inverter output, and when the active current is subsequently adjusted, it is gradually reduced on the basis of the initial active current.

[0120] S290: Determine whether the frequency of the common point voltage exceeds a preset range.

[0121] Among them, the preset range can be set according to the national standard.

[0122] If so, execute S300 to reduce the active current until the frequency of the common point voltage is within a preset range.

[0123] If not, execute S310 to determine again whether low voltage ride-through occurs;

[0124] If yes, return to S250. If no, execute S320 to determine whether high voltage ride-through occurs. If high voltage ride-through does not occur, the active current and reactive current return to the values ​​before low voltage ride-through, and the fault ride-through ends. If high voltage ride-through occurs, execute the following S350.

[0125] S330: When the active current boundary value exceeds the active current range, adjust the active current of the inverter within the active current range.

[0126] Specifically, when the active current boundary value exceeds the active current range that satisfies the grid stability condition, if the active current of the inverter is adjusted to the active current boundary value, the stability of the grid during the low voltage ride-through process cannot be guaranteed. In this step, when the active current boundary value exceeds the active current range, the active current boundary value is no longer used as the boundary for active current adjustment, and the active current of the inverter is adjusted within the active current range, which is conducive to ensuring the stability during the low voltage ride-through process.

[0127] S340: Determine whether high voltage ride through occurs according to the common point voltage.

[0128] Specifically, in this step, it can be determined whether high voltage crossing occurs based on the common point voltage and the set second voltage threshold. When the common point voltage is higher than the second voltage threshold, it is determined that high voltage crossing occurs; when the common point voltage is not higher than the second voltage threshold, it is determined that high voltage crossing does not occur. Among them, the second voltage threshold can be a voltage per unit value, and the second voltage threshold can be set according to actual needs. Exemplarily, the grid voltage is 1p.u. nominal value, and the second threshold voltage can be 1.1pu. Among them, S340 can be executed simultaneously with S240, or before S240 or after S240. Among them, after determining that high voltage crossing occurs, S350 is executed.

[0129] S350: Reduce the reactive current of the inverter and maintain the active current of the inverter unchanged.

[0130] By reducing the reactive current of the inverter when high voltage ride-through occurs, the grid voltage can be lowered so that the grid voltage can be restored to a normal range relatively quickly.

[0131] Optionally, S350 includes: when high voltage ride-through occurs, calculating the reactive current of the inverter according to the following calculation formula:

[0132] Iq = 1.5 * IN * (VPCCVN - 1.1);

[0133] I q Represents reactive current, I N It represents the nominal output current of the inverter, VPCC represents the common point voltage, and VN represents the nominal grid voltage.

[0134] S360, determining again based on the common point voltage whether high voltage ride through occurs;

[0135] If yes, return to S350 to reduce the reactive current of the inverter and maintain the active current of the inverter unchanged;

[0136] If yes, execute S370 to determine whether low voltage ride-through occurs according to the common point voltage;

[0137] In the event of low voltage ride-through, return to execute S250, and in the event of low voltage ride-through, estimate the degree of grid voltage drop based on the common point voltage, grid voltage, inverter output current, load impedance angle, system power factor angle changed after low voltage ride-through, and grid impedance.

[0138] When low voltage ride-through does not occur, the active current and reactive current return to the values ​​before the fault ride-through, and the fault ride-through ends.

[0139] The fault ride-through control method based on impedance estimation of this embodiment estimates the grid impedance based on the common point voltage of the inverter and the grid connection and the output current of the inverter, based on the system vector diagram, according to the common point voltage, grid voltage, inverter output current, system power factor angle and load impedance angle. The grid drop degree is obtained by estimating the grid impedance, and the active current boundary value during low voltage ride-through is obtained, and then the active and reactive currents are adjusted in real time to achieve stability during high and low voltage ride-through.

[0140] Figure 7 is a flowchart of another fault ride-through control method based on impedance estimation provided by an embodiment of the present invention, with reference to Figure 7 , the fault ride-through control method based on impedance estimation includes:

[0141] Collect the common point voltage V PCC , record non-fault active current and reactive current;

[0142] Judge 0.9pu <V PCC <1.1pu;

[0143] If yes, continue to return to execute judgment 0.9pu <V PCC <1.1pu;

[0144] If V PCC <0.9pu, enter low voltage ride-through process LVRT;

[0145] If V PCC >1.1pu, enters high voltage ride-through process HVRT;

[0146] The low voltage ride-through process LVRT includes:

[0147] Cut into virtual impedance;

[0148] Estimate the drop degree of the grid voltage and determine the active current boundary value according to the drop degree;

[0149] If the active current boundary value meets the grid stability condition, according to Id = kV g / Z g Adjust the active current and follow I q =1.5*I N *(V PCC / V N -0.9) Adjust reactive current;

[0150] Determine whether the common point voltage frequency exceeds a preset range;

[0151] If so, reduce the active current;

[0152] If not, continue to judge V PCC >0.9pu;

[0153] If so, determine V PCC >1.1pu; if not, return to virtual impedance;

[0154] In meeting V PCC When >1.1pu, it enters the high voltage ride-through process HVRT;

[0155] If V is not satisfied PCC When >1.1pu, the active current and reactive current return to their pre-fault values, and the high voltage ride-through and low voltage ride-through processes are completed.

[0156] The high voltage ride-through process HVRT includes:

[0157] According to I q =1.5*I N *(V PCC / V N -1.1) Adjust the reactive current and maintain the active current at the value before the fault;

[0158] Judge V PCC <1.1pu;

[0159] If so, determine V PCC <0.9pu; if not, return to execute according to I q =1.5*I N *(V PCC / V N -1.1) Adjust the reactive current and maintain the active current at the value before the fault;

[0160] In meeting V PCC When <0.9pu, it enters the low voltage ride-through process LVRT;

[0161] If V is not satisfied PCCWhen the active current is less than 0.9pu, the active current and reactive current return to their pre-fault values, and the high voltage ride-through and low voltage ride-through processes are completed.

[0162] It should be noted that the voltage 1.1pu for determining whether a high voltage ride through occurs and the voltage 0.9pu for determining whether a low voltage ride through occurs can be adjusted according to actual needs.

[0163] The embodiment of the present invention further provides a fault ride-through control device based on impedance estimation. Figure 8 is a schematic diagram of a fault ride-through control device based on impedance estimation provided by an embodiment of the present invention, with reference to Figure 8 , the fault ride-through control device based on impedance estimation comprises:

[0164] An estimation module 510, configured to compensate the voltage amplitude of the common point voltage connecting the inverter and the grid to the voltage amplitude of the grid voltage, and estimate the grid impedance;

[0165] A calculation module 520, configured to calculate a grid stability condition according to a phase difference between a phase angle output by a phase-locked loop and a phase angle of a grid voltage;

[0166] A first determination module 530 is used to determine the degree of grid voltage drop based on grid impedance when it is determined that low voltage ride-through occurs;

[0167] A second determination module 540, configured to determine an active current boundary value according to a drop degree and a grid impedance;

[0168] The adjustment module 550 is used to increase the reactive current of the inverter and adjust the active current of the inverter within the active current boundary value under the premise of satisfying the grid stability condition.

[0169] The fault ride-through control device based on impedance estimation of an embodiment of the present invention is used to execute the fault ride-through control method of any of the above embodiments of the present invention, and has the beneficial effects of the fault ride-through control method of any of the above embodiments of the present invention, which will not be repeated here.

[0170] Fig. 9 is a structural schematic diagram of an electronic device provided by an embodiment of the present invention, Fig. 9A schematic diagram of the structure of an electronic device 10 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0171] like Fig. 9 As shown, the electronic device 10 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 to the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0172] A number of components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0173] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, digital signal processors (DSPs), and any appropriate processors, controllers, microcontrollers, etc. The processor 11 executes the various methods and processes described above, such as a fault ride-through control method based on impedance estimation, including: obtaining the common point voltage of the inverter connected to the grid, and judging whether low voltage ride-through occurs according to the common point voltage; in the event of low voltage ride-through, switching on the virtual impedance and determining the degree of grid voltage drop based on the grid impedance obtained by estimating the grid impedance, so as to determine the active current boundary value according to the degree of drop; determining the active current boundary value according to the phase difference between the phase angle of the common point voltage and the phase angle of the grid voltage, and adjusting the active current of the inverter within the active current boundary value under the condition that the grid is stable.

[0174] In some embodiments, the fault-travel control method based on impedance estimation may be implemented as a computer program (i.e., computer instructions) that is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the fault-travel control method based on impedance estimation described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the fault-travel control method based on impedance estimation in any other appropriate manner (e.g., by means of firmware).

[0175] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0176] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0177] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0178] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0179] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0180] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0181] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0182] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A fault ride-through control method based on impedance estimation, characterized in that: include: Compensating the voltage amplitude of the common point voltage connecting the inverter and the grid to the voltage amplitude of the grid voltage, and estimating the grid impedance; The grid stability condition is calculated based on the phase difference between the phase angle of the phase-locked loop output and the phase angle of the grid voltage; In the case of judging that low voltage ride through occurs, determining a drop degree of the grid voltage based on the grid impedance; Determining an active current boundary value according to the drop degree and the grid impedance; On the premise that the grid stability condition is met, the reactive current of the inverter is increased, and the active current of the inverter is adjusted within the active current boundary value.

2. The method according to claim 1, characterized in that The estimating grid impedance comprises: The grid impedance is estimated according to the common point voltage, the grid voltage, the output current of the inverter, a system power factor angle, and a load impedance angle.

3. The method according to claim 2, characterized in that The method of determining the extent of grid voltage drop based on grid impedance when judging that low voltage ride through occurs includes: In the case of judging that low voltage ride-through occurs, estimating the degree of drop of the grid voltage according to the common point voltage, the grid voltage, the output current of the inverter, the load impedance angle, the system power factor angle changed after the low voltage ride-through, and the grid impedance; Determining the active current boundary value according to the drop degree and the grid impedance includes: determining the active current boundary value according to the drop degree, the grid voltage and the grid impedance.

4. The method according to claim 1, characterized in that: The grid stability condition includes an active current range; The grid stability condition is obtained by calculating the phase difference between the phase angle of the phase-locked loop output and the phase angle of the grid voltage, comprising: determining the active current range according to a phase difference calculation formula between the phase angle of the phase-locked loop output and the phase angle of the potential voltage determined according to the control parameters of the phase-locked loop, the common point voltage, the output current of the inverter and the grid impedance; The increasing the reactive current of the inverter and adjusting the active current of the inverter within the active current boundary value under the premise of satisfying the grid stability condition comprises: Under the premise of satisfying the grid stability condition, increasing the reactive current of the inverter; When the active current boundary value is within the active current range, adjusting the active current of the inverter with the active current boundary value as the initial active current; Determining whether the frequency of the common point voltage exceeds a preset range; If so, reducing the active current until the frequency of the common point voltage is within the preset range; If not, determining again whether the low voltage ride-through occurs; If so, return to the step of determining the extent of the grid voltage drop based on the grid impedance when it is determined that low voltage ride-through occurs.

5. The method according to claim 4, characterized in that After determining the active current range according to the phase difference calculation formula between the phase angle of the phase-locked loop output and the phase angle of the potential voltage determined according to the control parameters of the phase-locked loop, the common point voltage, the output current of the inverter and the grid impedance, the further comprising: When the active current boundary value exceeds the active current range, the active current of the inverter is adjusted within the active current range.

6. The method according to claim 4, characterized in that The grid stability condition also includes a reactive current range; the grid stability condition is obtained by calculating the phase difference between the phase angle of the phase-locked loop output and the phase angle of the grid voltage, and further includes: Determine the reactive current range based on a phase difference calculation formula between a phase angle of a phase-locked loop output and a phase angle of a potential voltage determined by a control parameter of a phase-locked loop, the common point voltage, the output current of the inverter, and the grid impedance; Under the premise of satisfying the grid stability condition, increasing the reactive current of the inverter includes: The reactive current of the inverter is calculated according to the following calculation formula within the reactive current range: Iq = 1.5 * IN * (VPCCVN - 0.9); I q Represents the reactive current, I N represents the nominal output current of the inverter, VPCC represents the common point voltage, and VN represents the nominal grid voltage.

7. The method according to claim 1, characterized in that Also includes: determining whether high voltage ride through occurs according to the common point voltage; In the event of high voltage ride-through, reducing the reactive current of the inverter and maintaining the active current of the inverter unchanged; determining again whether the high voltage ride through occurs according to the common point voltage; If yes, return to the step of reducing the reactive current of the inverter and maintaining the active current of the inverter unchanged when high voltage ride-through occurs; If so, determining whether low voltage ride through occurs according to the common point voltage; In the case where low voltage ride through occurs, the step of determining the extent of the grid voltage drop based on the grid impedance when judging that the low voltage ride through occurs is performed.

8. The method according to claim 7, characterized in that In the case of high voltage ride through, reducing the reactive current of the inverter and maintaining the active current of the inverter unchanged includes: In the event of high voltage ride through, the reactive current of the inverter is calculated according to the following formula: Iq = 1.5 * IN * (VPCCVN - 1.1); I q Represents the reactive current, I N represents the nominal output current of the inverter, VPCC represents the common point voltage, and VN represents the nominal grid voltage.

9. A fault ride-through control device based on impedance estimation, characterized in that: include: An estimation module, used to compensate the voltage amplitude of the common point voltage connecting the inverter and the grid to the voltage amplitude of the grid voltage, and estimate the grid impedance; A calculation module, used for calculating the grid stability condition according to the phase difference between the phase angle of the phase-locked loop output and the phase angle of the grid voltage; A first determination module is used to determine the drop degree of the grid voltage based on the grid impedance when it is determined that low voltage ride-through occurs; A second determination module, used to determine an active current boundary value according to the drop degree and the grid impedance; The adjustment module is used to increase the reactive current of the inverter and adjust the active current of the inverter within the active current boundary value under the premise of satisfying the grid stability condition.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the fault-crossing control method based on impedance estimation according to any one of claims 1 to 8 when executed.

Citation Information

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