A method for anti-inrush control of an inverter system

Abstract

The application discloses an anti-inrush control method of an inverter system, and comprises the following steps: outputting a current reference value to a current inner loop by comparing a detection value of a direct-current bus voltage with a reference value in a voltage outer loop; performing amplitude limiting processing on the current reference value according to a load imbalance degree of the inverter system; and comparing the current reference value after the amplitude limiting processing with a current component after transformation of three-phase currents to generate a duty cycle signal for controlling the inverter. The application has the beneficial effect that the current reference value can be limited to different degrees according to different load imbalance degrees of the inverter system, and thus the anti-inrush control of the inverter under different load scenarios can be realized.

Description

Technical Field

[0001] This application relates to the field of new energy power generation, and in particular to a method for preventing backflow control in an inverter system. Background Technology

[0002] In photovoltaic (PV) systems, when the power generated by the PV system exceeds the power of the local load, if the load cannot fully consume the electricity generated by the PV system, the excess electricity will flow back to the grid, creating a reverse current. The core principle of anti-reverse current control technology is to adjust the output power of the PV system in a timely manner when reverse current is detected, ensuring that the electricity is only supplied to the local load. Existing anti-reverse current controllers mainly focus on the precise control of the inverter's output power to ensure that electricity does not flow back to the grid.

[0003] Although anti-reverse current controllers play a crucial role in maintaining power balance, their architecture and information transmission mechanisms struggle to meet the demands of anti-reverse current control under complex three-phase load imbalance conditions. Therefore, further research and development of controllers capable of handling three-phase load imbalance under anti-reverse current conditions is of great significance for improving the overall performance and stability of photovoltaic systems. Summary of the Invention

[0004] One objective of this application is to provide an inverter system anti-reverse flow control method that can solve at least one of the defects in the above-mentioned background art.

[0005] To achieve at least one of the above objectives, the technical solution adopted in this application is as follows: an anti-reverse current control method for an inverter system, comprising the following steps: outputting a current reference value to the current inner loop by comparing the detected value and reference value of the DC bus voltage in the outer voltage loop; limiting the current reference value according to the load imbalance of the inverter system; and comparing the current reference value after limiting with the current component after the three-phase current is transformed to generate a duty cycle signal for controlling the inverter.

[0006] Preferably, when performing current reference value limiting processing, the maximum limit value of the current reference value is suitable for selection based on the load imbalance of the inverter system, specifically including the following process: comparing the load imbalance with a set imbalance threshold; if the load imbalance is lower than the set imbalance threshold, selecting the minimum value between the three-phase load current and the inverter rated current as the maximum limit value; otherwise, calculating the virtual value of the three-phase load current based on the set imbalance threshold to obtain the virtual load current; and then selecting the minimum value between the virtual load current and the inverter rated current as the maximum limit value.

[0007] Preferably, the calculation of the virtual load current includes the following process: The maximum value i of the three-phase load current is... l_maxDecrease Δi1, and simultaneously reduce the median value i of the three-phase load current. l_0 Decrease Δi2; according to the following formulas (1) and (2), calculate (i l_max -Δi1), (i l_0 -Δi2) and i l_min As the virtual load current; the specific formula is as follows:

[0008] i avg ′=[(i l_max -Δi1)+(i l_0 -Δi2)+i l_min ] / 3 (1);

[0009] Δn%=[(i l_max -Δi1)-i l_min ] / i avg ′×100% (2);

[0010] Among them, i avg ′ represents the average value of the virtual load current, and Δn% represents the set unbalance threshold.

[0011] Preferably, the reduction in the maximum value of the three-phase load current Δi1 and the reduction in the median value of the three-phase load current Δi2 are selected to meet the following condition: Δi1 / Δi2=i l_max / i l_0 .

[0012] Preferably, the unbalance threshold Δn% is in the range of 10% to 30%.

[0013] Preferably, when performing current reference value limiting processing, the minimum limit value of the current reference value is taken as the minimum current for stable operation of the inverter.

[0014] Preferably, the load imbalance of the inverter system is suitable for being expressed by one of the following: the effective value imbalance of the three-phase load current, the negative sequence imbalance, and the zero sequence imbalance.

[0015] Preferably, the load imbalance of the inverter system is expressed as the effective value imbalance of the three-phase load current. The effective value imbalance is suitable for calculation by the ratio of the difference between the maximum and minimum values ​​of the three-phase load current to the average value of the three-phase load current.

[0016] Preferably, the inverter system's current reference value limiting process includes the following steps: when the current reference value of a certain corresponding phase of the three-phase current exceeds the maximum limiting value I... max * At that time, the corresponding current reference value is limited to the maximum limit value I. max *At this point, the other corresponding current reference values ​​will gradually increase until they reach the maximum limit value I. max * .

[0017] Compared with the prior art, the beneficial effects of this application are as follows:

[0018] Depending on the load imbalance of the inverter system, the current reference value can be limited to different degrees, thereby enabling reverse current control of the inverter under different load scenarios. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of the overall workflow of this application.

[0020] Figure 2 This is a schematic diagram of the control loop architecture of this application.

[0021] Figure 3 This is a schematic diagram illustrating the limit value given by this application when the inverter is in a slightly unbalanced operating state.

[0022] Figure 4 This is a schematic diagram of the inverter anti-reverse flow control architecture of this application.

[0023] Figure 5 This is a schematic diagram illustrating the limit value given by this application when the inverter is in a severely unbalanced operating state.

[0024] Figure 6 This is a schematic diagram of the workflow for adjusting three-phase current based on a given limit value in this application. Detailed Implementation

[0025] The present application will now be further described in conjunction with specific embodiments. It should be noted that, in the description of this specification, the use of terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicates that the specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms should not be construed as necessarily referring to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0026] In the description of this application, it should be noted that the directional terms such as "center", "lateral", "longitudinal", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", and "counterclockwise" indicate the orientation and positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. They should not be construed as limiting the specific protection scope of this application.

[0027] It should be noted that the terms "first," "second," etc., in the specification and claims of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0028] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0029] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0030] The terms “comprising” and “having”, and any variations thereof, in the specification and claims of this application are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to such process, method, product, or device.

[0031] One preferred embodiment of this application, such as Figure 1 and Figure 2As shown, an anti-reverse current control method for an inverter system includes the following steps: in the voltage outer loop, a current reference value is output to the current inner loop by comparing the detected value and the reference value of the DC bus voltage; the current reference value is limited according to the load imbalance of the inverter system; and the current reference value after the limit is applied is compared with the current component after the three-phase current is transformed to generate a duty cycle signal for controlling the inverter.

[0032] It is understandable that, such as Figure 2 As shown, the control loop of the inverter system mainly includes an outer voltage loop, an inner current loop, and an inner voltage loop. The specific working process of the control loop is well known to those skilled in the art, so only a simple description is given here: The outer voltage loop outputs a current reference value to the inner current loop. The inner current loop compares the three-phase current detection values ​​with the current reference value to generate a voltage reference value and outputs it to the inner voltage loop. The inner voltage loop compares the three-phase voltage detection values ​​with the voltage reference value and modulates the comparison result to generate the duty cycle signal d for controlling the inverter.

[0033] It should be understood that the three-phase voltages and currents entering the control loop all need to undergo Park transformation, that is, the three-phase voltages and currents along the abc axis are converted into those along the dq0 axis. The three-phase voltages and currents involved in generating the duty cycle signal are all dq-axis components; that is, in the control loop, both the d-axis and q-axis components can affect the generation of the duty cycle signal d. Therefore, when dealing with load imbalance in the inverter system, the control loop can achieve anti-reverse current by controlling the q-axis component and / or the d-axis component. However, considering that the reference value corresponding to the d-axis component is calculated from the bus voltage, i.e., the d-axis component is a dynamic quantity, while the q-axis component is a constant, in order to improve the dynamic control capability of the inverter system under load imbalance, this embodiment selects the current reference value I corresponding to the d-axis current component generated by comparing the DC bus voltage with the reference value for current limiting processing. d * .

[0034] Specifically, the loop control processes for phases A, B, and C of the inverter system are basically the same. The following will use phase A as an example to briefly describe the loop control process of the inverter system. Figure 2 As shown, in the outer voltage loop, the DC bus voltage V is... dc With the set reference value V dc * The voltage error is compared and then processed by a PI controller to output a reference value I to each corresponding current inner loop. d_a * I d_b * and I d_c* ; Grid voltage v g Phase locking is achieved using a phase-locked loop (PLL).

[0035] The inverter's A-phase output current i a It is decomposed into two orthogonal components i α and i β Next, the Park transformation is performed on the current to obtain the current component i in the dq coordinate system. d and i q Then it is necessary to adjust the current reference value I. d_a * Amplification is performed to obtain the current reference value I. d_a1 * By limiting the current reference value, we can prevent reverse current from occurring when the inverter output current exceeds the load current, and also prevent unbalanced current from causing fluctuations in the inverter bus voltage, thus ensuring that the inverter can maintain a stable operating state.

[0036] Subsequently, the current component i d and i q With current reference value I d_a1 * and I q_a1 * The comparison is performed to obtain the error signal, which is then sent to the PI controller; where the current reference value I... q_a1 * The given value is the grid voltage v of phase A. ga It is then decomposed into v α and v β Then, after the Park transformation, the components v in the dq coordinate system are obtained. gd and v gq Feedforward compensation is then used. Finally, the grid feedforward value is superimposed with the output of the inner current loop, and after another coordinate inverse transformation, the PWM duty cycle signal used to adjust the A-phase bridge arm of the inverter is obtained.

[0037] It is important to note that the selection of the current limiting value varies depending on the inverter's operating state. Specifically, the current reference value can be limited to different degrees based on the varying load imbalance of the inverter system, thereby enabling reverse current control under different load scenarios. For the phase obtained through the phase-locked loop (PLL), the phase difference between two adjacent phases of the inverter is 120°.

[0038] In this embodiment, the load imbalance of the inverter system refers to the degree of balance difference between the three-phase loads of the inverter system, mainly reflected in the current difference between the three-phase load currents. Therefore, the load imbalance of the inverter system can be calculated using the specific values ​​of the three-phase load currents. There are several ways to express the load imbalance of the inverter system based on the three-phase load current, such as using one of the following: effective value imbalance, negative sequence imbalance, or zero sequence imbalance. For ease of understanding, this embodiment preferably uses the effective value imbalance (n%) of the three-phase load current to represent the load imbalance of the inverter system. The specific calculation formula for the effective value imbalance (n%) is as follows:

[0039] n% = (i l_max -i l_min ) / i avg ×100%;

[0040] Among them, i l_max i represents the maximum value of the three-phase load current. l_min i represents the minimum value of the three-phase load current. avg This represents the average value of the three-phase load current. In the above formula and subsequent content, the three-phase load current is taken as the effective value.

[0041] Specifically, the effective values ​​of the three-phase load currents can be set as i la i lb and i lc Assuming the effective value i lc Maximum, effective value i la Minimum. Then the average value of the three-phase load current, i. avg =(i la +i lb +i lc If ) / 3, then the effective value imbalance degree n% = (ii) lc -i la ) / i avg ×100%.

[0042] In this embodiment, as Figure 3 and Figure 5 As shown, the current reference value's limiting range can be set to [I]. min * I max * ]; where I max * For the maximum amplitude limit, I min * This is the minimum amplitude limit. As mentioned above, the minimum amplitude limit is I. min * and maximum amplitude value I max* The specific value will be adaptively selected based on the load imbalance of the inverter system. The load imbalance of the inverter system can be divided into mild and severe imbalance operating states based on the inverter's compensation capability. When the inverter system operates in a mild imbalance state, it can compensate for the imbalance of the three-phase load; however, when the inverter system operates in a severe imbalance state, it cannot fully compensate. The load imbalance that the inverter can compensate for can be set as an imbalance threshold. The minimum limiting value I when the load imbalance of the inverter system is below or above the set imbalance threshold is then determined. min * and maximum amplitude value I max * The specific values ​​will differ. For ease of understanding, the following will describe in detail the process of setting the specific limiting values ​​for inverter systems in slightly unbalanced and severely unbalanced operating states.

[0043] I. For the slightly unbalanced operating state of the inverter system.

[0044] like Figure 3 As shown, when the inverter's rated current I n Greater than three-phase load circuit i l When this occurs, it indicates that the inverter's rated current capacity exceeds the current load demand. To prevent overcurrent operation of the inverter and to prevent reverse current flow, it is necessary to ensure that the inverter does not inject excess current into the grid. In this case, the maximum limiting value I can be adjusted. max * Set to three-phase load current.

[0045] When the rated current I n Less than the three-phase load current i l At that time, the load demand exceeded the inverter's rated current capacity. To protect the inverter from damage, the maximum limiting value I must be increased. max * Set this to the inverter's rated current value. This will allow the inverter to output at its maximum capacity without exceeding its rated current limit, thus ensuring safe operation.

[0046] Based on the above content, the maximum amplitude limit I can be determined. max * The process of determining the value can be summarized as follows: compare the load unbalance with the set unbalance threshold; if the load unbalance is lower than the set unbalance threshold, select the three-phase load current i. l and inverter rated current I n The minimum value in is used as the maximum amplitude limit I. max *The value of . And for the minimum amplitude limit I min * The value of i should be set to the minimum current i required for stable operation of the inverter. min .

[0047] For ease of understanding, the following will use the A-phase load current i of the inverter as an example. la For example, Figure 3 As shown. The minimum amplitude limit I corresponding to A. a _ min * The minimum current i of phase A for stable operation of the inverter can be obtained. a_min The corresponding maximum amplitude limit I for A a _ max * The rated current I of the inverter can be taken. n and the load current i of phase A la The minimum value in.

[0048] Understandably, the limiting value setting process for an inverter system operating under slightly unbalanced conditions is the same as that for an inverter system operating in a balanced state. In fact, when the inverter is operating in a balanced state, since its output power is already set to not exceed the load power demand, the current reference value in the inner current loop will not exceed the maximum limit. In this case, the current reference value limiting process is not actually effective, and the control loop can be simplified to a control loop that is no different from the conventional one.

[0049] II. For the severely unbalanced operating state of the inverter system.

[0050] It is important to note that when the inverter system is operating under severe imbalance, the inverter's own compensation capability is insufficient to meet the system's balancing requirements. In this case, an enhancement module that increases the DC bus capacitance will be connected to the inverter system to improve its ability to handle unbalanced current. There are various specific connection architectures for the enhancement module; a detailed explanation will be provided below using a specific example.

[0051] Specifically, such as Figure 4As shown, the inverter system includes multiple inverters connected in parallel to the grid, multiple load imbalance enhancement modules, an anti-reverse current controller, and three-phase meters. The inverters can be labeled DC / AC#1, DC / AC#2, ..., DC / AC#N. Each inverter has a bus capacitor connected in parallel to the positive and negative busbars on its DC side, and the AC sides of all inverters are connected in parallel to the grid. Three-phase meters are installed between the AC side of the inverters and the grid to detect the AC power of the inverters. The anti-reverse current controller is connected to each inverter and the three-phase meters to determine whether the inverter system is in a reverse current state when the load is unbalanced, based on the detection information from the three-phase meters. If reverse current occurs, the anti-reverse current controller sends an anti-reverse current command to each inverter to control it to enter anti-reverse current mode. Multiple load imbalance enhancement modules are connected in parallel to the bus capacitor on the DC side of each inverter. When the inverter system is under load imbalance, each load imbalance enhancement module will be turned on and connected in parallel with the bus capacitor to increase the equivalent capacitance on the DC side of the inverter system and improve the load balancing capability of the inverter system.

[0052] It is understandable that the load imbalance enhancement module is essentially a capacitor module, and it can control its connection or disconnection based on the degree of load imbalance in the inverter system. The specific implementation method of the inverter system's anti-reverse current mode is well known to those skilled in the art, and therefore will not be described in detail here.

[0053] It is important to note that before the inverter system is connected to the aforementioned load imbalance enhancement module for capacitor compensation, in order to ensure the inverter can continue to operate stably and to avoid or reduce the current surge when the load imbalance enhancement module is connected, the current limit value of each phase needs to be reset. This ensures that the load imbalance of the inverter system is controlled within the range that the inverter can handle, so as to prevent excessive bus voltage fluctuations. There are several specific implementation methods for current limiting under severe imbalance operating conditions, which will be explained in detail below through a specific embodiment.

[0054] In this embodiment, as Figure 5 As shown, the maximum amplitude limit I under severe unbalanced operating conditions. max * The selection process for the value of includes the following steps: Calculate the virtual value of the three-phase load current based on the set unbalance threshold, and obtain the virtual load current i. l * Select virtual load current i l * and inverter rated current I n The minimum value in is used as the maximum amplitude limit I. max *The value of . Of course, for the minimum amplitude value I min * The value of i remains the minimum current i required for stable operation of the inverter. min .

[0055] For ease of understanding, the following will use the A-phase load current i of the inverter as an example. la For example, Figure 5 As shown. The minimum amplitude limit I corresponding to A. a _ min * The minimum current i of phase A for stable operation of the inverter can be obtained. a_min The corresponding maximum amplitude limit I for A a _ max * The rated current I of the inverter can be taken. n And the virtual load current i of phase A la * The minimum value in.

[0056] Specifically, for the virtual load current i l * The specific calculation process is as follows: The maximum value of the three-phase load current i l_max Decrease Δi1, and simultaneously reduce the median value i of the three-phase load current. l_0 Decrease Δi2; according to the following formulas (1) and (2), calculate (i l_max -Δi1), (i l_0 -Δi2) and i l_min As the virtual load current; the specific formula is as follows:

[0057] i avg ′=[(i l_max -Δi1)+(i l_0 -Δi2)+i l_min ] / 3 (1).

[0058] Δn%=[(i l_max -Δi1)-i l_min ] / i avg ′×100% (2).

[0059] Among them, i avg ′ represents the average value of the virtual load current, and Δn% represents the set unbalance threshold.

[0060] It is understandable that the value of the unbalance threshold Δn% can be selected by those skilled in the art based on their actual needs. Considering the limited unbalance compensation capability of the inverter system, the unbalance threshold Δn% is generally ranged from 10% to 30%, preferably 20%.

[0061] It's also understandable that the purpose of setting a virtual load current is to compensate for the load imbalance of the inverter system to a certain extent, ensuring that the adjusted three-phase load current meets the inverter's imbalance requirements within the allowable range; that is, after setting the virtual load current, the inverter system will adjust from a severely unbalanced operating state to a slightly unbalanced operating state. Therefore, when determining the values ​​of the maximum value reduction Δi1 and the intermediate value reduction Δi2, they need to be selected in the direction of reducing the difference in load current between adjacent phases. The maximum value of the three-phase load current, i... l_max The median value i of the three-phase load current l_0 Taking the relationship between them as an example, it is necessary to ensure that (i l_max -Δi1)-(i l_0 -Δi2)<i l_max -i l_0 That is, Δi1>Δi2.

[0062] Specifically, there are multiple ways to determine the values ​​of the maximum reduction Δi1 and the intermediate reduction Δi2 of the three-phase load current that satisfy the above conditions; in this embodiment, the preferred values ​​for the maximum reduction Δi1 and the intermediate reduction Δi2 of the three-phase load current are Δi1 / Δi2 = i l_max / i l_0 The selection is made in a certain way.

[0063] In this embodiment, as Figure 6 As shown, the inverter system's current reference value limiting process includes the following steps: when the current reference value of a certain corresponding one of the three-phase currents exceeds the maximum limit value I... max * At that time, the corresponding current reference value is limited to the maximum limit value I. max * At this point, the other corresponding current reference values ​​will gradually increase until they reach the maximum limit value I. max * .

[0064] For ease of understanding, the following example will be based on the scenario where the three-phase load current is less than the inverter's rated current, i.e., the maximum limiting value I. max * The specific limiting process for the current reference value is described in detail, taking the three-phase load current.

[0065] like Figure 6 As shown, the outer voltage loop first calculates and outputs the current reference value of the inner current loop based on the dynamic error between the actual and reference values ​​of the bus voltage using a PI controller. During this process, the error value of the bus voltage changes dynamically, reflecting the difference between the current system output power and load demand.

[0066] Then, it checks whether the current reference value reaches the three-phase load current. If the phase with the smallest current reference value reaches its corresponding load current value, the current reference value of that phase will be continuously limited to the load current level of that phase to prevent reverse current from occurring in that phase. At the same time, for other phases that have not yet reached the output power requirement, the PI controller will adjust its current command accordingly based on the current error value of the bus voltage, causing the current reference value of these phases to gradually increase in order to compensate for the insufficient output power.

[0067] As the PI controller continuously adjusts and the current reference value gradually increases, the current reference values ​​of the three phases will sequentially approach and reach their respective corresponding load current values. During this process, the error value of the bus voltage also gradually decreases until the current reference values ​​of all three phases reach their respective corresponding load current values. At this point, a dynamic balance is achieved between the output power of the inverter system and the load demand, making the operating state of the inverter system relatively stable. Thus, the inverter system safely meets the load demand while effectively preventing reverse current phenomena.

[0068] It should be noted that the inverter system anti-reverse current control method of this application can be applied not only to photovoltaic power generation systems, but also to wind power generation systems and hydropower generation systems, etc.

[0069] The basic principles, main features, and advantages of this application have been described above. Those skilled in the art should understand that this application is not limited to the above embodiments. The embodiments and descriptions in the specification are merely the principles of this application. Various changes and modifications can be made to this application without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claims. The scope of protection claimed by this application is defined by the appended claims and their equivalents.

Claims

1. A method for preventing reverse current flow in an inverter system, characterized in that, Includes the following steps: In the outer voltage loop, a current reference value is output to the inner current loop by comparing the detected value and the reference value of the DC bus voltage. The current reference value is limited based on the load imbalance of the inverter system. The current reference value after limiting is compared with the current component after the three-phase current is transformed to generate the duty cycle signal for controlling the inverter. When performing current reference value limiting, the maximum limit value of the current reference value should be selected based on the load imbalance of the inverter system, specifically including the following process: Compare the load imbalance with the set imbalance threshold; If the load imbalance is lower than the set imbalance threshold, select the minimum value between the three-phase load current and the inverter rated current as the maximum limit value. Otherwise, the virtual value of the three-phase load current is calculated based on the set unbalance threshold to obtain the virtual load current; then the minimum value between the virtual load current and the inverter rated current is selected as the value of the maximum limit. The calculation of virtual load current includes the following process: The maximum value of the three-phase load current i l_max Decrease i1, and simultaneously the median value of the three-phase load current i l_0 Decrease i2; According to the following formulas (1) and (2), the calculated (i l_max - i1), (i l_0 - i2) and i l_min As the virtual load current; the specific formula is as follows: i avg ´=[(i l_max - i1)+(i l_0 - i2)+i l_min ] / 3 (1); n%=[(i l_max - i1)-i l_min ] / i avg ´×100% (2); Among them, i avg ´ represents the average value of the virtual load current. n% represents the set imbalance threshold.

2. The inverter system anti-reverse current control method as described in claim 1, characterized in that, The maximum reduction of the effective value of the three-phase load current The decrease in the median value of i1 and the effective value of the three-phase load current The selection of i2 meets the following conditions: i1 / i2= i l_max / i l_0 .

3. The inverter system anti-reverse current control method as described in claim 1, characterized in that, Imbalance threshold The value of n% ranges from 10% to 30%.

4. The inverter system anti-reverse current control method as described in claim 1, characterized in that, When performing current reference value limiting, the minimum current reference value is set to the minimum current required for stable inverter operation.

5. The inverter system anti-reverse current control method as described in claim 1, characterized in that, The load imbalance of an inverter system can be expressed by one of the following: the effective value imbalance of the three-phase load current, the negative sequence imbalance, and the zero sequence imbalance.

6. The inverter system anti-reverse current control method as described in claim 5, characterized in that, The load imbalance of the inverter system is expressed as the effective value imbalance of the three-phase load current. The effective value imbalance is suitable for calculation by the ratio of the difference between the maximum and minimum values ​​of the three-phase load current to the average value of the three-phase load current.

7. The inverter system anti-reverse current control method according to any one of claims 1-6, characterized in that, The current reference value limiting process in the inverter system includes the following steps: When a corresponding current reference value in the three-phase current exceeds the maximum limit value, the corresponding current reference value is limited to the maximum limit value. At this time, the other corresponding current reference values ​​will gradually increase until they reach the maximum limit value.

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