Interconnected converter zero-sequence circulating current suppression method, device and medium

Abstract

The invention belongs to the technical field of micro-grid equipment, and discloses an interconnected converter zero-sequence circulating current suppression method, equipment and a medium, the method is realized based on a parallel interconnected converter system, and the parallel interconnected converter system comprises a plurality of parallel interconnected converters connected with a power grid. The plurality of parallel interconnection converters adopt a parallel structure of common alternating current and direct current buses; wherein the alternating current side of the parallel interconnection converter is connected to the alternating current micro-grid through the filter inductor and the parasitic resistor, and the direct current side of the parallel interconnection converter is connected to the direct current micro-grid through the direct current capacitor; according to the zero-sequence circulating current suppression method for the interconnected converter, zero-sequence circulating current suppression of the parallel interconnected converter is realized by controlling the neutral-point potential of a direct-current bus. According to the control method provided by the invention, the zero-sequence circulating current problem of the parallel bridge arm can be suppressed based on the control signal in the parallel interconnection converter, and the method does not depend on communication between inverters.

Description

Technical Field

[0001] The present invention relates to the technical field of microgrid equipment, and in particular to a method, equipment and medium for suppressing zero-sequence circulating current of an interconnected converter. Background Art

[0002] As the connection hub in AC / DC hybrid microgrid, parallel interconnected converters have the advantages of high efficiency, low harmonics, adjustable power factor and bidirectional power flow. However, due to the limitation of switching devices, the single module structure has been difficult to meet the application of low voltage and high current. Therefore, a multi-module parallel redundant configuration with a common AC / DC bus is usually adopted to improve the capacity and operation reliability of the system. The common AC / DC bus structure provides a flow path for zero-sequence circulating current, and due to differences in system device parameters, unbalanced line impedance and other reasons, it is bound to cause circulating current between parallel bidirectional power converter systems. The existence of zero-sequence circulating current will cause output current distortion, generate large current stress, increase system switching loss, reduce system stability, and in severe cases, cause damage to switching devices. Therefore, it is of great significance to study the method of suppressing the parallel circulating current problem of parallel interconnected converters.

[0003] For the problem of parallel circulating current of parallel interconnected converters in AC / DC hybrid microgrids, the existing circulating current suppression method that has been studied more is to adjust the zero-sequence voltage difference between parallel modules by using their own zero-sequence current as feedback without adding communication lines, so as to achieve the purpose of suppressing zero-sequence circulating current and ensure the independent adjustment of each parallel module. Among them, there are mainly simplified control methods based on virtual damping and improved droop control methods based on virtual damping, but the virtual damping values ​​introduced in these methods are all constants. If the virtual damping value is not introduced appropriately, it will aggravate the imbalance of the three-phase impedance of the system, increase the imbalance of the system, reduce the efficiency of the system, increase the zero-sequence circulating current of the system, and have no good suppression effect on the zero-sequence circulating current mutation caused by power fluctuation in the system, which has a greater impact on the system. At the same time, the virtual damping introduced in these methods is only inductive, which does not match the resistance-sensitivity of line impedance and load impedance, and has a poor suppression effect on zero-sequence circulating current.

[0004] Therefore, how to provide a method, device and medium for suppressing zero-sequence circulating current of an interconnected converter is a problem that needs to be solved urgently. Summary of the invention

[0005] The embodiments of the present invention provide a method, device and medium for suppressing zero-sequence circulating current of an interconnected converter to solve the above-mentioned technical problems in the prior art.

[0006] In order to have a basic understanding of some aspects of the disclosed embodiments, a brief summary is given below. This summary is not intended to be a general review, nor is it intended to identify key / important components or to delineate the scope of protection of these embodiments. Its only purpose is to present some concepts in a simple form as a preface to the detailed description that follows.

[0007] According to a first aspect of an embodiment of the present invention, a method, device and medium for suppressing zero-sequence circulating current of an interconnected converter are provided.

[0008] In one embodiment, the interconnected converter zero-sequence circulating current suppression method is implemented based on a parallel interconnected converter system, wherein the parallel interconnected converter system includes a plurality of parallel interconnected converters connected to a power grid, and the plurality of parallel interconnected converters adopt a parallel structure of common AC and DC busbars;

[0009] Among them, the AC side of the parallel interconnected converter is connected to the AC microgrid via the filter inductor and parasitic resistor, and the DC side of the parallel interconnected converter is connected to the DC microgrid via the DC capacitor;

[0010] The zero-sequence circulating current suppression method of the interconnected converter realizes the zero-sequence circulating current suppression of the parallel interconnected converter by controlling the midpoint potential of the DC bus.

[0011] In one embodiment, each parallel interconnected converter includes a main circuit and a control part, and the control part is used to control the midpoint potential of the DC bus.

[0012] In one embodiment, controlling the midpoint potential of the DC bus to achieve zero-sequence circulating current suppression of parallel-connected converters includes:

[0013] Extracting a DC bus voltage signal through two ends of a capacitor of the inverter DC bus to determine an estimated value of a potential fluctuation at a midpoint of the inverter DC bus capacitor;

[0014] Obtain the difference between the reference value and the actual value of the inverter DC bus voltage, and use the difference between the reference value and the actual value as the modulation component of the zero-sequence current, and calculate the average value of the third harmonic signal generated by the two parallel-connected converters;

[0015] The modulation component of the zero-sequence current is offset based on the average value of the third harmonic signal, so as to realize the suppression of the zero-sequence circulating current of the parallel interconnected converters.

[0016] In one embodiment, the DC bus voltage signal includes a tracking value of the DC bus voltage and first-order and second-order differential signals.

[0017] In one embodiment, when the number of parallel-connected converters is two, the modulation component of the zero-sequence current is offset by obtaining an average value of the third harmonic signal generated by the two parallel-connected converters.

[0018] In one embodiment, when the number of parallel-connected converters is greater than two, zero-sequence circulating current suppression is achieved by superimposing a modulation wave on the output of a zero-sequence circulating current controller and grouping switch states.

[0019] In one embodiment, the method of implementing zero-sequence circulating current suppression by superimposing a modulation wave on the output of a zero-sequence circulating current controller and grouping switch states includes:

[0020] Acquire the operating status data of the parallel interconnected converters, select the three-phase modulation wave of any converter according to the operating status data, and add the selected three-phase modulation wave to the output value of the zero-sequence circulating current controller based on proportion and feedforward to achieve zero-sequence circulating current suppression;

[0021] The influence of each switch state of the parallel interconnected converter on the circulating current is analyzed, and the switch states of the converter are grouped according to the analysis results. The switch states of different groups are put into use according to the size of the current zero-sequence circulating current to achieve the suppression of the zero-sequence circulating current.

[0022] In one embodiment, the operating status data of the parallel-connected converters includes voltage data and current data of each converter.

[0023] In one embodiment, when n converters are put into operation, the d-axis compensation voltage and q-axis compensation voltage of the nth converter are superimposed on the received d-axis and q-axis modulation waves and used as the final modulation wave of the nth converter to achieve zero-sequence circulating current suppression.

[0024] In one embodiment, based on the characteristics of an open-winding motor, zero-sequence circulating current suppression and switch switching optimization are achieved by adjusting the reference voltage of each phase.

[0025] In one embodiment, the method of achieving zero-sequence circulating current suppression and switch switching optimization by adjusting the reference voltage of each phase based on the characteristics of the open-winding motor includes:

[0026] The directional adjustment amount is determined according to the characteristics of the open-winding motor, and the maximum or minimum value of the reference voltage of each phase is adjusted in combination with the polarity of the zero-sequence circulating current until the modulation limit is reached;

[0027] When a phase voltage reaches the modulation limit, the zero-sequence circulating current is suppressed by adjusting the limit value of the reference voltage and optimizing the number of switching states.

[0028] In one embodiment, the reference voltage is expressed as:

[0029]

[0030] In the formula, △u is the reference voltage, U dc is the DC bus voltage, i0 is the system zero-sequence circulating current,

[0031] They are the reference voltages for phases A, B, and C respectively.

[0032] In one embodiment, when the given current changes and AC side filter inductances of multiple parallel-connected converters are different, zero-sequence current suppression is achieved by combining space vector pulse width modulation duty cycle and deadbeat control technology based on a discrete mathematical model through a virtual module simplified model.

[0033] In one embodiment, the method of implementing zero-sequence current suppression by combining space vector pulse width modulation duty cycle and deadbeat control technology based on a discrete mathematical model through a virtual module simplified model includes:

[0034] When processing the circulating current of a system with N parallel converters, N-1 parallel converters are regarded as virtual modules. Based on the discrete zero-sequence current mathematical model, the zero vector and non-zero vector duty ratios in the space vector pulse width modulation of multiple parallel interconnected converters are introduced. Combined with the AC side filter inductor, the zero-sequence current zero-beat control is realized.

[0035] According to a second aspect of an embodiment of the present invention, a computer device is provided.

[0036] In some embodiments, the computer device includes a memory and a processor, the memory stores a computer program, and the processor implements the steps of the above method when executing the computer program.

[0037] According to a third aspect of an embodiment of the present invention, a computer-readable storage medium is provided.

[0038] In one embodiment, the computer-readable storage medium stores a computer program, and the computer program implements the steps of the above method when executed by a processor.

[0039] The technical solution provided by the embodiment of the present invention may have the following beneficial effects:

[0040] The present invention provides a method for suppressing zero-sequence circulating current of parallel-connected converters in a microgrid system, comprising N parallel-connected converters connected to a power grid, wherein each parallel-connected converter comprises a main circuit and a control part, and both adopt a parallel structure of common AC and DC buses, the AC side of the parallel-connected converters is connected to an AC microgrid via a filter inductor and a parasitic resistor, and the DC side is connected to a DC microgrid via a DC capacitor, and the zero-sequence circulating current is suppressed by controlling the DC bus midpoint potential; the parallel-connected converters are used to realize DC / AC inversion of the DC voltage; the filter inductor is used to realize filtering of the grid-connected waveform, and the proposed control method can suppress the zero-sequence circulating current problem of the parallel bridge arm based on the control signal inside the parallel-connected converters, and does not rely on communication between inverters.

[0041] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0043] Figure 1 is a structural block diagram of a parallel interconnected converter system according to an exemplary embodiment;

[0044] Figure 2 The figure is a schematic diagram showing the structure of a computer device according to an exemplary embodiment. DETAILED DESCRIPTION

[0045] The following description and accompanying drawings fully illustrate the specific embodiments of this article so that those skilled in the art can practice them. Parts and features of some embodiments may be included in or replace parts and features of other embodiments. The scope of the embodiments of this article includes the entire scope of the claims, as well as all available equivalents of the claims. Herein, the terms "first", "second", etc. are only used to distinguish one element from another, without requiring or implying any actual relationship or order between these elements. In fact, the first element can also be called the second element, and vice versa. Moreover, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that the structure, device or equipment including a series of elements includes not only those elements, but also other elements that are not explicitly listed, or also include elements inherent to such structure, device or equipment. In the absence of more restrictions, the elements defined by the sentence "including one..." do not exclude the existence of other identical elements in the structure, device or equipment including the elements. Each embodiment is described in a progressive manner herein, and each embodiment focuses on the differences from other embodiments, and the same and similar parts between the embodiments can be referred to each other.

[0046] The terms "longitudinal", "lateral", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc. in this document indicate the orientation or position relationship based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing this document and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In the description of this document, unless otherwise specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a mechanical connection or an electrical connection, it can also be the internal communication of two elements, it can be a direct connection, or it can be an indirect connection through an intermediate medium. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to specific circumstances.

[0047] As used herein, the term "plurality" means two or more than two, unless otherwise specified.

[0048] In this document, the character " / " indicates that the preceding and following objects are in an "or" relationship. For example, A / B means: A or B.

[0049] In this article, the term "and / or" is a description of the association relationship between objects, indicating that three relationships may exist. For example, A and / or B means: A or B, or, A and B.

[0050] It should be understood that, although the various steps in the flow chart are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear description in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a portion of the steps in the figure may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these sub-steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.

[0051] Each module in the device or system of the present application can be implemented in whole or in part by software, hardware, or a combination thereof. The above modules can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute operations corresponding to the above modules.

[0052] In the absence of conflict, the embodiments of the present invention and the features of the embodiments may be combined with each other.

[0053] Figure 1An embodiment of a method for suppressing zero-sequence circulating current of an interconnected converter according to the present invention is shown. Figure 1 In the figure, Sa1, Sb1, Sc1, Sa1', Sb1', Sc1', Sa2, Sb2, Sc2, Sa2', Sb2', Sc2' are all bus connection points, which represent the connection structure diagram of the parallel interconnected converters, that is, the conduction status of the reaction circuit, i a 、i b 、i c They are the average values ​​of the inductor current of different lines respectively, and J1 and J2 represent two parallel interconnected converters.

[0054] In this optional embodiment, the method for suppressing zero-sequence circulating current of interconnected converters is implemented based on a parallel interconnected converter system, wherein the parallel interconnected converter system includes several parallel interconnected converters connected to a power grid, and the several parallel interconnected converters adopt a parallel structure of common AC and DC busbars; wherein the AC side of the parallel interconnected converters is connected to the AC microgrid via a filter inductor and a parasitic resistor, and the DC side of the parallel interconnected converters is connected to the DC microgrid via a DC capacitor; the method for suppressing zero-sequence circulating current of interconnected converters realizes zero-sequence circulating current suppression of parallel interconnected converters by controlling the midpoint potential of the DC bus.

[0055] In order to facilitate understanding of the above technical solutions of the present invention, the above technical solutions of the present invention are further described below from the perspective of architecture and principle, as follows:

[0056] The present invention provides a method for suppressing zero-sequence circulating current of parallel-connected converters in a microgrid system, comprising N parallel-connected converters connected to a power grid, wherein each parallel-connected converter comprises a main circuit and a control part, the control part is used to control the midpoint potential of a DC bus, and both adopt a parallel structure of a common AC and DC bus, the AC side of the parallel-connected converters is connected to an AC microgrid via a filter inductor and a parasitic resistor, and the DC side is connected to a DC microgrid via a DC capacitor, and the zero-sequence circulating current is suppressed by controlling the midpoint potential of the DC bus; the parallel-connected converters are used to realize DC / AC inversion of the DC voltage; and the filter inductor is used to realize grid-connected waveform filtering.

[0057] Specifically, the zero-sequence circulating current suppression of parallel interconnected converters is achieved by controlling the midpoint potential of the DC bus, including: firstly, extracting the DC bus voltage signal from both ends of the DC bus capacitor of the inverter, and determining the estimated value of the midpoint potential fluctuation of the DC bus capacitor of the inverter, the DC bus voltage signal includes the tracking value of the DC bus voltage and the first-order and second-order differential signals; then, using an efficient nonlinear PI controller to obtain the difference between the reference value and the actual value of the inverter DC bus voltage, using the difference between the reference value and the actual value as the modulation component of the zero-sequence current, and obtaining the average value of the third harmonic signal generated by the two parallel interconnected converters to offset the modulation component of the zero-sequence current, so as to achieve the zero-sequence circulating current suppression of the parallel interconnected converters.

[0058] The third harmonic signal generated by two parallel interconnected converters is averaged to offset the zero-sequence current modulation component and increase the signal communication between parallel units. When multiple parallel interconnected converters are connected in parallel, if one or several of them fail, it will be difficult to predict the number of failed units to calculate the third harmonic average value, thus affecting the redundancy of the system. The proposed control method can suppress the zero-sequence circulating current problem of the parallel bridge arm based on the control signal inside the parallel interconnected converter, and does not rely on the communication between the inverters. Specifically, according to the obtained operating status data of the parallel interconnected converter, the three-phase modulation wave of any converter is added to the output value of the zero-sequence circulating current controller based on the proportion and feedforward to achieve zero-sequence circulating current suppression. By analyzing the influence of each switch state of the parallel interconnected converter on the circulating current, the switch state of the converter is grouped, and according to the current zero-sequence circulating current, the switch state of different groups is put into use, so the suppression of zero-sequence circulating current is achieved, while maintaining a relatively good control performance, and all switch states will be put into use, so it does not affect the utilization of the DC bus voltage.

[0059] Specifically, the modulation component of the zero-sequence current is offset by taking the average value of the third harmonic signal generated by the two parallel-connected converters. When the two modules (i.e., the parallel-connected converters) meet the unbalanced conditions such as filter imbalance and asymmetric switching time, the common voltage loop is used for current balancing, but there will be errors in the inductor current feedback value. Taking phase A as an example, assuming that the average value of the inductor current of the two modules is i a , module one inductor current i a1 =i a +Δi a , Δi a is the current modulation component, then the inductor current i of module 2 is a2 =i a -Δi a, and this can be extended to phases B and C. The error can be balanced and current-sharing can be achieved by modulating the PI regulator. When the third harmonic injection is used, the third harmonic is the instantaneous imbalance of the output caused by the unbalanced input of the PI regulator, so the average value of the third harmonic signal can be used to offset the modulation component of the zero-sequence current.

[0060] The method of implementing zero-sequence circulating current suppression by superimposing the output of the zero-sequence circulating current controller with the modulation wave and grouping the switch state includes: collecting the voltage and current of each converter, performing corresponding control according to the switch state grouping, generating d-axis and q-axis modulation waves Umd and Umq, and sending them to the control part of each converter; the control part of each converter receives the d-axis and q-axis modulation waves Umd and Umq generated by the coordinated controller, and divides them by the average value Udc of the DC bus voltage of the corresponding converter ave , generate the modulation waves Umd1 and Umq1 of the d-axis and q-axis corresponding to the first converter, and so on, generate the modulation waves Umdn and Umqn of the d-axis and q-axis corresponding to the n-th converter. In the control part, the compensation voltages ΔUd1 and ΔUq1 of the d-axis and q-axis of the first converter are superimposed on the received modulation waves Umd1 and Umq1 of the d-axis and q-axis as the final modulation waves of the first converter; and so on, the compensation amounts ΔUdn and ΔUqn of the d-axis and q-axis of the n-th converter are superimposed on the received modulation waves Umdn and Umqn of the d-axis and q-axis as the final modulation waves of the n-th converter to achieve zero-sequence circulating current suppression.

[0061] The present invention utilizes the characteristics of an open-winding motor to synchronously adjust the reference voltages of each phase without affecting the effective synthetic voltage, and designs a directional adjustment amount; according to the polarity of the zero-sequence circulating current, the maximum value or minimum value of the reference voltage of each phase is adjusted so that the maximum value or minimum value reaches the limit of the system modulation range; the switching state of the bridge arm corresponding to the phase voltage that reaches the upper or lower limit of the open-winding motor system voltage modulation remains unchanged within the control cycle, and this characteristic is utilized to achieve optimization of the number of switch switching times.

[0062] Specifically, the expression of the reference voltage is:

[0063]

[0064] In the formula, △u is the reference voltage, that is, the reference voltage correction value, U dc is the DC bus voltage, i0 is the system zero-sequence circulating current, They are the reference voltages for phases A, B, and C respectively;

[0065] At this time, the system zero-sequence voltage u0 can be expressed as:

[0066]

[0067] It can be seen that the reference voltage correction is the zero-sequence voltage component. From the above formula, we can see that when i0 is a negative number, the correction △u is a positive number, so the zero-sequence voltage u0 of the system is also a positive number, which has a suppressive effect on i0; conversely, when i0 is a positive number, the zero-sequence voltage u0 of the system is a negative number, which has a suppressive effect on i0, thereby achieving the suppression of the zero-sequence circulating current i0.

[0068] When the given current changes of multiple parallel-connected converters and the AC-side filter inductance are different, the circulating current can be effectively suppressed. That is, when processing the circulating current of a system with N converters in parallel, the N-1 parallel converters are regarded as a virtual module, and on the basis of the discrete zero-sequence current mathematical model, the zero-vector and non-zero-vector duty ratios in SVPWM (short for space vector pulse width modulation) of multiple parallel-connected converters and the zero-sequence current deadbeat control of the AC-side filter inductance are introduced, which has a high dynamic response speed. Regardless of the DC bus voltage capacity, the system zero-sequence current will reach a given value of 0 before the next sampling cycle. This method can also control the zero-sequence circulating current of each module at the same level, and is suitable for multiple parallel-connected converters with different given currents and AC filter inductances.

[0069] In one embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as follows: Figure 2 As shown. The computer device includes a processor, a memory and a network interface connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store static information and dynamic information data. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, the steps in the above method embodiment are implemented.

[0070] Those skilled in the art will understand that Figure 2 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present invention, and does not constitute a limitation on the computer device to which the solution of the present invention is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0071] In addition, the present invention also provides a computer device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor implements the steps in the above method embodiment when executing the computer program.

[0072] In addition, the present invention further provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps in the above method embodiment are implemented.

[0073] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided by the present invention can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory or optical memory, etc. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM).

[0074] The present invention is not limited to the structures which have been described above and shown in the drawings, and various modifications and changes may be made without departing from the scope thereof. The scope of the present invention is limited only by the appended claims.

Claims

1. A method for suppressing zero-sequence circulating current of an interconnected converter, characterized in that: The method is implemented based on a parallel interconnected converter system, wherein the parallel interconnected converter system includes a plurality of parallel interconnected converters connected to a power grid, and the plurality of parallel interconnected converters adopt a parallel structure of common AC and DC busbars; Among them, the AC side of the parallel interconnected converter is connected to the AC microgrid via the filter inductor and parasitic resistance, and the DC side of the parallel interconnected converter is connected to the DC microgrid via the DC capacitor; The zero-sequence circulating current suppression method of the interconnected converter realizes the zero-sequence circulating current suppression of the parallel interconnected converter by controlling the midpoint potential of the DC bus.

2. The method for suppressing zero-sequence circulating current of an interconnected converter according to claim 1, characterized in that: Each parallel interconnected converter includes a main circuit and a control part, and the control part is used to control the midpoint potential of the DC bus.

3. The method for suppressing zero-sequence circulating current of an interconnected converter according to claim 1, characterized in that: The method of realizing zero-sequence circulating current suppression of parallel-connected converters by controlling the midpoint potential of the DC bus comprises: Extracting a DC bus voltage signal through two ends of a capacitor of the inverter DC bus to determine an estimated value of a potential fluctuation at a midpoint of the inverter DC bus capacitor; Obtain the difference between the reference value and the actual value of the inverter DC bus voltage, and use the difference between the reference value and the actual value as the modulation component of the zero-sequence current, and calculate the average value of the third harmonic signal generated by the two parallel-connected converters; The modulation component of the zero-sequence current is offset based on the average value of the third harmonic signal, thereby achieving zero-sequence circulating current suppression of parallel-connected converters.

4. The method for suppressing zero-sequence circulating current of an interconnected converter according to claim 3, characterized in that: The DC bus voltage signal includes a tracking value of the DC bus voltage and first-order and second-order differential signals.

5. The method for suppressing zero-sequence circulating current of an interconnected converter according to claim 1, characterized in that: When the number of parallel-connected converters is two, the modulation component of the zero-sequence current is offset by obtaining the average value of the third harmonic signal generated by the two parallel-connected converters.

6. The method for suppressing zero-sequence circulating current of an interconnected converter according to claim 1, characterized in that: When the number of parallel-connected converters is greater than two, zero-sequence circulating current suppression is achieved by superimposing the modulation wave on the output of the zero-sequence circulating current controller and grouping the switch states.

7. The method for suppressing zero-sequence circulating current of an interconnected converter according to claim 6, characterized in that: The method of implementing zero-sequence circulating current suppression by superimposing a modulation wave on the output of a zero-sequence circulating current controller and grouping switch states includes: Acquire the operating status data of the parallel interconnected converters, select the three-phase modulation wave of any converter according to the operating status data, and add the selected three-phase modulation wave to the output value of the zero-sequence circulating current controller based on proportion and feedforward to achieve zero-sequence circulating current suppression; The influence of each switch state of the parallel interconnected converter on the circulating current is analyzed, and the switch states of the converter are grouped according to the analysis results. The switch states of different groups are put into use according to the size of the current zero-sequence circulating current to achieve the suppression of the zero-sequence circulating current.

8. The method for suppressing zero-sequence circulating current of interconnected converters according to claim 7, characterized in that: The operating status data of the parallel-connected converters includes the voltage data and current data of each converter.

9. The method for suppressing zero-sequence circulating current of interconnected converters according to claim 7, characterized in that: When n converters are put into operation, the d-axis compensation voltage and q-axis compensation voltage of the n-th converter are superimposed on the received d-axis and q-axis modulation waves and used as the final modulation wave of the n-th converter to achieve zero-sequence circulating current suppression.

10. The method for suppressing zero-sequence circulating current of interconnected converters according to claim 1, characterized in that: It also includes zero-sequence circulating current suppression and switch switching optimization by adjusting the reference voltage of each phase based on the characteristics of the open-winding motor.

11. The method for suppressing zero-sequence circulating current of interconnected converters according to claim 10, characterized in that: The method of achieving zero-sequence circulating current suppression and switch switching optimization by adjusting the reference voltage of each phase based on the characteristics of the open-winding motor includes: The directional adjustment amount is determined according to the characteristics of the open-winding motor, and the maximum or minimum value of the reference voltage of each phase is adjusted in combination with the polarity of the zero-sequence circulating current until the modulation limit is reached; When a phase voltage reaches the modulation limit, the zero-sequence circulating current is suppressed by adjusting the limit value of the reference voltage and optimizing the number of switching states.

12. The method for suppressing zero-sequence circulating current of interconnected converters according to claim 11, characterized in that: The expression of the reference voltage is: Where △u is the reference voltage, U dc is the DC bus voltage, i0 is the system zero-sequence circulating current, They are the reference voltages for phases A, B, and C respectively.

13. The method for suppressing zero-sequence circulating current of interconnected converters according to claim 1, characterized in that: When the given current changes of multiple parallel-connected converters and the AC-side filter inductance are different, the zero-sequence current suppression is achieved by combining the space vector pulse width modulation duty cycle and deadbeat control technology on the basis of the discrete mathematical model through a virtual module simplified model.

14. The method for suppressing zero-sequence circulating current of interconnected converters according to claim 13, characterized in that: The method of simplifying the model through virtual modules and combining the space vector pulse width modulation duty cycle and deadbeat control technology on the basis of the discrete mathematical model to achieve zero-sequence current suppression includes: When processing the circulating current of a system with N parallel converters, N-1 parallel converters are regarded as virtual modules. Based on the discrete zero-sequence current mathematical model, the zero vector and non-zero vector duty ratios in the space vector pulse width modulation of multiple parallel interconnected converters are introduced. Combined with the AC side filter inductor, the zero-sequence current zero-beat control is realized.

15. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 14 are implemented.

16. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 14 are implemented.

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