Switched capacitor converter and power supply method, device, medium and program product thereof
By fusing the power supply voltage of the main charge pump reverse start to the power tube driving circuit in the switching capacitor converter, the problem of requiring a built-in charge pump circuit and a larger capacitor in the reverse boost mode is solved, and the effect of simplifying the power supply circuit design and reducing power loss is achieved.
Patent Information
- Application Number
- CN202411937309.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-26
- Publication Date
- 2025-04-04
AI Technical Summary
Existing switching capacitor converters require built-in charge pump circuits and larger capacitors in reverse boost mode, resulting in complex design and large area occupancy.
By fusing the power supply voltage of the power tube drive circuit using the reverse start of the main charge pump in the switching capacitor converter, a suitable complementary circuit path is provided for the boost capacitor using the corresponding proportional voltage nodes.
It realizes that all power pipes are powered with only three sets of simple switching circuits and external capacitors, avoiding power losses caused by large voltage drops, simplifying the power supply circuit design, and saving circuit area and component number.
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Figure CN119765860A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of switched capacitor converters, and in particular to a switched capacitor converter and a power supply method, device, medium and program product thereof. Background Art
[0002] The switched-capacitor converter (SCC) is an efficient and compact power management solution widely used in portable devices. Compared with traditional linear regulators and switching power supplies, SCC has higher efficiency, smaller size and lower cost. The switched-capacitor converter achieves voltage conversion by periodically switching the connection state of the capacitor. Its basic structure includes one or more capacitors, switches and control circuits. In each cycle, the capacitor is charged to the input voltage and then switched to the output through the switch, thereby achieving the function of boosting or bucking. The main advantage of SCC is its inductor-free design, which makes the entire circuit more compact and suitable for portable devices with limited space.
[0003] In portable device applications, the SCC is often required to adapt to PMID voltages of different gears. For example, for a 3:1 architecture SCC, it is required to have the functions of 3:1 / 2:1 / 1:1 at the same time, so as to adapt to the working states where PMID is equal to 3*VBAT, 2*VBAT, and 1*VBAT. In addition to the step-down function, the SCC also needs to have a reverse boost function, which can boost the battery voltage VBAT and provide it to the PMID end. The reverse working SCC also needs to provide PMID voltages of different gears, that is, it needs to have the functions of 1:3 / 1:2 / 1:1 at the same time. For reverse boost applications, the highest voltage in the initial state is the VBAT voltage, so providing a suitable voltage for each power tube is the key to the normal operation of the SCC reverse mode.
[0004] like Figure 1As shown in the figure, it is a 3:1 series-parallel SCC architecture diagram and its power supply scheme. In the reverse working mode, before the SCC enters the steady-state working state, the VBST3 voltage needs to be pumped to 2*VBAT through the charge pump circuit on the right. In this process, when VBST3 is equal to 2*VBAT, the switch S2 is closed to connect VBST3 with VBST2, charging CBST2 to 1*VBAT, so that VBST2 maintains 2*VBAT. At this time, the driving circuits of the power tubes Q4A / Q4B / Q5A / Q5B / Q6A / Q6B / Q7A / Q7B all have stable power supply, which can make the corresponding power tubes fully turned on, so that CF1A / CF1B / CF2A / CF2B are connected in parallel to VBAT to charge the flying capacitor. Finally, when the voltage of the flying capacitor CF1A / CF1B reaches 1*VBAT, the switch S1A / S1B is closed to connect VBST2 with VBST1A / VBST1B, charging CBST1A / CBST1B to 1*VBAT, so that VBST1A / VBST1B reaches 2*VBAT. Next, whether entering the 1:2 or 1:3 working mode, all power tube drive circuits have a suitable supply voltage. One of the shortcomings of the above solution is that a charge pump circuit with a certain driving capability needs to be built in, and a sufficiently large capacitor CBST3 is required to realize the charge transfer. Summary of the invention
[0005] The present invention aims to provide a switched capacitor converter and a power supply method, device, medium and program product thereof to solve the above-mentioned problems.
[0006] The present invention provides a switched capacitor converter power supply method for an N:1 series-parallel switched capacitor converter; the switched capacitor converter power supply method comprises:
[0007] The power supply end VBAT is powered on;
[0008] Turn on the power tube between the lower plate of the flying capacitor and the ground to provide the flying capacitor with an initial voltage of 1*VBAT-1*Vd, where Vd is the conduction voltage of the body diode of the power tube;
[0009] The switched capacitor converter is switched in the highest ratio working mode. At this time, only the power tube between the lower plate of the flying capacitor and the ground and the power tube powered by the flying capacitor can be fully turned on, and all other power tubes are charged by body diodes; in this process, the third boost capacitor CBST2 is temporarily charged through the power terminal PMID, and the first boost capacitor CBST1A and the second boost capacitor CBST1B are charged through the output terminal VBST2 of the switching circuit; when the power terminal PMID voltage reaches 2*VBAT, the switch conversion is suspended;
[0010] The switched capacitor converter is switched to a switching conversion mode with a required ratio, and a suitable voltage node is selected to supplement the power of the third boost capacitor CBST2.
[0011] In some embodiments, the appropriate voltage node needs to provide 2*VBAT that can last for half a cycle or forever.
[0012] In some embodiments, the suitable voltage node includes an upper plate node of a flying capacitor or a power terminal PMID.
[0013] In a second aspect, the present invention further provides a switched capacitor converter, wherein the switched capacitor converter is an N:1 series-parallel switched capacitor converter, comprising:
[0014] On the one hand, the power terminal PMID is connected to the power supply terminal VBAT via N first power tubes Q1A~Q(N)A and (N-1) first flying capacitors CF1A~CF(N-1)A, each of the first power tubes is alternately connected to the first flying capacitor, and the upper plate node of each of the first flying capacitors is correspondingly recorded as CP1A~CP(N-1)A, and the lower plate node is correspondingly recorded as CN1A~CN(N-1)A; on the other hand, the power terminal PMID is connected to the power supply terminal VBAT via N second power tubes Q1B~Q(N)B and (N-1) second flying capacitors CF1B~CF(N-1)B, and each of the second power tubes is alternately connected to the second flying capacitor;
[0015] The upper plate nodes of each second flying capacitor are correspondingly recorded as CP1B~CP(N-1)B, and the lower plate nodes are correspondingly recorded as CN1B~CN(N-1)B; the upper plate nodes of each first flying capacitor and the second flying capacitor are correspondingly connected via the third power tube Q(N+1)A~Q(2N-1)A and the fourth power tube Q(N+1)B~Q(2N-1)B; the electrical connection points between each corresponding pair of third power tubes Q(N+1)A~Q(2N-1)A and fourth power tubes Q(N+1)B~Q(2N-1)B are connected to the power supply terminal VBAT in sequence; the lower plate nodes of each first flying capacitor are connected via the fifth power tube Q(2N)A~Q(2N-1)A and the fourth power tube Q(N+1)B~Q(2N-1)B. Q(3N-2)A is grounded; the lower plate node of each of the second flying capacitors is grounded via the sixth power tube Q(2N)B~Q(3N-2)B; the upper plate node of the first first flying capacitor close to the power end PMID is also connected to the switch circuit via the first boost capacitor CBST1A and the first switch S1A in sequence; the upper plate node of the first second flying capacitor close to the power end PMID is also connected to the switch circuit via the second boost capacitor CBST2A and the second switch S1B in sequence; the power end PMID is further connected to the power supply end VBAT via the third switch S2 and the third boost capacitor CBST2; the output end of the switch circuit is VBST2;
[0016] Each of the first switch S1A, the second switch S1B, the third switch S2, the fourth switch S3A and the fifth switch S3B is provided with a body diode;
[0017] The power supply end VBST1A of the driving circuit of the first power tube Q1A connected to the power tube PMID is connected to the first switch S1A, and the power supply end of the driving circuit of each of the other first power tubes Q2A~Q(N)A is correspondingly connected to the upper plate nodes CP1A~CP(N-1)A; the power supply end VBST1B of the driving circuit of the second power tube Q1B connected to the power tube PMID is connected to the second switch S2B, and the power supply end of the driving circuit of each of the other second power tubes Q2B~Q(N)B is correspondingly connected to the upper plate nodes CP1B~CP(N-1)B; the power supply end of the driving circuit of each of the third power tubes Q(N+1)A~Q(2N-1)A and the fourth power tubes Q(N+1)B~Q(2N-1)B is connected to the output end VBST2; the power supply end of the driving circuit of each of the fifth power tubes Q(2N)A~Q(3N-2)A and the sixth power tubes Q(2N)B~Q(3N-2)B is connected to the reverse power supply end VBAT of the switch capacitor converter.
[0018] In some embodiments, the switching circuit includes a fourth switch S3A and a fifth switch S3B connected in parallel; one end of the fourth switch S3A is connected to the node CP(N-1)A, and one end of the fifth switch S3B is connected to the node CP(N-1)B; the other ends of the fourth switch S3A and the fifth switch S3B are output ends VBST2, which are respectively connected to the first switch S1A and the second switch S1B.
[0019] In a third aspect, the present invention further provides an electronic device, comprising:
[0020] at least one processor; and a memory communicatively coupled to the at least one processor;
[0021] The memory stores instructions that can be executed by the at least one processor, and the at least one processor executes the instructions stored in the memory, so that the at least one processor performs the method.
[0022] In a fourth aspect, the present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium is used to store instructions, and when the instructions are executed, the above method is implemented.
[0023] In a fifth aspect, the present invention further provides a computer program product, which, when called by a computer, enables the computer to execute the above method.
[0024] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are:
[0025] The present invention can realize the power supply of all power tubes of the SCC by using only three groups of simple switch circuits and external capacitors, and can avoid power loss caused by a large voltage drop. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] Figure 1 Schematic diagram of a series-parallel switched capacitor converter and power supply scheme with a 3:1 conversion ratio.
[0027] Figure 2 It is a schematic diagram of a power supply scheme of an N:1 series-parallel switched capacitor converter operating in a reverse mode in an embodiment of the present invention.
[0028] Figure 3 The figure is a flow chart of a method for powering a switched capacitor converter according to an embodiment of the present invention.
[0029] Figure 4This is a schematic diagram of a power supply scheme for a series-parallel switched capacitor converter with a 3:1 conversion ratio in an embodiment of the present invention, using a switched capacitor converter power supply method in an embodiment of the present invention working in a reverse 1:2 working mode.
[0030] Figure 5 This is a schematic diagram of a power supply scheme for a series-parallel switched capacitor converter with a 3:1 conversion ratio in an embodiment of the present invention, using a switched capacitor converter power supply method in an embodiment of the present invention working in a reverse 1:3 working mode.
[0031] Figure 6 The present invention is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. DETAILED DESCRIPTION
[0032] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.
[0033] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0034] The embodiment of the present invention provides a switched capacitor converter power supply method for an N:1 series-parallel switched capacitor converter, where N>2, such as Figure 1 As shown, the power end PMID is connected to the power supply end VBAT via N first power tubes Q1A~Q(N)A and (N-1) first flying capacitors CF1A~CF(N-1)A, each of the first power tubes is alternately connected to the first flying capacitor, and the upper plate node of each of the first flying capacitors is correspondingly recorded as CP1A~CP(N-1)A, and the lower plate node is correspondingly recorded as CN1A~CN(N-1)A; the power end PMID is connected to the power supply end VBAT via N second power tubes Q1B~Q(N)B and (N-1) second flying capacitors CF1B~CF(N-1)B, and each of the second power tubes is alternately connected to the second flying capacitor;
[0035] The upper plate nodes of each of the second flying capacitors are correspondingly recorded as CP1B~CP(N-1)B, and the lower plate nodes are correspondingly recorded as CN1B~CN(N-1)B; the upper plate nodes of each of the first flying capacitors and the second flying capacitors are correspondingly connected via the third power tubes Q(N+1)A~Q(2N-1)A and the fourth power tubes Q(N+1)B~Q(2N-1)B; the electrical connection points between each corresponding pair of third power tubes Q(N+1)A~Q(2N-1)A and fourth power tubes Q(N+1)B~Q(2N-1)B are connected to the power supply terminal VBAT in sequence; the lower plate nodes of each of the first flying capacitors are connected via the fifth power tubes Q(N+1)A~Q(2N-1)A and the fourth power tubes Q(N+1)B~Q(2N-1)B in sequence; The power tubes Q(2N)A~Q(3N-2)A are grounded; the lower plate nodes of each of the second flying capacitors are grounded via the sixth power tubes Q(2N)B~Q(3N-2)B; the upper plate node of the first first flying capacitor close to the power terminal PMID is also connected to the switch circuit via the first boost capacitor CBST1A and the first switch S1A in sequence; the upper plate node of the first second flying capacitor close to the power terminal PMID is also connected to the switch circuit via the second boost capacitor CBST2A and the second switch S1B in sequence; the power terminal PMID is further connected to the power supply terminal VBAT via the third switch S2 and the third boost capacitor CBST2;
[0036] The switch circuit includes a fourth switch S3A and a fifth switch S3B connected in parallel; one end of the fourth switch S3A is connected to the node CP(N-1)A, and one end of the fifth switch S3B is connected to the node CP(N-1)B; the other ends of the fourth switch S3A and the fifth switch S3B are output ends VBST2, which are connected to the first switch S1A and the second switch S1B respectively;
[0037] Each of the first switch S1A, the second switch S1B, the third switch S2, the fourth switch S3A and the fifth switch S3B is provided with a body diode;
[0038] The power supply end VBST1A of the driving circuit of the first power tube Q1A connected to the power tube PMID is connected to the first switch S1A, and the power supply end of the driving circuit of each of the other first power tubes Q2A~Q(N)A is correspondingly connected to the upper plate nodes CP1A~CP(N-1)A; the power supply end VBST1B of the driving circuit of the second power tube Q1B connected to the power tube PMID is connected to the second switch S2B, and the power supply end of the driving circuit of each of the other second power tubes Q2B~Q(N)B is correspondingly connected to the upper plate nodes CP1B~CP(N-1)B; the power supply end of the driving circuit of each of the third power tubes Q(N+1)A~Q(2N-1)A and the fourth power tubes Q(N+1)B~Q(2N-1)B is connected to the output end VBST2; the power supply end of the driving circuit of each of the fifth power tubes Q(2N)A~Q(3N-2)A and the sixth power tubes Q(2N)B~Q(3N-2)B is connected to the reverse power supply end VBAT of the switch capacitor converter.
[0039] The power supply method of the switched capacitor converter is to integrate the reverse start of the main charge pump into the establishment of the power supply voltage of the power tube drive circuit, and use the voltage nodes of the corresponding proportion in the main charge pump to provide a suitable power supply path for the boost capacitor, thereby simplifying the design of the power supply circuit, saving circuit area, and reducing the number of components used. For the above-mentioned N:1 series-parallel switched capacitor converter, such as Figure 2 As shown, the specific process of the switched capacitor converter power supply method is as follows:
[0040] The power supply end VBAT is powered on;
[0041] Turn on the power tubes (fifth power tube Q(2N)A~Q(3N-2)A and sixth power tube Q(2N)B~Q(3N-2)B) between the lower plate of the flying capacitor and the ground, and provide an initial voltage of 1*VBAT-1*Vd for the flying capacitor, where Vd is the conduction voltage of the body diode of the power tube;
[0042] The switched capacitor converter is switched in the highest ratio working mode. At this time, only the power tubes between the lower plate of the flying capacitor and the ground (the fifth power tube Q(2N)A to Q(3N-2)A and the sixth power tube Q(2N)B to Q(3N-2)B) and the power tubes powered by the flying capacitor (the first power tube Q2A to Q(N)A and the second power tube Q2B to Q(N)B) can be fully turned on, and all other power tubes are charged by body diodes; in this process, the third boost capacitor CBST2 is temporarily charged through the power terminal PMID, and the first boost capacitor CBST1A and the second boost capacitor CBST1B are charged through the output terminal VBST2 of the switch circuit; when the voltage of the power terminal PMID reaches 2*VBAT, the switch conversion is suspended;
[0043] Switch the switched capacitor converter to the required switching conversion mode and select a suitable voltage node to replenish the power for the third boost capacitor CBST2. The voltage node needs to provide 2*VBAT that can last for half a cycle or forever, such as the upper plate node of the flying capacitor or the power terminal PMID.
[0044] The following describes the power supply method for the switched capacitor converter in detail by taking a series-parallel switched capacitor converter with a conversion ratio of 3:1 as an example.
[0045] like Figure 3 As shown, a power supply solution in the reverse 1:2 working mode is provided, and the startup process is as follows:
[0046] The power supply end VBAT is powered on;
[0047] The power tube Q6A / Q7A / Q6B / Q7B between the lower plate of the flying capacitor and the ground is turned on, and its driving circuit is powered by the VBAT voltage at the power supply end, so it can be fully turned on. The power tube Q4A / Q5A / Q4B / Q5B is turned off, and the voltage of the node CP1A / CP2A / CP1B / CP2B is charged to 1*VBAT-1*Vd through the path formed by each body diode, the flying capacitor, and the power tube Q6A / Q7A / Q6B / Q7B, where Vd is the conduction voltage of the body diode of the power tube Q4A / Q5A / Q4B / Q5B. Here, 1*VBAT-1*Vd needs to be satisfied to turn on the power tube Q2A / Q3A / Q2B / Q3B.
[0048] The switch conversion of the switched capacitor converter in the 1:3 working mode, at this time, VBST1A / VBST1B / VBST2 has not reached the supply voltage required by the corresponding voltage domain, so the power tube Q1A / Q4A / Q5A / Q1B / Q4B / Q5B is temporarily charged through the body diode conduction at the initial stage of the switching conversion process. In this state, the maximum voltage that the node CP2A / CP2B can reach is 2*VBAT-1*Vd, that is, one times the VBAT voltage of the power supply end plus the voltage on a flying capacitor, and the maximum voltage that the node CP1A / CP2B can reach is 3*VBAT-2*Vd, that is, one times the VBAT voltage of the power supply end plus the voltage on two flying capacitors. In this process, the power end PMID will be charged when the power tube Q1A / Q2A / Q3A / Q1B / Q2B / Q3B forms a series connection, and the boost capacitor CBST1A / CBST1B / CBST2 will also be charged through the body diode of the switch S1A / S1B / S2 in this process. When it is detected that the PMID voltage at the power end reaches 2*VBAT, the switching process is suspended in the state where the flying capacitor and the power supply end VBAT are connected in parallel. At this time, the VBST2 voltage is 2*VBAT-1*Vd, and the power supply voltage of the power tube Q4A / Q5A / A4B / Q5B powered by VBST2 is 1*VBAT-1*Vd; the VBST1A / VBST1B voltage is 2*VBAT-2*Vd. Since the power tube Q4A / Q5A / A4B / Q5B are all turned on by the body diode in the previous switching process, the node CP1A / CP2A / CP1B / CP2B voltage is 1*VBAT-1*Vd, and the power supply voltage of the power tube Q1A / Q1B powered by VBST1A / VBST1B is also 1*VBAT-1*Vd. At this time, the driving circuits of all power tubes have sufficient supply voltage.
[0049] The switched capacitor converter starts to work in a 1:2 switching conversion mode. During this process, the switch S2 of the boost capacitor CBST2 remains turned on, and the power terminal PMID replenishes power for VBST2; the switches S1A / S1B of the boost capacitor CBST1A / CBST1B are alternately turned on as the series-parallel state switches. When the voltage of the node CP1A or CP1B reaches 1*VBAT, the corresponding switch S1A or S1B is closed, so that the boost capacitor CBST2 replenishes power for CBST1A or CBST1B. At the same time, the drive circuits of all power tubes can work normally, and no body diode conduction is required. After reaching a steady state, the power supply of all power tube drive circuits has no extra voltage loss, which can reduce the power loss of the drive circuit and improve the working efficiency of the SCC.
[0050] like Figure 4As shown, a power supply scheme in the reverse 1:3 working mode is provided. The power supply scheme in the reverse 1:3 working mode needs to be Figure 3 Based on the power supply scheme in the reverse 1:2 working mode shown in the figure, a set of switches from node CP2A / CP2B to VBST2 is added. The specific process is as follows:
[0051] The startup process of the power supply scheme in the reverse 1:2 working mode is consistent. After the switch conversion is restarted, it still works in the 1:3 switch conversion mode. The difference from the power supply scheme in the reverse 1:2 working mode is that the power supply switch of the boost capacitor CBST2 is switched from switch S2 to switch S3A / S3B. Similar to switch S1A / S1B, these two switches also need to be switched alternately with the series-parallel state. When the voltage of node CP2A or CP2B is 2*VBAT, the corresponding switch S3A or S3B is closed, and the node CP2A or CP2B is used to supplement the power for the boost capacitor CBST2. The advantage of the above approach is that it can unify the startup process in the first half, which is convenient for the design of the state switching control module.
[0052] In fact, the above power supply scheme and startup process are applicable to all series-parallel switched capacitor converters with a conversion ratio greater than 2:1. The basic method is to integrate the reverse startup of the main charge pump into the establishment of the power supply voltage of the power tube drive circuit. The voltage nodes of the corresponding proportion in the main charge pump are used to provide a suitable power replenishment path for the boost capacitor, thereby simplifying the design of the power supply circuit, saving circuit area, and reducing the number of components used.
[0053] Based on the same technical concept, an embodiment of the present invention further provides an electronic device, which can implement the switched capacitor converter power supply method provided in the above embodiment of the present application. In one embodiment, the electronic device can be a server, or a terminal device or other electronic device.
[0054] like Figure 6 As shown, the electronic device may include:
[0055] At least one processor, and a memory connected to the at least one processor. The specific connection medium between the processor and the memory is not limited in the embodiment of the present invention. Figure 6 The example in this article is that the processor and memory are connected through a bus. Figure 6 The connections between other components are shown in bold lines, which are only for illustration and are not intended to be limiting. The bus can be divided into address bus, data bus, control bus, etc. Figure 6 In the diagram, only one thick line is used, but this does not mean that there is only one bus or only one type of bus. Alternatively, a processor can also be called a controller, and there is no limitation on the name.
[0056] In an embodiment of the present invention, the memory stores instructions that can be executed by at least one processor, and the at least one processor can execute a switched capacitor converter power supply method discussed above by executing the instructions stored in the memory. The processor can implement Figure 6 The functions of each module in the device shown.
[0057] Among them, the processor is the control center of the device, which can use various interfaces and lines to connect the various parts of the entire control device, and monitor the device as a whole by running or executing instructions stored in the memory and calling data stored in the memory, various functions of the device and processing data.
[0058] In an optional design, the processor may include one or more processing units, and the processor may integrate an application processor and a modem processor, wherein the application processor mainly processes an operating system, a user interface, and application programs, and the modem processor mainly processes wireless communications. It is understandable that the modem processor may not be integrated into the processor. In some embodiments, the processor and the memory may be implemented on the same chip, and in some embodiments, they may also be implemented separately on separate chips.
[0059] The processor may be a general-purpose processor, such as a CPU, a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component, and may implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of the present invention. A general-purpose processor may be a microprocessor or any conventional processor, etc. The steps of a switched capacitor converter power supply method disclosed in conjunction with the embodiments of the present invention may be directly embodied as being executed by a hardware processor, or may be executed by a combination of hardware and software modules in the processor.
[0060] As a non-volatile computer-readable storage medium, the memory can be used to store non-volatile software programs, non-volatile computer executable programs and modules. The memory may include at least one type of storage medium, such as flash memory, hard disk, multimedia card, card-type memory, random access memory (Random Access Memory, RAM), static random access memory (Static Random Access Memory, SRAM), programmable read-only memory (Programmable Read Only Memory, PROM), read-only memory (Read Only Memory, ROM), electrically erasable programmable read-only memory (Electrically Erasable Programmable Read-Only Memory, EEPROM), magnetic memory, disk, optical disk, etc. The memory is any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory in the embodiment of the present invention can also be a circuit or any other device that can realize a storage function, used to store program instructions and / or data.
[0061] By designing and programming the processor, the code corresponding to the switched capacitor converter power supply method described in the above embodiment can be fixed into the chip, so that the chip can perform the steps of the switched capacitor converter power supply method in the above embodiment when running. How to design and program the processor is a technology well known to those skilled in the art and will not be described in detail here.
[0062] Based on the same inventive concept, an embodiment of the present invention further provides a storage medium, which stores computer instructions. When the computer instructions are executed on a computer, the computer executes a switched capacitor converter power supply method discussed above.
[0063] In some optional embodiments, the present application also provides various aspects of a switching capacitor converter power supply method, which can also be implemented in the form of a program product, which includes a program code. When the program product is run on an apparatus, the program code is used to enable the control device to execute the steps of a switching capacitor converter power supply method described above in this specification according to various exemplary embodiments of the present application.
[0064] It should be noted that, although several units or subunits of the device are mentioned in the above detailed description, this division is merely exemplary and not mandatory. In fact, according to the embodiments of the present application, the features and functions of two or more units described above can be embodied in one unit. Conversely, the features and functions of a unit described above can be further divided into multiple units to be embodied. In addition, although the operation of the method of the present application is described in a specific order in the accompanying drawings, this does not require or imply that these operations must be performed in this specific order, or that all the operations shown must be performed to achieve the desired result. Additionally or alternatively, some steps can be omitted, multiple steps can be combined into one step for execution, and / or one step can be decomposed into multiple steps for execution.
[0065] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.
[0066] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a server, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the process in the flowchart. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0067] Program code for performing the operations of the present application may be written using any combination of one or more programming languages, including object-oriented programming languages such as Java, C++, etc., and conventional procedural programming languages such as "C" or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, as a stand-alone software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server.
[0068] Where a remote computing device is involved, the remote computing device may be connected to the user computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computing device (e.g., via the Internet using an Internet service provider).
[0069] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.
[0070] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.
[0071] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.
Claims
1. A switched capacitor converter power supply method, characterized in that: A series-parallel switched capacitor converter for N:1; the switched capacitor converter power supply method comprising: The power supply end VBAT is powered on; Turn on the power tube between the lower plate of the flying capacitor and the ground to provide the flying capacitor with an initial voltage of 1*VBAT-1*Vd, where Vd is the conduction voltage of the body diode of the power tube; The switched capacitor converter is switched in the highest ratio working mode. At this time, only the power tube between the lower plate of the flying capacitor and the ground and the power tube powered by the flying capacitor can be fully turned on, and all other power tubes are charged by body diodes; in this process, the third boost capacitor CBST2 is temporarily charged through the power terminal PMID, and the first boost capacitor CBST1A and the second boost capacitor CBST1B are charged through the output terminal VBST2 of the switching circuit; when the power terminal PMID voltage reaches 2*VBAT, the switch conversion is suspended; The switched capacitor converter is switched to a switching conversion mode with a required ratio, and a suitable voltage node is selected to supplement the power of the third boost capacitor CBST2.
2. The switched capacitor converter power supply method according to claim 1, characterized in that: The appropriate voltage node needs to provide 2*VBAT that can last for half a cycle or forever.
3. The switched capacitor converter power supply method according to claim 1, characterized in that: The suitable voltage node includes an upper plate node of a flying capacitor or a power terminal PMID.
4. A switched capacitor converter, characterized in that: The switched capacitor converter is an N:1 series-parallel switched capacitor converter, comprising: On the one hand, the power end PMID is connected to the power supply end VBAT via N first power tubes Q1A~Q(N)A and (N-1) first flying capacitors CF1A~CF(N-1)A, each of the first power tubes is alternately connected to the first flying capacitor, and the upper plate node of each first flying capacitor is correspondingly recorded as CP1A~CP(N-1)A, and the lower plate node is correspondingly recorded as CN1A~CN(N-1)A; on the other hand, the power end PMID is connected via N second power tubes Q1B~Q(N)B and (N-1) second flying capacitors CF1B~CF(N-1)B are connected to the power supply terminal VBAT, and each of the second power tubes is alternately connected to the second flying capacitor; the upper plate node of each of the second flying capacitors is correspondingly recorded as CP1B~CP(N-1)B, and the lower plate node is correspondingly recorded as CN1B~CN(N-1)B; the upper plate node of each of the first flying capacitors and the second flying capacitor is correspondingly connected via the third power tube Q(N+1)A~Q(2N-1)A and the fourth power tube Q(N+ 1)B~Q(2N-1)B are connected; the electrical connection points between each corresponding pair of third power tubes Q(N+1)A~Q(2N-1)A and fourth power tubes Q(N+1)B~Q(2N-1)B are sequentially connected to the power supply terminal VBAT; the lower plate node of each first flying capacitor is grounded via the fifth power tube Q(2N)A~Q(3N-2)A; the lower plate node of each second flying capacitor is grounded via the sixth power tube Q(2N)B~Q(3N-2)B; the upper plate node of the first first flying capacitor close to the power terminal PMID side is also connected to the switch circuit via the first boost capacitor CBST1A and the first switch S1A in sequence; the upper plate node of the first second flying capacitor close to the power terminal PMID side is also connected to the switch circuit via the second boost capacitor CBST2B and the second switch S1B in sequence; the power terminal PMID is further connected to the power supply terminal VBAT via the third switch S2 and the third boost capacitor CBST2; the output end of the switch circuit is VBST2; Each of the first switch S1A, the second switch S1B, the third switch S2, the fourth switch S3A and the fifth switch S3B is provided with a body diode; The power supply end VBST1A of the driving circuit of the first power tube Q1A connected to the power tube PMID is connected to the first switch S1A, and the power supply end of the driving circuit of each of the other first power tubes Q2A~Q(N)A is correspondingly connected to the upper plate nodes CP1A~CP(N-1)A; the power supply end VBST1B of the driving circuit of the second power tube Q1B connected to the power tube PMID is connected to the second switch S2B, and the power supply end of the driving circuit of each of the other second power tubes Q2B~Q(N)B is correspondingly connected to the upper plate nodes CP1B~CP(N-1)B; the power supply end of the driving circuit of each of the third power tubes Q(N+1)A~Q(2N-1)A and the fourth power tubes Q(N+1)B~Q(2N-1)B is connected to the output end VBST2; the power supply end of the driving circuit of each of the fifth power tubes Q(2N)A~Q(3N-2)A and the sixth power tubes Q(2N)B~Q(3N-2)B is connected to the reverse power supply end VBAT of the switch capacitor converter.
5. The switched capacitor converter according to claim 4, wherein: The switching circuit includes a fourth switch S3A and a fifth switch S3B connected in parallel; one end of the fourth switch S3A is connected to the node CP(N-1)A, and one end of the fifth switch S3B is connected to the node CP(N-1)B; the other ends of the fourth switch S3A and the fifth switch S3B are output ends VBST2, which are respectively connected to the first switch S1A and the second switch S1B.
6. An electronic device, characterized in that: include: at least one processor; and a memory communicatively coupled to the at least one processor; The memory stores instructions that can be executed by the at least one processor, and the at least one processor executes the method as described in any one of claims 1 to 3 by executing the instructions stored in the memory.
7. A computer-readable storage medium, characterized in that: The computer-readable storage medium is used to store instructions, and when the instructions are executed, the method according to any one of claims 1 to 3 is implemented.
8. A computer program product, characterized in that When the computer program product is called by a computer, the computer executes the method according to any one of claims 1 to 3.