Solar cell and preparation method thereof, photovoltaic module

Abstract

The present application relates to a solar cell and a preparation method thereof, and a photovoltaic module. The solar cell comprises a silicon substrate and a first doped layer, a first tunneling layer, a first doped polysilicon layer, a second tunneling layer, and a second doped polysilicon layer arranged on a first side of the silicon substrate; the silicon substrate comprises a first region and a second region which are alternately distributed; the first doped layer, the first tunneling layer, and the first doped polysilicon layer are located in the first region; the orthographic projection area of ​​the first doped polysilicon layer on the silicon substrate is smaller than the orthographic projection area of ​​the first doped layer on the silicon substrate; the second tunneling layer and the second doped polysilicon layer are both located in the second region; in this way, the area and thickness of the first doped polysilicon layer can be reduced, and parasitic absorption can be effectively reduced. At the same time, the first region can be guaranteed to have a good passivation effect and carrier selection characteristics, thereby effectively improving the conversion efficiency of the solar cell.

Description

Technical Field

[0001] The present application relates to the field of photovoltaic technology, and in particular to solar cells and methods for preparing the same, and photovoltaic modules. Background Art

[0002] Solar cells, also known as photovoltaic cells, are semiconductor devices that convert sunlight directly into electrical energy. As they are green and environmentally friendly products that do not cause environmental pollution, and solar energy is a renewable resource, solar cells are a new type of battery with broad development prospects.

[0003] The electrode of the interdigitated back contact (IBC) battery is located on the back of the battery, so it can reduce the shading of the light-receiving surface of the battery, thereby improving the conversion efficiency of the battery, and gradually become the main research and development direction of industrial high-efficiency batteries. The passivation contact structure of the TOPCon (Tunnel Oxide passivated contact) battery, which consists of a tunnel oxide layer and a doped polysilicon layer, can effectively reduce the recombination rate between the silicon wafer surface and the metal contact. The TBC battery, which combines TOPCon battery and IBC battery technology, has a high efficiency and has gradually become a research hotspot.

[0004] In the related art, although the doped polysilicon layer in the TBC battery provides a good passivation effect, the parasitic absorption of the doped polysilicon layer is also relatively serious, especially the parasitic absorption of the boron-doped polysilicon layer is particularly serious, which seriously affects the improvement of the conversion efficiency of the TBC battery. Summary of the invention

[0005] Based on this, the present application provides a solar cell and a preparation method thereof, and a photovoltaic module, which can reduce the parasitic absorption of the solar cell and improve the conversion efficiency of the solar cell.

[0006] An embodiment of the first aspect of the present application provides a solar cell, comprising:

[0007] A silicon substrate, comprising first regions and second regions alternately distributed;

[0008] A first doped layer, a first tunneling layer, and a first doped polysilicon layer are located in the first region, arranged on the first side of the silicon substrate and stacked in sequence in a direction away from the silicon substrate; the doping type of the first doped layer is the same as the doping type of the first doped polysilicon layer; and the orthographic projection area of ​​the first doped polysilicon layer on the silicon substrate is smaller than the orthographic projection area of ​​the first doped layer on the silicon substrate;

[0009] A second tunneling layer and a second doped polysilicon layer are located in the second region, arranged on the first side of the silicon substrate and sequentially stacked in a direction away from the silicon substrate, wherein the doping type of the second doped polysilicon layer is opposite to that of the first doped polysilicon layer.

[0010] In one of the embodiments, the first region includes a metal region and a non-metal region, the first doped layer covers the metal region and the non-metal region; the first tunneling layer is located in the metal region, and the first doped polysilicon layer is located in the metal region.

[0011] In one embodiment, the silicon substrate further includes a first surface located on the first side, the first doped layer is disposed in the silicon substrate, and the first doped layer is in contact with the first surface; the first doped layer has a first doping depth along the first direction;

[0012] and / or, the doping concentration of the first doped layer is less than the doping concentration of the first doped polysilicon layer;

[0013] And / or, the doping concentration of the first doping layer is 3E18-5E18cm -3 The doping concentration of the first doped polysilicon layer is 3.5E19-5.5E19cm -3 ;

[0014] and / or, the first doping depth is 0.1 to 0.4 um;

[0015] And / or, the sheet resistance of the first doped layer is 450Ω-600Ω.

[0016] In one of the embodiments, the second region includes a first groove recessed from the first surface into the silicon substrate; the first groove has a first sidewall adjacent to the first region; the second tunneling layer and the second doped polysilicon layer are arranged in the first groove; a first end surface of the second tunneling layer close to the first sidewall is spaced from the first sidewall, and a second end surface of the second doped polysilicon layer close to the first sidewall is spaced from the first sidewall to form an isolation groove.

[0017] In one of the embodiments, the first groove has a first depth along the first direction, and the first depth is greater than the first doping depth.

[0018] In one embodiment, the first depth of the first groove is greater than or equal to the sum of the first doping depth of the first doping layer, the thickness of the second tunneling layer and the thickness of the second doped polysilicon layer;

[0019] And / or, the first depth is 1-2 um.

[0020] An embodiment of the second aspect of the present application provides a method for preparing a solar cell, comprising:

[0021] Providing a silicon substrate, wherein the silicon substrate includes first regions and second regions alternately distributed;

[0022] forming a first doping layer located in the first region on the first side of the silicon substrate;

[0023] A first tunneling layer and a first doped polysilicon layer are sequentially formed on a side of the first doped layer away from the silicon substrate; a second tunneling layer and a second doped polysilicon layer located in the second region are formed on the first side of the silicon substrate; the doping type of the first doped polysilicon layer is the same as the doping type of the first doped layer, and the orthographic projection area of ​​the first doped polysilicon layer on the silicon substrate is smaller than the orthographic projection area of ​​the first doped layer on the silicon substrate; the second doped polysilicon layer is located on a side of the second tunneling layer away from the silicon substrate, and the doping type of the second doped polysilicon layer is opposite to the doping type of the first doped polysilicon layer.

[0024] In one embodiment, the silicon substrate includes a first surface located on the first side;

[0025] The step of forming a first doping layer located in the first region on the first side of the silicon substrate comprises:

[0026] diffusing a first doping element from a first surface of the silicon substrate into the silicon substrate to form a first doping material layer and a silicate glass layer;

[0027] The silicate glass layer and the first doping material layer located in the second region are removed to obtain a first groove located in the second region and recessed from the first surface into the silicon substrate, and a first doping layer located in the first region and having a first doping depth along a first direction, wherein a first depth of the first groove along the first direction is greater than the first doping depth.

[0028] In one embodiment, the step of removing the silicate glass layer and the first doping material layer located in the second region comprises:

[0029] removing the silicate glass layer located in the second region by using a first laser;

[0030] Removing the first doping material layer located in the second region by wet method to obtain a first groove located in the second region and recessed from the first surface into the silicon substrate;

[0031] The silicate glass layer located in the first region is removed by a wet method to obtain a first doping layer located in the first region and having a first doping depth along a first direction, wherein the first doping depth is less than a first depth of the first groove along the first direction.

[0032] In one embodiment, the first region includes a metal region and a non-metal region; the first groove has a first sidewall adjacent to the first region;

[0033] The steps of sequentially forming a first tunneling layer and a first doped polysilicon layer on a side of the first doped layer away from the silicon substrate; and forming a second tunneling layer and a second doped polysilicon layer located in the second region on the first side of the silicon substrate include:

[0034] A tunneling film layer, an intrinsic amorphous silicon film layer and a mask layer are sequentially formed on a side of the first doped layer away from the silicon substrate, wherein the tunneling film layer covers the first doped layer and the first groove, the intrinsic amorphous silicon layer covers the tunneling film layer, and the mask layer covers the intrinsic amorphous silicon layer;

[0035] forming a second groove on the mask layer, wherein the second groove penetrates the mask layer along the first direction; an orthographic projection of the second groove on the silicon substrate partially overlaps with the non-metallic region and partially overlaps with the second region;

[0036] The intrinsic amorphous silicon film layer and the tunneling film layer exposed by the second groove are removed, and the mask layer is removed, so as to divide the tunneling film layer into a first tunneling layer located in the metal region and a second tunneling layer located in the first groove, and divide the intrinsic amorphous silicon film layer into a first sub-portion located in the metal region and a second sub-portion located in the first groove; a first end surface of the second tunneling layer close to the first sidewall is spaced from the first sidewall, and a third end surface of the second sub-portion close to the first sidewall is spaced from the first sidewall, so as to form an isolation groove;

[0037] A first doping element is diffused into the first sub-portion and a second doping element is diffused into the second sub-portion respectively, and annealing treatment is performed to obtain a first doped polysilicon layer and a second doped polysilicon layer.

[0038] In one embodiment, the silicon substrate includes a second surface disposed opposite to the first surface;

[0039] The step of removing the intrinsic amorphous silicon film layer and the tunneling film layer exposed by the second groove and removing the mask layer comprises:

[0040] Removing the intrinsic amorphous silicon film layer exposed by the second groove by a wet method, and forming a suede structure on the second surface;

[0041] The tunneling film layer exposed by the second groove is removed by a wet method, and the mask layer is removed to divide the tunneling film layer into a first tunneling layer located in the metal area and a second tunneling layer located in the first groove, and the intrinsic amorphous silicon film layer is divided into a first sub-portion located in the metal area and a second sub-portion located in the first groove, a first end surface of the second tunneling layer close to the first side wall has a spacing with the first side wall, and a third end surface of the second sub-portion close to the first side wall has a spacing with the first side wall to form an isolation groove.

[0042] In one embodiment, the step of respectively diffusing the first doping element into the first sub-portion and diffusing the second doping element into the second sub-wall, and performing annealing to obtain the first doped polysilicon layer and the second doped polysilicon layer includes:

[0043] forming a first slurry layer containing the first doping element on a side of the first sub-section away from the silicon substrate, and forming a second slurry layer containing the second doping element on a side of the second sub-section away from the silicon substrate;

[0044] Annealing the first slurry layer and the second slurry layer so that the first doping element in the first slurry layer diffuses into the first sub-portion to obtain the first doped polysilicon layer, and the second doping element in the second slurry layer diffuses into the second sub-portion to obtain the second doped polysilicon layer;

[0045] The first slurry layer and the second slurry layer are removed.

[0046] An embodiment of the third aspect of the present application provides a photovoltaic assembly, comprising the solar cell described in any of the above embodiments.

[0047] The solar cell provided by the embodiment of the present application has a silicon substrate comprising a first region and a second region that are alternately distributed. The first doped layer, the first tunneling layer and the first doped polysilicon layer that are sequentially stacked away from the silicon substrate are arranged on the first side of the silicon substrate and located in the first region, and the second tunneling layer and the second doped polysilicon layer that are sequentially stacked away from the silicon substrate are arranged on the first side of the silicon substrate and located in the second region, so that the positive projection area of ​​the first doped polysilicon layer on the silicon substrate is smaller than the positive projection area of ​​the first doped layer on the silicon substrate; in this way, compared with the solar cell in the related art, it is equivalent to replacing the doped polysilicon layer located in the first region in the related art with the first doped layer and the first doped polysilicon layer located in the first region, reducing the area and thickness of the first doped polysilicon layer located in the first region, thereby effectively reducing parasitic absorption. At the same time, it can ensure that the first region has a good passivation effect and carrier selection characteristics, thereby effectively improving the conversion efficiency of the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] Figure 1 A schematic diagram of the structure of a solar cell provided in some embodiments of the present application.

[0049] Figure 2 Schematic diagram of the structure of solar cells provided in other embodiments of the present application.

[0050] Figure 3 A flow chart of a method for preparing a solar cell provided in some embodiments of the present application.

[0051] Figure 4 Another flow chart of a method for preparing a solar cell provided in some embodiments of the present application.

[0052] Figure 5 Another flow chart of a method for preparing a solar cell provided in some embodiments of the present application.

[0053] Figure 6 A process flow chart of a method for preparing a solar cell provided in some embodiments of the present application.

[0054] Description of reference numerals:

[0055] 10. Solar cell; 11. Silicon substrate; 11a. First region; 11a1. Metal region; 11a2. Non-metal region; 11b. Second region; 111. First side; 111a. First surface; 112. Second side; 112a. Second surface; 113. First groove; 113a. First sidewall; 121. First doped layer; 122. First tunneling layer; 123. First doped polysilicon layer; 131. Second tunneling layer; 131a. First end face; 132. Second doped polysilicon layer; 132a. Second end face; 14. Isolation groove; 151. First passivation layer; 152. First anti-reflection layer; 153. Second passivation layer; 154. Second anti-reflection layer; 161. First electrode; 162. Second electrode;

[0056] 17, first doping material layer; 17a, silicate glass layer; 18, tunneling film layer; 19, intrinsic amorphous silicon film layer; 19a, first sub-portion; 19b, second sub-portion; 19b1, third end surface; 20, mask layer; 21, second groove;

[0057] X, first direction. DETAILED DESCRIPTION

[0058] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.

[0059] In the description of the present application, it should be understood that if the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. appear, the orientation or position relationship indicated by these terms is based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0060] In addition, if the terms "first" or "second" appear, these terms are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, if the term "plurality" appears, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0061] In this application, unless otherwise clearly specified and limited, if the terms "installed", "connected", "connected", "fixed" and the like appear, these terms should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integrated connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0062] In the present application, unless otherwise clearly specified and limited, if there is a description that a first feature is "above" or "below" a second feature, etc., or similar descriptions appear, it may mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Moreover, the first feature being "above", "above" and "above" the second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. The first feature being "below", "below" and "below" the second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0063] It should be noted that if an element is referred to as being "fixed to" or "disposed on" another element, it may be directly on the other element or there may be a central element. If an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. If any, the terms "vertical", "horizontal", "upper", "lower", "left", "right" and similar expressions used in this application are for illustrative purposes only and do not represent the only implementation method.

[0064] First, see Figure 1 and Figure 2 The embodiment of the present application provides a solar cell 10, comprising a silicon substrate 11, a first doped layer 121, a first tunneling layer 122, a first doped polysilicon layer 123, a second tunneling layer 131 and a second doped polysilicon layer 132; the silicon substrate 11 comprises a first region 11a and a second region 11b which are alternately distributed; the first doped layer 121, the first tunneling layer 122 and the first doped polysilicon layer 123 are arranged on a first side 111 of the silicon substrate 11 and are stacked in sequence in a direction away from the silicon substrate 11, and the first doped layer 121, the first tunneling layer 122 and the first doped polysilicon layer 123 are located in the first region 11a and the second region 11b; 1a; the doping type of the first doped layer 121 is the same as the doping type of the first doped polysilicon layer 123; the orthographic projection area of ​​the first doped polysilicon layer 123 on the silicon substrate 11 is smaller than the orthographic projection area of ​​the first doped layer 121 on the silicon substrate 11; the second tunneling layer 131 and the second doped polysilicon layer 132 are both arranged on the first side 111 of the silicon substrate 11 and are stacked in sequence in a direction away from the silicon substrate 11, and the second tunneling layer 131 and the second doped polysilicon layer 132 are both located in the second region 11b; the doping type of the second doped polysilicon layer 132 is opposite to the doping type of the first doped polysilicon layer 123.

[0065] The solar cell 10 provided in the embodiment of the present application has a silicon substrate 11 comprising a first region 11a and a second region 11b that are alternately distributed, wherein a first doped layer 121, a first tunneling layer 122, and a first doped polysilicon layer 123 that are sequentially stacked away from the silicon substrate 11 are arranged on a first side 111 of the silicon substrate 11 and located in the first region 11a, a second tunneling layer 131 and a second doped polysilicon layer 132 that are sequentially stacked away from the silicon substrate 11 are arranged on the first side 111 of the silicon substrate 11 and located in the second region 11b, and an isolation trench 14 is arranged at a position where the second region 11b is adjacent to the first region 11a, so that the first doped polysilicon layer 123 is disposed on the first side 111 of the silicon substrate 11 and located in the second region 11b. The orthographic projection area of ​​the silicon layer 123 on the silicon substrate 11 is smaller than the orthographic projection area of ​​the first doped layer 121 on the silicon substrate 11; thus, compared with the solar cell 10 in the related art, it is equivalent to replacing the doped polysilicon layer located in the first area 11a in the related art with the first doped layer 121 and the first doped polysilicon layer 123 located in the first area 11a, thereby reducing the area and thickness of the first doped polysilicon layer 123 located in the first area 11a, thereby effectively reducing parasitic absorption, and at the same time, ensuring that the first area 11a has good passivation effect and carrier selection characteristics, thereby effectively improving the conversion efficiency of the solar cell 10.

[0066] It should be noted that the first surface 111a can be the backlight surface of the solar cell 10; the silicon substrate 11 can be a P-type silicon wafer or an N-type silicon wafer; the first doped polysilicon layer 123 can be a P-type doped polysilicon layer, and the second doped polysilicon layer 132 can be an N-type doped polysilicon layer; of course, the first doped polysilicon layer 123 can also be an N-type doped polysilicon layer, and the second doped polysilicon layer 132 can also be a P-type doped polysilicon layer. Preferably, the first doped polysilicon layer 123 can be a P-type doped polysilicon layer, and the second doped polysilicon layer 132 can be an N-type doped polysilicon layer.

[0067] In one embodiment, see Figure 1 The first region 11a includes a metal region 11a1 and a non-metal region 11a2, and a first doped layer 121 covers the metal region 11a1 and the non-metal region 11a2; a first tunneling layer 122 is located in the metal region 11a1, and a first doped polysilicon layer 123 is located in the metal region 11a1.

[0068] In this way, the metal recombination of the metal region 11 a 1 of the first area 11 a can be effectively reduced, thereby improving the conversion efficiency of the solar cell 10 .

[0069] In one embodiment, see Figure 1 The silicon substrate 11 further includes a first surface 111a located at the first side 111, a first doping layer 121 is disposed in the silicon substrate 11, and the first doping layer 121 is connected to the first surface 111a; the first doping layer 121 has a first doping depth along the first direction X.

[0070] In this way, the manufacturing of the first doping layer 121 can be facilitated, and at the same time, the passivation effect of the first surface 111 a located in the first region 11 a can be ensured, and the recombination of the first region 11 a can be reduced, which is beneficial to improving the conversion efficiency of the solar cell 10 .

[0071] In one embodiment, the doping concentration of the first doped layer 121 is less than the doping concentration of the first doped polysilicon layer 123 .

[0072] That is to say, the first doped layer 121 is formed by lightly doping the silicon substrate 11 from the first surface 111a. In this way, the first doped layer 121 can have a higher square resistance, thereby ensuring the passivation effect of the first surface 111a located in the first region 11a and reducing the recombination of the first region 11a, which is beneficial to improving the conversion efficiency of the solar cell 10.

[0073] In one embodiment, the doping concentration of the first doping layer 121 is 3E18-5E18cm -3 The doping concentration of the first doped polysilicon layer 123 is 3.5E19-5.5E19cm -3 .

[0074] In this way, by setting the doping concentration of the first doping layer 121 within the above-mentioned reasonable range and the doping concentration of the first doped polysilicon layer 123 within the above-mentioned reasonable range, it can be ensured that the first region 11a has good passivation effect and carrier selection characteristics, thereby effectively improving the conversion efficiency of the solar cell 10.

[0075] In one embodiment, see Figure 1 , the first doping depth is 0.1-0.4 um. For example, the first doping depth may be 0.1 um, 0.15 um, 0.2 um, 0.25 um, 0.3 um, 0.35 um, 0.4 um or any value in the range of 0.1-0.4 um.

[0076] In this way, by setting the first doping depth within the above-mentioned reasonable range, the doping concentration range of the first doping layer 121 can be guaranteed, so that the first doping layer 121 has a higher square resistance, thereby ensuring the passivation effect of the first surface 111a located in the first region 11a and reducing the recombination of the first region 11a, which is beneficial to improving the conversion efficiency of the solar cell 10.

[0077] In one embodiment, the square resistance of the first doped layer 121 is 450Ω-600Ω. For example, the square resistance of the first doped layer 121 may be 450Ω, 480Ω, 500Ω, 520Ω, 550Ω, 580Ω, 600Ω or any value in the range of 450Ω-600Ω.

[0078] In this way, by setting the square resistance of the first doped layer 121 within the above-mentioned reasonable range, the first doped layer 121 can have a higher square resistance, thereby ensuring the passivation effect of the first surface 111a located in the first region 11a and reducing the recombination of the first region 11a, which is beneficial to improving the conversion efficiency of the solar cell 10.

[0079] In one embodiment, see Figure 1 The second region 11b includes a first groove 113 recessed from the first surface 111a into the silicon substrate 11, the first groove 113 has a first sidewall 113a adjacent to the first region 11a, a second tunneling layer 131 and a second doped polysilicon layer 132 are arranged in the first groove 113; a first end surface 131a of the second tunneling layer 131 close to the first sidewall 113a is spaced from the first sidewall 113a, and a second end surface 132a of the second doped polysilicon layer 132 close to the first sidewall 113a is spaced from the first sidewall 113a to form an isolation trench 14.

[0080] In this way, the first doped layer 121 located in the second region 11b can be removed, and the second tunneling layer 131 and the second doped polysilicon layer 132 can be disconnected at the position where the first groove 113 is adjacent to the first region 11a, so as to form an isolation groove 14, so as to separate the second tunneling layer 131 and the second doped polysilicon layer 132 located in the second region 11b from the first doped layer 121, the first tunneling layer 122 and the first doped polysilicon layer 123 located in the first region 11a, thereby reducing the probability of leakage of the solar cell 10, thereby facilitating improving the conversion efficiency of the solar cell 10.

[0081] In one embodiment, the first groove 113 has a first depth along the first direction X, and the first depth is greater than the first doping depth.

[0082] In this way, it can be ensured that the first doping layer 121 located in the second region 11 b is completely removed, thereby avoiding leakage problems and ensuring the conversion efficiency of the solar cell 10 .

[0083] In one embodiment, see Figure 2 The first depth of the first groove 113 is greater than or equal to the sum of the first doping depth of the first doping layer 121 , the thickness of the second tunneling layer 131 , and the thickness of the second doped polysilicon layer 132 .

[0084] In this way, the distance between the side surface of the second doped polysilicon layer 132 close to the first doped layer 121 and the first surface 111a can be greater than or equal to the first doping depth of the first doped layer 121, so that the second tunneling layer 131 and the second doped polysilicon layer 132 located in the second area 11b are not directly connected to the first doped layer 121, the first tunneling layer 122 and the first doped polysilicon layer 123 located in the first area 11a, thereby greatly reducing the probability of leakage of the solar cell 10, which is beneficial to improving the conversion efficiency of the solar cell 10.

[0085] In one embodiment, the first depth is 1-2 um. For example, the first depth can be 1 um, 1.2 um, 1.5 um, 1.8 um, 2 um, or any value in the range of 1-2 um.

[0086] In this way, by setting the first depth of the first groove 113 within the above-mentioned reasonable range, it can be ensured that the second tunneling layer 131 and the second doped polysilicon layer 132 located in the second region 11b are not directly connected to the first doped layer 121, the first tunneling layer 122 and the first doped polysilicon layer 123 located in the first region 11a, thereby greatly reducing the probability of leakage of the solar cell 10, which is beneficial to improving the conversion efficiency of the solar cell 10.

[0087] In one embodiment, see Figure 1 The silicon substrate 11 includes a second side 112 opposite to the first side 111 , and the silicon substrate 11 includes a second surface 112 a located on the second side 112 ; the second surface 112 a is provided with a velvet structure.

[0088] In this way, the reflectivity of the solar cell 10 can be reduced, the light utilization rate of the solar cell 10 can be increased, and thus the conversion efficiency of the solar cell 10 can be improved.

[0089] In one embodiment, see Figure 1 and Figure 2 The solar cell 10 further includes a first passivation layer 151, a first anti-reflection layer 152, a second passivation layer 153 and a second anti-reflection layer 154; the first passivation layer 151 is disposed on a side of the first doped polysilicon layer 123 and the second doped polysilicon layer 132 away from the silicon substrate 11, and the first anti-reflection layer 152 is disposed on a side of the first passivation layer 151 away from the silicon substrate 11; the second passivation layer 153 is disposed on the second surface 112a; and the second anti-reflection layer 154 is disposed on a side of the second passivation layer 153 away from the silicon substrate 11.

[0090] In this way, the passivation effect and the anti-reflection effect of the solar cell 10 can be improved, thereby improving the conversion efficiency of the solar cell 10 .

[0091] In one embodiment, see Figure 1 and Figure 2 The solar cell 10 also includes a first electrode 161 and a second electrode 162 disposed on the first side 111 of the silicon substrate 11; the first electrode 161 is located in the first region 11a and is electrically connected to the first doped polysilicon layer 123; the second electrode 162 is located in the second region 11b and is electrically connected to the second doped polysilicon layer 132.

[0092] Second, see Figure 3 , the present application embodiment provides a method for preparing a solar cell 10, comprising:

[0093] S10, providing a silicon substrate 11, wherein the silicon substrate 11 includes first regions 11a and second regions 11b that are alternately distributed;

[0094] S20, forming a first doping layer 121 located in the first region 11a on the first side 111 of the silicon substrate 11;

[0095] S30, forming a first tunneling layer 122 and a first doped polysilicon layer 123 in sequence on a side of the first doped layer 121 away from the silicon substrate 11; forming a second tunneling layer 131 and a second doped polysilicon layer 132 located in the second region 11b on the first side 111 of the silicon substrate 11; the doping type of the first doped polysilicon layer 123 is the same as the doping type of the first doped layer 121, and the orthographic projection area of ​​the first doped polysilicon layer 123 on the silicon substrate 11 is smaller than the orthographic projection area of ​​the first doped layer 121 on the silicon substrate 11; the second doped polysilicon layer 132 is located on a side of the second tunneling layer 131 away from the silicon substrate 11, and the doping type of the second doped polysilicon layer 132 is opposite to the doping type of the first doped polysilicon layer 123.

[0096] The method for preparing the solar cell 10 provided in the embodiment of the present application comprises forming a first doped layer 121 located in the first region 11a on the first side 111 of the silicon substrate 11, and sequentially forming a first tunneling layer 122 and a first doped polysilicon layer 123 on the side of the first doped layer 121 away from the silicon substrate 11; forming a second tunneling layer 131 located in the second region 11b, a second doped polysilicon layer 132 and an isolation trench 14 on the first side 111 of the silicon substrate 11; and making the orthographic projection area of ​​the first doped polysilicon layer 123 on the silicon substrate 11 smaller than the orthographic projection area of ​​the first doped layer 121 on the silicon substrate 11; The second doped polysilicon layer 132 is located on the side of the second tunneling layer 131 away from the silicon substrate 11. In this way, compared with the solar cell 10 in the related art, it is equivalent to using the first doped layer 121 and the first doped polysilicon layer 123 located in the first area 11a to replace the doped polysilicon layer located in the first area 11a in the related art, reducing the area and thickness of the first doped polysilicon layer 123 located in the first area 11a, thereby effectively reducing parasitic absorption. At the same time, it can ensure that the first area 11a has good passivation effect and carrier selection characteristics, thereby effectively improving the conversion efficiency of the solar cell 10.

[0097] In one embodiment, see Figure 4 and Figure 6 , the silicon substrate 11 includes a first surface 111 a located at a first side 111 ;

[0098] In S20, a first doping layer 121 located in the first region 11a is formed on the first side 111 of the silicon substrate 11, specifically comprising:

[0099] S210, diffusing a first doping element from the first surface 111a of the silicon substrate 11 into the silicon substrate 11 to form a first doping material layer 17 and a silicate glass layer 17a;

[0100] Specifically, the silicon substrate 11 can be placed in a diffusion furnace to diffuse a first doping element from the first surface 111a of the silicon substrate 11 into the silicon substrate 11 to form a first doping material layer 17 , and at the same time form a silicate glass layer 17a on a side of the first doping material layer 17 away from the silicon substrate 11 .

[0101] S220, removing the silicate glass layer 17a and the first doping material layer 17 located in the second region 11b, to obtain a first groove 113 located in the second region 11b and recessed from the first surface 111a into the silicon substrate 11, and a first doping layer 121 located in the first region 11a and having a first doping depth along the first direction X, wherein the first depth of the first groove 113 along the first direction X is greater than the first doping depth.

[0102] In this way, the first doping layer 121 can be prepared by using existing diffusion equipment and processes without introducing new equipment and processes, which is beneficial to reducing the production cost of the solar cell 10. The first doping layer 121 located in the first area 11a and the first groove 113 located in the second area 11b are obtained by removing the silicate glass layer 17a and the first doping material layer 17 located in the second area 11b, so that the first depth of the first groove 113 is greater than the first doping depth of the first doping layer 121. In this way, it can be ensured that the first doping material layer 17 located in the second area 11b is completely removed, thereby avoiding leakage problems and ensuring the conversion efficiency of the solar cell 10.

[0103] In one embodiment, see Figure 6 In S220, the silicate glass layer 17a and the first doping material layer 17 located in the second region 11b are removed, specifically including:

[0104] Removing the silicate glass layer 17a located in the second area 11b by using the first laser;

[0105] Specifically, the spot of the first laser is a square spot, the wavelength of the first laser is 500-600nm, the overlap rate of the spot of the first laser is 75%-85%, the frequency of the first laser can be 450-550kHz, and the power of the first laser is 10-50w.

[0106] The first doping material layer 17 located in the second region 11 b is removed by wet method to obtain a first groove 113 located in the second region 11 b and recessed from the first surface 111 a into the silicon substrate 11 ;

[0107] Specifically, an alkali solution may be used to remove the first doping material layer 17 located in the second region 11b, at a temperature of 50 to 80°C for 200 to 400 seconds. For example, the alkali solution may be a mixture of a potassium hydroxide solution and deionized water, wherein the volume ratio of the potassium hydroxide solution to the deionized water is (1-2):(5-20); and the concentration of potassium hydroxide in the potassium hydroxide solution is 45 to 55 wt%.

[0108] The silicate glass layer 17a located in the first region 11a is removed by wet method to obtain a first doping layer 121 located in the first region 11a and having a first doping depth along the first direction X. The first doping depth is less than the first depth of the first groove 113 along the first direction X.

[0109] Specifically, an acid solution may be used to remove the silicate glass layer 17a located in the first region 11a.

[0110] In this way, the first doping material layer 17 located in the second region 11b can be completely removed while the first doping layer 121 located in the first region 11a is obtained, so as to obtain the first groove 113 located in the second region 11b and recessed from the first surface 111a into the silicon substrate 11. By controlling the first depth of the first groove 113, the second tunneling layer 131 and the second doped polysilicon layer 132 located in the second region 11b can be not directly connected to the first doping layer 121, the first tunneling layer 122 and the first doped polysilicon layer 123 located in the first region 11a, thereby greatly reducing the probability of leakage of the solar cell 10, which is beneficial to improving the conversion efficiency of the solar cell 10.

[0111] In one embodiment, see Figure 5 and Figure 6 , the first region 11a includes a metal region 11a1 and a non-metal region 11a2; the first groove 113 has a first sidewall 113a adjacent to the first region 11a;

[0112] In S30, a first tunneling layer 122 and a first doped polysilicon layer 123 are sequentially formed on a side of the first doped layer 121 away from the silicon substrate 11; a second tunneling layer 131 and a second doped polysilicon layer 13 are formed on the first side 111 of the silicon substrate 11 and located in the second region 11b, including:

[0113] S310, forming a tunneling film layer 18, an intrinsic amorphous silicon film layer 19 and a mask layer 20 in sequence on a side of the first doped layer 121 away from the silicon substrate 11, wherein the tunneling film layer 18 covers the first doped layer 121 and the first groove 113, the intrinsic amorphous silicon layer covers the tunneling film layer 18, and the mask layer 20 covers the intrinsic amorphous silicon layer;

[0114] Specifically, the thickness of the tunneling film layer 18 can be 1 to 2 nm; the material of the tunneling film layer 18 includes silicon oxide; the thickness of the intrinsic amorphous silicon film layer 19 can be 100 to 250 nm; the thickness of the mask layer 20 can be 30 to 50 nm, and the material of the mask layer 20 can be one of silicon oxide, silicon nitride and silicon oxynitride.

[0115] S320, forming a second groove 21 on the mask layer 20, wherein the second groove 21 penetrates the mask layer 20 along the first direction X; an orthographic projection of the second groove 21 on the silicon substrate 11 partially overlaps with the non-metallic region 11a2 and partially overlaps with the second region 11b;

[0116] Specifically, a second laser can be used to open a second groove 21 on the mask layer 20, and the mask layer 20 can absorb the heat of the laser and reduce the damage of the laser to the silicon substrate 11; wherein, the wavelength of the second laser is 500-600nm; the spot of the second laser is a square spot, and the overlap rate of the spot of the second laser is 70-80%; the frequency of the second laser is 400-600kHz, and the power of the second laser is 10-50w.

[0117] S330, removing the intrinsic amorphous silicon film layer 19 and the tunneling film layer 18 exposed by the second groove 21, and removing the mask layer 20, so as to divide the tunneling film layer 18 into a first tunneling layer 122 located in the metal region 11a1 and a second tunneling layer 131 located in the first groove 113, and divide the intrinsic amorphous silicon film layer 19 into a first sub-portion 19a located in the metal region 11a1 and a second sub-portion 19b located in the first groove 113; so that a first end surface 131a of the second tunneling layer 131 close to the first side wall 113a has a spacing with the first side wall 113a, and a third end surface 19b1 of the second sub-portion 19b close to the first side wall 113a has a spacing with the first side wall 113a, so as to form an isolation groove 14,

[0118] S340 , diffuse the first doping element into the first sub-portion 19 a and diffuse the second doping element into the second sub-portion 19 b , respectively, and perform annealing treatment to obtain the first doped polysilicon layer 123 and the second doped polysilicon layer 132 .

[0119] In this way, the first tunneling layer 122 and the first doped polysilicon layer 123 of the metal region 11a1 located in the first region 11a and the second tunneling layer 131 and the second doped polysilicon layer 132 located in the first groove 113 can be easily obtained, and a gap is provided between the first end face 131a of the second tunneling layer 131 and the first side 111 wall of the first groove 113 adjacent to the first region 11a, and a gap is provided between the second end face 132a of the second doped polysilicon layer 132 and the first side 111 wall of the first groove 113 adjacent to the first region 11a, that is, the second tunneling layer 131 and the second doped polysilicon layer 132 are disconnected at the position where the first groove 113 is adjacent to the first region 11a. The isolation groove 14 is formed. In this way, on the one hand, the area of ​​the first doped polysilicon layer 123 can be reduced, and the parasitic absorption of the first doped polysilicon layer 123 can be reduced. At the same time, the first region 11a can be guaranteed to have a good passivation effect and carrier selectivity, thereby effectively improving the conversion efficiency of the solar cell 10; on the other hand, the second tunneling layer 131 and the second doped polysilicon layer 132 located in the second region 11b can be separated from the first doped layer 121, the first tunneling layer 122 and the first doped polysilicon layer 123 located in the first region 11a, thereby greatly reducing the probability of leakage of the solar cell 10, which is beneficial to improving the conversion efficiency of the solar cell 10.

[0120] In addition, in the present embodiment, by patterning the tunneling film layer 18 and the intrinsic amorphous silicon film layer 19, and diffusing the patterned intrinsic amorphous silicon film layer 19 (that is, diffusing the first doping element into the first sub-portion 19a and diffusing the second doping element into the second sub-portion 19b, and performing annealing), a first tunneling layer 122 and a first doped polysilicon layer 123 located in the metal region 11a1 of the first region 11a, and a second tunneling layer 131 and a second doped polysilicon layer 132 located in the second region 11b are obtained. In this way, the manufacturing process of the first tunneling layer 122, the first doped polysilicon layer 123, the second tunneling layer 131 and the second doped polysilicon layer 132 can be simplified, thereby simplifying the manufacturing process of the solar cell 10, improving the manufacturing efficiency of the solar cell 10, and reducing the manufacturing cost of the solar cell 10.

[0121] In one embodiment, see Figure 6 , the silicon substrate 11 includes a second surface 112a arranged opposite to the first surface 111a;

[0122] In S330, the intrinsic amorphous silicon film layer 19 and the tunneling film layer 18 exposed by the second groove 21 are removed, and the mask layer 20 is removed, which specifically includes:

[0123] The intrinsic amorphous silicon film layer 19 exposed by the second groove 21 is removed by a wet method, and a textured structure is formed on the second surface 112a;

[0124] Specifically, an alkali solution may be used to remove the intrinsic amorphous silicon film layer 19 exposed by the second groove 21, and a velvet structure may be formed on the second surface 112a, and the temperature may be 50-80°C, and the duration may be 120-300s. For example, the alkali solution may be a mixture of potassium hydroxide solution and deionized water, wherein the volume ratio of potassium hydroxide solution to deionized water is (2-8):(10-20); and the concentration of potassium hydroxide in the potassium hydroxide solution is 45-55wt%.

[0125] The tunneling film layer 18 exposed by the second groove 21 is removed by a wet method, and the mask layer 20 is removed, so as to divide the tunneling film layer 18 into a first tunneling layer 122 located in the metal area 11a1 and a second tunneling layer 131 located in the first groove 113, and divide the intrinsic amorphous silicon film layer 19 into a first sub-portion 19a located in the metal area 11a1 and a second sub-portion 19b located in the first groove 113; so that a first end surface 131a of the second tunneling layer 131 close to the first side wall 113a has a spacing with the first side wall 113a, and a third end surface 19b1 of the second sub-portion 19b close to the first side wall 113a has a spacing with the first side wall 113a, so as to form an isolation groove 14.

[0126] Specifically, an acid solution may be used to remove the tunneling film layer 18 exposed by the second groove 21 , and to remove the mask layer 20 .

[0127] In one embodiment, in S340, the first doping element is diffused into the first sub-portion 19a and the second doping element is diffused into the second sub-wall, and annealing is performed to obtain the first doped polysilicon layer 123 and the second doped polysilicon layer 132, including:

[0128] A first slurry layer containing a first doping element is formed on a side of the first sub-portion 19a away from the silicon substrate 11, and a second slurry layer containing a second doping element is formed on a side of the second sub-portion 19b away from the silicon substrate 11;

[0129] Specifically, a laser transfer technique may be used to form a first slurry layer on a side of the first sub-portion 19 a away from the silicon substrate 11 , and a second slurry layer may be formed on a side of the second sub-portion 19 b away from the silicon substrate 11 .

[0130] Annealing the first slurry layer and the second slurry layer so that the first doping element in the first slurry layer diffuses into the first sub-portion 19a to obtain the first doped polysilicon layer 123, and the second doping element in the second slurry layer diffuses into the second sub-portion 19b to obtain the second doped polysilicon layer 132;

[0131] removing the first slurry layer and the second slurry layer;

[0132] Specifically, an acid solution may be used to remove the first slurry layer and the second slurry layer.

[0133] In this way, by forming a first slurry layer containing a first doping element on a side of the first sub-portion 19a away from the silicon substrate 11, and forming a second slurry layer containing a second doping element on a side of the second sub-portion 19b away from the silicon substrate 11, and annealing the first slurry layer and the second slurry layer, it is convenient to diffuse the first doping element into the first sub-portion 19a to obtain a first doped polysilicon layer 123, and at the same time diffuse the second doping element into the second sub-portion 19b to obtain a second doped polysilicon layer 132, which can simplify the manufacturing process of the first doped polysilicon layer 123 and the second doped polysilicon layer 132, thereby simplifying the manufacturing process of the solar cell 10, improving the manufacturing efficiency of the solar cell 10, and reducing the manufacturing cost of the solar cell 10.

[0134] In a third aspect, the embodiments of the present application provide a photovoltaic module, comprising the solar cell 10 in any of the above embodiments, so as to improve the conversion efficiency of the photovoltaic module.

[0135] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0136] The above embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A solar cell, characterized in that: include: A silicon substrate, comprising first regions and second regions alternately distributed; A first doped layer, a first tunneling layer, and a first doped polysilicon layer are located in the first region, arranged on the first side of the silicon substrate and stacked in sequence in a direction away from the silicon substrate; the doping type of the first doped layer is the same as the doping type of the first doped polysilicon layer; and the orthographic projection area of ​​the first doped polysilicon layer on the silicon substrate is smaller than the orthographic projection area of ​​the first doped layer on the silicon substrate; A second tunneling layer and a second doped polysilicon layer are located in the second region, arranged on the first side of the silicon substrate and sequentially stacked in a direction away from the silicon substrate, wherein the doping type of the second doped polysilicon layer is opposite to that of the first doped polysilicon layer.

2. The solar cell according to claim 1, characterized in that The first region includes a metal region and a non-metal region arranged around the metal region, the first doped layer covers the metal region and the non-metal region; the first tunneling layer is located in the metal region, and the first doped polysilicon layer is located in the metal region.

3. The solar cell according to claim 1, characterized in that The silicon substrate further includes a first surface located on the first side, the first doping layer is disposed in the silicon substrate, and the first doping layer is in contact with the first surface; the first doping layer has a first doping depth along the first direction; and / or, the doping concentration of the first doped layer is less than the doping concentration of the first doped polysilicon layer; And / or, the doping concentration of the first doping layer is 3E18-5E18cm -3 The doping concentration of the first doped polysilicon layer is 3.5E19-5.5E19cm -3 ; and / or, the first doping depth is 0.1 to 0.4 um; And / or, the sheet resistance of the first doped layer is 450Ω-600Ω.

4. The solar cell according to claim 3, characterized in that: The second region includes a first groove recessed from the first surface into the silicon substrate; the first groove has a first sidewall adjacent to the first region; the second tunneling layer and the second doped polysilicon layer are arranged in the first groove; there is a distance between the first end surface of the second tunneling layer close to the first sidewall and the first sidewall, and there is a distance between the second end surface of the second doped polysilicon layer close to the first sidewall and the first sidewall to form an isolation groove.

5. The solar cell according to claim 4, characterized in that: The first groove has a first depth along the first direction, and the first depth is greater than the first doping depth.

6. The solar cell according to claim 5, characterized in that: The first depth of the first groove is greater than or equal to the sum of the first doping depth of the first doping layer, the thickness of the second tunneling layer, and the thickness of the second doped polysilicon layer; And / or, the first depth is 1-2 um.

7. A method for preparing a solar cell, characterized in that: include: Providing a silicon substrate, wherein the silicon substrate includes first regions and second regions alternately distributed; forming a first doping layer located in the first region on the first side of the silicon substrate; A first tunneling layer and a first doped polysilicon layer are sequentially formed on a side of the first doped layer away from the silicon substrate; a second tunneling layer and a second doped polysilicon layer located in the second region are formed on the first side of the silicon substrate; the doping type of the first doped polysilicon layer is the same as the doping type of the first doped layer, and the orthographic projection area of ​​the first doped polysilicon layer on the silicon substrate is smaller than the orthographic projection area of ​​the first doped layer on the silicon substrate; the second doped polysilicon layer is located on a side of the second tunneling layer away from the silicon substrate, and the doping type of the second doped polysilicon layer is opposite to the doping type of the first doped polysilicon layer.

8. The method for preparing a solar cell according to claim 7, characterized in that: The silicon substrate includes a first surface located on the first side; The step of forming a first doping layer located in the first region on the first side of the silicon substrate comprises: diffusing a first doping element from a first surface of the silicon substrate into the silicon substrate to form a first doping material layer and a silicate glass layer; The silicate glass layer and the first doping material layer located in the second region are removed to obtain a first groove located in the second region and recessed from the first surface into the silicon substrate, and a first doping layer located in the first region and having a first doping depth along a first direction, wherein a first depth of the first groove along the first direction is greater than the first doping depth.

9. The method for preparing a solar cell according to claim 8, characterized in that: The step of removing the silicate glass layer and the first doping material layer located in the second region comprises: removing the silicate glass layer located in the second region by using a first laser; Removing the first doping material layer located in the second region by wet method to obtain a first groove located in the second region and recessed from the first surface into the silicon substrate; The silicate glass layer located in the first region is removed by a wet method to obtain a first doping layer located in the first region and having a first doping depth along a first direction, wherein the first doping depth is less than a first depth of the first groove along the first direction.

10. The method for preparing a solar cell according to claim 9, characterized in that: The first region includes a metal region and a non-metal region arranged around the metal region; the first groove has a first sidewall adjacent to the first region; The steps of sequentially forming a first tunneling layer and a first doped polysilicon layer on a side of the first doped layer away from the silicon substrate; and forming a second tunneling layer and a second doped polysilicon layer located in the second region on the first side of the silicon substrate include: A tunneling film layer, an intrinsic amorphous silicon film layer and a mask layer are sequentially formed on a side of the first doped layer away from the silicon substrate, wherein the tunneling film layer covers the first doped layer and the first groove, the intrinsic amorphous silicon layer covers the tunneling film layer, and the mask layer covers the intrinsic amorphous silicon layer; forming a second groove on the mask layer, wherein the second groove penetrates the mask layer along the first direction; an orthographic projection of the second groove on the silicon substrate partially overlaps with the non-metallic region and partially overlaps with the second region; The intrinsic amorphous silicon film layer and the tunneling film layer exposed by the second groove are removed, and the mask layer is removed, so as to divide the tunneling film layer into a first tunneling layer located in the metal region and a second tunneling layer located in the first groove, and divide the intrinsic amorphous silicon film layer into a first sub-portion located in the metal region and a second sub-portion located in the first groove; so that a first end surface of the second tunneling layer close to the first sidewall has a spacing with the first sidewall, and a third end surface of the second sub-portion close to the first sidewall has a spacing with the first sidewall, so as to form an isolation groove; A first doping element is diffused into the first sub-portion and a second doping element is diffused into the second sub-portion respectively, and annealing treatment is performed to obtain a first doped polysilicon layer and a second doped polysilicon layer.

11. The method for preparing a solar cell according to claim 10, characterized in that: The silicon substrate comprises a second surface arranged opposite to the first surface; The step of removing the intrinsic amorphous silicon film layer and the tunneling film layer exposed by the second groove and removing the mask layer comprises: Removing the intrinsic amorphous silicon film layer exposed by the second groove by a wet method, and forming a suede structure on the second surface; The tunneling film layer exposed by the second groove is removed by a wet method, and the mask layer is removed to divide the tunneling film layer into a first tunneling layer located in the metal area and a second tunneling layer located in the first groove, and the intrinsic amorphous silicon film layer is divided into a first sub-portion located in the metal area and a second sub-portion located in the first groove, a first end surface of the second tunneling layer close to the first side wall has a spacing with the first side wall, and a third end surface of the second sub-portion close to the first side wall has a spacing with the first side wall to form an isolation groove.

12. The method for preparing a solar cell according to claim 10, characterized in that: The step of respectively diffusing the first doping element into the first sub-portion and diffusing the second doping element into the second sub-wall, and performing annealing to obtain the first doped polysilicon layer and the second doped polysilicon layer comprises: forming a first slurry layer containing the first doping element on a side of the first sub-section away from the silicon substrate, and forming a second slurry layer containing the second doping element on a side of the second sub-section away from the silicon substrate; Annealing the first slurry layer and the second slurry layer so that the first doping element in the first slurry layer diffuses into the first sub-portion to obtain the first doped polysilicon layer, and the second doping element in the second slurry layer diffuses into the second sub-portion to obtain the second doped polysilicon layer; The first slurry layer and the second slurry layer are removed.

13. A photovoltaic module, characterized in that: Comprising the solar cell according to any one of claims 1 to 6.

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