Solar cell and method for manufacturing the same

Abstract

A solar cell and a method for preparing the same. The solar cell includes a silicon substrate having a first surface and a second surface arranged opposite to each other; a first doping structure located on the first surface of the silicon substrate, the first doping structure including a first doping layer in contact with the first surface, a first dielectric layer located on a side surface of the first doping layer away from the silicon substrate, and a second doping layer located on a side surface of the first dielectric layer away from the first doping layer, the doping types of the first doping layer and the second doping layer being the same as the doping type of the silicon substrate; and a first electrode in contact with the second doping layer. The first doping layer of the present invention is directly located on the back side of the silicon substrate, and the dielectric layer is located between the two doping layers, which can stabilize the open circuit voltage and improve the yield; and the dielectric layer is used to effectively block the risk of silver paste piercing the crystalline silicon layer, so that the doping layer on the back side can be appropriately thinned to reduce parasitic absorption loss.

Description

Technical Field

[0001] The present invention relates to the photovoltaic field, and in particular to a solar cell and a preparation method thereof. Background Art

[0002] TOPCon cells have rapidly increased their market share due to their excellent back-side passivation effect and efficient current transmission capability, and have gradually surpassed PERC cells to become the mainstream technology for solar cells. Both the n+ polarity and p+ polarity of the TOPCon structure have excellent passivation and conductivity properties, and are also compatible with traditional industrial production, with broad development prospects.

[0003] The back of the traditional TOPCon cell is a dielectric layer and a doped crystalline silicon layer. If the crystalline silicon layer on the back is too thick, it will affect the absorption of light, but its thickness cannot be excessively thinned, otherwise there will be a risk of the silver grid burning through the crystalline silicon layer and contacting the silicon substrate, so it is difficult to continue to increase the short-circuit current and open-circuit voltage.

[0004] In view of this, it is necessary to provide an improved solar cell and a preparation method thereof to solve the above technical problems. Summary of the invention

[0005] The purpose of the present invention is to provide a novel TOPCon cell and a preparation method thereof, by introducing a dielectric layer into the back structure and by controlling the thickness and doping concentration of the first doping layer and the second doping layer, the crystalline silicon layer can be thinned without increasing the process complexity and cost, thereby ensuring the stability of the back electrical contact and excellent carrier passivation characteristics, thereby improving the short-circuit current and open-circuit voltage of the solar cell.

[0006] In order to achieve one of the above-mentioned invention objects, the present invention adopts the following technical solution:

[0007] A solar cell comprises: a silicon substrate having a first surface and a second surface arranged opposite to each other; a first doping structure located on the first surface of the silicon substrate, the first doping structure comprising a first doping layer in contact with the first surface, a first dielectric layer located on a side surface of the first doping layer away from the silicon substrate, and a second doping layer located on a side surface of the first dielectric layer away from the first doping layer, the doping types of the first doping layer and the second doping layer being the same as the doping type of the silicon substrate; and a first electrode in contact with the second doping layer.

[0008] In one embodiment, the thickness of the first doping layer is less than the thickness of the second doping layer; and / or the thickness of the first doping layer is 5% to 30% of the thickness of the second doping layer; and / or the thickness of the first doping layer is 10nm to 60nm; and / or the thickness of the second doping layer is 50nm to 200nm.

[0009] In one embodiment, the silicon substrate is an N-type silicon wafer, and the first doped layer and the second doped layer are both N-type doped polysilicon layers.

[0010] In one embodiment, the first doped layer and the second doped layer are both phosphorus-doped polysilicon layers; the doping concentration of the second doped layer is 1E19 cm -3 ~1E21cm -3 , and / or the sheet resistance of the second doping layer is 20Ω / sq~100Ω / sq; and / or the doping concentration of the first doping layer is not greater than the doping concentration of the second doping layer.

[0011] In one embodiment, the first dielectric layer is selected from a combination of one or more of a silicon oxide layer, a silicon carbide layer, and a silicon nitride layer, and the thickness of the first dielectric layer is 0.1 nm to 2 nm.

[0012] In one embodiment, the solar cell further includes a first anti-reflection layer located on the surface of the second doped layer away from the silicon substrate, the first anti-reflection layer is selected from a stacked film formed by one or more of silicon nitride, silicon oxynitride, and silicon oxide, and the thickness of the first anti-reflection layer is 60nm to 130nm.

[0013] In one embodiment, the solar cell further comprises a third doping layer located on the second surface side and a second electrode in contact with the third doping layer, wherein the third doping layer has a doping type opposite to that of the silicon substrate.

[0014] In one embodiment, the third doped layer is a diffusion layer formed by diffusion from the second surface into the silicon substrate, the silicon substrate is an N-type silicon substrate, the diffusion layer is a boron diffusion layer, and the doping concentration is 3E18cm -3 ~3E19cm -3 , and / or the sheet resistance of the boron diffusion layer is 100Ω / sq~500Ω / sq.

[0015] In one embodiment, the solar cell further includes a second dielectric layer in contact with the second surface, a fourth doped layer located on a surface of the second dielectric layer away from the silicon substrate, and a second electrode in contact with the fourth doped layer, wherein the fourth doped layer has a doping type opposite to that of the silicon substrate.

[0016] In one embodiment, the fourth doped layer is only located in the gate line region on the second surface side, and the fourth doped layer is a doped polysilicon layer; the silicon substrate is an N-type silicon substrate, and the fourth doped layer is a boron-doped polysilicon layer with a doping concentration of 1E18 cm -3 ~1E20 cm -3 .

[0017] In one embodiment, the solar cell further includes a passivation layer located on the second surface side and a second anti-reflection layer located on the surface of the passivation layer away from the silicon substrate; when the solar cell includes a third doped layer, the passivation layer is in contact with the third doped layer in both the gate line area and the non-gate line area of ​​the second surface; when the solar cell includes a fourth doped layer, the passivation layer is in contact with the fourth doped layer in the gate line area of ​​the second surface, and the passivation layer is in contact with the silicon substrate in the non-gate line area of ​​the second surface.

[0018] A method for preparing a solar cell comprises the following steps: forming a first amorphous silicon / crystalline silicon mixed layer on a first surface of a silicon substrate; forming a first dielectric layer on a side surface of the first amorphous silicon / crystalline silicon mixed layer away from the silicon substrate; forming a second amorphous silicon / crystalline silicon mixed layer on a side surface of the first dielectric layer away from the first amorphous silicon / crystalline silicon mixed layer; diffusing so that the first amorphous silicon / crystalline silicon mixed layer is transformed into a first doped layer and the second amorphous silicon / crystalline silicon mixed layer is transformed into a second doped layer; and forming a first electrode, wherein the first electrode is in contact with the second doped layer.

[0019] In one embodiment, the first amorphous silicon / crystalline silicon mixed layer, the first dielectric layer, and the second amorphous silicon / crystalline silicon mixed layer are formed in the same temperature range of 580°C to 650°C.

[0020] In one embodiment, in the first amorphous silicon / crystalline silicon mixed layer and / or the second amorphous silicon / crystalline silicon mixed layer, the proportion of crystalline silicon is 40% to 50%.

[0021] In one embodiment, the thickness of the first doping layer is less than the thickness of the second doping layer; and / or the thickness of the first doping layer is 5% to 30% of the thickness of the second doping layer; and / or the thickness of the first doping layer is 10nm to 60nm, and / or the thickness of the second doping layer is 50nm to 200nm.

[0022] In one embodiment, phosphorus diffusion is performed on the first amorphous silicon / crystalline silicon mixed layer and the second amorphous silicon / crystalline silicon mixed layer, and the doping concentration of the second doped layer is 1E19 cm -3 ~1E21cm -3 , the square resistance is 20Ω / sq~100Ω / sq.

[0023] In one embodiment, the method for preparing a solar cell further includes the following steps: forming a first anti-reflection layer on a surface of the second doped layer away from the first dielectric layer; forming a first electrode in a gate line region on the first surface side, the first electrode passing through the first anti-reflection layer and contacting the second doped layer.

[0024] In one embodiment, the method for preparing a solar cell further includes the following steps: forming a second doping structure on the second surface of the silicon substrate, forming a second electrode on a side of the second doping structure away from the silicon substrate, and the second electrode is in contact with the second doping structure.

[0025] In one embodiment, forming the second doping structure comprises the following steps: forming a third doping layer by diffusion on the second surface of the silicon substrate, wherein the third doping layer has a doping type opposite to that of the silicon substrate, and the third doping layer is a boron diffusion layer, and the doping concentration of the boron diffusion layer is 3E18cm -3 ~3E19cm -3 , the square resistance is 100Ω / sq~500Ω / sq.

[0026] In one embodiment, the method for preparing a solar cell further comprises the following steps: forming a second doping structure comprises the following steps: forming a second dielectric layer on the second surface; forming a fourth doping layer on a surface of the second dielectric layer away from the silicon substrate; removing the fourth doping layer in the non-gate line area of ​​the second surface; wherein the fourth doping layer is opposite to the doping type of the silicon substrate, the fourth doping layer is a boron-doped polysilicon layer, and the doping concentration of the boron-doped polysilicon layer is 1E18 cm -3 ~1E20 cm -3 .

[0027] In one embodiment, the method for preparing a solar cell also includes the following steps: forming a passivation layer on a side of the second doping structure away from the silicon substrate, the passivation layer is an aluminum oxide layer with a thickness of 2nm to 7nm; forming a second anti-reflection layer on a side of the passivation layer away from the silicon substrate, the second anti-reflection layer is one or more stacked films of silicon nitride, silicon oxynitride, and silicon oxide, and the thickness of the second anti-reflection layer is 60nm to 130nm; forming a second electrode on a side of the second anti-reflection layer away from the silicon substrate, the second electrode passes through the second anti-reflection layer and the passivation layer to contact the second doping structure.

[0028] Compared with the prior art, the beneficial effects of the present invention are as follows: the present invention directly forms a first amorphous silicon / crystalline silicon mixed layer, a dielectric layer, and a first amorphous silicon / crystalline silicon mixed layer on the first surface of the silicon substrate, and then anneals to form a doped layer; the square resistance and ECV can be regulated more flexibly, the open circuit voltage can be stabilized, and the yield can be improved; and the dielectric layer is deposited on the first amorphous silicon / crystalline silicon mixed layer, which is not affected by the substrate and temperature and humidity, and has better uniformity. The dielectric layer is used to effectively block the risk of silver paste piercing the crystalline silicon layer, so that the doped layer on the first surface can be appropriately thinned to reduce parasitic absorption loss. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 A schematic structural diagram of a solar cell according to an embodiment of the present invention;

[0030] Figure 2A schematic structural diagram of a solar cell according to another embodiment of the present invention;

[0031] Figure 3 is a line graph of the ECV curve of the doping layer of the present invention;

[0032] Figure 4 The present invention is a flow chart of the method for preparing a solar cell.

[0033] Among them, 100, solar cell; 1, silicon substrate; 1a-first surface, 1b-second surface, 11, gate line area; 12, non-gate line area; 2, second doping structure; 20-third doping layer, 21, second dielectric layer; 22, fourth doping layer; 3, passivation layer; 4, second anti-reflection layer; 5, second electrode; 6-first doping structure, 61-first doping layer, 62-dielectric layer, 63-second doping layer, 7-first anti-reflection layer, 8-first electrode. DETAILED DESCRIPTION

[0034] The present invention will be described in detail below in conjunction with the specific embodiments shown in the accompanying drawings. However, these embodiments do not limit the present invention, and any structural, methodological, or functional changes made by a person skilled in the art based on these embodiments are all within the scope of protection of the present invention.

[0035] In the various drawings of the present invention, for the convenience of illustration, some sizes of structures or parts are exaggerated relative to other structures or parts, and thus, they are only used to illustrate the basic structure of the subject matter of the present invention.

[0036] Please refer to Figure 1 and Figure 2 1 is a solar cell 100 according to a preferred embodiment of the present invention, which comprises a silicon substrate 1 , a first doping structure 6 located on a surface of the silicon substrate 1 , and a first electrode 8 in contact with the first doping structure 6 .

[0037] In the present invention, the silicon substrate 1 is preferably an N-type silicon wafer with a resistivity of about 0.3Ω·cm-7Ω·cm. The silicon substrate 1 has a first surface 1a and a second surface 1b arranged opposite to each other. One of the first surface 1a and the second surface 1b is a primary light-receiving surface, and the other is a secondary light-receiving surface.

[0038] In one embodiment, the first surface 1a is a secondary light-receiving surface, and the second surface 1b is a primary light-receiving surface. The second surface 1b of the silicon substrate 1 is preferably a pyramid velvet structure, and the size of the pyramid base is 0.5 μm to 3 μm, so as to reduce the reflectivity of the second surface 1b and improve the battery efficiency.

[0039] The first doping structure 6 includes a first doping layer 61, a first dielectric layer 62, and a second doping layer 63 which are sequentially arranged on the first surface 1a. The first doping layer 61 contacts the first surface 1a, the first dielectric layer 62 is located on a side surface of the first doping layer 61 away from the silicon substrate 1, and the second doping layer 63 is located on a side surface of the first dielectric layer 62 away from the first doping layer 61.

[0040] The first doping layer 61 is directly formed on the surface of the silicon substrate 1, and the first dielectric layer 62 is introduced between the first doping layer 61 and the second doping layer 63 to prevent the silver paste from penetrating the crystalline silicon layer, so that the crystalline silicon layer can be thinned and maintain good electrical properties, thereby improving the short-circuit current and open-circuit voltage of the battery.

[0041] Compared with the traditional battery structure of "tunneling layer and doped crystalline silicon layer are sequentially arranged on the surface of silicon substrate", the first doped layer 61 of the present invention is directly in contact with the silicon substrate 1, which can reduce deposition time, reduce the amount of special gas, and reduce costs; and it is more flexible to adjust the square resistance and ECV, stabilize the open circuit voltage, and improve the yield.

[0042] The first dielectric layer 62 is located between the first doped layer 61 and the second doped layer 63. On the one hand, carriers can tunnel and transmit without affecting the transmission function of the first doped structure 6, and can also effectively block the silver paste from piercing inward, thereby reducing the overall thickness of the doped layer, reducing the parasitic absorption of light on the first surface 1a, and improving the battery efficiency. On the other hand, the first dielectric layer 62 is deposited on the first amorphous silicon / crystalline silicon mixed layer, which is not affected by the substrate and temperature and humidity, and has better uniformity.

[0043] In one embodiment of the present invention, the first dielectric layer 62 is selected from a combination of one or more of a silicon oxide layer, a silicon carbide layer, and a silicon nitride layer, and the thickness of the first dielectric layer 62 is 0.1 nm to 2 nm. Specifically, a silicon oxide or silicon carbide layer within the thickness range can be deposited between the first doping layer 61 and the second doping layer 63 by PECVD or LPCVD process to achieve quantum tunneling transmission of carriers and excellent surface passivation effect. This structure ensures that the silver paste is effectively blocked while allowing the carriers to quickly penetrate the potential barrier and achieve high-quality electrical contact on the first surface 1a, effectively improving the open circuit voltage and fill factor of the solar cell 100, and further improving the overall conversion efficiency of the battery.

[0044] The present invention controls the thickness and / or doping concentration of the first doping layer 61 and the second doping layer 63, so that the first doping structure can achieve more efficient electron transmission and carrier selective collection without increasing the process complexity, which helps to obtain lower contact resistance and better first surface 1a passivation effect when the first electrode 8 is subsequently formed. This structure can reduce the parasitic absorption of the first surface 1a, increase the short-circuit current and open-circuit voltage, and thus improve the photoelectric conversion efficiency of the entire solar cell 100.

[0045] In one embodiment of the present invention, the thickness relationship between the first doping layer 61 and the second doping layer 63 satisfies one of the following conditions or any combination of multiple conditions: the thickness of the first doping layer 61 is less than the thickness of the second doping layer 63; or, the thickness of the first doping layer 61 is 5%-30% of the thickness of the second doping layer 63; or, the thickness of the first doping layer 61 is 10nm~60nm, and the thickness of the second doping layer 63 is 50nm~200nm.

[0046] The present invention precisely controls the thickness ratio of the first doping layer 61 and the second doping layer 63, so that the thinner first doping layer 61 can reduce the parasitic absorption of light on the side where the first surface 1a is located, thereby increasing the short-circuit current; at the same time, the thicker second doping layer 63 ensures efficient carrier selective collection and lower metal contact square resistance, thereby obtaining a higher open circuit voltage and a better fill factor in the battery. In addition, this thickness ratio can effectively adjust the electric field distribution and carrier transport characteristics of the first surface 1a without increasing the complexity of the equipment, thereby achieving better carrier collection and passivation; ultimately improving the fill factor and photoelectric conversion efficiency of the battery, and improving the overall photoelectric conversion performance of the solar cell 100.

[0047] In one embodiment of the present invention, the first doping layer 61 and the second doping layer 63 are both phosphorus-doped polysilicon layers; the doping concentration of the second doping layer 63 is 1E19 cm -3 ~1E21cm -3 , and / or the sheet resistance is 20Ω / sq~100Ω / sq; and / or the doping concentration of the first doping layer 61 is not greater than the doping concentration of the second doping layer 63.

[0048] By controlling the phosphorus diffusion process parameters, the second doping layer 63 can achieve a high doping concentration and a suitable square resistance range during the crystallization process, thereby effectively reducing the contact resistance of the first surface 1a and reducing the surface recombination loss. This feature ensures that a stable and efficient electron transport channel is formed on the first surface 1a, which helps to improve the open circuit voltage and fill factor of the solar cell 100, and further improves the overall conversion efficiency of the cell while ensuring the stability of the cell.

[0049] In one embodiment of the present invention, the solar cell 100 also includes a first anti-reflection layer 7 located on the first surface 1a side of the solar cell 100, and the first anti-reflection layer 7 is selected from a stacked film formed by one or more of silicon nitride, silicon oxynitride, and silicon oxide, and the thickness of the first anti-reflection layer 7 is 60nm to 130nm.

[0050] In this embodiment, the first anti-reflection layer 7 can be deposited on the side of the first doping structure 6 away from the silicon substrate 1 by the PECVD process, so that the reflection of the incident light on the first surface 1a is reduced, thereby increasing the effective absorption path of the incident light. The combination of the anti-reflection layer and the aforementioned first doping structure can further increase the short-circuit current of the solar cell 100, and improve the overall photoelectric conversion efficiency of the cell under the premise of maintaining a simplified process and not increasing significant costs.

[0051] The first electrode 8 is located in the gate line region on the first surface 1 a side, and is sintered during the preparation process to pass through the first anti-reflection layer 7 and realize ohmic contact with the second doping layer 63 .

[0052] The solar cell 100 further includes a second doping structure 2 located on the second surface 1 b of the silicon substrate 1 and a second electrode 5 in contact with the second doping structure 2 .

[0053] The second doping structure 2 has a doping type opposite to that of the silicon substrate 1 , forming a PN junction, generating photogenerated carriers under light and separating them to achieve photoelectric conversion.

[0054] In one embodiment, if Figure 1 As shown, the second doping structure 2 is a third doping layer 20 located on the second surface 1b side, and the doping type of the third doping layer 20 is opposite to that of the silicon substrate 1. The third doping layer 20 is a diffusion layer formed by directly diffusing from the second surface 1b of the silicon substrate 1 into the inside of the silicon substrate 1, and forms a PN junction inside the silicon substrate 1, thereby obtaining excellent hole selective conduction characteristics and reducing the surface recombination rate.

[0055] In a specific embodiment, the diffusion layer is a boron diffusion layer, and the doping concentration of the boron diffusion layer is 3E18cm -3 ~3E19cm -3 In the range of 100Ω / sq to 500Ω / sq, preferably in the range of 300Ω / sq to 350Ω / sq.

[0056] In another embodiment, if Figure 2 As shown, the second doping structure 2 includes a second dielectric layer 21 in contact with the second surface 1 b and a fourth doping layer 22 located on a surface of the second dielectric layer 21 away from the silicon substrate 1 .

[0057] In a specific embodiment, the fourth doping layer 22 is a boron-doped polysilicon layer, and the doping concentration of the boron-doped polysilicon layer is 1E18 cm -3 ~1E20 cm -3 The fourth doping layer is only located in the gate line region on the second surface 1b side.

[0058] In a specific embodiment, the second surface 1b of the silicon substrate 1 has a gate line region 11 and a non-gate line region 12 for preparing the second electrode 5. The area of ​​the gate line region 11 is slightly larger than the second electrode 5 to ensure printing accuracy. The fourth doping layer 22 is only located in the gate line region 11, passivates the gate line region 11, and does not affect the light absorption of the non-gate line region 12; further improves the open circuit voltage and short circuit current of the solar cell 100, and achieves higher photoelectric conversion efficiency.

[0059] The solar cell 100 further includes a passivation layer 3 located on the second surface 1b side. The passivation layer 3 is located on the side surface of the second doping structure 2 away from the silicon substrate 1, covers the entire gate line area 11 and the non-gate line area 12, passivates the second surface 1b, and improves the open circuit voltage.

[0060] Specifically, Figure 1 As shown, in the embodiment where the solar cell 100 includes the third doping layer 20, the passivation layer 3 is in contact with the third doping layer 20 in both the gate line area 11 and the non-gate line area 12 of the second surface 1b. Figure 2 As shown, in an embodiment where the solar cell 100 includes a fourth doped layer 22, the passivation layer 3 contacts the fourth doped layer 22 in the gate line area 11 of the second surface 1b, and the passivation layer 3 contacts the silicon substrate 1 in the non-gate line area 12 of the second surface 1b, so as to passivate the entire surface.

[0061] In one embodiment, the passivation layer 3 is an aluminum oxide layer with a thickness of 2nm to 7nm, preferably 3nm to 6nm. The aluminum oxide layer forms a good field passivation effect and a chemical passivation effect on the second doping structure 2 and the silicon substrate covered by the second doping structure 2, reducing the surface recombination rate; and can be formed by the ALD process, and the thickness can be precisely controlled.

[0062] The solar cell 100 further includes a second anti-reflection layer 4 located on the second surface 1 b side, which enhances the transmittance of incident light and reduces the reflection loss of the second surface 1 b , thereby further improving the short-circuit current and open-circuit voltage of the solar cell 100 .

[0063] In one embodiment, the second anti-reflection layer 4 is a laminated film formed by one or more of silicon nitride, silicon oxynitride, and silicon oxide, and the thickness of the second anti-reflection layer 4 is 60 nm to 130 nm.

[0064] In one embodiment, the second anti-reflection layer 4 is located on the surface of the passivation layer 3 away from the silicon substrate 1. The combination of the passivation layer 3 and the second anti-reflection layer 4 enables the formed second doping structure 2 to more efficiently generate and collect photogenerated carriers, thereby significantly improving the overall photoelectric conversion efficiency of the solar cell 100 while maintaining low surface recombination and high light transmittance.

[0065] The second electrode 5 is located in the gate line region 11 of the second surface 1 b , passes through the second anti-reflection layer 4 and the passivation layer 3 and contacts the second doping structure 2 , thereby achieving ohmic contact with low contact resistance.

[0066] The present invention can further improve the separation and collection efficiency of photogenerated carriers of the solar cell 100 by the cooperation between the first doping structure 6 and the second doping structure 2, significantly increase the open circuit voltage and the short circuit current, and thus improve the overall photoelectric conversion efficiency.

[0067] Please refer to Figure 4 As shown, the present invention also provides a method for preparing a solar cell, comprising the following steps:

[0068] A first doping structure 6 is prepared on the first surface 1a of the silicon substrate 1, including: forming a first amorphous silicon / crystalline silicon mixed layer on the first surface 1a of the silicon substrate 1; forming a first dielectric layer 62 on a side of the first amorphous silicon / crystalline silicon mixed layer away from the silicon substrate 1; forming a second amorphous silicon / crystalline silicon mixed layer on a side of the first dielectric layer 62 away from the first amorphous silicon / crystalline silicon mixed layer; and diffusing the first amorphous silicon / crystalline silicon mixed layer to transform into a first doping layer 61 and the second amorphous silicon / crystalline silicon mixed layer to transform into a second doping layer 63;

[0069] A first electrode 8 is formed on a side of the second doping layer 63 away from the silicon substrate, and the first electrode 8 is in contact with the second doping layer 63 .

[0070] In the preparation method, the physical parameters and chemical parameters of the silicon substrate 1 and each film layer are as described above, and the following description is mainly from the perspective of process steps.

[0071] The silicon substrate 1 is an N-type silicon wafer as described above. Preferably, double-sided texturing is performed using a texturing alkali solution, so that the size of the pyramid base on the surface is 0.5 μm to 3 μm, thereby reducing the reflectivity of the surface and improving light absorption.

[0072] In one embodiment of the present invention, the first amorphous silicon / crystalline silicon mixed layer, the first dielectric layer 62, and the second amorphous silicon / crystalline silicon mixed layer are formed in the same temperature range of 580°C to 650°C.

[0073] Preferably, each film layer of the first doping structure 6 is prepared by the same process, and there is no need to replace the deposition equipment, and the subsequent step can use the residual heat of the previous step to save energy. In one embodiment, the LPCVD process is used to form a first amorphous silicon / crystalline silicon mixed layer; a special gas is introduced to form a first dielectric layer 62 on the surface of the first amorphous silicon / crystalline silicon mixed layer; and then a second amorphous silicon / crystalline silicon mixed layer is formed. In this process, the insertion method can be single insertion or double insertion.

[0074] In a specific embodiment of the present invention, LPCVD is used to perform step-by-step deposition on the first surface 1a. The temperature is controlled within the range of 580°C to 650°C, and a first amorphous silicon / crystalline silicon mixed layer is first deposited on the first surface 1a of the silicon substrate 1 to form a lightly doped first doping layer 61; then, a special gas is introduced within the same temperature range to form a first dielectric layer 62 with a thickness of about 0.1nm to 2nm; and then, a second amorphous silicon / crystalline silicon mixed layer is deposited within the same temperature range to form a second doping layer 63. Such basically close temperatures are conducive to stabilizing the crystallization process, making the energy required for the conversion of amorphous silicon into crystalline silicon more concentrated and effective.

[0075] In one embodiment of the present invention, the deposition process of the first amorphous silicon / crystalline silicon mixed layer and the second amorphous silicon / crystalline silicon mixed layer adopts conventional technology, and the temperature range is controlled so that the proportion of crystalline silicon in the first amorphous silicon / crystalline silicon mixed layer and the second amorphous silicon / crystalline silicon mixed layer is 40% to 50%. On the one hand, more energy can be used to effectively activate phosphorus-doped atoms in the subsequent phosphorus diffusion process, rather than being too much used in the phase change process from amorphous silicon to crystalline silicon, thereby obtaining a higher crystallization rate and excellent electrical properties. On the other hand, the crystalline silicon proportion design makes the crystallization rate of the first doped layer 61 formed after phosphorus diffusion high, achieving better structural stability and conductive performance, and cooperating with the subsequent first dielectric layer 62 and the second doped layer 63, improving the electrical contact and carrier selective collection effect of the first surface 1a, improving the filling factor of the battery, and then obtaining a higher filling factor and conversion efficiency in the solar cell 100.

[0076] In one embodiment of the present invention, the first amorphous silicon / crystalline silicon mixed layer and the second amorphous silicon / crystalline silicon mixed layer are controlled to obtain the first doped layer 61 and the second doped layer 63 of corresponding thickness. The thickness of the first doped layer 61 is less than the thickness of the second doped layer 63; and / or, the thickness of the first doped layer 61 is 5%-30% of the thickness of the second doped layer 63; and / or, the thickness of the first doped layer 61 is 10nm-60nm, and the thickness of the second doped layer 63 is 50nm-200nm.

[0077] In this embodiment, the first doping layer 61 is made thinner by precisely controlling the thickness of each layer in the LPCVD process, so as to effectively reduce the parasitic absorption of the incident light by the first surface 1a and increase the short-circuit current. At the same time, by setting the second doping layer 63 to a thicker range (such as 50nm to 200nm), it is ensured that it has a higher doping concentration and better conductivity, thereby effectively improving the open circuit voltage and fill factor on the basis of achieving excellent electrical contact and selective carrier collection on the first surface 1a. This thickness ratio scheme enables the doping structure of the first surface 1a to better balance optical and electrical properties without increasing the complexity of equipment and processes, providing a solid technical guarantee for ultimately obtaining a solar cell 100 with high conversion efficiency.

[0078] The special gases for forming the first dielectric layer 62 include, but are not limited to, oxygen, methane, and ammonia. In one embodiment, oxygen is introduced to form a silicon oxide layer as the first dielectric layer 62 on the surface of the first amorphous silicon / crystalline silicon mixed layer, and the time for introducing oxygen is 20s-50s. In another embodiment, a gas containing methane is introduced to form a silicon oxide layer as the first dielectric layer 62 on the surface of the first amorphous silicon / crystalline silicon mixed layer; the time for introducing the gas containing methane is 20s-50s. Alternatively, a gas containing ammonia is introduced to form a silicon oxide layer as the first dielectric layer 62 on the surface of the first amorphous silicon / crystalline silicon mixed layer; the time for introducing the gas containing ammonia is 20s-50s.

[0079] In a specific embodiment, taking the introduction of oxygen as an example, a first amorphous silicon / crystalline silicon mixed layer is first deposited on the first surface 1a of the silicon substrate 1 by LPCVD within the above temperature range to form a lightly doped first doping layer 21; oxygen is then introduced under the same temperature conditions to form a silicon oxide layer with a thickness of about 0.1nm to 2nm; and then a second amorphous silicon / crystalline silicon mixed layer is deposited under the same temperature conditions to form a second doping layer 23. Such substantially similar temperatures are conducive to stabilizing the crystallization process, making the energy required for the conversion of amorphous silicon into crystalline silicon more concentrated and effective.

[0080] In one embodiment, phosphorus diffusion is performed on the first amorphous silicon / crystalline silicon mixed layer and the second amorphous silicon / crystalline silicon mixed layer. Based on the above structure, even if a conventional phosphorus diffusion process is used, the doping concentration and the crystalline proportion of the phosphorus-doped crystalline silicon layer can be increased, which helps to improve the fill factor. This process condition ensures that the construction of the high-quality first doping structure 6 is completed without adding additional complex equipment, so that the battery has a high short-circuit current and a high open-circuit voltage, and a high-efficiency solar cell 100 is obtained.

[0081] After phosphorus diffusion, the doping concentration of the second doping layer 63 is 1E19 cm -3 ~1E21cm -3 , the square resistance is 20Ω / sq~100Ω / sq. In this embodiment, through precise control, the second doping layer 63 can reach the doping concentration and square resistance range, so as to achieve low contact resistance and highly selective carrier transmission channel when the first electrode 8 is finally formed. This condition, combined with the aforementioned requirements for the proportion of crystalline silicon, thickness ratio and the setting of the first dielectric layer 62, can further ensure that the first doping structure 6 has excellent electrical and optical properties, significantly improve the short-circuit current and open-circuit voltage of the solar cell 100, and take into account the reliability and cost controllability of industrial production, thereby obtaining higher photoelectric conversion efficiency and industrial application value.

[0082] The method for preparing the solar cell further comprises the following steps: forming a second doping structure 2 on the second surface 1 b of the silicon substrate 1 ; forming a second electrode 5 on a side of the second doping structure 2 away from the silicon substrate 1 , the second electrode 5 being in ohmic contact with the second doping structure 2 .

[0083] In one embodiment, forming the second doping structure 2 comprises the following steps: directly diffusing a third doping layer 20 on the second surface 1 b of the silicon substrate 1 , wherein the third doping layer 20 has a doping type opposite to that of the silicon substrate 1 , and the two form a PN junction.

[0084] In one embodiment, the third doping layer 20 is a boron diffusion layer formed by boron diffusion, and the doping concentration of the boron diffusion layer is 3E18 cm -3 ~3E19cm -3 , the square resistance is 100Ω / sq~500Ω / sq, thus realizing the excellent conductivity and low recombination characteristics of the P-type emitter.

[0085] In another embodiment, forming the second doping structure 2 includes the following steps: forming a second dielectric layer 21 on the second surface 1b of the silicon substrate 1; forming a fourth doping layer 22 on the surface of the second dielectric layer 21 on the side away from the silicon substrate 1, and the fourth doping layer 22 has a doping type opposite to that of the silicon substrate 1; removing the fourth doping layer 22 in the non-gate line area 12 on the second surface 1b side, and retaining only the fourth doping layer 22 in the gate line area 11, so as to reduce the recombination rate of the gate line area 11 and increase the open circuit voltage; and ensuring the light absorption of the non-gate line area 12 to increase the short-circuit current.

[0086] In one embodiment, the fourth doping layer 22 is a boron-doped polysilicon layer, and the doping concentration of the boron-doped polysilicon layer is 1E18 cm -3 ~1E20 cm -3 .

[0087] No matter which of the above solutions is adopted, a second doping structure 2 with excellent structure can be obtained.

[0088] In a preferred embodiment, the present invention first forms a second doping structure 2 on the second surface 1b of the silicon substrate 1; then removes the film layer extended from the first surface 1a; and then prepares a first doping structure 6 on the first surface 1a. Since the temperature of boron diffusion is higher than the temperature of phosphorus diffusion, such a design can more accurately control the doping concentration of the first doping structure 6.

[0089] In one embodiment of the present invention, before forming the second electrode 5, the method for preparing a solar cell further comprises the following steps: preparing a passivation layer 3 on the side of the second doping structure 2 away from the silicon substrate 1. Using the ALD process, an aluminum oxide layer is deposited on the second surface 1b with a thickness of 2nm to 7nm.

[0090] In one embodiment of the present invention, before forming the second electrode 5, the method for preparing a solar cell further comprises the following steps: preparing a second anti-reflection layer 4 on the side of the second doping structure 2 away from the silicon substrate 1. Using the PECVD process, the anti-reflection layer is deposited on the second surface 1b side, and the anti-reflection layer can be one or more laminated films of silicon nitride, silicon oxynitride, and silicon oxide, and the thickness of the anti-reflection layer is 60nm to 130nm.

[0091] In one embodiment of the present invention, an aluminum oxide layer with a thickness of about 2nm to 7nm is further deposited as a passivation layer 3 by an ALD process on the side of the second doping structure 2 away from the silicon substrate 1 to obtain excellent surface passivation and electric field induced passivation effects; then a second anti-reflection layer 4 is deposited on the surface of the side of the passivation layer 3 away from the silicon substrate 1 by a PECVD process to enhance the incident light transmittance of the second surface 1b and reduce reflection loss. The synergistic effect of the above passivation layer 3 and the second anti-reflection layer 4 helps to significantly reduce the surface recombination velocity, improve the utilization rate of incident light, and increase the open circuit voltage and short circuit current.

[0092] Specifically, in the embodiment where the third doping layer 20 is formed as the second doping structure 2, the passivation layer 3 is in contact with the third doping layer 20 in both the gate line area 11 and the non-gate line area 12 of the second surface 1b. In the embodiment where the second dielectric layer 21 and the fourth doping layer 22 are formed as the second doping structure 2, the passivation layer 3 is in contact with the fourth doping layer 22 in the gate line area 11 of the second surface 1b, and the passivation layer 3 is in contact with the silicon substrate 1 in the non-gate line area 12 of the second surface 1b, so that the entire surface is passivated.

[0093] In one embodiment of the present invention, before preparing the first electrode 8, the method for preparing a solar cell further includes preparing a first anti-reflection layer 7 on the surface of the second doping layer 63 away from the silicon substrate 1. The anti-reflection layer is deposited on the first surface 1a by a PECVD process. The anti-reflection layer can be one or more laminated films of silicon nitride, silicon oxynitride, and silicon oxide. The thickness of the anti-reflection layer is 60nm to 130nm.

[0094] In this embodiment, after the first doping structure 6 is completed, a first anti-reflection layer 7 within the thickness range is deposited on the first surface 1a by PECVD, so that the first surface 1a exhibits more excellent optical properties while still maintaining compatibility with current industrial production line equipment and process conditions. The presence of the first anti-reflection layer 7 can effectively reduce the reflection loss of the first surface 1a, allowing more incident light to be reflected and absorbed multiple times on the first surface 1a, thereby significantly improving the short-circuit current of the solar cell 100.

[0095] The second electrode 5 and the first electrode 8 can be formed by, but not limited to, screen printing and sintering processes. Post-processing can also be performed by light injection, electrical injection or heat treatment to improve the stability of the solar cell 100.

[0096] In a preferred embodiment, the silicon wafer is firstly subjected to alkali texturing to form a pyramid texture structure to improve optical absorption. Then, any of the above processes is used to prepare the second doping structure 2, and a borosilicate glass layer (BSG layer) is formed on the surface. After removing the film layer around the first surface 1a, the first amorphous silicon / crystalline silicon mixed layer, the first dielectric layer 62 and the second amorphous silicon / crystalline silicon mixed layer are sequentially deposited on the first surface 1a by the LPCVD process at about 580°C to 650°C; phosphorus diffusion is then performed to convert the above amorphous silicon / crystalline silicon mixed layer into a doped layer, and a phosphosilicate glass layer (PSG layer) is formed on the surface. Then, the BSG layer and the PSG layer are washed off, and a passivation layer 3 and a second anti-reflection layer 4 are formed on the second surface 1b; and a first anti-reflection layer 7 is formed on the first surface 1a. Finally, the second electrode 5 and the first electrode 8 are formed by screen printing and sintering processes. This method does not require the addition of additional expensive equipment, and can significantly improve the short-circuit current, open-circuit voltage and overall photoelectric conversion efficiency of the solar cell 100 by reasonably controlling the layer thickness and doping conditions while maintaining process compatibility.

[0097] The following specific embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit the present invention.

[0098] In the actual mass production line, an N-type silicon wafer with a resistivity of about 1 Ω·cm is selected as the silicon substrate 1, and the size is 156.75 mm×156.75 mm.

[0099] First, the silicon substrate 1 is subjected to double-sided alkali texturing treatment to form a pyramid texturing surface with a tower base size of 1 μm on the surface to enhance the light absorption effect.

[0100] Then, boron is diffused on the second surface 1b of the silicon substrate 1 at a diffusion temperature of 900°C to 1000°C and a doping concentration of about 3E18 cm -3 ~3E19cm -3 , the square resistance is about 300Ω / sq, thereby forming a high-quality second doping structure 2 and a BSG layer on the second surface 1b.

[0101] In the processing of the first surface 1a, the BSG layer on the side of the first surface 1a is firstly removed by using hydrofluoric acid cleaning, and then the first surface 1a is alkaline polished to remove the expanded boron diffusion layer and form a plane, which is conducive to the preparation of subsequent film layers. Through the LPCVD process, a 10nm to 60nm first amorphous silicon / crystalline silicon mixed layer (crystalline silicon accounts for 40% to 50%) is deposited on the first surface 1a in the range of 580℃ to 650℃, oxygen is introduced to form 0.1nm to 2nm silicon oxide, and a 50nm to 200nm second amorphous silicon / crystalline silicon mixed layer is deposited. Thereafter, phosphorus diffusion is performed at about 850℃ to 900℃ to convert the first amorphous silicon / crystalline silicon mixed layer into a thinner first doped layer 61, and the second amorphous silicon / crystalline silicon mixed layer is converted into a thicker second doped layer 63, so that the doping concentration of the second doped layer 63 reaches about 1E20cm -3 , square resistance is about 40~60Ω / sq, ECV curve is as follows Figure 3 This combination effectively improves the electron selective contact characteristics of the first surface 1a, reduces the parasitic absorption of the first surface 1a and improves the carrier transfer efficiency.

[0102] The PSG layer and the BSG layer are removed by RCA cleaning process to ensure the surface is clean. Then, about 5 nm of aluminum oxide is deposited on the second surface 1b as a passivation layer 3 by ALD, and then about 80 nm of silicon nitride anti-reflection layer is deposited on the second surface 1b and the first surface 1a by PECVD. This combination of anti-reflection layers enables the cell to obtain excellent optical properties and low surface recombination rate on both the first surface 1a and the second surface 1b.

[0103] Finally, screen printing is used to form a silver grid electrode and an aluminum electrode on the second surface 1b and the first surface 1a, respectively, and ohmic contact is formed under high-temperature sintering conditions. The resulting solar cell 100 showed excellent performance indicators in the test, with short-circuit current and open-circuit voltage significantly improved compared with the traditional structure, and the conversion efficiency increased by about 0.3 to 0.5 percentage points. The implementation of this solution in the existing production line does not require additional expensive equipment investment, and high-performance batteries can be obtained stably and repeatedly, taking into account the comprehensive optimization of cost and performance.

[0104] In summary, the present invention directly forms a first amorphous silicon / crystalline silicon mixed layer, a first dielectric layer 62, and a first amorphous silicon / crystalline silicon mixed layer on the first surface 1a of the silicon substrate 1, and then anneals to form a doped layer; the square resistance and ECV are more flexible to adjust, the open circuit voltage can be stabilized, and the yield rate can be improved; and the first dielectric layer 62 is deposited on the first amorphous silicon / crystalline silicon mixed layer, which is not affected by the substrate and temperature and humidity, and has better uniformity. The first dielectric layer 62 is used to effectively block the risk of silver paste piercing the crystalline silicon layer, so that the doped layer of the first surface 1a can be appropriately thinned to reduce parasitic absorption loss.

[0105] The present invention introduces a first dielectric layer 62 between the doped layers on the first surface 1a and precisely controls the thickness, crystalline silicon ratio, doping concentration and square resistance of the first doped layer 61 and the second doped layer 63, thereby improving the carrier selective collection and transmission efficiency of the battery without adding additional equipment and high costs, and significantly reducing the parasitic absorption and recombination loss of the first surface 1a. The overall solution is compatible with existing industrial production line equipment, the process can be easily scaled up, and has good prospects for industrial application.

[0106] It should be understood that although this specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each implementation mode may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

[0107] The series of detailed descriptions listed above are only specific descriptions of feasible implementation methods of the present invention. They are not intended to limit the scope of protection of the present invention. Any equivalent implementation methods or changes that do not deviate from the technical spirit of the present invention should be included in the scope of protection of the present invention.

Claims

1. A solar cell, characterized in that: include: A silicon substrate having a first surface and a second surface disposed opposite to each other; a first doping structure located on the first surface of the silicon substrate, the first doping structure comprising a first doping layer in contact with the first surface, a first dielectric layer located on a side surface of the first doping layer away from the silicon substrate, and a second doping layer located on a side surface of the first dielectric layer away from the first doping layer, wherein the doping types of the first doping layer and the second doping layer are the same as the doping type of the silicon substrate; The first electrode contacts the second doped layer.

2. The solar cell according to claim 1, characterized in that: The thickness of the first doping layer is less than the thickness of the second doping layer; and / or, the thickness of the first doping layer is 5% to 30% of the thickness of the second doping layer; And / or, the thickness of the first doping layer is 10nm to 60nm; And / or, the thickness of the second doping layer is 50 nm to 200 nm.

3. The solar cell according to claim 1, characterized in that: The silicon substrate is an N-type silicon wafer, and the first doping layer and the second doping layer are both N-type doped polysilicon layers.

4. The solar cell according to claim 3, characterized in that: The first doping layer and the second doping layer are both phosphorus-doped polysilicon layers; the doping concentration of the second doping layer is 1E19cm -3 ~1E21cm -3 , and / or the sheet resistance of the second doping layer is 20Ω / sq~100Ω / sq; and / or the doping concentration of the first doping layer is not greater than the doping concentration of the second doping layer.

5. The solar cell according to claim 1, characterized in that: The first dielectric layer is selected from a combination of one or more of a silicon oxide layer, a silicon carbide layer, and a silicon nitride layer, and the thickness of the first dielectric layer is 0.1 nm to 2 nm.

6. The solar cell according to claim 1, characterized in that: The solar cell also includes a first anti-reflection layer located on the surface of the second doped layer away from the silicon substrate. The first anti-reflection layer is selected from a laminated film formed by one or more of silicon nitride, silicon oxynitride, and silicon oxide. The thickness of the first anti-reflection layer is 60nm to 130nm.

7. The solar cell according to any one of claims 1 to 6, characterized in that: The solar cell further comprises a third doping layer located on the second surface side and a second electrode in contact with the third doping layer, wherein the doping type of the third doping layer is opposite to that of the silicon substrate; Alternatively, the solar cell further includes a second dielectric layer in contact with the second surface, a fourth doped layer located on a surface of the second dielectric layer away from the silicon substrate, and a second electrode in contact with the fourth doped layer, wherein the fourth doped layer has a doping type opposite to that of the silicon substrate.

8. The solar cell according to claim 7, characterized in that: The solar cell includes a third doping layer, which is a diffusion layer formed by diffusion from the second surface to the inside of the silicon substrate, the silicon substrate is an N-type silicon substrate, and the diffusion layer is a boron diffusion layer with a doping concentration of 3E18cm -3 ~3E19cm -3 , and / or the sheet resistance of the boron diffusion layer is 100Ω / sq~500Ω / sq; Or, the solar cell includes a fourth doped layer, the fourth doped layer is only located in the gate line region on the second surface side, and the fourth doped layer is a doped polysilicon layer; the silicon substrate is an N-type silicon substrate, and the fourth doped layer is a boron-doped polysilicon layer with a doping concentration of 1E18 cm -3 ~1E20 cm -3 .

9. The solar cell according to claim 7, characterized in that: The solar cell further comprises a passivation layer located on the second surface side, and a second anti-reflection layer located on a surface of the passivation layer away from the silicon substrate; The solar cell comprises a third doped layer, and the passivation layer is in contact with the third doped layer in both the gate line region and the non-gate line region of the second surface; Alternatively, the solar cell includes a fourth doped layer, the passivation layer contacts the fourth doped layer in a gate line region of the second surface, and the passivation layer contacts the silicon substrate in a non-gate line region of the second surface.

10. A method for preparing a solar cell, characterized in that: The steps include: forming a first amorphous silicon / crystalline silicon mixed layer on a first surface of the silicon substrate; Forming a first dielectric layer on a surface of the first amorphous silicon / crystalline silicon mixed layer away from the silicon substrate; forming a second amorphous silicon / crystalline silicon mixed layer on a surface of the first dielectric layer on a side away from the first amorphous silicon / crystalline silicon mixed layer; Diffusion, so that the first amorphous silicon / crystalline silicon mixed layer is transformed into a first doped layer, and the second amorphous silicon / crystalline silicon mixed layer is transformed into a second doped layer; A first electrode is formed, the first electrode being in contact with the second doping layer.

11. The method for preparing a solar cell according to claim 10, characterized in that: The first amorphous silicon / crystalline silicon mixed layer, the first dielectric layer, and the second amorphous silicon / crystalline silicon mixed layer are formed in the same temperature range of 580° C. to 650° C.

12. The method for preparing a solar cell according to claim 10, characterized in that: In the first amorphous silicon / crystalline silicon mixed layer and / or the second amorphous silicon / crystalline silicon mixed layer, the proportion of crystalline silicon is 40% to 50%.

13. The method for preparing a solar cell according to claim 10, characterized in that: The thickness of the first doped layer is less than the thickness of the second doped layer; and / or, the thickness of the first doping layer is 5% to 30% of the thickness of the second doping layer; and / or, the thickness of the first doping layer is 10 nm to 60 nm, And / or, the thickness of the second doping layer is 50 nm to 200 nm.

14. The method for preparing a solar cell according to claim 10, characterized in that: Phosphorus is diffused into the first amorphous silicon / crystalline silicon mixed layer and the second amorphous silicon / crystalline silicon mixed layer. The doping concentration of the second doped layer is 1E19 cm -3 ~1E21cm -3 , the square resistance is 20Ω / sq~100Ω / sq.

15. The method for preparing a solar cell according to claim 10, characterized in that: The following steps are also included: Forming a first anti-reflection layer on a surface of the second doped layer away from the first dielectric layer; A first electrode is formed in the gate line region on the first surface side, and the first electrode passes through the first anti-reflection layer and contacts the second doping layer.

16. The method for preparing a solar cell according to any one of claims 10 to 15, characterized in that: The following steps are also included: forming a second doping structure on the second surface of the silicon substrate, A second electrode is formed on a side of the second doping structure away from the silicon substrate, and the second electrode is in contact with the second doping structure.

17. The method for preparing a solar cell according to claim 16, characterized in that: Forming the second doping structure includes the following steps: diffusing a third doping layer on the second surface of the silicon substrate, wherein the third doping layer has a doping type opposite to that of the silicon substrate, and the third doping layer is a boron diffusion layer, and the doping concentration of the boron diffusion layer is 3E18cm -3 ~3E19cm -3 , square resistance is 100Ω / sq~500Ω / sq; or The second doping structure is formed by forming a second dielectric layer on the second surface; forming a fourth doping layer on the surface of the second dielectric layer away from the silicon substrate; removing the fourth doping layer in the non-gate line area of ​​the second surface; wherein the fourth doping layer is opposite to the doping type of the silicon substrate, the fourth doping layer is a boron doped polysilicon layer, and the doping concentration of the boron doped polysilicon layer is 1E18 cm -3 ~1E20 cm -3 .

18. The method for preparing a solar cell according to claim 16, characterized in that: The following steps are also included: A passivation layer is formed on a side of the second doping structure away from the silicon substrate, wherein the passivation layer is an aluminum oxide layer with a thickness of 2 nm to 7 nm; A second anti-reflection layer is formed on a side of the passivation layer away from the silicon substrate, wherein the second anti-reflection layer is a laminated film of one or more of silicon nitride, silicon oxynitride, and silicon oxide, and the thickness of the second anti-reflection layer is 60 nm to 130 nm; A second electrode is formed on a side of the second anti-reflection layer away from the silicon substrate. The second electrode passes through the second anti-reflection layer and the passivation layer and contacts the second doping structure.

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