Silicon waveguide graphene photodetector chip based on electrode superstructure and preparation method thereof
By setting the electrode superstructure on the drain electrode and source electrode of the graphene photodetector chip, the local electric field intensity is enhanced, and the problem of weak light absorption performance of graphene photodetector is solved, and the photoresponsiveness and integration are improved.
Patent Information
- Application Number
- CN202411966367.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-27
- Publication Date
- 2025-04-04
AI Technical Summary
The light absorption performance of graphene photodetectors is weak, resulting in low light responsiveness. The existing waveguide integrated structure requires a longer coupling length and a larger size, which does not meet the requirements of high-density device integration.
Using a silicon waveguide graphene photodetector chip based on electrode superstructure, a symmetric serrated convex array is arranged on the drain electrode and the source electrode to enhance the local electric field intensity and improve the absorption efficiency of light in the optical waveguide.
It improves the photoresponsiveness and photoelectric conversion efficiency of the detector, reduces the device size, improves the module integration, and gives full play to the advantages of graphene's high-speed, large bandwidth and wide spectrum response.
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Figure CN119767931A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of microwave photon signal processing, and in particular relates to a silicon waveguide graphene photoelectric detector chip based on an electrode superstructure and a preparation method thereof. Background Art
[0002] As a two-dimensional material, graphene has excellent photoelectric properties. Graphene has almost the same photoresponse characteristics in the 300-2500nm frequency band, which covers the commonly used communication band requirements. Graphene also has extremely high carrier mobility and extremely short photogenerated carrier lifetime, which makes graphene have great potential in high-speed photodetection, optical communication and other fields. The device process of graphene is well compatible with the CMOS process, so it can be well integrated with silicon-based integrated circuits without a lot of modification of the original silicon-based integrated circuit process. It can also achieve ultra-wide spectral response, which will greatly improve the photodetection performance of silicon-based integrated circuits.
[0003] The main problem faced by graphene detector chips is that graphene has very weak light absorption performance. The light absorption rate of single-layer graphene is only 2.3%, which seriously limits the light response of vertically incident graphene detectors. The use of waveguide integrated device structure greatly increases the length of light coupling and improves the photoelectric conversion efficiency, but such a device structure requires a long coupling length and a large size, which does not meet the requirements of high-density device integration. In addition, the use of periodic superstructures is a method to improve light absorption efficiency and light response, but existing research is limited to combining periodic superstructures in vertically incident light detectors to improve performance, and still faces the difficulty of poor graphene light response. How to increase the photoelectric conversion efficiency within a unit device length and give full play to the material advantages of graphene's high speed, large bandwidth, and wide spectral response is still a problem that needs to be solved. Summary of the invention
[0004] The purpose of the present invention is to provide a silicon waveguide graphene photodetector chip based on an electrode superstructure and a preparation method thereof, so as to enhance the light response performance per unit length of the device, reduce the size of the waveguide detector and improve the module integration effect.
[0005] In order to achieve the purpose of the present invention, on the one hand, the present invention provides a silicon waveguide graphene photodetector chip based on an electrode superstructure, including: a vertically coupled grating, located above a substrate; a silicon waveguide, located above the substrate and connected to the vertically coupled grating; a graphene film, located above the silicon waveguide; a drain electrode and a source electrode, covering the graphene film and respectively located on both sides of the silicon waveguide; a modulated optical signal is input into the vertically coupled grating, and then input into the graphene film through the silicon waveguide for photoelectric conversion to obtain a microwave signal and output it through the drain electrode, and the source electrode is grounded.
[0006] The drain electrode and the source electrode include an electrode superstructure, specifically, a symmetrical sawtooth protrusion array arranged opposite to each other on the drain electrode and the source electrode.
[0007] The protrusions of the electrode superstructure are in the shape of rectangle, triangle, trapezoid, circle, semicircle, or a combination of the above shapes.
[0008] SOI is used as the material of the substrate, and the thickness of the Si layer of the SOI substrate is 220 nm.
[0009] The silicon waveguide is a SOI ridge waveguide structure.
[0010] A silicon oxide cap layer and an electronic resin BCB film layer are provided between the graphene film and the silicon waveguide.
[0011] The portion of the graphene film not covered by the drain electrode and the source electrode uses a dielectric as a passivation layer.
[0012] On the other hand, the present invention also provides a method for preparing a silicon waveguide graphene photodetector chip based on an electrode superstructure, comprising the following steps:
[0013] Step 1: Prepare an electron beam glue mask pattern of a vertically coupled grating on an SOI substrate by using electron beam exposure and development technology, use the electron beam glue as a mask and use inductively coupled plasma to etch the vertically coupled grating, and then remove the glue and clean it;
[0014] Step 2: Prepare an electron beam glue mask pattern of the silicon waveguide by electron beam exposure and development technology, use the electron beam glue as a mask and use inductively coupled plasma to etch the silicon waveguide, and then remove the glue and clean it;
[0015] Step 3, growing a silicon oxide cap layer and polishing it using a chemical mechanical polishing process;
[0016] Step 4: coating a BCB thin film layer on the surface of the silicon oxide cap layer using a coating process and curing the layer;
[0017] Step 5: transfer the graphene film to the chip surface by using a wet gold transfer process, and then bake it in an oven for a long time after drying;
[0018] Step 6: Prepare a photoresist mask of the graphene pattern by using a planar photolithography development technology, and then use a cyanide solution to corrode and oxidize to complete the graphene patterning;
[0019] Step 7: using a planar photolithography development technology to prepare source and drain electrode patterns, and using an electron beam evaporation and lift-off process to prepare the source and drain electrodes;
[0020] Step 8: Use cyanide solution to corrode the graphene channel, and then grow a layer of dielectric as a graphene passivation layer;
[0021] Step 9: Use planar photolithography and development technology to prepare a photoresist mask for the source electrode and drain electrode patterns, use the photoresist as a mask and use inductively coupled plasma to etch away the dielectric passivation layer to expose the source electrode and the drain electrode, and then peel off the resist to complete the preparation of the silicon waveguide graphene photodetector chip based on the electrode superstructure.
[0022] Compared with the prior art, the significant progress of the present invention lies in: (1) The present invention combines the electrode superstructure with the SOI ridge waveguide structure to further improve the light response of the optical waveguide graphene detector chip, enhance the device performance, and give full play to the advantages of graphene's high speed, large bandwidth, and wide spectral response; (2) The sawtooth electrode superstructure of the present invention enhances the local electric field strength, improves the absorption efficiency of light in the waveguide, and thus improves the detector response; (3) The present invention improves the detection efficiency per unit length of the waveguide graphene photodetector, reduces the required size of the device, and improves the system integration; (4) The present invention integrates the graphite photodetector with the silicon-based device, eliminating the steps such as heterojunction required for traditional InP and other compound photoelectric devices and silicon-based processors, reducing the integration loss and improving the system efficiency.
[0023] In order to more clearly illustrate the functional characteristics and structural parameters of the present invention, further description is given below in conjunction with the accompanying drawings and specific implementation methods. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of this application. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:
[0025] Figure 1 It is a schematic diagram of the SOI substrate material of the present invention;
[0026] Figure 2 is a schematic diagram of preparing a vertically coupled grating of the present invention;
[0027] Figure 3 is a schematic diagram of the preparation of the silicon waveguide of the present invention;
[0028] Figure 4 is a schematic diagram of preparing a silicon oxide capping layer according to the present invention;
[0029] Figure 5 Schematic diagram of the coating and curing BCB film of the present invention;
[0030] Figure 6 is a schematic diagram of graphene transfer and patterning of the present invention;
[0031] Figure 7 It is a schematic diagram of preparing the source-drain electrode of the present invention;
[0032] Figure 8 It is a schematic diagram of the cross-sectional structure of the optical waveguide and electrode superstructure graphene photodetector integrated chip of the present invention;
[0033] Fig. 9 It is a schematic diagram of the top view structure of the optical waveguide and electrode superstructure graphene photodetector integrated chip of the present invention.
[0034] The reference numerals in the figure are: 1-vertically coupled grating, 2-silicon waveguide, 3-graphene film, 4-drain electrode, 5-source electrode, 6-modulated light signal, 7-microwave signal. DETAILED DESCRIPTION
[0035] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments; based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.
[0036] The present invention is a silicon waveguide graphene photodetector chip based on an electrode superstructure, combined with Fig. 9 , including: a vertical coupling grating 1, located above a substrate; a silicon waveguide 2, located above the substrate and connected to the vertical coupling grating 1; a graphene film 3, located above the silicon waveguide 2; a drain electrode 4 and a source electrode 5, covering the graphene film 3 and respectively located on both sides of the silicon waveguide 2; a modulated optical signal 6 is input into the vertical coupling grating 1, and then input into the graphene film 3 through the silicon waveguide 2 for photoelectric conversion, to obtain a microwave signal 7 and output it through the drain electrode 4, and the source electrode 5 is grounded.
[0037] The drain electrode 4 and the source electrode 5 include an electrode superstructure, specifically, a symmetrical sawtooth protrusion array arranged opposite to each other on the drain electrode 4 and the source electrode 5 .
[0038] The protrusions of the electrode superstructure are in the shape of rectangle, triangle, trapezoid, circle, semicircle, or a combination of the above shapes.
[0039] SOI is used as the material of the substrate, and the thickness of the Si layer of the SOI substrate is 220 nm.
[0040] The silicon waveguide 2 is a SOI ridge waveguide structure.
[0041] Furthermore, the silicon waveguide 2 may be provided with an optical processing module, which is used for optical processing such as optical filtering and optical sensing, and may specifically include a microring resonator, a Mach-Zehnder interferometer, and a multi-mode interference coupler.
[0042] A silicon oxide cap layer and an electronic resin BCB film layer are provided between the graphene film 3 and the silicon waveguide 2 .
[0043] The portion of the graphene film 3 not covered by the drain electrode 4 and the source electrode 5 uses a dielectric as a passivation layer.
[0044] The present invention also provides a method for preparing a silicon waveguide graphene photodetector chip based on an electrode superstructure, comprising the following steps:
[0045] Step 1: Combine Figure 1 and Figure 2 , using electron beam exposure and development technology to prepare an electron beam glue mask pattern of a vertically coupled grating on an SOI substrate, using the electron beam glue as a mask and inductively coupled plasma to etch out the vertically coupled grating, and then removing the glue and cleaning;
[0046] Step 2: Combine Figure 3 , using electron beam exposure and development technology to prepare the electron beam glue mask pattern of the silicon waveguide, using the electron beam glue as a mask to etch the silicon waveguide using inductively coupled plasma, and then removing the glue and cleaning;
[0047] Step 3: Combine Figure 4 , growing a silicon oxide cap layer and polishing it using a chemical mechanical polishing process;
[0048] Step 4: Combine Figure 5 , coating a BCB thin film layer on the surface of the silicon oxide cap layer by a coating process and curing the layer;
[0049] Step 5: transfer the graphene film to the chip surface by using a wet gold transfer process, and then bake it in an oven for a long time after drying;
[0050] Step 6: Combine Figure 6 , using planar photolithography and development technology to prepare a photoresist mask for graphene patterns, and then using a cyanide solution to corrode and oxidize to complete the graphene patterning;
[0051] Step 7: Combine Figure 7 , using planar photolithography and development technology to prepare source and drain electrode patterns, and using electron beam evaporation and lift-off processes to prepare source and drain electrodes;
[0052] Step 8: Use cyanide solution to corrode the graphene channel, and then grow a layer of dielectric as a graphene passivation layer;
[0053] Step 9: Prepare a photoresist mask of the source electrode and the drain electrode pattern by using a planar photolithography development technology, and use the photoresist as a mask to etch away the dielectric passivation layer by inductively coupled plasma to expose the source electrode and the drain electrode, and then strip and remove the glue to complete the preparation of the silicon waveguide graphene photodetector chip based on the electrode superstructure. Figure 8 and Fig. 9 .
[0054] Furthermore, the electron beam gel adopts ZEP 520A or AR-P 6200; the gas used for etching the vertical coupling grating and the silicon waveguide is a mixture of chlorine and argon, the etching depth of the vertical coupling grating is 80nm, and the etching depth of the silicon waveguide is 220nm; the thickness of the BCB thin film layer is 2-10 nm; the baking temperature of the oven is 90 degrees Celsius, and the time is greater than 8 hours; the source electrode and the drain electrode can be formed by typical electrode metal materials, such as gold (Au), copper (Cu), platinum (Pt), molybdenum (Mo), palladium (Pd), etc.; the medium of the graphene passivation layer is aluminum oxide or hafnium oxide, with a thickness of 10-20nm; the gas used for etching the medium passivation layer is a mixture of boron trichloride and argon.
[0055] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.
[0056] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.
Claims
1. A silicon waveguide graphene photodetector chip based on an electrode superstructure, characterized in that: include: A vertical coupling grating (1) is located above the substrate; A silicon waveguide (2) is located above the substrate and connected to the vertical coupling grating (1); a graphene film (3) is located above the silicon waveguide (2); a drain electrode (4) and a source electrode (5) are covered above the graphene film (3) and are respectively located on both sides of the silicon waveguide (2); a modulated optical signal is input into the vertical coupling grating (1), and then input into the graphene film (3) through the silicon waveguide (2) for photoelectric conversion, thereby obtaining a microwave signal and outputting it through the drain electrode (4); the source electrode (5) is grounded.
2. The silicon waveguide graphene photodetector chip based on electrode superstructure according to claim 1, characterized in that: The drain electrode (4) and the source electrode (5) comprise an electrode superstructure, specifically an array of symmetrical sawtooth protrusions arranged opposite to each other on the drain electrode (4) and the source electrode (5).
3. The silicon waveguide graphene photodetector chip based on electrode superstructure according to claim 2, characterized in that: The protrusions of the electrode superstructure are in the shape of rectangle, triangle, trapezoid, circle, semicircle, or a combination of the above shapes.
4. The silicon waveguide graphene photodetector chip based on electrode superstructure according to claim 1, characterized in that: SOI is used as the material of the substrate.
5. The silicon waveguide graphene photodetector chip based on electrode superstructure according to claim 1, characterized in that: The silicon waveguide (2) is a SOI ridge waveguide structure.
6. The silicon waveguide graphene photodetector chip based on electrode superstructure according to claim 1, characterized in that: The silicon waveguide (2) is provided with a light processing module, and the light processing module is used for light filtering, light sensing and light processing.
7. The silicon waveguide graphene photodetector chip based on electrode superstructure according to claim 1, characterized in that: A silicon oxide cap layer and an electronic resin BCB film layer are provided between the graphene film (3) and the silicon waveguide (2).
8. The silicon waveguide graphene photodetector chip based on electrode superstructure according to claim 1, characterized in that: The portion of the graphene film (3) not covered by the drain electrode (4) and the source electrode (5) uses a dielectric as a passivation layer.
9. A method for preparing a silicon waveguide graphene photodetector chip based on an electrode superstructure according to any one of claims 1 to 8, characterized in that: The following steps are involved: Step 1: Prepare an electron beam glue mask pattern of a vertically coupled grating on an SOI substrate by using electron beam exposure and development technology, use the electron beam glue as a mask and use inductively coupled plasma to etch the vertically coupled grating, and then remove the glue and clean it; Step 2: Prepare an electron beam glue mask pattern of the silicon waveguide by electron beam exposure and development technology, use the electron beam glue as a mask and use inductively coupled plasma to etch the silicon waveguide, and then remove the glue and clean it; Step 3, growing a silicon oxide cap layer and polishing it using a chemical mechanical polishing process; Step 4: coating a BCB thin film layer on the surface of the silicon oxide cap layer using a coating process and curing the layer; Step 5: transfer the graphene film to the chip surface by using a wet gold transfer process, and then bake it in an oven for a long time after drying; Step 6: Prepare a photoresist mask of the graphene pattern by using a planar photolithography development technology, and then use a cyanide solution to corrode and oxidize to complete the graphene patterning; Step 7: using a planar photolithography development technology to prepare source and drain electrode patterns, and using an electron beam evaporation and lift-off process to prepare the source and drain electrodes; Step 8: Use cyanide solution to corrode the graphene channel, and then grow a layer of dielectric as a graphene passivation layer; Step 9: Use planar photolithography and development technology to prepare a photoresist mask for the source electrode and drain electrode patterns, use the photoresist as a mask and use inductively coupled plasma to etch away the dielectric passivation layer to expose the source electrode and the drain electrode, and then peel off the resist to complete the preparation of the silicon waveguide graphene photodetector chip based on the electrode superstructure.