Non-reference overvoltage / undervoltage protection detection device and method

Abstract

The invention discloses a reference-free overvoltage / undervoltage protection detection device and method. The reference-free overvoltage / undervoltage protection detection device comprises a power supply voltage detection network, a single-input trigger circuit, a feedback circuit and a buffer, the power supply voltage detection network is used for detecting real-time information of chip power supply voltage and transmitting the detected voltage to the single-input trigger circuit; the single-input trigger circuit carries out overvoltage or undervoltage judgment on the power supply voltage of the chip according to the detection voltage and generates an overturning voltage; the feedback circuit adjusts the output coefficient of the power supply voltage detection network according to the flip voltage feedback from the single-input trigger circuit so as to realize the overvoltage or undervoltage protection of the chip power supply voltage. The buffer is used for improving the driving capability of the power supply voltage for overvoltage or undervoltage protection. According to the invention, the single-input trigger circuit is used for detecting the power supply voltage of the chip, so that the chip can be better protected.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor integrated circuits, and in particular, relates to a reference-free over / under voltage protection detection device and method. Background Art

[0002] In applications in the fields of automotive electronics and consumer electronics, there are often high-voltage signals or multiple power signals inside the chip. When overvoltage or undervoltage occurs, the over / undervoltage protection detection device, as the supply source for the functional main module devices, can prevent chip damage, thereby ensuring that the chip works safely and efficiently.

[0003] At present, typical over / under voltage protection detection devices generally use the reference voltage V given by other modules. ref As a stable reference source, the power supply voltage information is detected through the power supply voltage detection network, and the reference voltage V ref The detection result of the power supply voltage detection network is compared with the comparator, and the comparison result is used as a sign of over / under voltage and transmitted to the functional main module of the subsequent stage. However, this method requires a reference source that directly uses the off-chip high voltage as the power supply to provide a reference voltage, which is a problem for many high-voltage applications. Therefore, it cannot be used directly, and it will cost a certain amount of extra power consumption, which is also a burden for low-power devices. Summary of the invention

[0004] In view of the problems existing in the prior art, the present invention provides a reference-free over / under voltage protection detection device and method, which uses a single-input trigger circuit to detect the power supply voltage of the chip, thereby better protecting the chip operation.

[0005] To achieve the above technical objectives, the present invention adopts the following technical solutions: a reference-free over / under voltage protection detection device, comprising: a power supply voltage detection network, a single-input trigger circuit, a feedback circuit and a buffer;

[0006] The power supply voltage detection network is used to detect the real-time information of the chip power supply voltage and transmit the detected voltage to the single-input trigger circuit;

[0007] The single-input trigger circuit determines whether the chip power supply voltage is overvoltage or undervoltage according to the detection voltage, and generates a flip voltage;

[0008] The feedback circuit adjusts the output coefficient of the power supply voltage detection network according to the flip voltage feedback from the single-input trigger circuit to achieve overvoltage or undervoltage protection of the chip power supply voltage;

[0009] The buffer is used to enhance the driving capability of the power supply voltage for overvoltage or undervoltage protection.

[0010] Furthermore, the power supply voltage detection network includes: a first resistor R1, a second resistor R2 and a third resistor R3, one end of the first resistor R1 is connected to the power supply voltage V DD The other end of the first resistor R1 and one end of the second resistor R2 are used together as the output end of the power supply voltage detection network and are connected to the input end of the single-input trigger circuit. The other end of the second resistor R2 is respectively connected to the output end of the feedback circuit and one end of the third resistor R3. The other end of the third resistor R3 is grounded.

[0011] Further, the single-input trigger circuit includes: a first bipolar transistor Q1, a second bipolar transistor Q2, a first PMOS transistor PM1, a second PMOS transistor PM2, a fourth resistor R4, a fifth resistor R5 and a current comparator, wherein the base of the first bipolar transistor Q1 and the base of the second bipolar transistor Q2 are used together as the input end of the single-input trigger circuit; the emitter of the first bipolar transistor Q1 is connected to one end of the fourth resistor R4 and one end of the fifth resistor R5 respectively, the emitter of the second bipolar transistor Q2 is connected to the other end of the fourth resistor R4, and the other end of the fifth resistor R5 is grounded; the collector of the first bipolar transistor Q1, the drain of the first PMOS transistor PM1, and the gate of the first PMOS transistor PM1 are connected to the first input end of the current comparator; the collector of the second bipolar transistor Q2, the drain of the second PMOS transistor PM2, and the gate of the second PMOS transistor PM2 are connected to the second input end of the current comparator; the source of the first PMOS transistor PM1 and the source of the second PMOS transistor PM2 are both connected to the power supply voltage V DD The output terminal of the current comparator is connected to the input terminal of the feedback circuit.

[0012] Further, the current comparator includes: a third PMOS tube PM3, a fourth PMOS tube PM4, a first NMOS tube NM1, a second NMOS tube NM2, a third NMOS tube NM3 and a fourth NMOS tube NM4, the gate of the fourth PMOS tube PM4 serves as a first input terminal of the current comparator, the gate of the third PMOS tube PM3 serves as a second input terminal of the current comparator, and the source of the third PMOS tube PM3 and the source of the fourth PMOS tube PM4 are both connected to the power supply voltage V DDThe drain of the third PMOS tube PM3 is respectively connected to the gate of the first NMOS tube NM1, the drain of the first NMOS tube NM1, the drain of the second NMOS tube NM2, and the gate of the third NMOS tube NM3; the source of the first NMOS tube NM1, the source of the second NMOS tube NM2, the source of the third NMOS tube NM3, and the source of the fourth NMOS tube NM4 are all grounded; the drain of the fourth PMOS tube PM4, the gate of the second NMOS tube NM2, the drain of the third NMOS tube NM3, the gate of the fourth NMOS tube NM4, and the drain of the fourth NMOS tube NM4 serve as the output end of the current comparator.

[0013] Furthermore, the feedback circuit includes: a Schmitt trigger and a feedback switch, the input end of the Schmitt trigger serves as the input end of the feedback circuit, the output end of the Schmitt trigger is respectively connected to the control end of the feedback switch and the input end of the buffer, and the feedback switch is connected to the power supply voltage detection network.

[0014] Furthermore, the feedback switch is a fifth NMOS tube, the gate of the fifth NMOS tube is connected to the output end of the Schmitt trigger, the drain of the fifth NMOS tube is connected to one end where the second resistor R2 and the third resistor R3 are connected, and the source of the fifth NMOS tube is grounded.

[0015] Furthermore, when it is an overvoltage protection detection device, the buffer is composed of an odd number of inverters cascaded; when it is an undervoltage protection detection device, the buffer is composed of an even number of inverters cascaded.

[0016] Furthermore, the power supply voltage detection network outputs a detection voltage V IN for:

[0017] V IN =M*V S

[0018] Wherein, M is the output coefficient of the power supply voltage detection network. When the third resistor R3 is short-circuited, When the third resistor R3 is connected to the power supply voltage detection network, R1 represents the resistance value of the first resistor R1, R2 represents the resistance value of the second resistor R2, and R3 represents the resistance value of the third resistor R3; V S Indicates the real-time value of the power supply voltage.

[0019] Furthermore, the resistance values ​​of the first resistor R1, the second resistor R2 and the third resistor R3 satisfy:

[0020]

[0021] Among them, V IHIndicates the turning point voltage during the power supply voltage rise process, V BE1 represents the difference between the base-emitter voltage of the first bipolar transistor Q1, N represents the number ratio of the second bipolar transistor Q2 to the first bipolar transistor Q1, V T represents the voltage equivalent of temperature, R4 represents the resistance value of the fourth resistor R4, R5 represents the resistance value of the fifth resistor R5, V IL Indicates the voltage at the turning point of the power supply voltage drop process.

[0022] Furthermore, the present invention also adopts an over-voltage / under-voltage protection method of the over-voltage / under-voltage protection detection device without a reference. When it is an over-voltage protection device, the specific process of over-voltage protection of the chip power supply voltage is as follows:

[0023] When the power supply voltage detection network detects the chip power supply voltage V DD Exceeds the first high level flip voltage V IH_OR When the input voltage of the single input trigger circuit is After that, the output of the single-input trigger circuit flips to a high level, the feedback switch in the feedback circuit is turned off, the third resistor R3 is enabled, and the buffer drives the subsequent circuit, so that the output of the overvoltage protection device is a high level, triggering the overvoltage protection; when the power supply voltage flips from the first high level voltage V IH_OR Falling back to the first low level flip voltage V IL_OF When the input voltage of the single input trigger circuit is The feedback switch of the feedback circuit is turned on, shielding the third resistor R3, and the buffer drives the subsequent circuit, so that the overvoltage protection device outputs a low level, canceling the overvoltage protection, wherein V IH_OR >V IL_OF >Chip power supply voltage V DD .

[0024] Furthermore, the present invention also adopts an over / under voltage protection method of the over / under voltage protection detection device without a reference. When it is an under voltage protection device, the specific process of performing under voltage protection on the chip voltage is as follows:

[0025] When the power supply voltage detection network detects the chip power supply voltage V DD Lower than the second low level flip voltage V IL_UF When the input voltage of the single input trigger circuit is After that, the output of the single-input trigger circuit flips to a low level, the feedback switch in the feedback circuit is turned on, shielding the third resistor R3, and the buffer drives the subsequent circuit, so that the output of the undervoltage protection device is a high level, triggering the undervoltage protection; when the power supply voltage flips from the second low level voltage V IL_UF Return to the second high level flip voltage UIH_UR At this time, the input voltage of the single-input trigger circuit is The feedback switch of the feedback circuit is turned off, enabling the third resistor R3, and the buffer drives the subsequent circuit, so that the output of the undervoltage protection device is low level, and the undervoltage protection is cancelled, wherein V IL_UF <V IH_UR <Chip power supply voltage V DD .

[0026] Compared with the prior art, the present invention has the following beneficial effects: the single-input trigger circuit in the reference-free over / under voltage protection detection device and method of the present invention adopts a detection method of a bipolar transistor pair, which changes the traditional detection method requiring bias current and reference voltage, and is suitable for controlling bias modules of the same power supply or modules in which the high-voltage power supply cannot directly design a reference voltage source, and other design scenarios in which a bias voltage cannot be provided. The real-time status of the power supply voltage can be obtained only by the power supply voltage information, thereby protecting the safe operation of the chip; in addition, the present invention also uses a current comparator and a Schmitt trigger with hysteresis to prevent false flipping and glitch interference, so that the overall power consumption is also lower than that of the traditional over / under voltage protection detection device. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a schematic diagram of the over / under voltage protection detection device without reference of the present invention;

[0028] Figure 2 A circuit diagram of a reference-free overvoltage protection detection device according to the present invention;

[0029] Figure 3 The circuit diagram of the reference-free undervoltage protection detection device of the present invention is shown in FIG. DETAILED DESCRIPTION

[0030] The technical solution of the present invention is further explained below in conjunction with the accompanying drawings.

[0031] like Figure 1 Schematic diagram of a reference-free over / under voltage protection detection device of the present invention, the reference-free over / under voltage protection detection device comprises: a power supply voltage detection network 101, a single-input trigger circuit 201, a feedback circuit 301 and a buffer 401; the power supply voltage detection network 101 is used to detect the real-time information of the chip power supply voltage, and transmit the detection voltage to the single-input trigger circuit 201, the single-input trigger circuit 201 judges the overvoltage or undervoltage of the chip power supply voltage according to the detection voltage, and generates a flip voltage. Specifically, the single-input trigger circuit 201 only needs to input the detection voltage without bias current and reference voltage, and uses the flip voltage V of the chip power supply voltage IH and V IL , creating an offset current between the two branches in the single-input trigger circuit 201, and passing the chip power supply voltage to the normal level VDD The starting current and the accompanying chip power supply voltage V DD The flip balance point is designed according to the different current change speeds during the change, so as to realize the change of the output result of the over / under voltage protection detection device; the feedback circuit 301 adjusts the output coefficient of the power supply voltage detection network 101 according to the flip voltage feedback from the single input trigger circuit 201, so as to realize the over-voltage or under-voltage protection of the chip power supply voltage, and the buffer 401 is used to improve the driving ability of the power supply voltage of the over-voltage or under-voltage protection. The over / under voltage protection detection device without a reference of the present invention can obtain the real-time status of the power supply voltage only by the power supply voltage information, so as to protect the safe operation of the chip and reduce the power consumption.

[0032] like Figure 2-3 The power supply voltage detection network 101 of the present invention includes: a first resistor R1, a second resistor R2 and a third resistor R3, one end of the first resistor R1 is connected to the power supply voltage V DD The other end of the first resistor R1 and one end of the second resistor R2 are respectively connected as the output end of the power supply voltage detection network 101, and are connected to the input end of the single-input trigger circuit 201. The other end of the second resistor R2 is respectively connected to the output end of the feedback circuit 301 and one end of the third resistor R3, and the other end of the third resistor R3 is grounded. The first resistor R1, the second resistor R2 and the third resistor R3 are connected in series to divide the voltage to generate a detection voltage VIN.

[0033] The single-input trigger circuit 201 of the present invention comprises: a first bipolar transistor Q1, a second bipolar transistor Q2, a first PMOS transistor PM1, a second PMOS transistor PM2, a fourth resistor R4, a fifth resistor R5 and a current comparator. The number ratio of the base of the first bipolar transistor Q1 and the second bipolar transistor Q2 is 1:N. The base of the first bipolar transistor Q1 and the base of the second bipolar transistor Q2 serve as the input end of the single-input trigger circuit 201 to obtain a power supply voltage V DDThe real-time over / under voltage condition; the emitter of the first bipolar transistor Q1 is connected to one end of the fourth resistor R4 and one end of the fifth resistor R5 respectively, and the emitter of the second bipolar transistor Q2 is connected to the other end of the fourth resistor R4, thereby forming an offset current, and the other end of the fifth resistor R5 is grounded; the collector of the first bipolar transistor Q1, the drain of the first PMOS tube PM1, and the gate of the first PMOS tube PM1 are connected to the first input end of the current comparator as a left branch; the collector of the second bipolar transistor Q2, the drain of the second PMOS tube PM2, and the gate of the second PMOS tube PM2 are connected to the second input end of the current comparator as a right branch; the current offset on the two branches is transmitted to the current comparator, and the current comparator picks up the difference between the two collector currents and converts it into a 1-bit high and low level output for the use of the over / under voltage signal; the source of the first PMOS tube PM1 and the source of the second PMOS tube PM2 are both connected to the power supply voltage V DD The output terminal of the current comparator is connected to the input terminal of the feedback circuit 301. The size of the ratio N depends on the compromise between the area power consumption and the accuracy. The larger the N, the larger the area or the power consumption, and the smaller the accuracy.

[0034] In order to prevent the base current of the bipolar transistor from affecting the normal operation of the power supply voltage detection network 101, the series resistance of the second resistor R2 and the third resistor R3 and the fifth resistor R5 in the present invention satisfy the following resistance relationship:

[0035] R2+R3>>R5*β1

[0036] Wherein, β1 is the current amplification factor of the first bipolar transistor Q1.

[0037] The current magnitude of the first PMOS tube PM1 and the collector current I of the first bipolar transistor Q1 C1 The current of the second PMOS tube PM2 is the same as the collector current I C2 When the over / under voltage is reversed, and when the respective recovery processes are reversed, the currents of the two branches reach a balance and are equal:

[0038] I C1 =I C2 =I tail / 2

[0039] When the currents are equal, the collector current of the first bipolar transistor Q1 and the collector current of the second bipolar transistor Q2 are equal, and it can be obtained that:

[0040]

[0041] Among them, I tailis the current flowing through the fifth resistor R5, V BE1 is the base-emitter voltage difference of the first bipolar transistor Q1, ΔV BE =V BE1 -V BE2 , V BE2 is the difference in base-emitter voltage of the second bipolar transistor Q2.

[0042] In order to convert the collected current information into a single-bit voltage signal common to the subsequent modules, the single-input trigger 201 is equipped with a current comparator, which includes: a third PMOS tube PM3, a fourth PMOS tube PM4, a first NMOS tube NM1, a second NMOS tube NM2, a third NMOS tube NM3 and a fourth NMOS tube NM4. The gate of the fourth PMOS tube PM4 serves as the first input terminal of the current comparator, the gate of the third PMOS tube PM3 serves as the second input terminal of the current comparator, and the source of the third PMOS tube PM3 and the source of the fourth PMOS tube PM4 are both connected to the power supply voltage V DD The drain of the third PMOS tube PM3 is respectively connected to the gate of the first NMOS tube NM1, the drain of the first NMOS tube NM1, the drain of the second NMOS tube NM2, and the gate of the third NMOS tube NM3; the source of the first NMOS tube NM1, the source of the second NMOS tube NM2, the source of the third NMOS tube NM3, and the source of the fourth NMOS tube NM4 are all grounded; the drain of the fourth PMOS tube PM4, the gate of the second NMOS tube NM2, the drain of the third NMOS tube NM3, the gate of the fourth NMOS tube NM4, and the drain of the fourth NMOS tube NM4 serve as the output end of the current comparator.

[0043] The single-input trigger circuit 201 of the present invention uses a bipolar transistor pair to generate different collector currents I on two branches by inputting the detection voltage information. C1 and I C2 , forming a current error I C1 -I C2Before the power supply voltage rises to an overvoltage, the left branch current is smaller than the right branch current, and after the power supply voltage overvoltage occurs, the left branch current is larger than the right branch current; before the power supply voltage rises to an undervoltage, the left branch current is larger than the right branch current, and after the power supply voltage overvoltage occurs, the left branch current is smaller than the right branch current; these two currents are input to a current comparator with hysteresis to complete the overvoltage judgment. The hysteresis function can ensure that when the third PMOS tube PM3, the fourth PMOS tube PM4, the first NMOS tube NM1, the second NMOS tube NM2, the third NMOS tube NM3 and the fourth NMOS tube NM4 have a certain mismatch, no false flipping will occur, and the second NMOS tube NM2 or the third NMOS tube NM3 of the branch with large current is in the off state, and the second NMOS tube NM2 or the third NMOS tube NM3 of the branch with small current is in the on state, which will further accelerate and ensure the correct triggering of flipping.

[0044] The feedback circuit 301 includes: a Schmitt trigger 302 and a feedback switch 303. The input end of the Schmitt trigger 302 is used as the input end of the feedback circuit 301. The output end of the Schmitt trigger 301 is connected to the control end of the feedback switch 303 and the input end of the buffer 401 respectively. The feedback switch 303 is connected to the power supply voltage detection network 101. The Schmitt trigger 302 can prevent the output signal burr of the single-input trigger circuit 201, prevent the feedback switch 303 from being mis-conducted to change the current correct voltage division ratio of the third resistor R3, and improve the robustness of the flip function and the driving ability of the signal. In the overvoltage device, the input and output of the Schmitt trigger 301 are inverted; in the undervoltage device, the input and output of the Schmitt trigger 301 are in phase.

[0045] The feedback switch 303 is a fifth NMOS transistor, the gate of the fifth NMOS transistor is connected to the output end of the Schmitt trigger 302, the drain of the fifth NMOS transistor is connected to one end of the second resistor R2 and the third resistor R3, and the source of the fifth NMOS transistor is grounded. DD When an overvoltage or undervoltage occurs, the power supply voltage detection network 101 outputs different voltages due to the opening and closing of the feedback switch 303 .

[0046] The power supply voltage detection network 101 outputs the detection voltage V to the single input trigger circuit 201. IN for:

[0047] V IN =M*V S

[0048] Wherein, M is the output coefficient of the power supply voltage detection network 101. Whether the third resistor R3 is connected or not affects the value of M. H is the output coefficient when the third resistor R3 is short-circuited and shielded, M L is the output coefficient when the third resistor R3 is connected to the power supply voltage detection network 101, R1 represents the resistance value of the first resistor R1, R2 represents the resistance value of the second resistor R2, and R3 represents the resistance value of the third resistor R3; V S Indicates the real-time value of the power supply voltage.

[0049] The third resistor R3 is shielded by the feedback circuit 301, M H The larger the value, the smaller the power supply voltage value that needs to reach the flip point during detection and perception. The power supply is more sensitive to overvoltage or undervoltage conditions, which is convenient for detecting and perceiving the power supply voltage condition. When the power supply returns to normal, it needs to be restored to a voltage value further away from the flip point to cancel the overvoltage or undervoltage. Therefore, the feedback circuit 301 connects the third resistor R3 to the power supply voltage detection network 101, so that M L Smaller.

[0050] In the present invention, the resistance values ​​of the first resistor R1, the second resistor R2 and the third resistor R3 satisfy:

[0051]

[0052] Among them, V IH Indicates the turning point voltage during the power supply voltage rise process, V BE1 represents the difference between the base-emitter voltage of the first bipolar transistor Q1, N represents the number ratio of the second bipolar transistor Q2 to the first bipolar transistor Q1, V T represents the voltage equivalent of temperature, R4 represents the resistance value of the fourth resistor R4, R5 represents the resistance value of the fifth resistor R5, V IL Indicates the voltage at the turning point of the power supply voltage drop process.

[0053] like Figure 2 When it is an overvoltage protection detection device, the buffer 401 is composed of an odd number of inverters in cascade, so that the input and output polarities are opposite to each other, so as to enhance the driving ability of the output signal, facilitate the complete transmission of the output signal to the digital module or enable the subsequent circuit, such as the bandgap reference and the oscillator, to protect the chip; Figure 3 When it is an undervoltage protection detection device, the buffer 401 is composed of an even number of inverters cascaded so that the input and output polarities are the same to enhance the driving capability of the output signal, facilitate the complete transmission of the output signal to the digital module or enable the subsequent circuits, such as the bandgap reference and oscillator, to protect the chip.

[0054] In a technical solution of the present invention, an over / under voltage protection method of a reference-free over / under voltage protection detection device is also provided, and the specific process is as follows:

[0055] When the chip power supply is in overvoltage protection, in order to avoid excessive power-on or sudden power abnormality of the chip power supply, the overvoltage protection detection device of the present invention will shut down the subsequent module in time to prevent overheating and damage; when the chip power supply voltage is in undervoltage protection, in order to avoid power-off or sudden abnormality of the chip power supply, the undervoltage protection detection device of the present invention will shut down the subsequent module in time to prevent abnormal operation of the subsequent module.

[0056] Chip power supply voltage V DD The design of the overvoltage or undervoltage flip voltage depends on the power supply voltage detection network 101 to change the output coefficient M. For the single-input trigger circuit 201, each input voltage is mapped to its own circuit state one by one, so the detection voltage VIN value corresponding to the flip voltage is the same, and the current I flowing through the fifth resistor R5 is tail The same value:

[0057] I tail_OR =I tail_OF =I tail_UR =I tail_UF

[0058] V IN_OR =V IN_IF =V IN_UR =V IN_UF

[0059] Among them, I tail_OR It represents the current flowing through the fifth resistor R5 when the chip power supply voltage rises due to overvoltage, I tail_OF It represents the current flowing through the fifth resistor R5 when the chip power supply voltage drops back to overvoltage, I tail_UR It indicates the current flowing through the fifth resistor R5 when the chip power supply voltage drops due to undervoltage, I tail_UF It indicates the current flowing through the fifth resistor R5 when the chip power supply voltage recovers from undervoltage, V IN_OR It represents the input voltage of the single-input trigger circuit 201 when the chip power supply voltage rises due to overvoltage, V IN_OF It represents the input voltage of the single-input trigger circuit 201 when the chip power supply voltage drops back to overvoltage, V IN_UR It represents the input voltage of the single-input trigger circuit 201 when the chip power supply voltage drops due to undervoltage, V IN_UF It represents the input voltage of the single-input trigger circuit 201 when the chip power supply voltage recovers from undervoltage.

[0060] When the overvoltage protection device is used, the specific process of overvoltage protection for the chip power supply voltage is as follows: When the power supply voltage detection network 101 detects the chip power supply voltage V DD Rising to exceed the first high level flip voltage V IH_OR When the chip power supply voltage V DDDetection and perception are performed. Specifically, at this time, the input voltage of the single-input trigger circuit 201 is The currents of the left and right branches of the single-input trigger circuit 201 are equal, and then the output of the single-input trigger circuit 201 is turned to a high level, and the output of the Schmitt trigger 302 is turned to a low level, so that the feedback switch 303 is turned off, the third resistor R3 is enabled, and the buffer 401 drives the subsequent circuit, so that the output of the overvoltage protection device is a high level, triggering the overvoltage protection; when the power supply voltage is turned from the first high level to the voltage V IH_OR Falling back to the first low level flip voltage V IL_OF When the chip power supply voltage V is DD Detection and perception are performed. Specifically, at this time, the input voltage of the single-input trigger circuit 201 is The currents of the left and right branches of the single-input trigger circuit 201 are equal, and then the output of the single-input trigger circuit 201 turns to a low level, and the output of the Schmitt trigger 302 turns to a high level, so that the feedback switch 303 is turned on, shielding the third resistor R3, and the buffer 401 drives the subsequent circuit, so that the output of the overvoltage protection device returns to a low level, and the overvoltage protection is cancelled. IH_OR >V IL_OF >Chip power supply voltage V DD .

[0061] When it is an undervoltage protection device, the specific process of undervoltage protection for the chip voltage is as follows: When the power supply voltage detection network 101 detects the chip power supply voltage V DD drops below the second low level flip voltage V IL_UF When the chip power supply voltage V is DD Detection and perception are performed. Specifically, at this time, the input voltage of the single-input trigger circuit 201 is The currents of the left and right branches of the single-input trigger circuit 201 are equal, and then the output of the single-input trigger circuit 201 is turned to a low level, and the output of the Schmitt trigger 302 is turned to a high level, so that the feedback switch 303 is turned on, shielding the third resistor R3, and the buffer 401 drives the subsequent circuit, so that the output of the undervoltage protection device is a high level, triggering the undervoltage protection; when the power supply voltage is reversed from the second low level voltage V IL_UF Return to the second high level flip voltage V IH_UR When the chip power supply voltage V DD Detection and perception are performed. Specifically, at this time, the input voltage of the single-input trigger circuit 201 is The currents of the left and right branches of the single-input trigger circuit 201 are equal, and then the output of the single-input trigger circuit 201 turns to a high level, and the output of the Schmitt trigger 302 turns to a low level, so that the feedback switch 303 is turned off, the third resistor R3 is enabled, and the buffer 401 drives the subsequent circuit, so that the output of the undervoltage protection device returns to a low level, and the undervoltage protection is cancelled; wherein, V IL_UF <V IH_UR <Chip power supply voltage V DD .

[0062] In the reference-free over / under voltage protection detection device and method of the present invention, a single-input trigger circuit adopts a detection method of a bipolar transistor pair, which changes the traditional detection method that requires bias current and reference voltage. It is suitable for controlling bias modules with the same power supply or modules in which the high-voltage power supply cannot directly design a reference voltage source, and other design scenarios in which a bias voltage cannot be provided. The real-time status of the power supply voltage can be obtained only by the power supply voltage information to protect the safe operation of the chip. In addition, the present invention also uses a current comparator and a Schmitt trigger with hysteresis to prevent false flipping and glitch interference, so that the overall power consumption is also lower than that of the traditional over / under voltage protection detection device.

[0063] The above are only preferred embodiments of the present invention, and the protection scope of the present invention is not limited to the above embodiments. All technical solutions under the concept of the present invention belong to the protection scope of the present invention. It should be pointed out that for ordinary technicians in this technical field, some improvements and modifications without departing from the principle of the present invention should be regarded as the protection scope of the present invention.

Claims

1. A reference-free over / under voltage protection detection device, characterized in that: include: A power supply voltage detection network (101), a single input trigger circuit (201), a feedback circuit (301) and a buffer (401); The power supply voltage detection network (101) is used to detect real-time information of the chip power supply voltage and transmit the detected voltage to the single-input trigger circuit (201); The single-input trigger circuit (201) determines whether the chip power supply voltage is overvoltage or undervoltage according to the detection voltage, and generates a flip voltage; The feedback circuit (301) adjusts the output coefficient of the power supply voltage detection network (101) according to the flip voltage feedback from the single-input trigger circuit (201), thereby realizing overvoltage or undervoltage protection of the chip power supply voltage; The buffer (401) is used to enhance the driving capability of the power supply voltage for overvoltage or undervoltage protection.

2. A reference-free over / under voltage protection detection device according to claim 1, characterized in that: The power supply voltage detection network (101) comprises: a first resistor R1, a second resistor R2 and a third resistor R3, one end of the first resistor R1 is connected to the power supply voltage V DD The other end of the first resistor R1 and one end of the second resistor R2 are used together as the output end of the power supply voltage detection network (101), and are connected to the input end of the single-input trigger circuit (201); the other end of the second resistor R2 is respectively connected to the output end of the feedback circuit (301) and one end of the third resistor R3; and the other end of the third resistor R3 is grounded.

3. The reference-free over / under voltage protection detection device according to claim 2, characterized in that: The single-input trigger circuit (201) comprises: a first bipolar transistor Q1, a second bipolar transistor Q2, a first PMOS transistor PM1, a second PMOS transistor PM2, a fourth resistor R4, a fifth resistor R5 and a current comparator, wherein the base of the first bipolar transistor Q1 and the base of the second bipolar transistor Q2 serve as the input end of the single-input trigger circuit (201); the emitter of the first bipolar transistor Q1 is connected to one end of the fourth resistor R4 and one end of the fifth resistor R5 respectively, and the emitter of the second bipolar transistor Q2 is connected to one end of the fourth resistor R4 and one end of the fifth resistor R5 respectively. The first bipolar transistor Q1 is connected to the other end of the fourth resistor R4, and the other end of the fifth resistor R5 is grounded; the collector of the first bipolar transistor Q1, the drain of the first PMOS tube PM1, and the gate of the first PMOS tube PM1 are connected to the first input end of the current comparator; the collector of the second bipolar transistor Q2, the drain of the second PMOS tube PM2, and the gate of the second PMOS tube PM2 are connected to the second input end of the current comparator; the source of the first PMOS tube PM1 and the source of the second PMOS tube PM2 are connected to the power supply voltage V DD The output end of the current comparator is connected to the input end of the feedback circuit (301).

4. The reference-free over / under voltage protection detection device according to claim 3, characterized in that: The current comparator includes: a third PMOS tube PM3, a fourth PMOS tube PM4, a first NMOS tube NM1, a second NMOS tube NM2, a third NMOS tube NM3 and a fourth NMOS tube NM4, the gate of the fourth PMOS tube PM4 serves as a first input terminal of the current comparator, the gate of the third PMOS tube PM3 serves as a second input terminal of the current comparator, the source of the third PMOS tube PM3 and the source of the fourth PMOS tube PM4 are both connected to the power supply voltage V DD The drain of the third PMOS tube PM3 is respectively connected to the gate of the first NMOS tube NM1, the drain of the first NMOS tube NM1, the drain of the second NMOS tube NM2, and the gate of the third NMOS tube NM3; the source of the first NMOS tube NM1, the source of the second NMOS tube NM2, the source of the third NMOS tube NM3, and the source of the fourth NMOS tube NM4 are all grounded; the drain of the fourth PMOS tube PM4, the gate of the second NMOS tube NM2, the drain of the third NMOS tube NM3, the gate of the fourth NMOS tube NM4, and the drain of the fourth NMOS tube NM4 serve as the output end of the current comparator.

5. The reference-free over / under voltage protection detection device according to claim 4, characterized in that: The feedback circuit (301) comprises: a Schmitt trigger (302) and a feedback switch (303); the input end of the Schmitt trigger (302) serves as the input end of the feedback circuit (301); the output end of the Schmitt trigger (301) is respectively connected to the control end of the feedback switch (303) and the input end of the buffer (401); and the feedback switch (303) is connected to the power supply voltage detection network (101).

6. The reference-free over / under voltage protection detection device according to claim 5, characterized in that: The feedback switch (303) is a fifth NMOS transistor, the gate of the fifth NMOS transistor is connected to the output end of the Schmitt trigger (302), the drain of the fifth NMOS transistor is connected to one end where the second resistor R2 and the third resistor R3 are connected, and the source of the fifth NMOS transistor is grounded.

7. The reference-free over / under voltage protection detection device according to claim 5, characterized in that: When it is an overvoltage protection detection device, the buffer (401) is composed of an odd number of inverters in cascade connection; when it is an undervoltage protection detection device, the buffer (401) is composed of an even number of inverters in cascade connection.

8. The reference-free over / under voltage protection detection device according to claim 7, characterized in that: The power supply voltage detection network (101) outputs a detection voltage V to the single-input trigger circuit (201). IN for: In IN =M*V S Wherein, M is the output coefficient of the power supply voltage detection network (101). When the third resistor R3 is short-circuited, When the third resistor R3 is connected to the power supply voltage detection network (101), R1 represents the resistance value of the first resistor R1, R2 represents the resistance value of the second resistor R2, and R3 represents the resistance value of the third resistor R3; V S Indicates the real-time value of the power supply voltage.

9. The reference-free over / under voltage protection detection device according to claim 8, characterized in that: The resistance values ​​of the first resistor R1, the second resistor R2 and the third resistor R3 satisfy: Among them, V IH Indicates the turning point voltage during the power supply voltage rise process, V BE1 represents the difference between the base-emitter voltage of the first bipolar transistor Q1, N represents the number ratio of the second bipolar transistor Q2 to the first bipolar transistor Q1, V T represents the voltage equivalent of temperature, R4 represents the resistance value of the fourth resistor R4, R5 represents the resistance value of the fifth resistor R5, V IL Indicates the voltage at the turning point of the power supply voltage drop process.

10. An over / under voltage protection method of the reference-free over / under voltage protection detection device according to any one of claims 1 to 9, characterized in that: When it is an overvoltage protection device, the specific process of overvoltage protection for the chip power supply voltage is as follows: When the power supply voltage detection network (101) detects the chip power supply voltage V DD Exceeds the first high level flip voltage V IH_OR When the input voltage of the single-input trigger circuit (201) is Then, the output of the single-input trigger circuit (201) flips to a high level, the feedback switch (303) in the feedback circuit (301) is turned off, the third resistor R3 is enabled, and the buffer (401) drives the subsequent circuit, so that the output of the overvoltage protection device is a high level, triggering the overvoltage protection; when the power supply voltage flips from the first high level voltage V IH_OR Falling back to the first low level flip voltage V IL_OF When the input voltage of the single-input trigger circuit (201) is The feedback switch (303) of the feedback circuit (301) is turned on, shielding the third resistor R3, and the buffer (401) drives the subsequent circuit so that the output of the overvoltage protection device is low level, canceling the overvoltage protection, wherein V IH_OR >V IL_OF >Chip power supply voltage V DD .

11. An over / under voltage protection method of the reference-free over / under voltage protection detection device according to any one of claims 1 to 9, characterized in that: When it is an undervoltage protection device, the specific process of undervoltage protection of the chip voltage is as follows: When the power supply voltage detection network (101) detects the chip power supply voltage V DD Lower than the second low level flip voltage V IL_UF When the input voltage of the single-input trigger circuit (201) is Afterwards, the output of the single-input trigger circuit (201) flips to a low level, the feedback switch (303) in the feedback circuit (301) is turned on, shielding the third resistor R3, and the buffer (401) drives the subsequent circuit, so that the output of the undervoltage protection device is a high level, triggering the undervoltage protection; when the power supply voltage flips from the second low level voltage V IL_UF Return to the second high level flip voltage V IH_UR At this time, the input voltage of the single-input trigger circuit (201) is The feedback switch (303) of the feedback circuit (301) is turned off, enabling the third resistor R3, and the buffer (401) drives the subsequent circuit, so that the output of the undervoltage protection device is low level, and the undervoltage protection is cancelled, wherein V IL_UF <V IH_UR <Chip power supply voltage V DD .

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