A method for diagnosing open-circuit faults in a three-phase interleaved parallel three-level DC-DC converter

Abstract

This invention proposes a method for diagnosing open-circuit faults in a three-phase interleaved parallel three-level DC-DC converter, using the inductor current i of the three-phase interleaved parallel three-level DC-DC converter as an example. L1 ~i L6 The sum of the three-phase inductor currents i L1 +i L4 i L2 +i L5 i L3 +i L6 A mathematical model of a three-phase interleaved parallel three-level DC-DC converter is established, with the state variable as the model. Based on this, an improved sliding mode observer for the three-phase interleaved parallel three-level DC-DC converter is designed. Combining the observed value output by the improved sliding mode observer with the actual value of the sum of the inductance currents of the upper and lower arms of the same phase, a fault detection variable M based on the residual γ(t) is constructed. x x = A, B, C; taking advantage of the characteristic that the inductor current decreases fastest after a switch open-circuit fault, a structure based on the inductor current i is constructed. L1 ~i L6 The fault detection variable N is the difference between the current mean and the current mean. j j = 1 to 6; the open-circuit fault of the corresponding switch is determined by comparing the two fault detection variables and the set threshold.

Description

Technical Field

[0001] This invention belongs to the field of power electronic converter fault diagnosis technology, and in particular relates to a method for diagnosing open-circuit faults in a three-phase interleaved parallel three-level DC-DC converter. Background Technology

[0002] With the rapid development of DC microgrids and energy storage technologies, the proportion of new energy power generation, represented by photovoltaics and wind power, in new power systems is gradually increasing. To address the issue of large fluctuations in new energy output, energy storage systems have become an important support for grid connection and consumption of new energy. Among them, bidirectional DC-DC converters, as the core equipment for energy interaction between the grid and energy storage systems, have become a research hotspot in recent years.

[0003] The three-phase interleaved parallel three-level DC-DC converter combines interleaved parallel and multilevel technologies, offering the advantages of increased converter power from the interleaved parallel structure and reduced voltage stress on the switching transistors from the three-level converter, enabling high-power energy transfer. However, because the DC-DC converter in energy storage microgrids withstands a large bus voltage and switches frequently between different operating states, the power switching transistors are more prone to failure under high-frequency operation. Furthermore, since the three-phase interleaved parallel three-level DC-DC converter has twice the number of switching transistors compared to the two-level interleaved parallel DC-DC converter, its failure probability is even greater. Therefore, researching fault diagnosis methods for the three-phase interleaved parallel three-level DC-DC converter is of great significance.

[0004] Faults in the switching transistors of a DC-DC converter include short-circuit faults and open-circuit faults. A short-circuit fault in a DC-DC converter is characterized by an increase in inductor current, which can cause a large inrush current within a short period. Therefore, the diagnosis of short-circuit faults is usually achieved by detecting overcurrent or converting the short-circuit fault into an open-circuit fault. In recent years, the diagnosis of open-circuit faults in switching transistors has attracted widespread attention; therefore, this invention mainly relates to a method for diagnosing open-circuit faults in a three-phase interleaved parallel three-level DC-DC converter. Summary of the Invention

[0005] The purpose of this invention is to consider the impact of the current sharing control strategy of a three-phase interleaved parallel three-level DC-DC converter on the circuit state under open-circuit faults of the converter switching transistors, and to propose an open-circuit fault diagnosis method for a three-phase interleaved parallel three-level DC-DC converter based on an improved sliding mode observer.

[0006] A method for diagnosing open-circuit faults in a three-phase interleaved parallel three-level DC-DC converter includes: using the inductor current i of the three-phase interleaved parallel three-level DC-DC converter... L1 ~i L6 The sum of the three-phase inductor currents i L1+i L4 i L2 +i L5 i L3 +i L6 A mathematical model of a three-phase interleaved parallel three-level DC-DC converter is established, with the state variable as the model. Based on this, an improved sliding mode observer for the three-phase interleaved parallel three-level DC-DC converter is designed. Combining the observed value output by the improved sliding mode observer with the actual value of the sum of the inductance currents of the upper and lower arms of the same phase, a fault detection variable M based on the residual γ(t) is constructed. x x = A, B, C; taking advantage of the characteristic that the inductor current decreases fastest after a switch open-circuit fault, a structure based on the inductor current i is constructed. L1 ~i L6 The fault detection variable N is the difference between the current mean and the current mean. j j = 1 to 6, where j is the inductor number; the open-circuit fault diagnosis method for a three-phase interleaved parallel three-level DC-DC converter can be expressed as:

[0007] D j =(M x >T j )&(N j <W)

[0008] If logical variable D j =1, which means the inductor current i Lj The corresponding switching transistor experienced an open-circuit fault; T j W is an adaptive threshold, and W is a fixed negative threshold.

[0009] Preferably, the mathematical model of the three-phase interleaved parallel three-level DC-DC converter is as follows:

[0010]

[0011] Among them, i(t)=[i L1 +i L4 i L2 +i L5 i L3 +i L6 ] T For state variables; u(t) = [V b1 V b2 V o ] T For input variables; F k (t) represents the fault difference vector, with corresponding model differences existing only in the fault phase; C is a third-order identity matrix, and y is the output variable; the coefficient matrices A0 and B0 are respectively:

[0012]

[0013]

[0014] L1 to L6 are the inductors of each bridge arm, r L1 ~r L6 Let d be the equivalent resistance of each inductor. j The duty cycle of the main control switch connected to inductor Lj is j = 1 to 6.

[0015] Preferably, the improved sliding mode observer for the three-phase interleaved parallel three-level DC-DC converter is:

[0016]

[0017] In the formula, These are the observed values ​​of the sum of the three-phase inductor currents; To improve the sliding surface of the sliding mode observer, which is also the residual between the observer output and the actual current sum; h is the observer gain; f(γ(t)) is the adaptive approach rate, specifically expressed as:

[0018]

[0019] Where 0 < ε < 1, a > 1.

[0020] Preferably, fault detection variables

[0021]

[0022] In the formula, γ x (x = A, B, C) represents the residual of the sum of the inductance currents of the upper and lower bridge arms for each phase.

[0023] Preferably, the adaptive threshold T j Based on current i L1 ~i L6 The flowability parameters z1 to z6 are designed to deviate from the mean.

[0024]

[0025] In the formula, z j i represents the converter Lj The degree of balance between the current and the mean inductor current;

[0026] Adaptive threshold T j for:

[0027]

[0028] Adaptive threshold T j It will rapidly decrease to 0, where the parameter k is used to characterize the adaptive threshold T. j The rate of decrease.

[0029] Preferably, b = 0.85 and k = 100.

[0030] Preferably, if there is no open-circuit fault in either the upper or lower half-bridge of a phase of the converter, then the inductor current and residual γ of that phase will be... x The fault detection variable M is close to 0. x The threshold T corresponding to the inductor current is 0.5. j =2,M x <T j Determine T j There is no open-circuit fault in the corresponding switching transistor; if a single-transistor fault or a dual-transistor fault occurs in one phase of the converter, the inductor current and residual γ of the faulted phase will be... x Will deviate from 0, M x The threshold T corresponds to the fault inductor current as it approaches 1 from 0.5. j =0, M x >T j Determine T j The corresponding switching transistor has an open circuit fault.

[0031] Preferably,

[0032] The fixed negative threshold W is based on a single switching cycle T after an open-circuit fault occurs. s The degree of decrease in fault current within the circuit; one switching cycle T after a single-tube open-circuit fault. s Within the fault inductor, the difference between the fault inductor current and the mean current is:

[0033]

[0034] When a dual-tube fault occurs after a single-tube fault, the single switching cycle T s The difference between the internal fault inductor current and the mean current is:

[0035]

[0036] The fixed negative threshold W is designed as follows:

[0037]

[0038] In the formula, D is the average duty cycle, and V in L is the input voltage. Lj is the inductance of each bridge arm, j = 1-6. Attached Figure Description

[0039] Figure 1 This is the topology of a three-phase interleaved parallel three-level DC-DC converter;

[0040] Figure 2 To introduce a virtual voltage source V between the midpoint of the input capacitor and the midpoint of the output capacitor of the converter GOAn equivalent topological graph used to replace half of the topology;

[0041] Figure 3 For virtual voltage source V GO Waveform diagram within a single cycle;

[0042] Figure 4 This is the equivalent circuit diagram for mode 1;

[0043] Figure 5 For the virtual voltage source V during fault stage I GO0 Waveform;

[0044] Figure 6 This is the control block diagram for the average flow equalization method;

[0045] Figure 7 S under the average flow equalization method A1 When an open-circuit fault occurs, the circuit state in Fault Stage II;

[0046] Figure 8 S under the average flow equalization method A1 When an open-circuit fault occurs, the virtual voltage source V in fault stage II... GO1 Waveform;

[0047] Figure 9 Control block diagram of master-slave flow sharing method;

[0048] Figure 10 Master-slave flow equalization method S A1 When an open-circuit fault occurs, the circuit state in Fault Stage II; among which, Figure 10 (a) shows that in S A1 When the drive signal is high, the fault current i L1 via S A1 Anti-parallel diodes form a reverse path; Figure 10 (b) shows that in S A1 When the drive signal is low, i L1 via S A2 With virtual voltage source V GO4 This constitutes a reverse pathway;

[0049] Figure 11 Master-slave flow equalization method S A1 When an open-circuit fault occurs, the virtual voltage source V in fault stage II... GO4 Waveform;

[0050] Figure 12 (a)-12(f) represents the single-tube fault (S) under the average current sharing method in the simulation experiment. A1 A dual-tube failure (S) occurred afterward. A1 S B1 A diagram illustrating the diagnostic results; where, Figure 12 (a) represents the inductor current. Figure 12 (b) is the switching transistor S A1 Fault detection variable M A and threshold T1, Figure 12 (c) is to close S B1 Fault detection variable M B and threshold T2, Figure 12 (d) is the shut-off valve S C1 Fault detection variable M C and threshold T3, Figure 12 (e) is the shut-off S A1 —S C1 Fault detection variable N j and threshold W, Figure 12 (f) is the shut-off point S A4 —S C4 Fault detection variable N j and threshold W;

[0051] Figure 13 This is a schematic diagram illustrating the diagnostic results of a switch fault at the same location in a simulation experiment using the master-slave current sharing method; where, Figure 13 (a) represents the inductor current. Figure 13 (b) is the switching transistor S A1 Fault detection variable M A and threshold T1, Figure 13 (c) is to close S B1 Fault detection variable M B and threshold T2, Figure 13 (d) is the shut-off valve S C1 Fault detection variable M C and threshold T3, Figure 13 (e) is the shut-off S A1 —S C1 Fault detection variable N j and threshold W, Figure 13 (f) is the shut-off point S A4 —S C4 Fault detection variable N j and threshold W. Detailed Implementation

[0052] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0053] The topology of a three-phase interleaved parallel three-level DC-DC converter is as follows: Figure 1 As shown. V b1 V b2 For the voltage divider capacitor C b1 C b2 Voltage, V in V is the input voltage. o The output voltage is L1 to L6, which are the inductances of each bridge arm.L1 ~r L6 C is the equivalent resistance of each inductor. o This is a voltage regulator capacitor. Each phase of the converter includes four switching transistors (S). x1 ~S x4 (x = A, B, C), where two act as the main control switches, and their complementary switches function as freewheeling diodes. Taking phase A as an example, in Buck mode, S... A1 S A4 Main control switch transistor, S in Boost mode A2 S A3 Taking the main control switch as an example, the following analysis focuses on the open-circuit fault of the main control switch based on Buck mode.

[0054] Switches in the same phase of the converter (e.g., S) A1 With S A4 The phase shift between carriers is 180°, and the switching transistor S... A1 S B1 S C1 The carrier waves are phase-shifted by 120°. A single switching cycle T s Internally, the converter has 12 modes based on the corresponding combinations of on and off states of the switching transistors. However, circuit analysis based on each mode combination is quite complex. Therefore, a virtual voltage source V is introduced between the midpoint of the input capacitor and the midpoint of the output capacitor of the converter. GO Used to replace half of the topology, the equivalent topology is as follows: Figure 2 As shown.

[0055] Figure 2 In the middle, the switching bridge arm is connected to a controlled voltage source V. A1 V A4 (V A1 =S A1 V b1 V A4 =S A4 V b2 Replace with ) etc., according to the equivalent before and after i L1 +i L2 +i L3 =i L4 +i L5 +i L6 As can be seen from the constant and Kirchhoff's laws, the virtual voltage source V GO The expression is as follows:

[0056]

[0057] In the formula, S A1 ~S C4 For the corresponding switching transistor S A1 ~S C4 The driving signal, virtual voltage source V GOThe waveform within a single period is as follows Figure 3 As shown. Virtual voltage source V GO There are also 12 modes within a single cycle, corresponding to the 12 circuit modes within one switching cycle of the converter. V GO It is equivalent to half of the topology, and under its influence, i is made L1 The waveform can be obtained in accordance with existing direct analysis methods. L1 The waveform thus verified V. GO The correctness of equivalence.

[0058] Based on topological equivalence Figure 4 An equivalent circuit diagram is given for mode 1 as an example.

[0059] Combination Figure 4 The circuit state equations can be written for the conduction state, and the duration of mode 1 is (d1 / 2 + d2 / 2 - 2 / 3)T. s d j (j = 1~6) represents the switching transistor S. A1 ~S C4 The duty cycle. By simultaneously solving the circuit equations for the 12 modes and their corresponding durations, the mathematical model of the converter can be obtained as follows:

[0060]

[0061] x(t)=[i L1 i L2 i L3 i L4 i L5 i L6 ] T (3)

[0062] u(t)=[V b1 V b2 V o ] T (4)

[0063]

[0064]

[0065] Among them, f k (t) represents the difference vector between the converter model and the normal state model caused by the open-circuit fault of the switching transistor. In the normal state of the converter, f... k (t) = 0.

[0066] With phase A S A1 Taking an open-circuit fault as an example, when S A1 After the circuit is opened, the inductor current i in the upper half-bridge arm of phase A... L1Due to the loss of input voltage V b1 The support will gradually decrease to 0. According to the virtual voltage source V... GO The derivation process, in i L1 When i decreases but remains greater than 0, L1 +i L2 +i L3 =i L4 +i L5 +i L6 As it remains unchanged, equation (1) still holds, and is defined as fault stage I; i L1 The circuit state after decreasing to 0 is defined as fault stage II. Fault stage I is equivalent to... Figure 3 China V A1 If the value is always equal to 0, then the virtual voltage source V under fault stage I is... GO0 Waveform as Figure 5 As shown.

[0067] When the converter is operating normally, the input voltage V b1 =V b2 =V in / 2,V o =DV in D is the average duty cycle. Then, in fault phase I, V... GO0 In a period T s The average values ​​are as follows:

[0068]

[0069] Combination Figure 5 medium controlled voltage source V A1 ~V C4 The periodic average can be used to calculate the periodic increment Δi of the fault inductor current during fault stage I. L1 ~Δi L6 :

[0070]

[0071] Equation (8) shows that, in fault stage I, the fault inductor current i L1 The current i in the upper half-topology inductor drops rapidly. L2 ~i L3 Ascending, lower half topology i L4 ~i L6 The current decreases, but the rate of decrease is less than i. L1 . i.e. i L1 It will decrease to 0 as quickly as possible. Based on Figure 5 Medium circuit modes and V GO0 The waveform can be used to write the corresponding circuit state equations. By combining the circuit equations of each mode with the duration, the difference vector f0(t) between the fault stage I circuit mathematical model and the normal state model can be obtained as follows:

[0072]

[0073] Typical active current sharing control strategies for the bridge arms of interleaved parallel DC-DC converters are the average current sharing method and the master-slave current sharing method. Due to the mutual influence between the upper and lower topologies, the duty cycles of the fault switches output by the two current sharing control strategies differ in the fault stage II, leading to differences in the converter fault model. Therefore, it is necessary to establish open-circuit fault models for the fault stage II under different current sharing control strategies. The control block diagram of the average current sharing method is shown below. Figure 6 As shown, this current sharing control strategy is based on dual closed-loop control, where the voltage outer loop generates the current inner loop reference value I. Lref Inductor current i L1 ~i L6 Tracking I through the inner loop controller respectively Lref And generate duty cycle d j (j=1~6), d j ∈[0,1], and finally output to the phase-shifted PWM module to achieve interleaved parallel connection.

[0074] Figure 6 In the case of any inductor current i Lj If the switching transistor corresponding to (j=1~6) has an open-circuit fault, then i Lj Rapidly decrease to 0, I Lref It remains unchanged. According to the current inner-loop negative feedback controller, its corresponding switching transistor duty cycle d... j It will rapidly increase to 1, and its complementary switch duty cycle will be 0. With S A1 Taking an open-circuit fault as an example, the circuit state in stage II of the fault is as follows: Figure 7 As shown.

[0075] Depend on Figure 7 It can be seen that i L1 After decreasing to 0, S A1 Open circuit, its complementary switch S A2 The duty cycle is 0, therefore i L1 Unable to form a valid loop, i L1 It will remain at 0 throughout the second stage of fault. At this time, the virtual voltage source V GO The equivalence precondition is given by i L1 +i L2 +i L3 =i L4 +i L5 +i L6 Change to i L2 +i L3 =i L4 +i L5 +i L6 Virtual voltage source V during fault stage II GO1 The expression is as follows:

[0076]

[0077] Virtual voltage source V GO1 Waveform as Figure 8 As shown. By Figure 8 China V GO1 By combining the waveform and the corresponding circuit modes, and establishing the circuit equations and durations for each mode, the S value under the average current sharing control strategy can be obtained. A1 The difference vector f1(t) between the fault stage II circuit mathematical model and the normal state model for an open-circuit fault:

[0078]

[0079] In S A1 Based on open-circuit faults, a two-transistor open-circuit fault model is further considered. According to the converter topology equivalence principle, two-transistor faults can be divided into two types, both belonging to the upper half topology (such as S...). A1 S B1 Open circuit fault) and upper and lower part topology (such as S) A1 S A4 Open circuit fault). S A1 S B1 For an open-circuit fault, the prerequisite for topological equivalence is i. L3 =i L4 +i L5 +i L6 Virtual voltage source V GO2 The expression is as follows:

[0080]

[0081] S A1 S A4 For an open-circuit fault, the prerequisite for topological equivalence is i. L2 +i L3 =i L5 +i L6 Virtual voltage source V GO3 The expression is as follows:

[0082]

[0083] Similarly, under the average flow control strategy, S can be obtained. A1 S B1 Open circuit fault and S A1 S A4 The difference vectors f2(t) and f3(t) between the open-circuit fault and normal state models are as follows:

[0084]

[0085]

[0086] The control block diagram of the master-slave current sharing method is as follows: Figure 9 As shown, this current sharing control strategy is also based on dual closed-loop control, where the voltage outer loop generates a reference value I for the current inner loop. Lref Inductor current i L1 ~i L6 The average value is tracked by the inner loop controller. Lref And generate the average current duty cycle d PI Both the upper and lower topologies use phase A as the main phase. The current sharing duty cycle d is generated by the difference between the phase inductor current and the main phase current through a current sharing controller. 12 d 13 d 45 d 46 Duty cycle and d PI Perform arithmetic operations to ensure that the inductor current of each phase bridge arm is balanced.

[0087] During steady-state operation, the current sharing duty cycle d 12 d 13 d 45 d 46 It is very small, and its upper and lower limits of the limiting stage are also small, generally d 12 d 13 d 45 d 46 ∈[-d lim ,d lim ], d lim =0.01. When any inductor current i Lj When the switch corresponding to (j=1~6) experiences an open-circuit fault, i Lj The current sharing negative feedback controller will reach its limit when the current rapidly decreases to 0, and the duty cycle d corresponding to the fault switch will be reduced. j It will become d PI -2d lim With S A1 Taking an open-circuit fault as an example, the circuit state in stage II of the fault is as follows: Figure 10 As shown.

[0088] Depend on Figure 10 It can be seen that i L1 After decreasing to 0, S A1 Open the road, S A1 Duty cycle is d PI -2d lim Complementary switch S A2 The duty cycle is (1-d) PI +2d lim Fault current i L1 In S A1 When the drive signal is high, via S A1Anti-parallel diodes form a reverse path, such as Figure 10 As shown in (a); in S A1 When the drive signal is low, i L1 via S A2 With virtual voltage source V GO4 Constructing a reverse pathway, such as Figure 10 As shown in (b).

[0089] Meanwhile, during the fault stage II of the master-slave current sharing method, the voltage across inductor L1 is the same as in the normal state, i.e., i L1 The waveform trend is consistent with the normal state, except for the current i L1 Reverse flow. Due to the faulty switching transistor S A1 The duty cycle d1 becomes d1-2d under the master-slave current sharing method. lim ,therefore Figure 3 Virtual voltage source V GO It will be in 4T s / 6 and 5T s Add a fault mode in / 6. Master-slave current sharing method S A1 Virtual voltage source V when open circuit GO4 Waveform as Figure 11 As shown. The duration ΔT of the fault mode can be obtained from the volt-second balance principle under steady-state conditions, that is:

[0090]

[0091] Depend on Figure 11 China V GO4 By combining the waveform and corresponding circuit modes, and establishing the circuit equations and durations for each mode, the value of S under the master-slave current sharing control strategy can be obtained. A1 The difference vector f4(t) between the mathematical model of the open-circuit fault stage II circuit and the normal state model:

[0092]

[0093] In S A1 Based on open-circuit faults, a two-tube open-circuit fault model under a master-slave current sharing control strategy is further considered. Two-tube faults have an upper-half topology (such as S...). A1 S B1 Open circuit fault) and upper and lower part topology (such as S) A1 S A4 In the event of an open-circuit fault, a corresponding fault mode is added. Applying the superposition theorem, the value of S under the master-slave current sharing control strategy can be obtained. A1 S B1 Open circuit fault and S A1 S A4 The difference vectors f5(t) and f6(t) between the open-circuit fault and normal state models are as follows:

[0094]

[0095]

[0096] Based on the above analysis, it can be seen that after a switching transistor open-circuit fault occurs in a three-phase interleaved parallel three-level DC-DC converter, the average state equation of all inductor currents differs from that under normal conditions. Therefore, combining the aforementioned fault difference vectors f0(t) to f6(t) of the converter, a fault model of the converter is proposed to be established based on the sum of the inductor currents of the upper and lower bridge arms of each phase.

[0097] Considering that the inductance values ​​Lj and L(j+3) of the upper and lower half-bridges of the same phase of the converter are relatively small, the sum of the inductance currents of the upper and lower bridge arms of each phase (such as i in phase A) is used. L1 +i L4 If the model is established, the average state equation of the sum of the inductor currents of the non-faulty phases is no different from that of the normal state. Considering the differences between the average state equation of the sum of the inductor currents of the faulty phases and the normal state model, the differences in the current model under different open-circuit faults of different switching transistors are shown in Table 1.

[0098] Table 1. Correspondence between fault types and current model differences.

[0099]

[0100] Under fault conditions, a fault diagnosis method is designed using the sum of the inductor currents of the upper and lower arms of the same phase of the converter as the output of the observer. Under normal operating conditions and without switching transistor faults, the sum of the inductor currents is equal to the observer output. However, in the case of an open-circuit fault in one phase, the sum of the inductor currents will significantly deviate from the observer output. Based on this principle, an open-circuit fault diagnosis method for a three-phase interleaved parallel three-level DC-DC converter based on an improved sliding mode observer is proposed. The method constructs a fault detection variable using the residual between the sliding mode observer output and the actual current sum, and designs an adaptive threshold based on the inductor current sharing rate. Fault diagnosis is achieved by combining the deviation of the fault current from the average inductor current.

[0101] Collect the inductor current i of the three-phase interleaved parallel three-level DC-DC converter L1 ~i L6 The sum of the three-phase inductor currents i L1 +i L4 i L2 +i L5 i L3 +i L6 As state variables, the mathematical model of the three-phase interleaved parallel three-level DC-DC converter can be described in the following form:

[0102]

[0103] Among them, i(t)=[i L1 +i L4 i L2 +i L5 i L3 +i L6 ] T As a state variable, u(t) = [V b1 V b2 V o ] T For input variables. F k (t) represents the fault difference vector, with corresponding model differences existing only in the fault phase. C is a third-order identity matrix, and y is the output variable. The coefficient matrices A0 and B0 are as follows:

[0104]

[0105]

[0106] Based on this, an improved sliding mode observer for a three-phase interleaved parallel three-level DC-DC converter is designed as follows:

[0107]

[0108] In the formula, These are the observed values ​​of the sum of the three-phase inductor currents; To improve the sliding surface of the sliding mode observer, which is also the residual between the observer output and the actual current sum; h is the observer gain; f(γ(t)) is the novel adaptive approach rate designed in this invention, specifically expressed as:

[0109]

[0110] Where 0 < ε < 1, a > 1. Substituting the converter parameters into equation (23), the observed value of the sum of the inductance currents of the upper and lower bridge arms of each phase of the converter can be calculated.

[0111] By combining the observed values ​​output by the improved sliding mode observer with the actual values ​​of the inductance currents of the upper and lower bridge arms in the same phase, a fault detection variable based on the residual γ(t) is constructed.

[0112] Analysis of the converter fault model reveals that only the inductor current model of the phase with an open-circuit switch fault differs from the normal state; the inductor current model of the phase without faults remains consistent with the normal state. Therefore, the fault detection variable M is constructed using the residual γ(t) between the observed and actual values ​​of the inductor current sum. x (x = A, B, C):

[0113]

[0114] In the formula, γ x (x = A, B, C) represents the residual of the sum of the inductor currents of the upper and lower bridge arms for each phase, such as

[0115] Using fault detection variable M x Using a threshold value greater than a certain threshold as a fault determination criterion, an adaptive threshold T is designed. j Combined with the inductor current i L1 ~i L6 Based on the time-domain characteristics, a method based on current i is proposed. L1 ~i L6 Adaptive threshold T for mean flow rate deviating from the mean j First, define the flow rate parameters z1 to z6:

[0116]

[0117] In the formula, z j i represents the converter Lj The degree of balance between the current sharing and the average inductor current. Due to the existence of the current sharing control strategy, the i-value of the normal state and the non-faulty phase... Lj Consistent with the mean, the mean mobility parameter z j If the value remains around 1, the inductor current corresponding to the open-circuit fault switch will decrease to 0 or a negative value, then z j The value is reduced accordingly to 0 or a negative value. Therefore, an adaptive threshold T is designed. j as follows:

[0118]

[0119] When the converter has no open-circuit fault of the switching transistor, z j =1,T j =2; When the switching transistor experiences an open-circuit fault, its corresponding inductor current sharing parameter z j Decrease, when z j When the value is less than parameter a, the adaptive threshold T j It will rapidly decrease to 0, where parameter k is used to characterize the threshold T during this process. j The rate of decrease. Considering the current sharing requirements during normal operation of the converter, the design is b = 0.85, k = 100.

[0120] If there is no open-circuit fault in either the upper or lower half-bridge of a phase of the converter, then the inductor current and residual γ of that phase will be... x The fault detection variable M is close to 0. x The threshold T corresponding to the inductor current is 0.5. j =2,M x <T j Determine T jThe corresponding switching tube has no open - circuit fault; if a single - tube fault or a double - tube fault occurs in one phase of the converter, the inductor current of the faulty phase and the residual γ x will deviate from 0, and M x will tend to 1 from 0. The threshold T corresponding to the faulty inductor current j = 0, and M x > T j , it is determined that T j corresponding switching tube has an open - circuit fault.

[0121] To prevent misjudgment, taking advantage of the characteristic that the inductor current corresponding to the open - circuit fault of the switching tube drops fastest, a fault - detection variable N based on the difference between the inductor current i L1 ~i L6 and the current mean value is constructed: j (j = 1~6):

[0122]

[0123] In the normal state of the converter and for the non - faulty phases, the inductor current is consistent with the mean value, and the fault - detection variable N j is 0; the inductor current corresponding to the open - circuit faulty switching tube will decrease to 0 or a negative value at the fastest rate of decline. At this time, the faulty inductor current is less than the mean value, and N j is negative. Therefore, a fixed negative threshold W is designed. When N j < W, it is determined that N j corresponding switching tube has an open - circuit fault.

[0124] To improve the speed of open - circuit fault diagnosis, the threshold W is designed based on the degree of fault - current decline within a single switching period T s after an open - circuit fault occurs. Within a single switching period T s after a single - tube open - circuit fault, the difference between the faulty inductor current and the current mean value can be expressed as:

[0125]

[0126] Similarly, when a double - tube fault occurs after a single - tube fault, the difference between the faulty inductor current and the current mean value within a single switching period T s can be obtained:

[0127]

[0128] Therefore, the threshold W is designed as:

[0129]

[0130] Combining the fault - detection variables M x and N j, the proposed open - circuit fault diagnosis method for the three - phase interleaved parallel three - level DC - DC converter can be expressed as:

[0131] D j =(M x >T j )&(N j <W)(32)

[0132] If the logic variable D j = 1, it means that the switching tube corresponding to the inductor current i Lj has an open - circuit fault.

[0133] Next, a simulation model is used to verify the effectiveness of the open - circuit fault diagnosis method based on the improved sliding - mode observer proposed in this invention under the average current - sharing method and the master - slave current - sharing method. A simulation model is built according to the parameters shown in Table 2, and the proposed method in this invention is used to diagnose the open - circuit faults of the switching tubes of the three - phase interleaved parallel three - level DC - DC converter.

[0134] Table 2 Converter parameters

[0135]

[0136] Figure 12 The diagnosis results of double - tube faults (S A1 ) after single - tube faults (S A1 , S B1 ) are given under the average current - sharing method, Figure 13 and the diagnosis results of the switching - tube faults at the same position under the master - slave current - sharing method are given. According to Figure 12 , when there is no switching - tube fault in the converter, all fault - detection variables M x <T j and N j ] >W, which do not meet the fault - determination conditions, and the diagnosis result is that there is no open - circuit fault in the switching tube. After S A1 has an open - circuit fault, its corresponding inductor current i L1 [[ID=​​​​​​​​​​​​​​​​​B1 After the fault, its inductor current i L2 also decreases to 0 and remains unchanged. Only the inductor current i exists in the upper half topology of the converter L3 , and the inductor currents i L4 ~i L6 in the lower half topology still maintain current sharing. S B1 After an open-circuit fault occurs, the fault detection variable M of phase B B increases and is greater than the adaptive threshold T2, that is, M B >T2, and the fault detection variable N2 < W, determining that S B1 has an open-circuit fault. In addition, the fault detection variable of the non-fault switch tube S C1 always maintains M C <T3 and N3 > W during this stage, so it is determined that S C1 has no fault.

[0138] Figure 13 is the fault diagnosis result under the master-slave current sharing method control. According to the inductor current waveforms in the figure, after an open-circuit fault occurs in S A1 , the corresponding inductor current i L1 rapidly decreases to 0 and circulates in the reverse direction, and the inductor currents corresponding to the remaining non-fault switch tubes maintain current sharing under the control of the master-slave current sharing method; after an open-circuit fault occurs in S B1 , i L2 also decreases to 0 and circulates in the reverse direction. Only the inductor current i exists in the upper half topology L3 , and the inductor currents i L4 ~i L6 in the lower half topology still maintain current sharing. After an open-circuit fault occurs in S A1 , the fault detection variable M of phase A A recovers to about 0.5 of the non-fault state after fluctuations. This is because the fault switch tube S A1 corresponding to the i L1 still circulates in the reverse direction under the control of the master-slave current sharing method. The difference between the converter fault model and the normal state is small, and the output value of the improved sliding mode observer is still very close to the actual current value. However, since the adaptive threshold T1 corresponding to S A1 rapidly decreases to 0 after the fault, and N1 decreases to a negative value, satisfying M A >T1 and N1 < W, it is determined that S A1 has an open-circuit fault. Similarly, after an open-circuit fault occurs in S B1 , the fault detection variable M of phase B B remains unchanged, the adaptive threshold T2 rapidly decreases to 0, and N2 changes from 0 to a negative value, satisfying M B >T2 and N2 < W, determining that S B1 has an open-circuit fault. When double-switch tube faults of S A1 and S B1 occur, the non-fault switch tube SC1 The fault detection variable of C keeps M, <T3 and N3>W, so it is determined that S C1 No fault.

[0139] The simulation results show that the open-circuit fault diagnosis method based on the improved sliding mode observer proposed in this invention can effectively realize the single-switch and double-switch open-circuit fault diagnosis of the three-phase interleaved three-level DC-DC converter under the control of the average current sharing method and the master-slave current sharing method.

[0140] This embodiment is only a preferred specific implementation mode of this invention, but the protection scope of this invention is not limited thereto. Any change or replacement that can be easily thought of by those skilled in the art within the technical scope disclosed by this invention should be covered within the protection scope of this invention. Therefore, the protection scope of this invention should be subject to the protection scope of the claims.

Claims

1. A method for diagnosing open-circuit faults in a three-phase interleaved parallel three-level DC-DC converter, comprising: The inductor current i of a three-phase interleaved parallel three-level DC-DC converter L1 ~i L6 The sum of the three-phase inductor currents i L1 +i L4 i L2 +i L5 i L3 +i L6 A mathematical model of a three-phase interleaved parallel three-level DC-DC converter is established, with state variables as the parameters. Based on this, an improved sliding mode observer for the three-phase interleaved parallel three-level DC-DC converter is designed. Combining the observed values ​​output by the improved sliding mode observer with the actual values ​​of the sum of the inductor currents of the upper and lower arms of the same phase, a residual-based model is constructed. Fault detection variable M x x = A, B, C; taking advantage of the characteristic that the inductor current decreases fastest after a switch open-circuit fault, a structure based on the inductor current i is constructed. L1 ~i L6 The fault detection variable N is the difference between the current mean and the current mean. j j=1~6, j is the inductor number; the open-circuit fault diagnosis method for a three-phase interleaved parallel three-level DC-DC converter can be expressed as: ； If logical variable D j =1, then it means the inductor current i Lj The corresponding switching transistor experienced an open-circuit fault; T j The threshold is adaptive, and W is a fixed negative threshold. The fault detection variable ； In the formula, The residual of the sum of the inductance currents of the upper and lower bridge arms for each phase; The adaptive threshold T j Based on current i L1 ~i L6 The flowability parameters z1~z6 are designed to deviate from the mean flowability: ； In the formula, z j i represents the converter Lj The degree of balance between the current and the mean inductor current; Adaptive threshold T j for: ； Adaptive threshold T j It will rapidly decrease to 0, where the parameter k is used to characterize the adaptive threshold T. j The rate of decrease; ； The fixed negative threshold W is based on a single switching cycle T after an open-circuit fault occurs. s The degree of decrease in fault current within the circuit; one switching cycle T after a single-tube open-circuit fault. s Within the fault inductor, the difference between the fault inductor current and the mean current is: ； When a dual-tube fault occurs after a single-tube fault, the single switching cycle T s The difference between the internal fault inductor current and the mean current is: ； The fixed negative threshold W is designed as follows: ； In the formula, D is the average duty cycle, and V in L is the input voltage, and Lj is the inductance of each bridge arm, j=1-6.

2. The method for diagnosing open-circuit faults in a three-phase interleaved parallel three-level DC-DC converter according to claim 1, characterized in that: The mathematical model of the three-phase interleaved parallel three-level DC-DC converter is as follows: ； Among them, i(t)=[i L1 +i L4 i L2 +i L5 i L3 +i L6 ] T For state variables; u(t) = [V b1 V b2 V o ] T V is the input variable. b1 V b2 For the voltage divider capacitor C b1 C b2 Voltage, V o For output voltage; F k (t) represents the fault difference vector, with corresponding model differences existing only in the fault phase; C is a third-order identity matrix, and y is the output variable; the coefficient matrices A0 and B0 are respectively: ； ； L1~L6 are the inductors of each bridge arm, r L1 ~r L6 Let d be the equivalent resistance of each inductor. j The duty cycle of the main control switch connected to inductor Lj is j=1~6.

3. The method for diagnosing open-circuit faults in a three-phase interleaved parallel three-level DC-DC converter according to claim 1, characterized in that: The improved sliding mode observer for the three-phase interleaved parallel three-level DC-DC converter is: ； In the formula, These are the observed values ​​of the sum of the three-phase inductor currents; To improve the sliding surface of the sliding mode observer, which is also the residual between the observer output and the actual current; h is the observer gain; The adaptive approach rate is expressed as follows: ； Where 0 < ε < 1, a > 1.

4. The method for diagnosing open-circuit faults in a three-phase interleaved parallel three-level DC-DC converter according to claim 1, characterized in that: b=0.85, k=100.

5. The method for diagnosing open-circuit faults in a three-phase interleaved parallel three-level DC-DC converter according to claim 1, characterized in that: If there is no open-circuit fault in either the upper or lower half-bridge of a phase of the converter, then the inductor current and residual current of that phase will be... The fault detection variable M is close to 0. x The threshold T corresponding to the inductor current is 0.

5. j =2,M x <T j Determine T j There is no open-circuit fault in the corresponding switching transistor; if a single-transistor fault or a dual-transistor fault occurs in one phase of the converter, the inductor current and residual current of the faulted phase will be... Will deviate from 0, M x The threshold T corresponds to the fault inductor current as it approaches 1 from 0.

5. j =0, M x >T j Determine T j The corresponding switching transistor has an open circuit fault.

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