Bad block management method and system for FLASH single-mode data storage used in satellites

Abstract

This invention discloses a method and system for bad block management of FLASH single-mode data storage used in satellites. The method includes: dividing the FLASH chip into a data storage area, a bad block mapping area, and other data areas; constructing a bad block table in the other data areas; mapping bad block addresses in the bad block table to the bad block mapping table; checking if the currently operated MB is a bad block during data writing or reading, and if so, mapping it to the bad block mapping area for operation; marking the MB address as a bad block if a failure occurs during data erasure, writing, or reading; and marking the MB address as a bad block if the read data cannot be recovered normally during data reading. This invention is applied to the field of satellite data management, and can avoid data errors caused by bad blocks while increasing the data storage capacity compared to conventional triple-mode redundant storage, avoiding the problem of reduced actual storage capacity. Furthermore, the function is simple to implement, and the bad block detection and processing time is short.

Description

Technical Field

[0001] This invention relates to the field of satellite data management technology, specifically a method and system for managing bad blocks in FLASH single-mode data storage used in satellites. Background Technology

[0002] Flash memory is a commonly used storage device in satellite products. Its non-volatility and large storage capacity make it a common storage component in satellite applications. However, due to its manufacturing process, it contains a certain number of bad blocks at the time of manufacture. Furthermore, as the number of write and erase cycles increases during use, new bad blocks will inevitably appear. If bad blocks are not managed, data corruption can occur, rendering correct data incorrect and unusable, thus rendering the data located at the bad block location unusable for an extended period.

[0003] A common workaround is to skip bad block locations by adjusting commands, allowing the system to function normally. The drawbacks of this method are a decrease in actual usable capacity (bad blocks are typically 1MB in size) and the associated workload of adjusting commands, which can negatively impact the normal data processing flow when the satellite is in its final stages of operation.

[0004] Currently, in payloads or satellite subsystems lacking bad block management modules, bad blocks are typically handled by locating them on the ground through data comparison and skipping them by adjusting read / write address commands. This method requires modification every time a bad block is encountered, making it costly and inefficient—a significant problem in satellite data processing. While triple-mode redundancy ensures data accuracy for payloads or satellite subsystems using tri-mode storage, it reduces the storage space for actual effective data. Given the increasing demands for data volume, single-mode data storage combined with bad block management is more in line with market needs. Summary of the Invention

[0005] To address the shortcomings of the existing technology, this invention provides a method and system for managing bad blocks in FLASH single-mode data storage used in satellites. By employing a single-mode data storage and bad block mapping management method to manage bad blocks in FLASH, the satellite can avoid data errors caused by bad blocks during operation, thus preventing a reduction in actual storage capacity. Furthermore, no additional operations are required to avoid bad block issues during use.

[0006] To achieve the above objectives, this invention provides a method for managing bad blocks in FLASH single-mode data storage used in satellites, comprising the following steps:

[0007] Step 1: Divide the FLASH chip into a data storage area, a bad block mapping area, and other data areas. The bad block mapping area and the other data areas both adopt a triple-modular redundancy design.

[0008] Step 2: Construct the same bad block table in the three other data areas, wherein the bad block table corresponds to the address and bad block status of each 1MB space in the data storage area;

[0009] Step 3: After the FLASH chip is powered on, it enters the bad block self-test state, records the bad block addresses found during the self-test into the local cache, and writes all bad block addresses into each bad block table after the self-test is completed.

[0010] Step 4: The three-mode reads the bad block table stored in the other data areas, and then maps the bad block addresses in the bad block table to the bad block mapping table. The bad block mapping table corresponds to the address and bad block status of each 1MB space in the data storage area.

[0011] Step 5, after the FLASH chip enters the working state:

[0012] When writing or reading data to a whole MB address, the bad block mapping table is read to check if the current MB being operated on is a bad block. If it is, it is mapped to the three bad block mapping areas for operation. Otherwise, the operation is normal.

[0013] When erasing, writing, or reading data to a full MB address, if a failure occurs, the MB address is marked as a bad block, and the bad block table and bad block mapping table in the local cache are updated simultaneously.

[0014] When reading data to a full MB address, if the read data cannot be recovered normally, the MB address is marked as a bad block, and the bad block table and bad block mapping table in the local cache are updated at the same time.

[0015] Step 6: After the FLASH chip stops working, update the bad block table in the local cache to the three other data areas.

[0016] In one embodiment, step 3 specifically includes:

[0017] Erase every whole MB of address space in the data storage area, and record the current whole MB address locally when erasure fails;

[0018] After all whole MB address spaces in the data storage area have been erased, all whole MB addresses of all records are marked as bad blocks and written into the bad block table in the other storage areas.

[0019] In one embodiment, the mapping to the bad block map table is specifically as follows:

[0020] The three-mode system reads the bad block table stored in the other data areas, reads the redundant data from the three-mode system to update the local cache, and then maps the bad block addresses in the three bad block tables to the bad block mapping table. In other words, the three-mode bad block tables are stored locally to reduce the impact of on-orbit single-event flips.

[0021] In one embodiment, for any whole MB address, if all three bad block tables mark it as a bad block, then it is marked as a bad block in the bad block mapping table; otherwise, it is marked as a non-bad block.

[0022] To achieve the above objectives, the present invention also provides a bad block management system for FLASH single-mode data storage used in satellites, which uses the above-described method to manage bad blocks in FLASH single-mode data storage.

[0023] The FLASH single-mode data storage bad block management system includes:

[0024] The storage partitioning unit is used to divide the FLASH chip into a data storage area, a bad block mapping area, and other data areas, wherein the bad block mapping area and the other data areas both adopt a triple-modular redundancy design;

[0025] A bad block table construction unit is used to construct the same bad block table in the three other data areas, wherein the bad block table corresponds to the address and bad block status of each 1MB space in the data storage area;

[0026] The bad block self-test unit is used to enter the bad block self-test state after the FLASH chip is powered on, record the bad block addresses found during the self-test into the local cache, and write all bad block addresses into each bad block table after the self-test is completed.

[0027] The bad block table mapping unit is used to read the bad block table stored in the other data areas in the three-mode model, and then map the bad block addresses in the bad block table to the bad block mapping table. The bad block mapping table corresponds to the address and bad block status of each 1MB space in the data storage area.

[0028] The bad block management unit is used to: when writing or reading data to a whole MB address, check the bad block mapping table to see if the currently operated MB is a bad block. If it is, it maps the MB to one of the three bad block mapping areas for operation; otherwise, it operates normally. When erasing, writing, or reading data to a whole MB address, if a failure occurs, the MB address is marked as a bad block, and the bad block table and bad block mapping table in the local cache are updated. When reading data to a whole MB address, if the data cannot be recovered normally through ECC, the MB address is marked as a bad block, and the bad block table and bad block mapping table in the local cache are updated.

[0029] The bad block table update unit is used to update the locally cached bad block table to the three other data areas after the FLASH chip stops working.

[0030] In one embodiment, the FLASH single-mode data storage bad block management system further includes:

[0031] The bad block table remodeling unit is used to clear the data in the bad block table and rebuild the bad block table when the number of bad blocks in the bad block table increases frequently or the current number of bad blocks is abnormal.

[0032] In one embodiment, the FLASH single-mode data storage bad block management system further includes:

[0033] The re-self-test unit is used to re-test bad blocks to confirm whether bad blocks actually exist.

[0034] In one embodiment, the FLASH single-mode data storage bad block management system further includes:

[0035] The data output unit is used to output the address information of each bad block and the total number of bad blocks in real time.

[0036] In one embodiment, the FLASH single-mode data storage bad block management system further includes:

[0037] The bad block enable switch is used to disable bad block enable while allowing the address of the bad block to be accessed normally, thereby confirming whether the bad block judgment is true and valid.

[0038] Compared with the prior art, the present invention has the following beneficial technical effects:

[0039] 1. This invention uses a single-mode storage data area combined with bad block management for storage design. It can avoid data errors caused by bad blocks while making the storage data area have more data capacity than conventional triple-mode redundancy storage, avoiding the problem of reduced actual storage capacity. Moreover, the function is simple to implement and the bad block detection and processing time is short.

[0040] 2. This invention maps bad blocks by setting a bad block mapping area, which eliminates the need for additional operations to avoid bad block problems and requires no manual intervention.

[0041] 3. The bad block table and bad block mapping table in this invention have a one-to-one correspondence, which not only reduces the space consumed in FLASH storage, but also improves the efficiency of bad block lookup.

[0042] 4. In a preferred embodiment, the present invention can also output the number and location of bad blocks, which facilitates problem location and troubleshooting when bad blocks occur. Attached Figure Description

[0043] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0044] Figure 1 This is a flowchart of the bad block management method for FLASH single-mode data storage in Embodiment 1 of the present invention;

[0045] Figure 2 This is a schematic diagram of the FLASH chip partitioning result in Embodiment 1 of the present invention;

[0046] Figure 3 This is a structural block diagram of the FLASH single-mode data storage bad block management system in Embodiment 2 of the present invention.

[0047] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0048] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0049] Furthermore, the technical solutions of the various embodiments of the present invention can be combined with each other, but only if they are feasible for those skilled in the art. If the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of protection claimed by the present invention.

[0050] Definition of the noun:

[0051] Single-mode storage: Data is stored only once;

[0052] Tri-mode storage: The same data is stored three times;

[0053] Triple redundancy: If two of the three sets of data are identical, then the content of those two sets of data shall prevail.

[0054] Bad blocks: These are generated during the production or use of FLASH devices. Bad block areas cannot be erased, written to, or read from normally. Any one of these three will cause abnormalities in the stored data.

[0055] Local cache: The storage unit of the chip that implements this function;

[0056] Offset address: The portion of a fixed address (base address) exceeding this offset address is the offset address. For example, if the base address is 0x40000, then address 0x40001 can be considered as an offset of 0x1 from the base address 0x40000. The offset address is 0x1.

[0057] Example 1

[0058] This embodiment discloses a bad block management method for FLASH single-mode data storage used in satellites. By adopting a management method of single-mode data storage and bad block mapping to manage bad blocks in FLASH, the satellite can avoid data errors caused by bad blocks during operation, thus avoiding the problem of reduced actual storage capacity. At the same time, no additional operations are required to avoid bad block problems during use.

[0059] Flash chips can be identified as having bad blocks using the following three methods. The size of a single operation varies depending on the flash chip; this example uses a 1MB operation size as an example.

[0060] 1. After erasure, the status register is used to determine whether the MB is a good block or a bad block. If the erasure is successful, the MB is considered a good block; if the erasure fails, the MB is considered a bad block.

[0061] 2. After writing data, the status register is used to determine whether the block is a good block or a bad block. If the write is successful, the block is considered a good block; if the write fails, the block is considered a bad block.

[0062] 3. After reading the data, the status register is used to determine whether the MB is a good block or a bad block. If the reading is successful, the MB is considered a good block; if the reading fails, the MB is considered a bad block.

[0063] To ensure the reliability of single-mode data storage, this embodiment employs the three methods mentioned above for bad block detection simultaneously with the FLASH chip entering its working state. Furthermore, since FLASH chips themselves are prone to bit flipping (meaning even good blocks can experience bit flips leading to data errors), this embodiment adds an ECC algorithm for error correction. Specifically, ECC is incorporated into the bad block detection process; if the ECC error correction mechanism fails, the corresponding storage space is considered bad. The ECC error correction mechanism involves dividing every 1024 bytes of data in the FLASH chip's storage space into 896 valid data bytes and 128 parity bytes, utilizing the ECC algorithm to reduce errors caused by FLASH chip bit flipping.

[0064] In practical applications, there is a limit to the number of bad blocks in a FLASH chip. For example, if the usable capacity of a 4096MB FLASH chip is greater than 4016MB, the upper limit for bad blocks is no more than 2% of the storage capacity. Therefore, this embodiment reserves a bad block mapping area as replacement storage space for bad blocks, avoiding a reduction in actual effective space, and eliminating the need to avoid bad block space through instructions or other operations.

[0065] refer to Figure 1 In this embodiment, the bad block management method for FLASH single-mode data storage used by the satellite specifically includes the following steps 1 to 6.

[0066] Step 1: Divide the FLASH chip into a data storage area, a bad block mapping area, and other data areas. Specifically:

[0067] The data storage area is used to store valid data required for operation. The bad block mapping area is used to replace bad blocks when they occur. Other data areas are used to store the bad block table and the data that needs to be stored. In practical applications, when dividing the FLASH chip, it is also possible not to divide other data areas, that is, to store other data areas on other non-failed devices, such as RAM, DDR, etc.

[0068] More specifically, the bad block mapping area and other data areas all adopt a triple modular redundancy design to ensure data integrity, for example... Figure 2 The diagram shown illustrates the partitioning of a FLASH chip with a storage capacity of 4096MB.

[0069] Step 2: Construct identical bad block tables and bad block self-check tables in the three other data areas. Specifically:

[0070] The bad block self-test table is used as a marker to indicate whether the device has completed its self-test. The bad block table is an address table that records the addresses of those that have been marked as bad blocks. That is, the bad block table corresponds to the address and bad block status of each 1MB space in the data storage area.

[0071] Taking a 4096MB FLASH memory as an example, the bad block self-test table is filled with 1KB of AA55 data. When the result of the three-modulus reading of the bad block self-test table after power-on is AA55, it is considered that the device has completed the self-test; otherwise, it is considered that the device has not performed a self-test and needs to enter the self-test state. The bad block table is 1KB in size. Assuming that the 12MB, 25MB, 80MB, 500MB, and 900MB are bad blocks, the bad block table is filled in the order in which they appear, as shown in Table 1.

[0072] Table 1

[0073]

[0074] When a new bad block is added during use, it can be added after the previous block list. For example, if an 800MB bad block is added, the bad block table will change to the style shown in Table 2.

[0075] Table 2

[0076]

[0077] Step 3: After the FLASH chip powers on, it enters a bad block self-test state. The addresses of bad blocks detected during the self-test are recorded in the local cache, and after the self-test is complete, all bad block addresses are written to each bad block table. In this embodiment, the specific implementation process of step 3 is as follows:

[0078] Erase every full MB of address space in the data storage area, and record the current full MB address locally when an erasure fails;

[0079] Once all whole MB address spaces in the data storage area have been erased, all whole MB addresses of all records are marked as bad blocks and written to the bad block table in other storage areas.

[0080] In practical applications, the self-test process is calculated based on the size of the erased capacity. Taking a 4096MB FLASH as an example, assuming a maximum erase time of 7ms for 1MB, 4096×0.007=28.672s. The erase process takes a maximum of 28.672s. Adding the device processing time, the self-test is completed in at most 30s, thus ensuring the high efficiency of the self-test.

[0081] Step 4: The three-mode system reads the bad block table stored in other data areas, and then maps the bad block addresses in the bad block table to a bad block mapping table. The bad block mapping table corresponds to the address and bad block status of each 1MB of space in the data storage area. In this embodiment, the specific implementation process of step 4 is as follows:

[0082] The three-mode system reads bad block tables stored in other data areas, updates its local cache with redundant data, and then maps the bad block addresses from the three bad block tables to a bad block mapping table. In other words, the three-mode bad block tables are stored locally to reduce the impact of on-orbit single-event flips. Specifically, for any full MB address, if all three bad block tables mark it as a bad block, it is marked as a bad block in the bad block mapping table; otherwise, it is marked as a non-bad block.

[0083] Taking a 4096MB FLASH memory as an example, its bad block mapping area is 100MB in size, and its offset address size can be represented by a 7-bit width. Another 3 bits are used as a tri-mode signal; when all 3 bits are 1, it represents a bad block in that MB; otherwise, it represents a non-bad block. Taking the bad block table in Table 2 as an example, its mapped bad block mapping table is shown in Table 3.

[0084] Table 3

[0085]

[0086] Step 5, after the FLASH chip enters the working state:

[0087] When writing or reading data to a whole MB address, the bad block mapping table is read to check if the current MB is a bad block. If it is, it is mapped to three bad block mapping areas for operation. Otherwise, the operation is normal.

[0088] When erasing, writing, or reading data to a full MB address, if a failure occurs, the MB address is marked as a bad block, and the bad block table and bad block mapping table in the local cache are updated simultaneously.

[0089] When reading data to a full MB address, if the data cannot be recovered normally through ECC, the MB address is marked as a bad block, and the bad block table and bad block mapping table in the local cache are updated at the same time.

[0090] Step 6: After the FLASH chip stops working, update the bad block table in the local cache to the three other data areas. In actual application, if the bad block table in the local cache does not change, this step is not performed.

[0091] In a preferred embodiment, when the number of bad blocks in the bad block table increases frequently (e.g., more than two bad blocks are added within ten minutes) or the current number of bad blocks is abnormal (e.g., the current number of bad blocks exceeds a threshold), the data in the bad block table and the bad block preset table are cleared, and the bad block table and the bad block preset table are rebuilt. Alternatively, a bad block re-self-check function can be used to re-check the bad blocks and confirm whether they actually exist.

[0092] In a preferred embodiment, the FLASH single-mode data storage bad block management method in this embodiment further includes real-time output of the address information of each bad block and the total number of bad blocks. For example, the bad block count increases by 1 for each bad block generated, and the specific address information of each bad block is output in real time at one-second intervals to facilitate subsequent problem location and troubleshooting. In addition, the FLASH single-mode data storage bad block management method in this embodiment also has bad block enable control, which can keep the address of the bad block location accessible while disabling bad block enable, thereby confirming whether the bad block judgment is true and effective.

[0093] It is worth noting that, in addition to the judgment method built into the FLASH chip, the bad block judgment method in the FLASH single-mode data storage bad block management method of this embodiment can also be performed by adding verification data to the FLASH and calculating whether the verification data is correct when reading it out. Moreover, the verification and error correction method is not limited to the ECC error correction algorithm.

[0094] It is worth noting that, although this embodiment Figure 1 The steps are shown sequentially as indicated by the arrows, but they are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order in which these steps are performed; they can be executed in other orders. Figure 1 At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.

[0095] Example 2

[0096] Based on the FLASH single-mode data storage bad block management method in Embodiment 1, this embodiment discloses a FLASH single-mode data storage bad block management system used in satellites. (Refer to...) Figure 3 The FLASH single-mode data storage bad block management system includes a storage partitioning unit, a bad block table construction unit, a bad block self-test unit, a bad block table mapping unit, a bad block management unit and a bad block table update unit, a bad block table reconstruction unit, a re-self-test unit, a data output unit and a bad block enable switch, and performs FLASH data storage bad block management by adopting the FLASH single-mode data storage bad block management method of Embodiment 1.

[0097] Specifically:

[0098] The storage partitioning unit is used to divide the FLASH chip into a data storage area, a bad block mapping area, and other data areas. The bad block mapping area and other data areas both adopt a triple-modal redundancy design.

[0099] The bad block table construction unit is used to construct the same bad block table in three other data areas, where the bad block table corresponds to the address and bad block status of each 1MB space in the data storage area;

[0100] The bad block self-test unit is used to enter the bad block self-test state after the FLASH chip is powered on, record the bad block addresses found during the self-test into the local cache, and write all bad block addresses into each bad block table after the self-test is completed.

[0101] The bad block table mapping unit is used to read the bad block table stored in other data areas in the three-mode model, and then map the bad block addresses in the bad block table to the bad block mapping table. The bad block mapping table corresponds to the address and bad block status of each 1MB space in the data storage area.

[0102] The bad block management unit is used after the FLASH chip enters the working state: when writing or reading data to a whole MB address, it reads the bad block mapping table to check if the currently operated MB is a bad block. If it is, it maps it to one of the three bad block mapping areas for operation; otherwise, it operates normally. When erasing, writing, or reading data to a whole MB address, if a failure occurs, the MB address is marked as a bad block, and the bad block table and bad block mapping table in the local cache are updated. When reading data to a whole MB address, if the data cannot be recovered normally through ECC, the MB address is marked as a bad block, and the bad block table and bad block mapping table in the local cache are updated.

[0103] The bad block table update unit is used to update the locally cached bad block table to three other data areas after the FLASH chip stops working.

[0104] The bad block table remodeling unit is used to clear the data in the bad block table and rebuild the bad block table when the number of bad blocks in the bad block table increases frequently or the current number of bad blocks is abnormal.

[0105] The re-self-test unit is used to re-test bad blocks to confirm whether bad blocks actually exist;

[0106] The data output unit is used to output the address information of each bad block in real time, as well as the total number of bad blocks;

[0107] The bad block enable switch is used to disable bad block enable while allowing the address of the bad block to be accessed normally, thereby confirming whether the bad block judgment is true and valid.

[0108] In this embodiment, the specific working process and working principle of the storage partitioning unit, bad block table construction unit, bad block self-test unit, bad block table mapping unit, bad block management unit and bad block table update unit, bad block table reconstruction unit, re-self-test unit, data output unit and bad block enable switch are the same as those in Embodiment 1, therefore, they will not be described again in this embodiment. Each unit module can be implemented entirely or partially through software, hardware, or a combination thereof. Each unit module can be embedded in the processor of the computer device in hardware form or independent of it, or it can be stored in the memory of the computer device in software form, so that the processor can call and execute the operations corresponding to the above unit modules.

[0109] The above description is merely a preferred embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structural transformations made using the contents of the present invention's specification and drawings under the inventive concept of the present invention, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the present invention.

Claims

1. A method for managing bad blocks in FLASH single-mode data storage used in satellites, characterized in that, The steps include: Step 1: Divide the FLASH chip into a data storage area, a bad block mapping area, and other data areas. The bad block mapping area and the other data areas both adopt a triple-modular redundancy design. Step 2: Construct the same bad block table in the three other data areas, wherein the bad block table corresponds to the address and bad block status of each 1MB space in the data storage area; Step 3: After the FLASH chip is powered on, it enters the bad block self-test state, records the bad block addresses found during the self-test into the local cache, and writes all bad block addresses into each bad block table after the self-test is completed. Step 4: The three-mode system reads the bad block table stored in the other data areas, and then maps the bad block addresses in the bad block table to a bad block mapping table. Specifically, the bad block mapping table corresponds to the address and bad block status of each 1MB of space in the data storage area. The three-mode system reads the bad block table stored in the other data areas, reads the redundant data from the three-mode system to update the local cache, and then maps the bad block addresses in the three bad block tables to the bad block mapping table. That is, the three-mode bad block tables are stored locally to reduce the impact of on-orbit single-event flips. For any whole MB address, if all three bad block tables mark it as a bad block, then it is marked as a bad block in the bad block mapping table; otherwise, it is marked as a non-bad block. Step 5, after the FLASH chip enters the working state: When writing or reading data to a whole MB address, the bad block mapping table is read to check whether the whole MB space currently being operated on is a bad block. If it is, it is mapped to the three bad block mapping areas at the same time for operation; otherwise, normal operation is performed. When erasing, writing, or reading data to a full MB address, if a failure occurs, the full MB address is marked as a bad block, and the bad block table and bad block mapping table in the local cache are updated simultaneously. When reading data to a full MB address, if the read data cannot be recovered normally, the full MB address is marked as a bad block, and the bad block table and bad block mapping table in the local cache are updated at the same time. Step 6: After the FLASH chip stops working, update the bad block table in the local cache to the three other data areas.

2. The method for managing bad blocks in FLASH single-mode data storage used in satellites according to claim 1, characterized in that, Step 3 specifically includes: Erase every whole MB of address space in the data storage area, and record the current whole MB address locally when erasure fails; After all whole MB address spaces in the data storage area have been erased, all whole MB addresses of the records are marked as bad blocks and written into the bad block table in the other data areas.

3. A bad block management system for FLASH single-mode data storage used in satellites, characterized in that, The method described in any one of claims 1 to 2 is used for bad block management of FLASH single-mode data storage; The FLASH single-mode data storage bad block management system includes: The storage partitioning unit is used to divide the FLASH chip into a data storage area, a bad block mapping area, and other data areas, wherein the bad block mapping area and the other data areas both adopt a triple-modular redundancy design; A bad block table construction unit is used to construct the same bad block table in the three other data areas, wherein the bad block table corresponds to the address and bad block status of each 1MB space in the data storage area; The bad block self-test unit is used to enter the bad block self-test state after the FLASH chip is powered on, record the bad block addresses found during the self-test into the local cache, and write all bad block addresses into each bad block table after the self-test is completed. The bad block table mapping unit is used to read the bad block table stored in the other data areas in the three-mode model, and then map the bad block addresses in the bad block table to the bad block mapping table. The bad block mapping table corresponds to the address and bad block status of each 1MB space in the data storage area. The bad block management unit is used to: when writing or reading data to a whole MB address, check the bad block mapping table to see if the whole MB space being operated on is a bad block. If so, it maps the data to one of the three bad block mapping areas for operation; otherwise, it operates normally. When erasing, writing, or reading data to a whole MB address, if a failure occurs, the whole MB address is marked as a bad block, and the bad block table and bad block mapping table in the local cache are updated. When reading data to a whole MB address, if the data cannot be recovered normally through ECC, the whole MB address is marked as a bad block, and the bad block table and bad block mapping table in the local cache are updated. The bad block table update unit is used to update the locally cached bad block table to the three other data areas after the FLASH chip stops working.

4. The FLASH single-mode data storage bad block management system for satellites according to claim 3, characterized in that, The FLASH single-mode data storage bad block management system also includes: The bad block table remodeling unit is used to clear the data in the bad block table and rebuild the bad block table when the number of bad blocks in the bad block table increases frequently or the current number of bad blocks is abnormal.

5. The FLASH single-mode data storage bad block management system for satellites according to claim 3, characterized in that, The FLASH single-mode data storage bad block management system also includes: The re-self-test unit is used to re-test bad blocks to confirm whether bad blocks actually exist.

6. The FLASH single-mode data storage bad block management system for satellites according to claim 3, characterized in that, The FLASH single-mode data storage bad block management system also includes: The data output unit is used to output the address information of each bad block and the total number of bad blocks in real time.

7. The FLASH single-mode data storage bad block management system for satellites according to claim 3, characterized in that, The FLASH single-mode data storage bad block management system also includes: The bad block enable switch is used to disable bad block enable while allowing the address of the bad block to be accessed normally, thereby confirming whether the bad block judgment is true and valid.

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